2 * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration.
4 * Copyright (c) 2013, Intel Corporation.
6 * Authors: Ramesh Babu K V <Ramesh.Babu@intel.com>
7 * Authors: Omair Mohammed Abdullah <omair.m.abdullah@intel.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/slab.h>
26 #include <linux/platform_device.h>
27 #include <linux/firmware.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/pm_qos.h>
30 #include <linux/dmi.h>
31 #include <linux/acpi.h>
32 #include <asm/platform_sst_audio.h>
33 #include <sound/core.h>
34 #include <sound/soc.h>
35 #include <sound/compress_driver.h>
36 #include <acpi/acbuffer.h>
37 #include <acpi/platform/acenv.h>
38 #include <acpi/platform/aclinux.h>
39 #include <acpi/actypes.h>
40 #include <acpi/acpi_bus.h>
41 #include <asm/cpu_device_id.h>
42 #include <asm/iosf_mbi.h>
43 #include <sound/soc-acpi.h>
44 #include <sound/soc-acpi-intel-match.h>
45 #include "../sst-mfld-platform.h"
46 #include "../../common/sst-dsp.h"
49 /* LPE viewpoint addresses */
50 #define SST_BYT_IRAM_PHY_START 0xff2c0000
51 #define SST_BYT_IRAM_PHY_END 0xff2d4000
52 #define SST_BYT_DRAM_PHY_START 0xff300000
53 #define SST_BYT_DRAM_PHY_END 0xff320000
54 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */
55 #define SST_BYT_IMR_VIRT_END 0xc01fffff
56 #define SST_BYT_SHIM_PHY_ADDR 0xff340000
57 #define SST_BYT_MBOX_PHY_ADDR 0xff344000
58 #define SST_BYT_DMA0_PHY_ADDR 0xff298000
59 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000
60 #define SST_BYT_SSP0_PHY_ADDR 0xff2a0000
61 #define SST_BYT_SSP2_PHY_ADDR 0xff2a2000
63 #define BYT_FW_MOD_TABLE_OFFSET 0x80000
64 #define BYT_FW_MOD_TABLE_SIZE 0x100
65 #define BYT_FW_MOD_OFFSET (BYT_FW_MOD_TABLE_OFFSET + BYT_FW_MOD_TABLE_SIZE)
67 static const struct sst_info byt_fwparse_info
= {
70 .iram_start
= SST_BYT_IRAM_PHY_START
,
71 .iram_end
= SST_BYT_IRAM_PHY_END
,
73 .dram_start
= SST_BYT_DRAM_PHY_START
,
74 .dram_end
= SST_BYT_DRAM_PHY_END
,
76 .imr_start
= SST_BYT_IMR_VIRT_START
,
77 .imr_end
= SST_BYT_IMR_VIRT_END
,
79 .mailbox_start
= SST_BYT_MBOX_PHY_ADDR
,
81 .lpe_viewpt_rqd
= true,
84 static const struct sst_ipc_info byt_ipc_info
= {
86 .mbox_recv_off
= 0x400,
89 static const struct sst_lib_dnld_info byt_lib_dnld_info
= {
90 .mod_base
= SST_BYT_IMR_VIRT_START
,
91 .mod_end
= SST_BYT_IMR_VIRT_END
,
92 .mod_table_offset
= BYT_FW_MOD_TABLE_OFFSET
,
93 .mod_table_size
= BYT_FW_MOD_TABLE_SIZE
,
94 .mod_ddr_dnld
= false,
97 static const struct sst_res_info byt_rvp_res_info
= {
98 .shim_offset
= 0x140000,
99 .shim_size
= 0x000100,
100 .shim_phy_addr
= SST_BYT_SHIM_PHY_ADDR
,
101 .ssp0_offset
= 0xa0000,
103 .dma0_offset
= 0x98000,
105 .dma1_offset
= 0x9c000,
107 .iram_offset
= 0x0c0000,
108 .iram_size
= 0x14000,
109 .dram_offset
= 0x100000,
110 .dram_size
= 0x28000,
111 .mbox_offset
= 0x144000,
113 .acpi_lpe_res_index
= 0,
115 .acpi_ipc_irq_index
= 5,
118 /* BYTCR has different BIOS from BYT */
119 static const struct sst_res_info bytcr_res_info
= {
120 .shim_offset
= 0x140000,
121 .shim_size
= 0x000100,
122 .shim_phy_addr
= SST_BYT_SHIM_PHY_ADDR
,
123 .ssp0_offset
= 0xa0000,
125 .dma0_offset
= 0x98000,
127 .dma1_offset
= 0x9c000,
129 .iram_offset
= 0x0c0000,
130 .iram_size
= 0x14000,
131 .dram_offset
= 0x100000,
132 .dram_size
= 0x28000,
133 .mbox_offset
= 0x144000,
135 .acpi_lpe_res_index
= 0,
137 .acpi_ipc_irq_index
= 0
140 static struct sst_platform_info byt_rvp_platform_data
= {
141 .probe_data
= &byt_fwparse_info
,
142 .ipc_info
= &byt_ipc_info
,
143 .lib_info
= &byt_lib_dnld_info
,
144 .res_info
= &byt_rvp_res_info
,
145 .platform
= "sst-mfld-platform",
148 /* Cherryview (Cherrytrail and Braswell) uses same mrfld dpcm fw as Baytrail,
149 * so pdata is same as Baytrail.
151 static struct sst_platform_info chv_platform_data
= {
152 .probe_data
= &byt_fwparse_info
,
153 .ipc_info
= &byt_ipc_info
,
154 .lib_info
= &byt_lib_dnld_info
,
155 .res_info
= &byt_rvp_res_info
,
156 .platform
= "sst-mfld-platform",
159 static int sst_platform_get_resources(struct intel_sst_drv
*ctx
)
161 struct resource
*rsrc
;
162 struct platform_device
*pdev
= to_platform_device(ctx
->dev
);
164 /* All ACPI resource request here */
166 rsrc
= platform_get_resource(pdev
, IORESOURCE_MEM
,
167 ctx
->pdata
->res_info
->acpi_lpe_res_index
);
169 dev_err(ctx
->dev
, "Invalid SHIM base from IFWI\n");
172 dev_info(ctx
->dev
, "LPE base: %#x size:%#x", (unsigned int) rsrc
->start
,
173 (unsigned int)resource_size(rsrc
));
175 ctx
->iram_base
= rsrc
->start
+ ctx
->pdata
->res_info
->iram_offset
;
176 ctx
->iram_end
= ctx
->iram_base
+ ctx
->pdata
->res_info
->iram_size
- 1;
177 dev_info(ctx
->dev
, "IRAM base: %#x", ctx
->iram_base
);
178 ctx
->iram
= devm_ioremap_nocache(ctx
->dev
, ctx
->iram_base
,
179 ctx
->pdata
->res_info
->iram_size
);
181 dev_err(ctx
->dev
, "unable to map IRAM\n");
185 ctx
->dram_base
= rsrc
->start
+ ctx
->pdata
->res_info
->dram_offset
;
186 ctx
->dram_end
= ctx
->dram_base
+ ctx
->pdata
->res_info
->dram_size
- 1;
187 dev_info(ctx
->dev
, "DRAM base: %#x", ctx
->dram_base
);
188 ctx
->dram
= devm_ioremap_nocache(ctx
->dev
, ctx
->dram_base
,
189 ctx
->pdata
->res_info
->dram_size
);
191 dev_err(ctx
->dev
, "unable to map DRAM\n");
195 ctx
->shim_phy_add
= rsrc
->start
+ ctx
->pdata
->res_info
->shim_offset
;
196 dev_info(ctx
->dev
, "SHIM base: %#x", ctx
->shim_phy_add
);
197 ctx
->shim
= devm_ioremap_nocache(ctx
->dev
, ctx
->shim_phy_add
,
198 ctx
->pdata
->res_info
->shim_size
);
200 dev_err(ctx
->dev
, "unable to map SHIM\n");
204 /* reassign physical address to LPE viewpoint address */
205 ctx
->shim_phy_add
= ctx
->pdata
->res_info
->shim_phy_addr
;
207 /* Get mailbox addr */
208 ctx
->mailbox_add
= rsrc
->start
+ ctx
->pdata
->res_info
->mbox_offset
;
209 dev_info(ctx
->dev
, "Mailbox base: %#x", ctx
->mailbox_add
);
210 ctx
->mailbox
= devm_ioremap_nocache(ctx
->dev
, ctx
->mailbox_add
,
211 ctx
->pdata
->res_info
->mbox_size
);
213 dev_err(ctx
->dev
, "unable to map mailbox\n");
217 /* reassign physical address to LPE viewpoint address */
218 ctx
->mailbox_add
= ctx
->info
.mailbox_start
;
220 rsrc
= platform_get_resource(pdev
, IORESOURCE_MEM
,
221 ctx
->pdata
->res_info
->acpi_ddr_index
);
223 dev_err(ctx
->dev
, "Invalid DDR base from IFWI\n");
226 ctx
->ddr_base
= rsrc
->start
;
227 ctx
->ddr_end
= rsrc
->end
;
228 dev_info(ctx
->dev
, "DDR base: %#x", ctx
->ddr_base
);
229 ctx
->ddr
= devm_ioremap_nocache(ctx
->dev
, ctx
->ddr_base
,
230 resource_size(rsrc
));
232 dev_err(ctx
->dev
, "unable to map DDR\n");
237 ctx
->irq_num
= platform_get_irq(pdev
,
238 ctx
->pdata
->res_info
->acpi_ipc_irq_index
);
242 static int is_byt(void)
245 static const struct x86_cpu_id cpu_ids
[] = {
246 { X86_VENDOR_INTEL
, 6, 55 }, /* Valleyview, Bay Trail */
249 if (x86_match_cpu(cpu_ids
))
254 static int is_byt_cr(struct device
*dev
, bool *bytcr
)
258 if (IS_ENABLED(CONFIG_IOSF_MBI
)) {
261 if (!is_byt() || !iosf_mbi_available()) {
266 status
= iosf_mbi_read(BT_MBI_UNIT_PMC
, /* 0x04 PUNIT */
267 MBI_REG_READ
, /* 0x10 */
268 0x006, /* BIOS_CONFIG */
272 dev_err(dev
, "could not read PUNIT BIOS_CONFIG\n");
274 /* bits 26:27 mirror PMIC options */
275 bios_status
= (bios_status
>> 26) & 3;
277 if ((bios_status
== 1) || (bios_status
== 3))
280 dev_info(dev
, "BYT-CR not detected\n");
283 dev_info(dev
, "IOSF_MBI not enabled, no BYT-CR detection\n");
289 static int sst_acpi_probe(struct platform_device
*pdev
)
291 struct device
*dev
= &pdev
->dev
;
293 struct intel_sst_drv
*ctx
;
294 const struct acpi_device_id
*id
;
295 struct snd_soc_acpi_mach
*mach
;
296 struct platform_device
*mdev
;
297 struct platform_device
*plat_dev
;
298 struct sst_platform_info
*pdata
;
302 id
= acpi_match_device(dev
->driver
->acpi_match_table
, dev
);
305 dev_dbg(dev
, "for %s\n", id
->id
);
307 mach
= (struct snd_soc_acpi_mach
*)id
->driver_data
;
308 mach
= snd_soc_acpi_find_machine(mach
);
310 dev_err(dev
, "No matching machine driver found\n");
315 mach
->pdata
= &byt_rvp_platform_data
;
317 mach
->pdata
= &chv_platform_data
;
320 ret
= kstrtouint(id
->id
, 16, &dev_id
);
322 dev_err(dev
, "Unique device id conversion error: %d\n", ret
);
326 dev_dbg(dev
, "ACPI device id: %x\n", dev_id
);
328 ret
= sst_alloc_drv_context(&ctx
, dev
, dev_id
);
332 ret
= is_byt_cr(dev
, &bytcr
);
333 if (!((ret
< 0) || (bytcr
== false))) {
334 dev_info(dev
, "Detected Baytrail-CR platform\n");
336 /* override resource info */
337 byt_rvp_platform_data
.res_info
= &bytcr_res_info
;
340 plat_dev
= platform_device_register_data(dev
, pdata
->platform
, -1,
342 if (IS_ERR(plat_dev
)) {
343 dev_err(dev
, "Failed to create machine device: %s\n",
345 return PTR_ERR(plat_dev
);
349 * Create platform device for sst machine driver,
350 * pass machine info as pdata
352 mdev
= platform_device_register_data(dev
, mach
->drv_name
, -1,
353 (const void *)mach
, sizeof(*mach
));
355 dev_err(dev
, "Failed to create machine device: %s\n",
357 return PTR_ERR(mdev
);
360 /* Fill sst platform data */
362 strcpy(ctx
->firmware_name
, mach
->fw_filename
);
364 ret
= sst_platform_get_resources(ctx
);
368 ret
= sst_context_init(ctx
);
372 sst_configure_runtime_pm(ctx
);
373 platform_set_drvdata(pdev
, ctx
);
378 * intel_sst_remove - remove function
380 * @pdev: platform device structure
382 * This function is called by OS when a device is unloaded
383 * This frees the interrupt etc
385 static int sst_acpi_remove(struct platform_device
*pdev
)
387 struct intel_sst_drv
*ctx
;
389 ctx
= platform_get_drvdata(pdev
);
390 sst_context_cleanup(ctx
);
391 platform_set_drvdata(pdev
, NULL
);
395 static const struct acpi_device_id sst_acpi_ids
[] = {
396 { "80860F28", (unsigned long)&snd_soc_acpi_intel_baytrail_machines
},
397 { "808622A8", (unsigned long)&snd_soc_acpi_intel_cherrytrail_machines
},
401 MODULE_DEVICE_TABLE(acpi
, sst_acpi_ids
);
403 static struct platform_driver sst_acpi_driver
= {
405 .name
= "intel_sst_acpi",
406 .acpi_match_table
= ACPI_PTR(sst_acpi_ids
),
409 .probe
= sst_acpi_probe
,
410 .remove
= sst_acpi_remove
,
413 module_platform_driver(sst_acpi_driver
);
415 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine ACPI Driver");
416 MODULE_AUTHOR("Ramesh Babu K V");
417 MODULE_AUTHOR("Omair Mohammed Abdullah");
418 MODULE_LICENSE("GPL v2");