sound/soc/intel/atom/sst/sst_acpi.c

   1 /*
   2  * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration.
   3  *
   4  * Copyright (c) 2013, Intel Corporation.
   5  *
   6  *  Authors:    Ramesh Babu K V <Ramesh.Babu@intel.com>
   7  *  Authors:    Omair Mohammed Abdullah <omair.m.abdullah@intel.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms and conditions of the GNU General Public License,
  11  * version 2, as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope it will be useful, but WITHOUT
  14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16  * more details.
  17  *
  18  *
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/fs.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/slab.h>
  25 #include <linux/io.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/firmware.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/pm_qos.h>
  30 #include <linux/dmi.h>
  31 #include <linux/acpi.h>
  32 #include <asm/platform_sst_audio.h>
  33 #include <sound/core.h>
  34 #include <sound/soc.h>
  35 #include <sound/compress_driver.h>
  36 #include <acpi/acbuffer.h>
  37 #include <acpi/platform/acenv.h>
  38 #include <acpi/platform/aclinux.h>
  39 #include <acpi/actypes.h>
  40 #include <acpi/acpi_bus.h>
  41 #include <asm/cpu_device_id.h>
  42 #include <asm/iosf_mbi.h>
  43 #include <sound/soc-acpi.h>
  44 #include "../sst-mfld-platform.h"
  45 #include "../../common/sst-dsp.h"
  46 #include "sst.h"
  47
  48 /* LPE viewpoint addresses */
  49 #define SST_BYT_IRAM_PHY_START  0xff2c0000
  50 #define SST_BYT_IRAM_PHY_END    0xff2d4000
  51 #define SST_BYT_DRAM_PHY_START  0xff300000
  52 #define SST_BYT_DRAM_PHY_END    0xff320000
  53 #define SST_BYT_IMR_VIRT_START  0xc0000000 /* virtual addr in LPE */
  54 #define SST_BYT_IMR_VIRT_END    0xc01fffff
  55 #define SST_BYT_SHIM_PHY_ADDR   0xff340000
  56 #define SST_BYT_MBOX_PHY_ADDR   0xff344000
  57 #define SST_BYT_DMA0_PHY_ADDR   0xff298000
  58 #define SST_BYT_DMA1_PHY_ADDR   0xff29c000
  59 #define SST_BYT_SSP0_PHY_ADDR   0xff2a0000
  60 #define SST_BYT_SSP2_PHY_ADDR   0xff2a2000
  61
  62 #define BYT_FW_MOD_TABLE_OFFSET 0x80000
  63 #define BYT_FW_MOD_TABLE_SIZE   0x100
  64 #define BYT_FW_MOD_OFFSET       (BYT_FW_MOD_TABLE_OFFSET + BYT_FW_MOD_TABLE_SIZE)
  65
  66 static const struct sst_info byt_fwparse_info = {
  67         .use_elf        = false,
  68         .max_streams    = 25,
  69         .iram_start     = SST_BYT_IRAM_PHY_START,
  70         .iram_end       = SST_BYT_IRAM_PHY_END,
  71         .iram_use       = true,
  72         .dram_start     = SST_BYT_DRAM_PHY_START,
  73         .dram_end       = SST_BYT_DRAM_PHY_END,
  74         .dram_use       = true,
  75         .imr_start      = SST_BYT_IMR_VIRT_START,
  76         .imr_end        = SST_BYT_IMR_VIRT_END,
  77         .imr_use        = true,
  78         .mailbox_start  = SST_BYT_MBOX_PHY_ADDR,
  79         .num_probes     = 0,
  80         .lpe_viewpt_rqd  = true,
  81 };
  82
  83 static const struct sst_ipc_info byt_ipc_info = {
  84         .ipc_offset = 0,
  85         .mbox_recv_off = 0x400,
  86 };
  87
  88 static const struct sst_lib_dnld_info  byt_lib_dnld_info = {
  89         .mod_base           = SST_BYT_IMR_VIRT_START,
  90         .mod_end            = SST_BYT_IMR_VIRT_END,
  91         .mod_table_offset   = BYT_FW_MOD_TABLE_OFFSET,
  92         .mod_table_size     = BYT_FW_MOD_TABLE_SIZE,
  93         .mod_ddr_dnld       = false,
  94 };
  95
  96 static const struct sst_res_info byt_rvp_res_info = {
  97         .shim_offset = 0x140000,
  98         .shim_size = 0x000100,
  99         .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR,
 100         .ssp0_offset = 0xa0000,
 101         .ssp0_size = 0x1000,
 102         .dma0_offset = 0x98000,
 103         .dma0_size = 0x4000,
 104         .dma1_offset = 0x9c000,
 105         .dma1_size = 0x4000,
 106         .iram_offset = 0x0c0000,
 107         .iram_size = 0x14000,
 108         .dram_offset = 0x100000,
 109         .dram_size = 0x28000,
 110         .mbox_offset = 0x144000,
 111         .mbox_size = 0x1000,
 112         .acpi_lpe_res_index = 0,
 113         .acpi_ddr_index = 2,
 114         .acpi_ipc_irq_index = 5,
 115 };
 116
 117 /* BYTCR has different BIOS from BYT */
 118 static const struct sst_res_info bytcr_res_info = {
 119         .shim_offset = 0x140000,
 120         .shim_size = 0x000100,
 121         .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR,
 122         .ssp0_offset = 0xa0000,
 123         .ssp0_size = 0x1000,
 124         .dma0_offset = 0x98000,
 125         .dma0_size = 0x4000,
 126         .dma1_offset = 0x9c000,
 127         .dma1_size = 0x4000,
 128         .iram_offset = 0x0c0000,
 129         .iram_size = 0x14000,
 130         .dram_offset = 0x100000,
 131         .dram_size = 0x28000,
 132         .mbox_offset = 0x144000,
 133         .mbox_size = 0x1000,
 134         .acpi_lpe_res_index = 0,
 135         .acpi_ddr_index = 2,
 136         .acpi_ipc_irq_index = 0
 137 };
 138
 139 static struct sst_platform_info byt_rvp_platform_data = {
 140         .probe_data = &byt_fwparse_info,
 141         .ipc_info = &byt_ipc_info,
 142         .lib_info = &byt_lib_dnld_info,
 143         .res_info = &byt_rvp_res_info,
 144         .platform = "sst-mfld-platform",
 145 };
 146
 147 /* Cherryview (Cherrytrail and Braswell) uses same mrfld dpcm fw as Baytrail,
 148  * so pdata is same as Baytrail.
 149  */
 150 static struct sst_platform_info chv_platform_data = {
 151         .probe_data = &byt_fwparse_info,
 152         .ipc_info = &byt_ipc_info,
 153         .lib_info = &byt_lib_dnld_info,
 154         .res_info = &byt_rvp_res_info,
 155         .platform = "sst-mfld-platform",
 156 };
 157
 158 static int sst_platform_get_resources(struct intel_sst_drv *ctx)
 159 {
 160         struct resource *rsrc;
 161         struct platform_device *pdev = to_platform_device(ctx->dev);
 162
 163         /* All ACPI resource request here */
 164         /* Get Shim addr */
 165         rsrc = platform_get_resource(pdev, IORESOURCE_MEM,
 166                                         ctx->pdata->res_info->acpi_lpe_res_index);
 167         if (!rsrc) {
 168                 dev_err(ctx->dev, "Invalid SHIM base from IFWI\n");
 169                 return -EIO;
 170         }
 171         dev_info(ctx->dev, "LPE base: %#x size:%#x", (unsigned int) rsrc->start,
 172                                         (unsigned int)resource_size(rsrc));
 173
 174         ctx->iram_base = rsrc->start + ctx->pdata->res_info->iram_offset;
 175         ctx->iram_end =  ctx->iram_base + ctx->pdata->res_info->iram_size - 1;
 176         dev_info(ctx->dev, "IRAM base: %#x", ctx->iram_base);
 177         ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base,
 178                                          ctx->pdata->res_info->iram_size);
 179         if (!ctx->iram) {
 180                 dev_err(ctx->dev, "unable to map IRAM\n");
 181                 return -EIO;
 182         }
 183
 184         ctx->dram_base = rsrc->start + ctx->pdata->res_info->dram_offset;
 185         ctx->dram_end = ctx->dram_base + ctx->pdata->res_info->dram_size - 1;
 186         dev_info(ctx->dev, "DRAM base: %#x", ctx->dram_base);
 187         ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base,
 188                                          ctx->pdata->res_info->dram_size);
 189         if (!ctx->dram) {
 190                 dev_err(ctx->dev, "unable to map DRAM\n");
 191                 return -EIO;
 192         }
 193
 194         ctx->shim_phy_add = rsrc->start + ctx->pdata->res_info->shim_offset;
 195         dev_info(ctx->dev, "SHIM base: %#x", ctx->shim_phy_add);
 196         ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add,
 197                                         ctx->pdata->res_info->shim_size);
 198         if (!ctx->shim) {
 199                 dev_err(ctx->dev, "unable to map SHIM\n");
 200                 return -EIO;
 201         }
 202
 203         /* reassign physical address to LPE viewpoint address */
 204         ctx->shim_phy_add = ctx->pdata->res_info->shim_phy_addr;
 205
 206         /* Get mailbox addr */
 207         ctx->mailbox_add = rsrc->start + ctx->pdata->res_info->mbox_offset;
 208         dev_info(ctx->dev, "Mailbox base: %#x", ctx->mailbox_add);
 209         ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add,
 210                                             ctx->pdata->res_info->mbox_size);
 211         if (!ctx->mailbox) {
 212                 dev_err(ctx->dev, "unable to map mailbox\n");
 213                 return -EIO;
 214         }
 215
 216         /* reassign physical address to LPE viewpoint address */
 217         ctx->mailbox_add = ctx->info.mailbox_start;
 218
 219         rsrc = platform_get_resource(pdev, IORESOURCE_MEM,
 220                                         ctx->pdata->res_info->acpi_ddr_index);
 221         if (!rsrc) {
 222                 dev_err(ctx->dev, "Invalid DDR base from IFWI\n");
 223                 return -EIO;
 224         }
 225         ctx->ddr_base = rsrc->start;
 226         ctx->ddr_end = rsrc->end;
 227         dev_info(ctx->dev, "DDR base: %#x", ctx->ddr_base);
 228         ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base,
 229                                         resource_size(rsrc));
 230         if (!ctx->ddr) {
 231                 dev_err(ctx->dev, "unable to map DDR\n");
 232                 return -EIO;
 233         }
 234
 235         /* Find the IRQ */
 236         ctx->irq_num = platform_get_irq(pdev,
 237                                 ctx->pdata->res_info->acpi_ipc_irq_index);
 238         return 0;
 239 }
 240
 241
 242 static int is_byt_cr(struct device *dev, bool *bytcr)
 243 {
 244         int status = 0;
 245
 246         if (IS_ENABLED(CONFIG_IOSF_MBI)) {
 247                 static const struct x86_cpu_id cpu_ids[] = {
 248                         { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
 249                         {}
 250                 };
 251                 u32 bios_status;
 252
 253                 if (!x86_match_cpu(cpu_ids) || !iosf_mbi_available()) {
 254                         /* bail silently */
 255                         return status;
 256                 }
 257
 258                 status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
 259                                        MBI_REG_READ, /* 0x10 */
 260                                        0x006, /* BIOS_CONFIG */
 261                                        &bios_status);
 262
 263                 if (status) {
 264                         dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
 265                 } else {
 266                         /* bits 26:27 mirror PMIC options */
 267                         bios_status = (bios_status >> 26) & 3;
 268
 269                         if ((bios_status == 1) || (bios_status == 3))
 270                                 *bytcr = true;
 271                         else
 272                                 dev_info(dev, "BYT-CR not detected\n");
 273                 }
 274         } else {
 275                 dev_info(dev, "IOSF_MBI not enabled, no BYT-CR detection\n");
 276         }
 277         return status;
 278 }
 279
 280
 281 static int sst_acpi_probe(struct platform_device *pdev)
 282 {
 283         struct device *dev = &pdev->dev;
 284         int ret = 0;
 285         struct intel_sst_drv *ctx;
 286         const struct acpi_device_id *id;
 287         struct snd_soc_acpi_mach *mach;
 288         struct platform_device *mdev;
 289         struct platform_device *plat_dev;
 290         struct sst_platform_info *pdata;
 291         unsigned int dev_id;
 292         bool bytcr = false;
 293
 294         id = acpi_match_device(dev->driver->acpi_match_table, dev);
 295         if (!id)
 296                 return -ENODEV;
 297         dev_dbg(dev, "for %s\n", id->id);
 298
 299         mach = (struct snd_soc_acpi_mach *)id->driver_data;
 300         mach = snd_soc_acpi_find_machine(mach);
 301         if (mach == NULL) {
 302                 dev_err(dev, "No matching machine driver found\n");
 303                 return -ENODEV;
 304         }
 305
 306         pdata = mach->pdata;
 307
 308         ret = kstrtouint(id->id, 16, &dev_id);
 309         if (ret < 0) {
 310                 dev_err(dev, "Unique device id conversion error: %d\n", ret);
 311                 return ret;
 312         }
 313
 314         dev_dbg(dev, "ACPI device id: %x\n", dev_id);
 315
 316         ret = sst_alloc_drv_context(&ctx, dev, dev_id);
 317         if (ret < 0)
 318                 return ret;
 319
 320         ret = is_byt_cr(dev, &bytcr);
 321         if (!((ret < 0) || (bytcr == false))) {
 322                 dev_info(dev, "Detected Baytrail-CR platform\n");
 323
 324                 /* override resource info */
 325                 byt_rvp_platform_data.res_info = &bytcr_res_info;
 326         }
 327
 328         plat_dev = platform_device_register_data(dev, pdata->platform, -1,
 329                                                 NULL, 0);
 330         if (IS_ERR(plat_dev)) {
 331                 dev_err(dev, "Failed to create machine device: %s\n",
 332                         pdata->platform);
 333                 return PTR_ERR(plat_dev);
 334         }
 335
 336         /*
 337          * Create platform device for sst machine driver,
 338          * pass machine info as pdata
 339          */
 340         mdev = platform_device_register_data(dev, mach->drv_name, -1,
 341                                         (const void *)mach, sizeof(*mach));
 342         if (IS_ERR(mdev)) {
 343                 dev_err(dev, "Failed to create machine device: %s\n",
 344                         mach->drv_name);
 345                 return PTR_ERR(mdev);
 346         }
 347
 348         /* Fill sst platform data */
 349         ctx->pdata = pdata;
 350         strcpy(ctx->firmware_name, mach->fw_filename);
 351
 352         ret = sst_platform_get_resources(ctx);
 353         if (ret)
 354                 return ret;
 355
 356         ret = sst_context_init(ctx);
 357         if (ret < 0)
 358                 return ret;
 359
 360         sst_configure_runtime_pm(ctx);
 361         platform_set_drvdata(pdev, ctx);
 362         return ret;
 363 }
 364
 365 /**
 366 * intel_sst_remove - remove function
 367 *
 368 * @pdev:        platform device structure
 369 *
 370 * This function is called by OS when a device is unloaded
 371 * This frees the interrupt etc
 372 */
 373 static int sst_acpi_remove(struct platform_device *pdev)
 374 {
 375         struct intel_sst_drv *ctx;
 376
 377         ctx = platform_get_drvdata(pdev);
 378         sst_context_cleanup(ctx);
 379         platform_set_drvdata(pdev, NULL);
 380         return 0;
 381 }
 382
 383 static unsigned long cht_machine_id;
 384
 385 #define CHT_SURFACE_MACH 1
 386 #define BYT_THINKPAD_10  2
 387
 388 static int cht_surface_quirk_cb(const struct dmi_system_id *id)
 389 {
 390         cht_machine_id = CHT_SURFACE_MACH;
 391         return 1;
 392 }
 393
 394 static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id)
 395 {
 396         cht_machine_id = BYT_THINKPAD_10;
 397         return 1;
 398 }
 399
 400
 401 static const struct dmi_system_id byt_table[] = {
 402         {
 403                 .callback = byt_thinkpad10_quirk_cb,
 404                 .matches = {
 405                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
 406                         DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
 407                 },
 408         },
 409         {
 410                 .callback = byt_thinkpad10_quirk_cb,
 411                 .matches = {
 412                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
 413                         DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
 414                 },
 415         },
 416         {
 417                 .callback = byt_thinkpad10_quirk_cb,
 418                 .matches = {
 419                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
 420                         DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
 421                 },
 422         },
 423         { }
 424 };
 425
 426 static const struct dmi_system_id cht_table[] = {
 427         {
 428                 .callback = cht_surface_quirk_cb,
 429                 .matches = {
 430                         DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
 431                         DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
 432                 },
 433         },
 434         { }
 435 };
 436
 437
 438 static struct snd_soc_acpi_mach cht_surface_mach = {
 439         .id = "10EC5640",
 440         .drv_name = "cht-bsw-rt5645",
 441         .fw_filename = "intel/fw_sst_22a8.bin",
 442         .board = "cht-bsw",
 443         .pdata = &chv_platform_data,
 444 };
 445
 446 static struct snd_soc_acpi_mach byt_thinkpad_10 = {
 447         .id = "10EC5640",
 448         .drv_name = "cht-bsw-rt5672",
 449         .fw_filename = "intel/fw_sst_0f28.bin",
 450         .board = "cht-bsw",
 451         .pdata = &byt_rvp_platform_data,
 452 };
 453
 454 static struct snd_soc_acpi_mach *cht_quirk(void *arg)
 455 {
 456         struct snd_soc_acpi_mach *mach = arg;
 457
 458         dmi_check_system(cht_table);
 459
 460         if (cht_machine_id == CHT_SURFACE_MACH)
 461                 return &cht_surface_mach;
 462         else
 463                 return mach;
 464 }
 465
 466 static struct snd_soc_acpi_mach *byt_quirk(void *arg)
 467 {
 468         struct snd_soc_acpi_mach *mach = arg;
 469
 470         dmi_check_system(byt_table);
 471
 472         if (cht_machine_id == BYT_THINKPAD_10)
 473                 return &byt_thinkpad_10;
 474         else
 475                 return mach;
 476 }
 477
 478
 479 static struct snd_soc_acpi_mach sst_acpi_bytcr[] = {
 480         {
 481                 .id = "10EC5640",
 482                 .drv_name = "bytcr_rt5640",
 483                 .fw_filename = "intel/fw_sst_0f28.bin",
 484                 .board = "bytcr_rt5640",
 485                 .machine_quirk = byt_quirk,
 486                 .pdata = &byt_rvp_platform_data,
 487         },
 488         {
 489                 .id = "10EC5642",
 490                 .drv_name = "bytcr_rt5640",
 491                 .fw_filename = "intel/fw_sst_0f28.bin",
 492                 .board = "bytcr_rt5640",
 493                 .pdata = &byt_rvp_platform_data
 494         },
 495         {
 496                 .id = "INTCCFFD",
 497                 .drv_name = "bytcr_rt5640",
 498                 .fw_filename = "intel/fw_sst_0f28.bin",
 499                 .board = "bytcr_rt5640",
 500                 .pdata = &byt_rvp_platform_data
 501         },
 502         {
 503                 .id = "10EC5651",
 504                 .drv_name = "bytcr_rt5651",
 505                 .fw_filename = "intel/fw_sst_0f28.bin",
 506                 .board = "bytcr_rt5651",
 507                 .pdata = &byt_rvp_platform_data
 508         },
 509         {
 510                 .id = "DLGS7212",
 511                 .drv_name = "bytcht_da7213",
 512                 .fw_filename = "intel/fw_sst_0f28.bin",
 513                 .board = "bytcht_da7213",
 514                 .pdata = &byt_rvp_platform_data
 515         },
 516         {
 517                 .id = "DLGS7213",
 518                 .drv_name = "bytcht_da7213",
 519                 .fw_filename = "intel/fw_sst_0f28.bin",
 520                 .board = "bytcht_da7213",
 521                 .pdata = &byt_rvp_platform_data
 522         },
 523         /* some Baytrail platforms rely on RT5645, use CHT machine driver */
 524         {
 525                 .id = "10EC5645",
 526                 .drv_name = "cht-bsw-rt5645",
 527                 .fw_filename = "intel/fw_sst_0f28.bin",
 528                 .board = "cht-bsw",
 529                 .pdata = &byt_rvp_platform_data
 530         },
 531         {
 532                 .id = "10EC5648",
 533                 .drv_name = "cht-bsw-rt5645",
 534                 .fw_filename = "intel/fw_sst_0f28.bin",
 535                 .board = "cht-bsw",
 536                 .pdata = &byt_rvp_platform_data
 537         },
 538         /* use CHT driver to Baytrail Chromebooks */
 539         {
 540                 .id = "193C9890",
 541                 .drv_name = "cht-bsw-max98090",
 542                 .fw_filename = "intel/fw_sst_0f28.bin",
 543                 .board = "cht-bsw",
 544                 .pdata = &byt_rvp_platform_data
 545         },
 546 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH)
 547         /*
 548          * This is always last in the table so that it is selected only when
 549          * enabled explicitly and there is no codec-related information in SSDT
 550          */
 551         {
 552                 .id = "80860F28",
 553                 .drv_name = "bytcht_nocodec",
 554                 .fw_filename = "intel/fw_sst_0f28.bin",
 555                 .board = "bytcht_nocodec",
 556                 .pdata = &byt_rvp_platform_data
 557         },
 558 #endif
 559         {},
 560 };
 561
 562 /* Cherryview-based platforms: CherryTrail and Braswell */
 563 static struct snd_soc_acpi_mach sst_acpi_chv[] = {
 564         {
 565                 .id = "10EC5670",
 566                 .drv_name = "cht-bsw-rt5672",
 567                 .fw_filename = "intel/fw_sst_22a8.bin",
 568                 .board = "cht-bsw",
 569                 .pdata = &chv_platform_data
 570         },
 571         {
 572                 .id = "10EC5672",
 573                 .drv_name = "cht-bsw-rt5672",
 574                 .fw_filename = "intel/fw_sst_22a8.bin",
 575                 .board = "cht-bsw",
 576                 .pdata = &chv_platform_data
 577         },
 578         {
 579                 .id = "10EC5645",
 580                 .drv_name = "cht-bsw-rt5645",
 581                 .fw_filename = "intel/fw_sst_22a8.bin",
 582                 .board = "cht-bsw",
 583                 .pdata = &chv_platform_data
 584         },
 585         {
 586                 .id = "10EC5650",
 587                 .drv_name = "cht-bsw-rt5645",
 588                 .fw_filename = "intel/fw_sst_22a8.bin",
 589                 .board = "cht-bsw",
 590                 .pdata = &chv_platform_data
 591         },
 592         {
 593                 .id = "10EC3270",
 594                 .drv_name = "cht-bsw-rt5645",
 595                 .fw_filename = "intel/fw_sst_22a8.bin",
 596                 .board = "cht-bsw",
 597                 .pdata = &chv_platform_data
 598         },
 599
 600         {
 601                 .id = "193C9890",
 602                 .drv_name = "cht-bsw-max98090",
 603                 .fw_filename = "intel/fw_sst_22a8.bin",
 604                 .board = "cht-bsw",
 605                 .pdata = &chv_platform_data
 606         },
 607         {
 608                 .id = "DLGS7212",
 609                 .drv_name = "bytcht_da7213",
 610                 .fw_filename = "intel/fw_sst_22a8.bin",
 611                 .board = "bytcht_da7213",
 612                 .pdata = &chv_platform_data
 613         },
 614         {
 615                 .id = "DLGS7213",
 616                 .drv_name = "bytcht_da7213",
 617                 .fw_filename = "intel/fw_sst_22a8.bin",
 618                 .board = "bytcht_da7213",
 619                 .pdata = &chv_platform_data
 620         },
 621         {
 622                 .id = "ESSX8316",
 623                 .drv_name = "bytcht_es8316",
 624                 .fw_filename = "intel/fw_sst_22a8.bin",
 625                 .board = "bytcht_es8316",
 626                 .pdata = &chv_platform_data
 627         },
 628         /* some CHT-T platforms rely on RT5640, use Baytrail machine driver */
 629         {
 630                 .id = "10EC5640",
 631                 .drv_name = "bytcr_rt5640",
 632                 .fw_filename = "intel/fw_sst_22a8.bin",
 633                 .board = "bytcr_rt5640",
 634                 .machine_quirk = cht_quirk,
 635                 .pdata = &chv_platform_data
 636         },
 637         {
 638                 .id = "10EC3276",
 639                 .drv_name = "bytcr_rt5640",
 640                 .fw_filename = "intel/fw_sst_22a8.bin",
 641                 .board = "bytcr_rt5640",
 642                 .pdata = &chv_platform_data
 643         },
 644         /* some CHT-T platforms rely on RT5651, use Baytrail machine driver */
 645         {
 646                 .id = "10EC5651",
 647                 .drv_name = "bytcr_rt5651",
 648                 .fw_filename = "intel/fw_sst_22a8.bin",
 649                 .board = "bytcr_rt5651",
 650                 .pdata = &chv_platform_data
 651         },
 652 #if IS_ENABLED(CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH)
 653         /*
 654          * This is always last in the table so that it is selected only when
 655          * enabled explicitly and there is no codec-related information in SSDT
 656          */
 657         {
 658                 .id = "808622A8",
 659                 .drv_name = "bytcht_nocodec",
 660                 .fw_filename = "intel/fw_sst_22a8.bin",
 661                 .board = "bytcht_nocodec",
 662                 .pdata = &chv_platform_data
 663         },
 664 #endif
 665         {},
 666 };
 667
 668 static const struct acpi_device_id sst_acpi_ids[] = {
 669         { "80860F28", (unsigned long)&sst_acpi_bytcr},
 670         { "808622A8", (unsigned long) &sst_acpi_chv},
 671         { },
 672 };
 673
 674 MODULE_DEVICE_TABLE(acpi, sst_acpi_ids);
 675
 676 static struct platform_driver sst_acpi_driver = {
 677         .driver = {
 678                 .name                   = "intel_sst_acpi",
 679                 .acpi_match_table       = ACPI_PTR(sst_acpi_ids),
 680                 .pm                     = &intel_sst_pm,
 681         },
 682         .probe  = sst_acpi_probe,
 683         .remove = sst_acpi_remove,
 684 };
 685
 686 module_platform_driver(sst_acpi_driver);
 687
 688 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine ACPI Driver");
 689 MODULE_AUTHOR("Ramesh Babu K V");
 690 MODULE_AUTHOR("Omair Mohammed Abdullah");
 691 MODULE_LICENSE("GPL v2");
 692 MODULE_ALIAS("sst");