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1 /*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/acpi.h>
24 #include <linux/clk.h>
25 #include <linux/device.h>
26 #include <linux/dmi.h>
27 #include <linux/slab.h>
28 #include <asm/platform_sst_audio.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/soc.h>
32 #include <sound/jack.h>
33 #include "../../codecs/rt5651.h"
34 #include "../atom/sst-atom-controls.h"
35 #include "../common/sst-acpi.h"
36
37 enum {
38 BYT_RT5651_DMIC_MAP,
39 BYT_RT5651_IN1_MAP,
40 };
41
42 #define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(7, 0))
43 #define BYT_RT5651_DMIC_EN BIT(16)
44 #define BYT_RT5651_MCLK_EN BIT(17)
45 #define BYT_RT5651_MCLK_25MHZ BIT(18)
46
47 struct byt_rt5651_private {
48 struct clk *mclk;
49 };
50
51 static unsigned long byt_rt5651_quirk = BYT_RT5651_DMIC_MAP |
52 BYT_RT5651_DMIC_EN |
53 BYT_RT5651_MCLK_EN;
54
55 static void log_quirks(struct device *dev)
56 {
57 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
58 dev_info(dev, "quirk DMIC_MAP enabled");
59 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
60 dev_info(dev, "quirk IN1_MAP enabled");
61 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
62 dev_info(dev, "quirk DMIC enabled");
63 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
64 dev_info(dev, "quirk MCLK_EN enabled");
65 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
66 dev_info(dev, "quirk MCLK_25MHZ enabled");
67 }
68
69 #define BYT_CODEC_DAI1 "rt5651-aif1"
70
71 static inline struct snd_soc_dai *byt_get_codec_dai(struct snd_soc_card *card)
72 {
73 struct snd_soc_pcm_runtime *rtd;
74
75 list_for_each_entry(rtd, &card->rtd_list, list) {
76 if (!strncmp(rtd->codec_dai->name, BYT_CODEC_DAI1,
77 strlen(BYT_CODEC_DAI1)))
78 return rtd->codec_dai;
79 }
80 return NULL;
81 }
82
83 static int platform_clock_control(struct snd_soc_dapm_widget *w,
84 struct snd_kcontrol *k, int event)
85 {
86 struct snd_soc_dapm_context *dapm = w->dapm;
87 struct snd_soc_card *card = dapm->card;
88 struct snd_soc_dai *codec_dai;
89 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
90 int ret;
91
92 codec_dai = byt_get_codec_dai(card);
93 if (!codec_dai) {
94 dev_err(card->dev,
95 "Codec dai not found; Unable to set platform clock\n");
96 return -EIO;
97 }
98
99 if (SND_SOC_DAPM_EVENT_ON(event)) {
100 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
101 ret = clk_prepare_enable(priv->mclk);
102 if (ret < 0) {
103 dev_err(card->dev,
104 "could not configure MCLK state");
105 return ret;
106 }
107 }
108 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
109 48000 * 512,
110 SND_SOC_CLOCK_IN);
111 } else {
112 /*
113 * Set codec clock source to internal clock before
114 * turning off the platform clock. Codec needs clock
115 * for Jack detection and button press
116 */
117 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
118 48000 * 512,
119 SND_SOC_CLOCK_IN);
120 if (!ret)
121 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
122 clk_disable_unprepare(priv->mclk);
123 }
124
125 if (ret < 0) {
126 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
127 return ret;
128 }
129
130 return 0;
131 }
132
133 static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
134 SND_SOC_DAPM_HP("Headphone", NULL),
135 SND_SOC_DAPM_MIC("Headset Mic", NULL),
136 SND_SOC_DAPM_MIC("Internal Mic", NULL),
137 SND_SOC_DAPM_SPK("Speaker", NULL),
138 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
139 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
140 SND_SOC_DAPM_POST_PMD),
141
142 };
143
144 static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
145 {"Headphone", NULL, "Platform Clock"},
146 {"Headset Mic", NULL, "Platform Clock"},
147 {"Internal Mic", NULL, "Platform Clock"},
148 {"Speaker", NULL, "Platform Clock"},
149
150 {"AIF1 Playback", NULL, "ssp2 Tx"},
151 {"ssp2 Tx", NULL, "codec_out0"},
152 {"ssp2 Tx", NULL, "codec_out1"},
153 {"codec_in0", NULL, "ssp2 Rx"},
154 {"codec_in1", NULL, "ssp2 Rx"},
155 {"ssp2 Rx", NULL, "AIF1 Capture"},
156
157 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
158 {"IN2P", NULL, "Headset Mic"},
159 {"Headphone", NULL, "HPOL"},
160 {"Headphone", NULL, "HPOR"},
161 {"Speaker", NULL, "LOUTL"},
162 {"Speaker", NULL, "LOUTR"},
163 };
164
165 static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
166 {"DMIC L1", NULL, "Internal Mic"},
167 {"DMIC R1", NULL, "Internal Mic"},
168 };
169
170 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
171 {"Internal Mic", NULL, "micbias1"},
172 {"IN1P", NULL, "Internal Mic"},
173 };
174
175 static const struct snd_kcontrol_new byt_rt5651_controls[] = {
176 SOC_DAPM_PIN_SWITCH("Headphone"),
177 SOC_DAPM_PIN_SWITCH("Headset Mic"),
178 SOC_DAPM_PIN_SWITCH("Internal Mic"),
179 SOC_DAPM_PIN_SWITCH("Speaker"),
180 };
181
182 static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
183 struct snd_pcm_hw_params *params)
184 {
185 struct snd_soc_pcm_runtime *rtd = substream->private_data;
186 struct snd_soc_dai *codec_dai = rtd->codec_dai;
187 int ret;
188
189 snd_soc_dai_set_bclk_ratio(codec_dai, 50);
190
191 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
192 params_rate(params) * 512,
193 SND_SOC_CLOCK_IN);
194 if (ret < 0) {
195 dev_err(rtd->dev, "can't set codec clock %d\n", ret);
196 return ret;
197 }
198
199 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
200 /* 2x25 bit slots on SSP2 */
201 ret = snd_soc_dai_set_pll(codec_dai, 0,
202 RT5651_PLL1_S_BCLK1,
203 params_rate(params) * 50,
204 params_rate(params) * 512);
205 } else {
206 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ) {
207 ret = snd_soc_dai_set_pll(codec_dai, 0,
208 RT5651_PLL1_S_MCLK,
209 25000000,
210 params_rate(params) * 512);
211 } else {
212 ret = snd_soc_dai_set_pll(codec_dai, 0,
213 RT5651_PLL1_S_MCLK,
214 19200000,
215 params_rate(params) * 512);
216 }
217 }
218
219 if (ret < 0) {
220 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
221 return ret;
222 }
223
224 return 0;
225 }
226
227 static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
228 {
229 byt_rt5651_quirk = (unsigned long)id->driver_data;
230 return 1;
231 }
232
233 static const struct dmi_system_id byt_rt5651_quirk_table[] = {
234 {
235 .callback = byt_rt5651_quirk_cb,
236 .matches = {
237 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
238 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
239 },
240 .driver_data = (void *)(BYT_RT5651_DMIC_MAP |
241 BYT_RT5651_DMIC_EN),
242 },
243 {}
244 };
245
246 static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
247 {
248 struct snd_soc_card *card = runtime->card;
249 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
250 const struct snd_soc_dapm_route *custom_map;
251 int num_routes;
252 int ret;
253
254 card->dapm.idle_bias_off = true;
255
256 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
257 case BYT_RT5651_IN1_MAP:
258 custom_map = byt_rt5651_intmic_in1_map;
259 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
260 break;
261 default:
262 custom_map = byt_rt5651_intmic_dmic_map;
263 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
264 }
265 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
266 if (ret)
267 return ret;
268
269 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
270 ARRAY_SIZE(byt_rt5651_controls));
271 if (ret) {
272 dev_err(card->dev, "unable to add card controls\n");
273 return ret;
274 }
275 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
276 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
277
278 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
279 /*
280 * The firmware might enable the clock at
281 * boot (this information may or may not
282 * be reflected in the enable clock register).
283 * To change the rate we must disable the clock
284 * first to cover these cases. Due to common
285 * clock framework restrictions that do not allow
286 * to disable a clock that has not been enabled,
287 * we need to enable the clock first.
288 */
289 ret = clk_prepare_enable(priv->mclk);
290 if (!ret)
291 clk_disable_unprepare(priv->mclk);
292
293 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
294 ret = clk_set_rate(priv->mclk, 25000000);
295 else
296 ret = clk_set_rate(priv->mclk, 19200000);
297
298 if (ret)
299 dev_err(card->dev, "unable to set MCLK rate\n");
300 }
301
302 return ret;
303 }
304
305 static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
306 .formats = SNDRV_PCM_FMTBIT_S24_LE,
307 .rate_min = 48000,
308 .rate_max = 48000,
309 .channels_min = 2,
310 .channels_max = 2,
311 };
312
313 static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
314 struct snd_pcm_hw_params *params)
315 {
316 struct snd_interval *rate = hw_param_interval(params,
317 SNDRV_PCM_HW_PARAM_RATE);
318 struct snd_interval *channels = hw_param_interval(params,
319 SNDRV_PCM_HW_PARAM_CHANNELS);
320 int ret;
321
322 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
323 rate->min = rate->max = 48000;
324 channels->min = channels->max = 2;
325
326 /* set SSP2 to 24-bit */
327 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
328
329 /*
330 * Default mode for SSP configuration is TDM 4 slot, override config
331 * with explicit setting to I2S 2ch 24-bit. The word length is set with
332 * dai_set_tdm_slot() since there is no other API exposed
333 */
334 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
335 SND_SOC_DAIFMT_I2S |
336 SND_SOC_DAIFMT_NB_NF |
337 SND_SOC_DAIFMT_CBS_CFS
338 );
339
340 if (ret < 0) {
341 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
342 return ret;
343 }
344
345 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 24);
346 if (ret < 0) {
347 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
348 return ret;
349 }
350
351 return 0;
352 }
353
354 static const unsigned int rates_48000[] = {
355 48000,
356 };
357
358 static const struct snd_pcm_hw_constraint_list constraints_48000 = {
359 .count = ARRAY_SIZE(rates_48000),
360 .list = rates_48000,
361 };
362
363 static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
364 {
365 return snd_pcm_hw_constraint_list(substream->runtime, 0,
366 SNDRV_PCM_HW_PARAM_RATE,
367 &constraints_48000);
368 }
369
370 static const struct snd_soc_ops byt_rt5651_aif1_ops = {
371 .startup = byt_rt5651_aif1_startup,
372 };
373
374 static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
375 .hw_params = byt_rt5651_aif1_hw_params,
376 };
377
378 static struct snd_soc_dai_link byt_rt5651_dais[] = {
379 [MERR_DPCM_AUDIO] = {
380 .name = "Audio Port",
381 .stream_name = "Audio",
382 .cpu_dai_name = "media-cpu-dai",
383 .codec_dai_name = "snd-soc-dummy-dai",
384 .codec_name = "snd-soc-dummy",
385 .platform_name = "sst-mfld-platform",
386 .nonatomic = true,
387 .dynamic = 1,
388 .dpcm_playback = 1,
389 .dpcm_capture = 1,
390 .ops = &byt_rt5651_aif1_ops,
391 },
392 [MERR_DPCM_DEEP_BUFFER] = {
393 .name = "Deep-Buffer Audio Port",
394 .stream_name = "Deep-Buffer Audio",
395 .cpu_dai_name = "deepbuffer-cpu-dai",
396 .codec_dai_name = "snd-soc-dummy-dai",
397 .codec_name = "snd-soc-dummy",
398 .platform_name = "sst-mfld-platform",
399 .nonatomic = true,
400 .dynamic = 1,
401 .dpcm_playback = 1,
402 .ops = &byt_rt5651_aif1_ops,
403 },
404 [MERR_DPCM_COMPR] = {
405 .name = "Compressed Port",
406 .stream_name = "Compress",
407 .cpu_dai_name = "compress-cpu-dai",
408 .codec_dai_name = "snd-soc-dummy-dai",
409 .codec_name = "snd-soc-dummy",
410 .platform_name = "sst-mfld-platform",
411 },
412 /* CODEC<->CODEC link */
413 /* back ends */
414 {
415 .name = "SSP2-Codec",
416 .id = 1,
417 .cpu_dai_name = "ssp2-port",
418 .platform_name = "sst-mfld-platform",
419 .no_pcm = 1,
420 .codec_dai_name = "rt5651-aif1",
421 .codec_name = "i2c-10EC5651:00",
422 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
423 | SND_SOC_DAIFMT_CBS_CFS,
424 .be_hw_params_fixup = byt_rt5651_codec_fixup,
425 .ignore_suspend = 1,
426 .nonatomic = true,
427 .dpcm_playback = 1,
428 .dpcm_capture = 1,
429 .init = byt_rt5651_init,
430 .ops = &byt_rt5651_be_ssp2_ops,
431 },
432 };
433
434 /* SoC card */
435 static struct snd_soc_card byt_rt5651_card = {
436 .name = "bytcr-rt5651",
437 .owner = THIS_MODULE,
438 .dai_link = byt_rt5651_dais,
439 .num_links = ARRAY_SIZE(byt_rt5651_dais),
440 .dapm_widgets = byt_rt5651_widgets,
441 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
442 .dapm_routes = byt_rt5651_audio_map,
443 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
444 .fully_routed = true,
445 };
446
447 static char byt_rt5651_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
448
449 static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
450 {
451 struct byt_rt5651_private *priv;
452 struct sst_acpi_mach *mach;
453 const char *i2c_name = NULL;
454 int ret_val = 0;
455 int dai_index;
456 int i;
457
458 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
459 if (!priv)
460 return -ENOMEM;
461
462 /* register the soc card */
463 byt_rt5651_card.dev = &pdev->dev;
464
465 mach = byt_rt5651_card.dev->platform_data;
466 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
467
468 /* fix index of codec dai */
469 dai_index = MERR_DPCM_COMPR + 1;
470 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
471 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
472 dai_index = i;
473 break;
474 }
475 }
476
477 /* fixup codec name based on HID */
478 i2c_name = sst_acpi_find_name_from_hid(mach->id);
479 if (i2c_name) {
480 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
481 "%s%s", "i2c-", i2c_name);
482
483 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
484 }
485
486 /* check quirks before creating card */
487 dmi_check_system(byt_rt5651_quirk_table);
488 log_quirks(&pdev->dev);
489
490 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
491 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
492 if (IS_ERR(priv->mclk)) {
493 dev_err(&pdev->dev,
494 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
495 PTR_ERR(priv->mclk));
496 /*
497 * Fall back to bit clock usage for -ENOENT (clock not
498 * available likely due to missing dependencies), bail
499 * for all other errors, including -EPROBE_DEFER
500 */
501 if (ret_val != -ENOENT)
502 return ret_val;
503 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
504 }
505 }
506
507 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
508
509 if (ret_val) {
510 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
511 ret_val);
512 return ret_val;
513 }
514 platform_set_drvdata(pdev, &byt_rt5651_card);
515 return ret_val;
516 }
517
518 static struct platform_driver snd_byt_rt5651_mc_driver = {
519 .driver = {
520 .name = "bytcr_rt5651",
521 },
522 .probe = snd_byt_rt5651_mc_probe,
523 };
524
525 module_platform_driver(snd_byt_rt5651_mc_driver);
526
527 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
528 MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
529 MODULE_LICENSE("GPL v2");
530 MODULE_ALIAS("platform:bytcr_rt5651");