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[mirror_ubuntu-focal-kernel.git] / sound / soc / intel / boards / bytcr_rt5651.c
1 /*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/acpi.h>
24 #include <linux/clk.h>
25 #include <linux/device.h>
26 #include <linux/dmi.h>
27 #include <linux/slab.h>
28 #include <asm/platform_sst_audio.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/soc.h>
32 #include <sound/jack.h>
33 #include <sound/soc-acpi.h>
34 #include "../../codecs/rt5651.h"
35 #include "../atom/sst-atom-controls.h"
36
37 enum {
38 BYT_RT5651_DMIC_MAP,
39 BYT_RT5651_IN1_MAP,
40 BYT_RT5651_IN2_MAP,
41 };
42
43 #define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(7, 0))
44 #define BYT_RT5651_DMIC_EN BIT(16)
45 #define BYT_RT5651_MCLK_EN BIT(17)
46 #define BYT_RT5651_MCLK_25MHZ BIT(18)
47
48 struct byt_rt5651_private {
49 struct clk *mclk;
50 struct snd_soc_jack jack;
51 };
52
53 static unsigned long byt_rt5651_quirk = BYT_RT5651_DMIC_MAP |
54 BYT_RT5651_DMIC_EN |
55 BYT_RT5651_MCLK_EN;
56
57 static void log_quirks(struct device *dev)
58 {
59 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
60 dev_info(dev, "quirk DMIC_MAP enabled");
61 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
62 dev_info(dev, "quirk IN1_MAP enabled");
63 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
64 dev_info(dev, "quirk IN2_MAP enabled");
65 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
66 dev_info(dev, "quirk DMIC enabled");
67 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
68 dev_info(dev, "quirk MCLK_EN enabled");
69 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
70 dev_info(dev, "quirk MCLK_25MHZ enabled");
71 }
72
73 #define BYT_CODEC_DAI1 "rt5651-aif1"
74
75 static int platform_clock_control(struct snd_soc_dapm_widget *w,
76 struct snd_kcontrol *k, int event)
77 {
78 struct snd_soc_dapm_context *dapm = w->dapm;
79 struct snd_soc_card *card = dapm->card;
80 struct snd_soc_dai *codec_dai;
81 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
82 int ret;
83
84 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
85 if (!codec_dai) {
86 dev_err(card->dev,
87 "Codec dai not found; Unable to set platform clock\n");
88 return -EIO;
89 }
90
91 if (SND_SOC_DAPM_EVENT_ON(event)) {
92 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
93 ret = clk_prepare_enable(priv->mclk);
94 if (ret < 0) {
95 dev_err(card->dev,
96 "could not configure MCLK state");
97 return ret;
98 }
99 }
100 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
101 48000 * 512,
102 SND_SOC_CLOCK_IN);
103 } else {
104 /*
105 * Set codec clock source to internal clock before
106 * turning off the platform clock. Codec needs clock
107 * for Jack detection and button press
108 */
109 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
110 48000 * 512,
111 SND_SOC_CLOCK_IN);
112 if (!ret)
113 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
114 clk_disable_unprepare(priv->mclk);
115 }
116
117 if (ret < 0) {
118 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
119 return ret;
120 }
121
122 return 0;
123 }
124
125 static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
126 SND_SOC_DAPM_HP("Headphone", NULL),
127 SND_SOC_DAPM_MIC("Headset Mic", NULL),
128 SND_SOC_DAPM_MIC("Internal Mic", NULL),
129 SND_SOC_DAPM_SPK("Speaker", NULL),
130 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
131 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
132 SND_SOC_DAPM_POST_PMD),
133
134 };
135
136 static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
137 {"Headphone", NULL, "Platform Clock"},
138 {"Headset Mic", NULL, "Platform Clock"},
139 {"Internal Mic", NULL, "Platform Clock"},
140 {"Speaker", NULL, "Platform Clock"},
141
142 {"AIF1 Playback", NULL, "ssp2 Tx"},
143 {"ssp2 Tx", NULL, "codec_out0"},
144 {"ssp2 Tx", NULL, "codec_out1"},
145 {"codec_in0", NULL, "ssp2 Rx"},
146 {"codec_in1", NULL, "ssp2 Rx"},
147 {"ssp2 Rx", NULL, "AIF1 Capture"},
148
149 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
150 {"Headphone", NULL, "HPOL"},
151 {"Headphone", NULL, "HPOR"},
152 {"Speaker", NULL, "LOUTL"},
153 {"Speaker", NULL, "LOUTR"},
154 };
155
156 static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
157 {"IN2P", NULL, "Headset Mic"},
158 {"DMIC L1", NULL, "Internal Mic"},
159 {"DMIC R1", NULL, "Internal Mic"},
160 };
161
162 static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
163 {"Internal Mic", NULL, "micbias1"},
164 {"IN2P", NULL, "Headset Mic"},
165 {"IN1P", NULL, "Internal Mic"},
166 };
167
168 static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
169 {"Internal Mic", NULL, "micbias1"},
170 {"IN1P", NULL, "Headset Mic"},
171 {"IN2P", NULL, "Internal Mic"},
172 };
173
174 static const struct snd_kcontrol_new byt_rt5651_controls[] = {
175 SOC_DAPM_PIN_SWITCH("Headphone"),
176 SOC_DAPM_PIN_SWITCH("Headset Mic"),
177 SOC_DAPM_PIN_SWITCH("Internal Mic"),
178 SOC_DAPM_PIN_SWITCH("Speaker"),
179 };
180
181 static struct snd_soc_jack_pin bytcr_jack_pins[] = {
182 {
183 .pin = "Headphone",
184 .mask = SND_JACK_HEADPHONE,
185 },
186 {
187 .pin = "Headset Mic",
188 .mask = SND_JACK_MICROPHONE,
189 },
190 };
191
192 static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
193 struct snd_pcm_hw_params *params)
194 {
195 struct snd_soc_pcm_runtime *rtd = substream->private_data;
196 struct snd_soc_dai *codec_dai = rtd->codec_dai;
197 int ret;
198
199 snd_soc_dai_set_bclk_ratio(codec_dai, 50);
200
201 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
202 params_rate(params) * 512,
203 SND_SOC_CLOCK_IN);
204 if (ret < 0) {
205 dev_err(rtd->dev, "can't set codec clock %d\n", ret);
206 return ret;
207 }
208
209 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
210 /* 2x25 bit slots on SSP2 */
211 ret = snd_soc_dai_set_pll(codec_dai, 0,
212 RT5651_PLL1_S_BCLK1,
213 params_rate(params) * 50,
214 params_rate(params) * 512);
215 } else {
216 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ) {
217 ret = snd_soc_dai_set_pll(codec_dai, 0,
218 RT5651_PLL1_S_MCLK,
219 25000000,
220 params_rate(params) * 512);
221 } else {
222 ret = snd_soc_dai_set_pll(codec_dai, 0,
223 RT5651_PLL1_S_MCLK,
224 19200000,
225 params_rate(params) * 512);
226 }
227 }
228
229 if (ret < 0) {
230 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
231 return ret;
232 }
233
234 return 0;
235 }
236
237 static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
238 {
239 byt_rt5651_quirk = (unsigned long)id->driver_data;
240 return 1;
241 }
242
243 static const struct dmi_system_id byt_rt5651_quirk_table[] = {
244 {
245 .callback = byt_rt5651_quirk_cb,
246 .matches = {
247 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
248 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
249 },
250 .driver_data = (void *)(BYT_RT5651_DMIC_MAP |
251 BYT_RT5651_DMIC_EN),
252 },
253 {
254 .callback = byt_rt5651_quirk_cb,
255 .matches = {
256 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
257 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
258 },
259 .driver_data = (void *)(BYT_RT5651_IN2_MAP),
260 },
261 {}
262 };
263
264 static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
265 {
266 struct snd_soc_card *card = runtime->card;
267 struct snd_soc_codec *codec = runtime->codec;
268 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
269 const struct snd_soc_dapm_route *custom_map;
270 int num_routes;
271 int ret;
272
273 card->dapm.idle_bias_off = true;
274
275 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
276 case BYT_RT5651_IN1_MAP:
277 custom_map = byt_rt5651_intmic_in1_map;
278 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
279 break;
280 case BYT_RT5651_IN2_MAP:
281 custom_map = byt_rt5651_intmic_in2_map;
282 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
283 break;
284 default:
285 custom_map = byt_rt5651_intmic_dmic_map;
286 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
287 }
288 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
289 if (ret)
290 return ret;
291
292 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
293 ARRAY_SIZE(byt_rt5651_controls));
294 if (ret) {
295 dev_err(card->dev, "unable to add card controls\n");
296 return ret;
297 }
298 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
299 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
300
301 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
302 /*
303 * The firmware might enable the clock at
304 * boot (this information may or may not
305 * be reflected in the enable clock register).
306 * To change the rate we must disable the clock
307 * first to cover these cases. Due to common
308 * clock framework restrictions that do not allow
309 * to disable a clock that has not been enabled,
310 * we need to enable the clock first.
311 */
312 ret = clk_prepare_enable(priv->mclk);
313 if (!ret)
314 clk_disable_unprepare(priv->mclk);
315
316 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
317 ret = clk_set_rate(priv->mclk, 25000000);
318 else
319 ret = clk_set_rate(priv->mclk, 19200000);
320
321 if (ret)
322 dev_err(card->dev, "unable to set MCLK rate\n");
323 }
324
325 ret = snd_soc_card_jack_new(runtime->card, "Headset",
326 SND_JACK_HEADSET, &priv->jack,
327 bytcr_jack_pins, ARRAY_SIZE(bytcr_jack_pins));
328 if (ret) {
329 dev_err(runtime->dev, "Headset jack creation failed %d\n", ret);
330 return ret;
331 }
332
333 rt5651_set_jack_detect(codec, &priv->jack);
334
335 return ret;
336 }
337
338 static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
339 .formats = SNDRV_PCM_FMTBIT_S24_LE,
340 .rate_min = 48000,
341 .rate_max = 48000,
342 .channels_min = 2,
343 .channels_max = 2,
344 };
345
346 static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
347 struct snd_pcm_hw_params *params)
348 {
349 struct snd_interval *rate = hw_param_interval(params,
350 SNDRV_PCM_HW_PARAM_RATE);
351 struct snd_interval *channels = hw_param_interval(params,
352 SNDRV_PCM_HW_PARAM_CHANNELS);
353 int ret;
354
355 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
356 rate->min = rate->max = 48000;
357 channels->min = channels->max = 2;
358
359 /* set SSP2 to 24-bit */
360 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
361
362 /*
363 * Default mode for SSP configuration is TDM 4 slot, override config
364 * with explicit setting to I2S 2ch 24-bit. The word length is set with
365 * dai_set_tdm_slot() since there is no other API exposed
366 */
367 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
368 SND_SOC_DAIFMT_I2S |
369 SND_SOC_DAIFMT_NB_NF |
370 SND_SOC_DAIFMT_CBS_CFS
371 );
372
373 if (ret < 0) {
374 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
375 return ret;
376 }
377
378 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 24);
379 if (ret < 0) {
380 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
381 return ret;
382 }
383
384 return 0;
385 }
386
387 static const unsigned int rates_48000[] = {
388 48000,
389 };
390
391 static const struct snd_pcm_hw_constraint_list constraints_48000 = {
392 .count = ARRAY_SIZE(rates_48000),
393 .list = rates_48000,
394 };
395
396 static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
397 {
398 return snd_pcm_hw_constraint_list(substream->runtime, 0,
399 SNDRV_PCM_HW_PARAM_RATE,
400 &constraints_48000);
401 }
402
403 static const struct snd_soc_ops byt_rt5651_aif1_ops = {
404 .startup = byt_rt5651_aif1_startup,
405 };
406
407 static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
408 .hw_params = byt_rt5651_aif1_hw_params,
409 };
410
411 static struct snd_soc_dai_link byt_rt5651_dais[] = {
412 [MERR_DPCM_AUDIO] = {
413 .name = "Audio Port",
414 .stream_name = "Audio",
415 .cpu_dai_name = "media-cpu-dai",
416 .codec_dai_name = "snd-soc-dummy-dai",
417 .codec_name = "snd-soc-dummy",
418 .platform_name = "sst-mfld-platform",
419 .nonatomic = true,
420 .dynamic = 1,
421 .dpcm_playback = 1,
422 .dpcm_capture = 1,
423 .ops = &byt_rt5651_aif1_ops,
424 },
425 [MERR_DPCM_DEEP_BUFFER] = {
426 .name = "Deep-Buffer Audio Port",
427 .stream_name = "Deep-Buffer Audio",
428 .cpu_dai_name = "deepbuffer-cpu-dai",
429 .codec_dai_name = "snd-soc-dummy-dai",
430 .codec_name = "snd-soc-dummy",
431 .platform_name = "sst-mfld-platform",
432 .nonatomic = true,
433 .dynamic = 1,
434 .dpcm_playback = 1,
435 .ops = &byt_rt5651_aif1_ops,
436 },
437 /* CODEC<->CODEC link */
438 /* back ends */
439 {
440 .name = "SSP2-Codec",
441 .id = 0,
442 .cpu_dai_name = "ssp2-port",
443 .platform_name = "sst-mfld-platform",
444 .no_pcm = 1,
445 .codec_dai_name = "rt5651-aif1",
446 .codec_name = "i2c-10EC5651:00",
447 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
448 | SND_SOC_DAIFMT_CBS_CFS,
449 .be_hw_params_fixup = byt_rt5651_codec_fixup,
450 .ignore_suspend = 1,
451 .nonatomic = true,
452 .dpcm_playback = 1,
453 .dpcm_capture = 1,
454 .init = byt_rt5651_init,
455 .ops = &byt_rt5651_be_ssp2_ops,
456 },
457 };
458
459 /* SoC card */
460 static struct snd_soc_card byt_rt5651_card = {
461 .name = "bytcr-rt5651",
462 .owner = THIS_MODULE,
463 .dai_link = byt_rt5651_dais,
464 .num_links = ARRAY_SIZE(byt_rt5651_dais),
465 .dapm_widgets = byt_rt5651_widgets,
466 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
467 .dapm_routes = byt_rt5651_audio_map,
468 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
469 .fully_routed = true,
470 };
471
472 static char byt_rt5651_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
473
474 static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
475 {
476 struct byt_rt5651_private *priv;
477 struct snd_soc_acpi_mach *mach;
478 const char *i2c_name = NULL;
479 int ret_val = 0;
480 int dai_index = 0;
481 int i;
482
483 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_ATOMIC);
484 if (!priv)
485 return -ENOMEM;
486
487 /* register the soc card */
488 byt_rt5651_card.dev = &pdev->dev;
489
490 mach = byt_rt5651_card.dev->platform_data;
491 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
492
493 /* fix index of codec dai */
494 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
495 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
496 dai_index = i;
497 break;
498 }
499 }
500
501 /* fixup codec name based on HID */
502 i2c_name = snd_soc_acpi_find_name_from_hid(mach->id);
503 if (i2c_name) {
504 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
505 "%s%s", "i2c-", i2c_name);
506
507 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
508 }
509
510 /* check quirks before creating card */
511 dmi_check_system(byt_rt5651_quirk_table);
512 log_quirks(&pdev->dev);
513
514 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
515 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
516 if (IS_ERR(priv->mclk)) {
517 dev_err(&pdev->dev,
518 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
519 PTR_ERR(priv->mclk));
520 /*
521 * Fall back to bit clock usage for -ENOENT (clock not
522 * available likely due to missing dependencies), bail
523 * for all other errors, including -EPROBE_DEFER
524 */
525 if (ret_val != -ENOENT)
526 return ret_val;
527 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
528 }
529 }
530
531 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
532
533 if (ret_val) {
534 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
535 ret_val);
536 return ret_val;
537 }
538 platform_set_drvdata(pdev, &byt_rt5651_card);
539 return ret_val;
540 }
541
542 static struct platform_driver snd_byt_rt5651_mc_driver = {
543 .driver = {
544 .name = "bytcr_rt5651",
545 },
546 .probe = snd_byt_rt5651_mc_probe,
547 };
548
549 module_platform_driver(snd_byt_rt5651_mc_driver);
550
551 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
552 MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
553 MODULE_LICENSE("GPL v2");
554 MODULE_ALIAS("platform:bytcr_rt5651");