sound/soc/intel/boards/cht_bsw_rt5645.c

   1 /*
   2  *  cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms
   3  *                     Cherrytrail and Braswell, with RT5645 codec.
   4  *
   5  *  Copyright (C) 2015 Intel Corp
   6  *  Author: Fang, Yang A <yang.a.fang@intel.com>
   7  *              N,Harshapriya <harshapriya.n@intel.com>
   8  *  This file is modified from cht_bsw_rt5672.c
   9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; version 2 of the License.
  14  *
  15  *  This program is distributed in the hope that it will be useful, but
  16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  *  General Public License for more details.
  19  *
  20  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/acpi.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/dmi.h>
  27 #include <linux/slab.h>
  28 #include <asm/cpu_device_id.h>
  29 #include <asm/platform_sst_audio.h>
  30 #include <linux/clk.h>
  31 #include <sound/pcm.h>
  32 #include <sound/pcm_params.h>
  33 #include <sound/soc.h>
  34 #include <sound/jack.h>
  35 #include "../../codecs/rt5645.h"
  36 #include "../atom/sst-atom-controls.h"
  37 #include "../common/sst-acpi.h"
  38
  39 #define CHT_PLAT_CLK_3_HZ       19200000
  40 #define CHT_CODEC_DAI1  "rt5645-aif1"
  41 #define CHT_CODEC_DAI2  "rt5645-aif2"
  42
  43 struct cht_acpi_card {
  44         char *codec_id;
  45         int codec_type;
  46         struct snd_soc_card *soc_card;
  47 };
  48
  49 struct cht_mc_private {
  50         struct snd_soc_jack jack;
  51         struct cht_acpi_card *acpi_card;
  52         char codec_name[16];
  53         struct clk *mclk;
  54 };
  55
  56 #define CHT_RT5645_MAP(quirk)   ((quirk) & 0xff)
  57 #define CHT_RT5645_SSP2_AIF2     BIT(16) /* default is using AIF1  */
  58 #define CHT_RT5645_SSP0_AIF1     BIT(17)
  59 #define CHT_RT5645_SSP0_AIF2     BIT(18)
  60
  61 static unsigned long cht_rt5645_quirk = 0;
  62
  63 static void log_quirks(struct device *dev)
  64 {
  65         if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2)
  66                 dev_info(dev, "quirk SSP2_AIF2 enabled");
  67         if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1)
  68                 dev_info(dev, "quirk SSP0_AIF1 enabled");
  69         if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)
  70                 dev_info(dev, "quirk SSP0_AIF2 enabled");
  71 }
  72
  73 static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card)
  74 {
  75         struct snd_soc_pcm_runtime *rtd;
  76
  77         list_for_each_entry(rtd, &card->rtd_list, list) {
  78                 if (!strncmp(rtd->codec_dai->name, CHT_CODEC_DAI1,
  79                              strlen(CHT_CODEC_DAI1)))
  80                         return rtd->codec_dai;
  81                 if (!strncmp(rtd->codec_dai->name, CHT_CODEC_DAI2,
  82                              strlen(CHT_CODEC_DAI2)))
  83                         return rtd->codec_dai;
  84         }
  85         return NULL;
  86 }
  87
  88 static int platform_clock_control(struct snd_soc_dapm_widget *w,
  89                 struct snd_kcontrol *k, int  event)
  90 {
  91         struct snd_soc_dapm_context *dapm = w->dapm;
  92         struct snd_soc_card *card = dapm->card;
  93         struct snd_soc_dai *codec_dai;
  94         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  95         int ret;
  96
  97         codec_dai = cht_get_codec_dai(card);
  98         if (!codec_dai) {
  99                 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
 100                 return -EIO;
 101         }
 102
 103         if (SND_SOC_DAPM_EVENT_ON(event)) {
 104                 if (ctx->mclk) {
 105                         ret = clk_prepare_enable(ctx->mclk);
 106                         if (ret < 0) {
 107                                 dev_err(card->dev,
 108                                         "could not configure MCLK state");
 109                                 return ret;
 110                         }
 111                 }
 112         } else {
 113                 /* Set codec sysclk source to its internal clock because codec PLL will
 114                  * be off when idle and MCLK will also be off when codec is
 115                  * runtime suspended. Codec needs clock for jack detection and button
 116                  * press. MCLK is turned off with clock framework or ACPI.
 117                  */
 118                 ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK,
 119                                         48000 * 512, SND_SOC_CLOCK_IN);
 120                 if (ret < 0) {
 121                         dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
 122                         return ret;
 123                 }
 124
 125                 if (ctx->mclk)
 126                         clk_disable_unprepare(ctx->mclk);
 127         }
 128
 129         return 0;
 130 }
 131
 132 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
 133         SND_SOC_DAPM_HP("Headphone", NULL),
 134         SND_SOC_DAPM_MIC("Headset Mic", NULL),
 135         SND_SOC_DAPM_MIC("Int Mic", NULL),
 136         SND_SOC_DAPM_SPK("Ext Spk", NULL),
 137         SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
 138                         platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 139 };
 140
 141 static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = {
 142         {"IN1P", NULL, "Headset Mic"},
 143         {"IN1N", NULL, "Headset Mic"},
 144         {"DMIC L1", NULL, "Int Mic"},
 145         {"DMIC R1", NULL, "Int Mic"},
 146         {"Headphone", NULL, "HPOL"},
 147         {"Headphone", NULL, "HPOR"},
 148         {"Ext Spk", NULL, "SPOL"},
 149         {"Ext Spk", NULL, "SPOR"},
 150         {"Headphone", NULL, "Platform Clock"},
 151         {"Headset Mic", NULL, "Platform Clock"},
 152         {"Int Mic", NULL, "Platform Clock"},
 153         {"Ext Spk", NULL, "Platform Clock"},
 154 };
 155
 156 static const struct snd_soc_dapm_route cht_rt5650_audio_map[] = {
 157         {"IN1P", NULL, "Headset Mic"},
 158         {"IN1N", NULL, "Headset Mic"},
 159         {"DMIC L2", NULL, "Int Mic"},
 160         {"DMIC R2", NULL, "Int Mic"},
 161         {"Headphone", NULL, "HPOL"},
 162         {"Headphone", NULL, "HPOR"},
 163         {"Ext Spk", NULL, "SPOL"},
 164         {"Ext Spk", NULL, "SPOR"},
 165         {"Headphone", NULL, "Platform Clock"},
 166         {"Headset Mic", NULL, "Platform Clock"},
 167         {"Int Mic", NULL, "Platform Clock"},
 168         {"Ext Spk", NULL, "Platform Clock"},
 169 };
 170
 171 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif1_map[] = {
 172         {"AIF1 Playback", NULL, "ssp2 Tx"},
 173         {"ssp2 Tx", NULL, "codec_out0"},
 174         {"ssp2 Tx", NULL, "codec_out1"},
 175         {"codec_in0", NULL, "ssp2 Rx" },
 176         {"codec_in1", NULL, "ssp2 Rx" },
 177         {"ssp2 Rx", NULL, "AIF1 Capture"},
 178 };
 179
 180 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif2_map[] = {
 181         {"AIF2 Playback", NULL, "ssp2 Tx"},
 182         {"ssp2 Tx", NULL, "codec_out0"},
 183         {"ssp2 Tx", NULL, "codec_out1"},
 184         {"codec_in0", NULL, "ssp2 Rx" },
 185         {"codec_in1", NULL, "ssp2 Rx" },
 186         {"ssp2 Rx", NULL, "AIF2 Capture"},
 187 };
 188
 189 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif1_map[] = {
 190         {"AIF1 Playback", NULL, "ssp0 Tx"},
 191         {"ssp0 Tx", NULL, "modem_out"},
 192         {"modem_in", NULL, "ssp0 Rx" },
 193         {"ssp0 Rx", NULL, "AIF1 Capture"},
 194 };
 195
 196 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif2_map[] = {
 197         {"AIF2 Playback", NULL, "ssp0 Tx"},
 198         {"ssp0 Tx", NULL, "modem_out"},
 199         {"modem_in", NULL, "ssp0 Rx" },
 200         {"ssp0 Rx", NULL, "AIF2 Capture"},
 201 };
 202
 203 static const struct snd_kcontrol_new cht_mc_controls[] = {
 204         SOC_DAPM_PIN_SWITCH("Headphone"),
 205         SOC_DAPM_PIN_SWITCH("Headset Mic"),
 206         SOC_DAPM_PIN_SWITCH("Int Mic"),
 207         SOC_DAPM_PIN_SWITCH("Ext Spk"),
 208 };
 209
 210 static struct snd_soc_jack_pin cht_bsw_jack_pins[] = {
 211         {
 212                 .pin    = "Headphone",
 213                 .mask   = SND_JACK_HEADPHONE,
 214         },
 215         {
 216                 .pin    = "Headset Mic",
 217                 .mask   = SND_JACK_MICROPHONE,
 218         },
 219 };
 220
 221 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
 222                              struct snd_pcm_hw_params *params)
 223 {
 224         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 225         struct snd_soc_dai *codec_dai = rtd->codec_dai;
 226         int ret;
 227
 228         /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
 229         ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK,
 230                                   CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
 231         if (ret < 0) {
 232                 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
 233                 return ret;
 234         }
 235
 236         ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1,
 237                                 params_rate(params) * 512, SND_SOC_CLOCK_IN);
 238         if (ret < 0) {
 239                 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
 240                 return ret;
 241         }
 242
 243         return 0;
 244 }
 245
 246 /* uncomment when we have a real quirk
 247 static int cht_rt5645_quirk_cb(const struct dmi_system_id *id)
 248 {
 249         cht_rt5645_quirk = (unsigned long)id->driver_data;
 250         return 1;
 251 }
 252 */
 253
 254 static const struct dmi_system_id cht_rt5645_quirk_table[] = {
 255         {
 256         },
 257 };
 258
 259 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
 260 {
 261         int ret;
 262         int jack_type;
 263         struct snd_soc_codec *codec = runtime->codec;
 264         struct snd_soc_card *card = runtime->card;
 265         struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
 266
 267         if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) ||
 268             (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) {
 269                 /* Select clk_i2s2_asrc as ASRC clock source */
 270                 rt5645_sel_asrc_clk_src(codec,
 271                                         RT5645_DA_STEREO_FILTER |
 272                                         RT5645_DA_MONO_L_FILTER |
 273                                         RT5645_DA_MONO_R_FILTER |
 274                                         RT5645_AD_STEREO_FILTER,
 275                                         RT5645_CLK_SEL_I2S2_ASRC);
 276         } else {
 277                 /* Select clk_i2s1_asrc as ASRC clock source */
 278                 rt5645_sel_asrc_clk_src(codec,
 279                                         RT5645_DA_STEREO_FILTER |
 280                                         RT5645_DA_MONO_L_FILTER |
 281                                         RT5645_DA_MONO_R_FILTER |
 282                                         RT5645_AD_STEREO_FILTER,
 283                                         RT5645_CLK_SEL_I2S1_ASRC);
 284         }
 285
 286         if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) {
 287                 ret = snd_soc_dapm_add_routes(&card->dapm,
 288                                         cht_rt5645_ssp2_aif2_map,
 289                                         ARRAY_SIZE(cht_rt5645_ssp2_aif2_map));
 290         } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) {
 291                 ret = snd_soc_dapm_add_routes(&card->dapm,
 292                                         cht_rt5645_ssp0_aif1_map,
 293                                         ARRAY_SIZE(cht_rt5645_ssp0_aif1_map));
 294         } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) {
 295                 ret = snd_soc_dapm_add_routes(&card->dapm,
 296                                         cht_rt5645_ssp0_aif2_map,
 297                                         ARRAY_SIZE(cht_rt5645_ssp0_aif2_map));
 298         } else {
 299                 ret = snd_soc_dapm_add_routes(&card->dapm,
 300                                         cht_rt5645_ssp2_aif1_map,
 301                                         ARRAY_SIZE(cht_rt5645_ssp2_aif1_map));
 302         }
 303         if (ret)
 304                 return ret;
 305
 306         if (ctx->acpi_card->codec_type == CODEC_TYPE_RT5650)
 307                 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
 308                                         SND_JACK_BTN_0 | SND_JACK_BTN_1 |
 309                                         SND_JACK_BTN_2 | SND_JACK_BTN_3;
 310         else
 311                 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
 312
 313         ret = snd_soc_card_jack_new(runtime->card, "Headset",
 314                                     jack_type, &ctx->jack,
 315                                     cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins));
 316         if (ret) {
 317                 dev_err(runtime->dev, "Headset jack creation failed %d\n", ret);
 318                 return ret;
 319         }
 320
 321         rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack);
 322
 323         if (ctx->mclk) {
 324                 /*
 325                  * The firmware might enable the clock at
 326                  * boot (this information may or may not
 327                  * be reflected in the enable clock register).
 328                  * To change the rate we must disable the clock
 329                  * first to cover these cases. Due to common
 330                  * clock framework restrictions that do not allow
 331                  * to disable a clock that has not been enabled,
 332                  * we need to enable the clock first.
 333                  */
 334                 ret = clk_prepare_enable(ctx->mclk);
 335                 if (!ret)
 336                         clk_disable_unprepare(ctx->mclk);
 337
 338                 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
 339
 340                 if (ret)
 341                         dev_err(runtime->dev, "unable to set MCLK rate\n");
 342         }
 343         return ret;
 344 }
 345
 346 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
 347                             struct snd_pcm_hw_params *params)
 348 {
 349         int ret;
 350         struct snd_interval *rate = hw_param_interval(params,
 351                         SNDRV_PCM_HW_PARAM_RATE);
 352         struct snd_interval *channels = hw_param_interval(params,
 353                                                 SNDRV_PCM_HW_PARAM_CHANNELS);
 354
 355         /* The DSP will covert the FE rate to 48k, stereo, 24bits */
 356         rate->min = rate->max = 48000;
 357         channels->min = channels->max = 2;
 358
 359         if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) ||
 360                 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) {
 361
 362                 /* set SSP0 to 16-bit */
 363                 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
 364
 365                 /*
 366                  * Default mode for SSP configuration is TDM 4 slot, override config
 367                  * with explicit setting to I2S 2ch 16-bit. The word length is set with
 368                  * dai_set_tdm_slot() since there is no other API exposed
 369                  */
 370                 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
 371                                         SND_SOC_DAIFMT_I2S     |
 372                                         SND_SOC_DAIFMT_NB_NF   |
 373                                         SND_SOC_DAIFMT_CBS_CFS
 374                         );
 375                 if (ret < 0) {
 376                         dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
 377                         return ret;
 378                 }
 379
 380                 ret = snd_soc_dai_set_fmt(rtd->codec_dai,
 381                                         SND_SOC_DAIFMT_I2S     |
 382                                         SND_SOC_DAIFMT_NB_NF   |
 383                                         SND_SOC_DAIFMT_CBS_CFS
 384                         );
 385                 if (ret < 0) {
 386                         dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
 387                         return ret;
 388                 }
 389
 390                 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
 391                 if (ret < 0) {
 392                         dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
 393                         return ret;
 394                 }
 395
 396         } else {
 397
 398                 /* set SSP2 to 24-bit */
 399                 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
 400
 401                 /*
 402                  * Default mode for SSP configuration is TDM 4 slot
 403                  */
 404                 ret = snd_soc_dai_set_fmt(rtd->codec_dai,
 405                                         SND_SOC_DAIFMT_DSP_B |
 406                                         SND_SOC_DAIFMT_IB_NF |
 407                                         SND_SOC_DAIFMT_CBS_CFS);
 408                 if (ret < 0) {
 409                         dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
 410                         return ret;
 411                 }
 412
 413                 /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
 414                 ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24);
 415                 if (ret < 0) {
 416                         dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
 417                         return ret;
 418                 }
 419         }
 420         return 0;
 421 }
 422
 423 static int cht_aif1_startup(struct snd_pcm_substream *substream)
 424 {
 425         return snd_pcm_hw_constraint_single(substream->runtime,
 426                         SNDRV_PCM_HW_PARAM_RATE, 48000);
 427 }
 428
 429 static const struct snd_soc_ops cht_aif1_ops = {
 430         .startup = cht_aif1_startup,
 431 };
 432
 433 static const struct snd_soc_ops cht_be_ssp2_ops = {
 434         .hw_params = cht_aif1_hw_params,
 435 };
 436
 437 static struct snd_soc_dai_link cht_dailink[] = {
 438         [MERR_DPCM_AUDIO] = {
 439                 .name = "Audio Port",
 440                 .stream_name = "Audio",
 441                 .cpu_dai_name = "media-cpu-dai",
 442                 .codec_dai_name = "snd-soc-dummy-dai",
 443                 .codec_name = "snd-soc-dummy",
 444                 .platform_name = "sst-mfld-platform",
 445                 .nonatomic = true,
 446                 .dynamic = 1,
 447                 .dpcm_playback = 1,
 448                 .dpcm_capture = 1,
 449                 .ops = &cht_aif1_ops,
 450         },
 451         [MERR_DPCM_DEEP_BUFFER] = {
 452                 .name = "Deep-Buffer Audio Port",
 453                 .stream_name = "Deep-Buffer Audio",
 454                 .cpu_dai_name = "deepbuffer-cpu-dai",
 455                 .codec_dai_name = "snd-soc-dummy-dai",
 456                 .codec_name = "snd-soc-dummy",
 457                 .platform_name = "sst-mfld-platform",
 458                 .nonatomic = true,
 459                 .dynamic = 1,
 460                 .dpcm_playback = 1,
 461                 .ops = &cht_aif1_ops,
 462         },
 463         [MERR_DPCM_COMPR] = {
 464                 .name = "Compressed Port",
 465                 .stream_name = "Compress",
 466                 .cpu_dai_name = "compress-cpu-dai",
 467                 .codec_dai_name = "snd-soc-dummy-dai",
 468                 .codec_name = "snd-soc-dummy",
 469                 .platform_name = "sst-mfld-platform",
 470         },
 471         /* CODEC<->CODEC link */
 472         /* back ends */
 473         {
 474                 .name = "SSP2-Codec",
 475                 .id = 1,
 476                 .cpu_dai_name = "ssp2-port",
 477                 .platform_name = "sst-mfld-platform",
 478                 .no_pcm = 1,
 479                 .codec_dai_name = "rt5645-aif1",
 480                 .codec_name = "i2c-10EC5645:00",
 481                 .init = cht_codec_init,
 482                 .be_hw_params_fixup = cht_codec_fixup,
 483                 .nonatomic = true,
 484                 .dpcm_playback = 1,
 485                 .dpcm_capture = 1,
 486                 .ops = &cht_be_ssp2_ops,
 487         },
 488 };
 489
 490 /* SoC card */
 491 static struct snd_soc_card snd_soc_card_chtrt5645 = {
 492         .name = "chtrt5645",
 493         .owner = THIS_MODULE,
 494         .dai_link = cht_dailink,
 495         .num_links = ARRAY_SIZE(cht_dailink),
 496         .dapm_widgets = cht_dapm_widgets,
 497         .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
 498         .dapm_routes = cht_rt5645_audio_map,
 499         .num_dapm_routes = ARRAY_SIZE(cht_rt5645_audio_map),
 500         .controls = cht_mc_controls,
 501         .num_controls = ARRAY_SIZE(cht_mc_controls),
 502 };
 503
 504 static struct snd_soc_card snd_soc_card_chtrt5650 = {
 505         .name = "chtrt5650",
 506         .owner = THIS_MODULE,
 507         .dai_link = cht_dailink,
 508         .num_links = ARRAY_SIZE(cht_dailink),
 509         .dapm_widgets = cht_dapm_widgets,
 510         .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
 511         .dapm_routes = cht_rt5650_audio_map,
 512         .num_dapm_routes = ARRAY_SIZE(cht_rt5650_audio_map),
 513         .controls = cht_mc_controls,
 514         .num_controls = ARRAY_SIZE(cht_mc_controls),
 515 };
 516
 517 static struct cht_acpi_card snd_soc_cards[] = {
 518         {"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
 519         {"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
 520         {"10EC5648", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
 521         {"10EC3270", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
 522         {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650},
 523 };
 524
 525 static char cht_rt5645_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
 526 static char cht_rt5645_codec_aif_name[12]; /*  = "rt5645-aif[1|2]" */
 527 static char cht_rt5645_cpu_dai_name[10]; /*  = "ssp[0|2]-port" */
 528
 529 static bool is_valleyview(void)
 530 {
 531         static const struct x86_cpu_id cpu_ids[] = {
 532                 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
 533                 {}
 534         };
 535
 536         if (!x86_match_cpu(cpu_ids))
 537                 return false;
 538         return true;
 539 }
 540
 541 struct acpi_chan_package {   /* ACPICA seems to require 64 bit integers */
 542         u64 aif_value;       /* 1: AIF1, 2: AIF2 */
 543         u64 mclock_value;    /* usually 25MHz (0x17d7940), ignored */
 544 };
 545
 546 static int snd_cht_mc_probe(struct platform_device *pdev)
 547 {
 548         int ret_val = 0;
 549         int i;
 550         struct cht_mc_private *drv;
 551         struct snd_soc_card *card = snd_soc_cards[0].soc_card;
 552         struct sst_acpi_mach *mach;
 553         const char *i2c_name = NULL;
 554         int dai_index = 0;
 555         bool found = false;
 556         bool is_bytcr = false;
 557
 558         drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
 559         if (!drv)
 560                 return -ENOMEM;
 561
 562         mach = (&pdev->dev)->platform_data;
 563
 564         for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) {
 565                 if (acpi_dev_found(snd_soc_cards[i].codec_id) &&
 566                         (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) {
 567                         dev_dbg(&pdev->dev,
 568                                 "found codec %s\n", snd_soc_cards[i].codec_id);
 569                         card = snd_soc_cards[i].soc_card;
 570                         drv->acpi_card = &snd_soc_cards[i];
 571                         found = true;
 572                         break;
 573                 }
 574         }
 575
 576         if (!found) {
 577                 dev_err(&pdev->dev, "No matching HID found in supported list\n");
 578                 return -ENODEV;
 579         }
 580
 581         card->dev = &pdev->dev;
 582         sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id);
 583
 584         /* set correct codec name */
 585         for (i = 0; i < ARRAY_SIZE(cht_dailink); i++)
 586                 if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) {
 587                         card->dai_link[i].codec_name = drv->codec_name;
 588                         dai_index = i;
 589                 }
 590
 591         /* fixup codec name based on HID */
 592         i2c_name = sst_acpi_find_name_from_hid(mach->id);
 593         if (i2c_name != NULL) {
 594                 snprintf(cht_rt5645_codec_name, sizeof(cht_rt5645_codec_name),
 595                         "%s%s", "i2c-", i2c_name);
 596                 cht_dailink[dai_index].codec_name = cht_rt5645_codec_name;
 597         }
 598
 599         /*
 600          * swap SSP0 if bytcr is detected
 601          * (will be overridden if DMI quirk is detected)
 602          */
 603         if (is_valleyview()) {
 604                 struct sst_platform_info *p_info = mach->pdata;
 605                 const struct sst_res_info *res_info = p_info->res_info;
 606
 607                 if (res_info->acpi_ipc_irq_index == 0)
 608                         is_bytcr = true;
 609         }
 610
 611         if (is_bytcr) {
 612                 /*
 613                  * Baytrail CR platforms may have CHAN package in BIOS, try
 614                  * to find relevant routing quirk based as done on Windows
 615                  * platforms. We have to read the information directly from the
 616                  * BIOS, at this stage the card is not created and the links
 617                  * with the codec driver/pdata are non-existent
 618                  */
 619
 620                 struct acpi_chan_package chan_package;
 621
 622                 /* format specified: 2 64-bit integers */
 623                 struct acpi_buffer format = {sizeof("NN"), "NN"};
 624                 struct acpi_buffer state = {0, NULL};
 625                 struct sst_acpi_package_context pkg_ctx;
 626                 bool pkg_found = false;
 627
 628                 state.length = sizeof(chan_package);
 629                 state.pointer = &chan_package;
 630
 631                 pkg_ctx.name = "CHAN";
 632                 pkg_ctx.length = 2;
 633                 pkg_ctx.format = &format;
 634                 pkg_ctx.state = &state;
 635                 pkg_ctx.data_valid = false;
 636
 637                 pkg_found = sst_acpi_find_package_from_hid(mach->id, &pkg_ctx);
 638                 if (pkg_found) {
 639                         if (chan_package.aif_value == 1) {
 640                                 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
 641                                 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF1;
 642                         } else  if (chan_package.aif_value == 2) {
 643                                 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
 644                                 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2;
 645                         } else {
 646                                 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
 647                                 pkg_found = false;
 648                         }
 649                 }
 650
 651                 if (!pkg_found) {
 652                         /* no BIOS indications, assume SSP0-AIF2 connection */
 653                         cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2;
 654                 }
 655         }
 656
 657         /* check quirks before creating card */
 658         dmi_check_system(cht_rt5645_quirk_table);
 659         log_quirks(&pdev->dev);
 660
 661         if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) ||
 662                 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) {
 663
 664                 /* fixup codec aif name */
 665                 snprintf(cht_rt5645_codec_aif_name,
 666                         sizeof(cht_rt5645_codec_aif_name),
 667                         "%s", "rt5645-aif2");
 668
 669                 cht_dailink[dai_index].codec_dai_name =
 670                         cht_rt5645_codec_aif_name;
 671         }
 672
 673         if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) ||
 674                 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) {
 675
 676                 /* fixup cpu dai name name */
 677                 snprintf(cht_rt5645_cpu_dai_name,
 678                         sizeof(cht_rt5645_cpu_dai_name),
 679                         "%s", "ssp0-port");
 680
 681                 cht_dailink[dai_index].cpu_dai_name =
 682                         cht_rt5645_cpu_dai_name;
 683         }
 684
 685         if (is_valleyview()) {
 686                 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
 687                 if (IS_ERR(drv->mclk)) {
 688                         dev_err(&pdev->dev,
 689                                 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
 690                                 PTR_ERR(drv->mclk));
 691                         return PTR_ERR(drv->mclk);
 692                 }
 693         }
 694
 695         snd_soc_card_set_drvdata(card, drv);
 696         ret_val = devm_snd_soc_register_card(&pdev->dev, card);
 697         if (ret_val) {
 698                 dev_err(&pdev->dev,
 699                         "snd_soc_register_card failed %d\n", ret_val);
 700                 return ret_val;
 701         }
 702         platform_set_drvdata(pdev, card);
 703         return ret_val;
 704 }
 705
 706 static struct platform_driver snd_cht_mc_driver = {
 707         .driver = {
 708                 .name = "cht-bsw-rt5645",
 709         },
 710         .probe = snd_cht_mc_probe,
 711 };
 712
 713 module_platform_driver(snd_cht_mc_driver)
 714
 715 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
 716 MODULE_AUTHOR("Fang, Yang A,N,Harshapriya");
 717 MODULE_LICENSE("GPL v2");
 718 MODULE_ALIAS("platform:cht-bsw-rt5645");