sound/soc/intel/skylake/skl.c

   1 /*
   2  *  skl.c - Implementation of ASoC Intel SKL HD Audio driver
   3  *
   4  *  Copyright (C) 2014-2015 Intel Corp
   5  *  Author: Jeeja KP <jeeja.kp@intel.com>
   6  *
   7  *  Derived mostly from Intel HDA driver with following copyrights:
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  11  *
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; version 2 of the License.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but
  17  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  General Public License for more details.
  20  *
  21  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/pci.h>
  26 #include <linux/pm_runtime.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/firmware.h>
  29 #include <linux/delay.h>
  30 #include <sound/pcm.h>
  31 #include <sound/soc-acpi.h>
  32 #include <sound/hda_register.h>
  33 #include <sound/hdaudio.h>
  34 #include <sound/hda_i915.h>
  35 #include "skl.h"
  36 #include "skl-sst-dsp.h"
  37 #include "skl-sst-ipc.h"
  38
  39 static struct skl_machine_pdata skl_dmic_data;
  40
  41 /*
  42  * initialize the PCI registers
  43  */
  44 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
  45                             unsigned char mask, unsigned char val)
  46 {
  47         unsigned char data;
  48
  49         pci_read_config_byte(pci, reg, &data);
  50         data &= ~mask;
  51         data |= (val & mask);
  52         pci_write_config_byte(pci, reg, data);
  53 }
  54
  55 static void skl_init_pci(struct skl *skl)
  56 {
  57         struct hdac_ext_bus *ebus = &skl->ebus;
  58
  59         /*
  60          * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
  61          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
  62          * Ensuring these bits are 0 clears playback static on some HD Audio
  63          * codecs.
  64          * The PCI register TCSEL is defined in the Intel manuals.
  65          */
  66         dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
  67         skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
  68 }
  69
  70 static void update_pci_dword(struct pci_dev *pci,
  71                         unsigned int reg, u32 mask, u32 val)
  72 {
  73         u32 data = 0;
  74
  75         pci_read_config_dword(pci, reg, &data);
  76         data &= ~mask;
  77         data |= (val & mask);
  78         pci_write_config_dword(pci, reg, data);
  79 }
  80
  81 /*
  82  * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
  83  *
  84  * @dev: device pointer
  85  * @enable: enable/disable flag
  86  */
  87 static void skl_enable_miscbdcge(struct device *dev, bool enable)
  88 {
  89         struct pci_dev *pci = to_pci_dev(dev);
  90         u32 val;
  91
  92         val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
  93
  94         update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
  95 }
  96
  97 /*
  98  * While performing reset, controller may not come back properly causing
  99  * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
 100  * (init chip) and then again set CGCTL.MISCBDCGE to 1
 101  */
 102 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
 103 {
 104         int ret;
 105
 106         skl_enable_miscbdcge(bus->dev, false);
 107         ret = snd_hdac_bus_init_chip(bus, full_reset);
 108         skl_enable_miscbdcge(bus->dev, true);
 109
 110         return ret;
 111 }
 112
 113 void skl_update_d0i3c(struct device *dev, bool enable)
 114 {
 115         struct pci_dev *pci = to_pci_dev(dev);
 116         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 117         struct hdac_bus *bus = ebus_to_hbus(ebus);
 118         u8 reg;
 119         int timeout = 50;
 120
 121         reg = snd_hdac_chip_readb(bus, VS_D0I3C);
 122         /* Do not write to D0I3C until command in progress bit is cleared */
 123         while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
 124                 udelay(10);
 125                 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
 126         }
 127
 128         /* Highly unlikely. But if it happens, flag error explicitly */
 129         if (!timeout) {
 130                 dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
 131                 return;
 132         }
 133
 134         if (enable)
 135                 reg = reg | AZX_REG_VS_D0I3C_I3;
 136         else
 137                 reg = reg & (~AZX_REG_VS_D0I3C_I3);
 138
 139         snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
 140
 141         timeout = 50;
 142         /* Wait for cmd in progress to be cleared before exiting the function */
 143         reg = snd_hdac_chip_readb(bus, VS_D0I3C);
 144         while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
 145                 udelay(10);
 146                 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
 147         }
 148
 149         /* Highly unlikely. But if it happens, flag error explicitly */
 150         if (!timeout) {
 151                 dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
 152                 return;
 153         }
 154
 155         dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
 156                         snd_hdac_chip_readb(bus, VS_D0I3C));
 157 }
 158
 159 /* called from IRQ */
 160 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
 161 {
 162         snd_pcm_period_elapsed(hstr->substream);
 163 }
 164
 165 static irqreturn_t skl_interrupt(int irq, void *dev_id)
 166 {
 167         struct hdac_ext_bus *ebus = dev_id;
 168         struct hdac_bus *bus = ebus_to_hbus(ebus);
 169         u32 status;
 170
 171         if (!pm_runtime_active(bus->dev))
 172                 return IRQ_NONE;
 173
 174         spin_lock(&bus->reg_lock);
 175
 176         status = snd_hdac_chip_readl(bus, INTSTS);
 177         if (status == 0 || status == 0xffffffff) {
 178                 spin_unlock(&bus->reg_lock);
 179                 return IRQ_NONE;
 180         }
 181
 182         /* clear rirb int */
 183         status = snd_hdac_chip_readb(bus, RIRBSTS);
 184         if (status & RIRB_INT_MASK) {
 185                 if (status & RIRB_INT_RESPONSE)
 186                         snd_hdac_bus_update_rirb(bus);
 187                 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
 188         }
 189
 190         spin_unlock(&bus->reg_lock);
 191
 192         return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
 193 }
 194
 195 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
 196 {
 197         struct hdac_ext_bus *ebus = dev_id;
 198         struct hdac_bus *bus = ebus_to_hbus(ebus);
 199         u32 status;
 200
 201         status = snd_hdac_chip_readl(bus, INTSTS);
 202
 203         snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
 204
 205         return IRQ_HANDLED;
 206 }
 207
 208 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
 209 {
 210         struct skl *skl = ebus_to_skl(ebus);
 211         struct hdac_bus *bus = ebus_to_hbus(ebus);
 212         int ret;
 213
 214         ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
 215                         skl_threaded_handler,
 216                         IRQF_SHARED,
 217                         KBUILD_MODNAME, ebus);
 218         if (ret) {
 219                 dev_err(bus->dev,
 220                         "unable to grab IRQ %d, disabling device\n",
 221                         skl->pci->irq);
 222                 return ret;
 223         }
 224
 225         bus->irq = skl->pci->irq;
 226         pci_intx(skl->pci, 1);
 227
 228         return 0;
 229 }
 230
 231 static int skl_suspend_late(struct device *dev)
 232 {
 233         struct pci_dev *pci = to_pci_dev(dev);
 234         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 235         struct skl *skl = ebus_to_skl(ebus);
 236
 237         return skl_suspend_late_dsp(skl);
 238 }
 239
 240 #ifdef CONFIG_PM
 241 static int _skl_suspend(struct hdac_ext_bus *ebus)
 242 {
 243         struct skl *skl = ebus_to_skl(ebus);
 244         struct hdac_bus *bus = ebus_to_hbus(ebus);
 245         struct pci_dev *pci = to_pci_dev(bus->dev);
 246         int ret;
 247
 248         snd_hdac_ext_bus_link_power_down_all(ebus);
 249
 250         ret = skl_suspend_dsp(skl);
 251         if (ret < 0)
 252                 return ret;
 253
 254         snd_hdac_bus_stop_chip(bus);
 255         update_pci_dword(pci, AZX_PCIREG_PGCTL,
 256                 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
 257         skl_enable_miscbdcge(bus->dev, false);
 258         snd_hdac_bus_enter_link_reset(bus);
 259         skl_enable_miscbdcge(bus->dev, true);
 260         skl_cleanup_resources(skl);
 261
 262         return 0;
 263 }
 264
 265 static int _skl_resume(struct hdac_ext_bus *ebus)
 266 {
 267         struct skl *skl = ebus_to_skl(ebus);
 268         struct hdac_bus *bus = ebus_to_hbus(ebus);
 269
 270         skl_init_pci(skl);
 271         skl_init_chip(bus, true);
 272
 273         return skl_resume_dsp(skl);
 274 }
 275 #endif
 276
 277 #ifdef CONFIG_PM_SLEEP
 278 /*
 279  * power management
 280  */
 281 static int skl_suspend(struct device *dev)
 282 {
 283         struct pci_dev *pci = to_pci_dev(dev);
 284         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 285         struct skl *skl  = ebus_to_skl(ebus);
 286         struct hdac_bus *bus = ebus_to_hbus(ebus);
 287         int ret = 0;
 288
 289         /*
 290          * Do not suspend if streams which are marked ignore suspend are
 291          * running, we need to save the state for these and continue
 292          */
 293         if (skl->supend_active) {
 294                 /* turn off the links and stop the CORB/RIRB DMA if it is On */
 295                 snd_hdac_ext_bus_link_power_down_all(ebus);
 296
 297                 if (ebus->cmd_dma_state)
 298                         snd_hdac_bus_stop_cmd_io(&ebus->bus);
 299
 300                 enable_irq_wake(bus->irq);
 301                 pci_save_state(pci);
 302         } else {
 303                 ret = _skl_suspend(ebus);
 304                 if (ret < 0)
 305                         return ret;
 306                 skl->skl_sst->fw_loaded = false;
 307         }
 308
 309         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
 310                 ret = snd_hdac_display_power(bus, false);
 311                 if (ret < 0)
 312                         dev_err(bus->dev,
 313                                 "Cannot turn OFF display power on i915\n");
 314         }
 315
 316         return ret;
 317 }
 318
 319 static int skl_resume(struct device *dev)
 320 {
 321         struct pci_dev *pci = to_pci_dev(dev);
 322         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 323         struct skl *skl  = ebus_to_skl(ebus);
 324         struct hdac_bus *bus = ebus_to_hbus(ebus);
 325         struct hdac_ext_link *hlink = NULL;
 326         int ret;
 327
 328         /* Turned OFF in HDMI codec driver after codec reconfiguration */
 329         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
 330                 ret = snd_hdac_display_power(bus, true);
 331                 if (ret < 0) {
 332                         dev_err(bus->dev,
 333                                 "Cannot turn on display power on i915\n");
 334                         return ret;
 335                 }
 336         }
 337
 338         /*
 339          * resume only when we are not in suspend active, otherwise need to
 340          * restore the device
 341          */
 342         if (skl->supend_active) {
 343                 pci_restore_state(pci);
 344                 snd_hdac_ext_bus_link_power_up_all(ebus);
 345                 disable_irq_wake(bus->irq);
 346                 /*
 347                  * turn On the links which are On before active suspend
 348                  * and start the CORB/RIRB DMA if On before
 349                  * active suspend.
 350                  */
 351                 list_for_each_entry(hlink, &ebus->hlink_list, list) {
 352                         if (hlink->ref_count)
 353                                 snd_hdac_ext_bus_link_power_up(hlink);
 354                 }
 355
 356                 if (ebus->cmd_dma_state)
 357                         snd_hdac_bus_init_cmd_io(&ebus->bus);
 358         } else {
 359                 ret = _skl_resume(ebus);
 360
 361                 /* turn off the links which are off before suspend */
 362                 list_for_each_entry(hlink, &ebus->hlink_list, list) {
 363                         if (!hlink->ref_count)
 364                                 snd_hdac_ext_bus_link_power_down(hlink);
 365                 }
 366
 367                 if (!ebus->cmd_dma_state)
 368                         snd_hdac_bus_stop_cmd_io(&ebus->bus);
 369         }
 370
 371         return ret;
 372 }
 373 #endif /* CONFIG_PM_SLEEP */
 374
 375 #ifdef CONFIG_PM
 376 static int skl_runtime_suspend(struct device *dev)
 377 {
 378         struct pci_dev *pci = to_pci_dev(dev);
 379         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 380         struct hdac_bus *bus = ebus_to_hbus(ebus);
 381
 382         dev_dbg(bus->dev, "in %s\n", __func__);
 383
 384         return _skl_suspend(ebus);
 385 }
 386
 387 static int skl_runtime_resume(struct device *dev)
 388 {
 389         struct pci_dev *pci = to_pci_dev(dev);
 390         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 391         struct hdac_bus *bus = ebus_to_hbus(ebus);
 392
 393         dev_dbg(bus->dev, "in %s\n", __func__);
 394
 395         return _skl_resume(ebus);
 396 }
 397 #endif /* CONFIG_PM */
 398
 399 static const struct dev_pm_ops skl_pm = {
 400         SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
 401         SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
 402         .suspend_late = skl_suspend_late,
 403 };
 404
 405 /*
 406  * destructor
 407  */
 408 static int skl_free(struct hdac_ext_bus *ebus)
 409 {
 410         struct skl *skl  = ebus_to_skl(ebus);
 411         struct hdac_bus *bus = ebus_to_hbus(ebus);
 412
 413         skl->init_done = 0; /* to be sure */
 414
 415         snd_hdac_ext_stop_streams(ebus);
 416
 417         if (bus->irq >= 0)
 418                 free_irq(bus->irq, (void *)ebus);
 419         snd_hdac_bus_free_stream_pages(bus);
 420         snd_hdac_stream_free_all(ebus);
 421         snd_hdac_link_free_all(ebus);
 422
 423         if (bus->remap_addr)
 424                 iounmap(bus->remap_addr);
 425
 426         pci_release_regions(skl->pci);
 427         pci_disable_device(skl->pci);
 428
 429         snd_hdac_ext_bus_exit(ebus);
 430
 431         cancel_work_sync(&skl->probe_work);
 432         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
 433                 snd_hdac_i915_exit(&ebus->bus);
 434
 435         return 0;
 436 }
 437
 438 static int skl_machine_device_register(struct skl *skl, void *driver_data)
 439 {
 440         struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
 441         struct platform_device *pdev;
 442         struct snd_soc_acpi_mach *mach = driver_data;
 443         int ret;
 444
 445         mach = snd_soc_acpi_find_machine(mach);
 446         if (mach == NULL) {
 447                 dev_err(bus->dev, "No matching machine driver found\n");
 448                 return -ENODEV;
 449         }
 450         skl->fw_name = mach->fw_filename;
 451
 452         pdev = platform_device_alloc(mach->drv_name, -1);
 453         if (pdev == NULL) {
 454                 dev_err(bus->dev, "platform device alloc failed\n");
 455                 return -EIO;
 456         }
 457
 458         ret = platform_device_add(pdev);
 459         if (ret) {
 460                 dev_err(bus->dev, "failed to add machine device\n");
 461                 platform_device_put(pdev);
 462                 return -EIO;
 463         }
 464
 465         if (mach->pdata) {
 466                 skl->use_tplg_pcm =
 467                         ((struct skl_machine_pdata *)mach->pdata)->use_tplg_pcm;
 468                 dev_set_drvdata(&pdev->dev, mach->pdata);
 469         }
 470
 471         skl->i2s_dev = pdev;
 472
 473         return 0;
 474 }
 475
 476 static void skl_machine_device_unregister(struct skl *skl)
 477 {
 478         if (skl->i2s_dev)
 479                 platform_device_unregister(skl->i2s_dev);
 480 }
 481
 482 static int skl_dmic_device_register(struct skl *skl)
 483 {
 484         struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
 485         struct platform_device *pdev;
 486         int ret;
 487
 488         /* SKL has one dmic port, so allocate dmic device for this */
 489         pdev = platform_device_alloc("dmic-codec", -1);
 490         if (!pdev) {
 491                 dev_err(bus->dev, "failed to allocate dmic device\n");
 492                 return -ENOMEM;
 493         }
 494
 495         ret = platform_device_add(pdev);
 496         if (ret) {
 497                 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
 498                 platform_device_put(pdev);
 499                 return ret;
 500         }
 501         skl->dmic_dev = pdev;
 502
 503         return 0;
 504 }
 505
 506 static void skl_dmic_device_unregister(struct skl *skl)
 507 {
 508         if (skl->dmic_dev)
 509                 platform_device_unregister(skl->dmic_dev);
 510 }
 511
 512 /*
 513  * Probe the given codec address
 514  */
 515 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
 516 {
 517         struct hdac_bus *bus = ebus_to_hbus(ebus);
 518         unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
 519                 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
 520         unsigned int res = -1;
 521
 522         mutex_lock(&bus->cmd_mutex);
 523         snd_hdac_bus_send_cmd(bus, cmd);
 524         snd_hdac_bus_get_response(bus, addr, &res);
 525         mutex_unlock(&bus->cmd_mutex);
 526         if (res == -1)
 527                 return -EIO;
 528         dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
 529
 530         return snd_hdac_ext_bus_device_init(ebus, addr);
 531 }
 532
 533 /* Codec initialization */
 534 static void skl_codec_create(struct hdac_ext_bus *ebus)
 535 {
 536         struct hdac_bus *bus = ebus_to_hbus(ebus);
 537         int c, max_slots;
 538
 539         max_slots = HDA_MAX_CODECS;
 540
 541         /* First try to probe all given codec slots */
 542         for (c = 0; c < max_slots; c++) {
 543                 if ((bus->codec_mask & (1 << c))) {
 544                         if (probe_codec(ebus, c) < 0) {
 545                                 /*
 546                                  * Some BIOSen give you wrong codec addresses
 547                                  * that don't exist
 548                                  */
 549                                 dev_warn(bus->dev,
 550                                          "Codec #%d probe error; disabling it...\n", c);
 551                                 bus->codec_mask &= ~(1 << c);
 552                                 /*
 553                                  * More badly, accessing to a non-existing
 554                                  * codec often screws up the controller bus,
 555                                  * and disturbs the further communications.
 556                                  * Thus if an error occurs during probing,
 557                                  * better to reset the controller bus to get
 558                                  * back to the sanity state.
 559                                  */
 560                                 snd_hdac_bus_stop_chip(bus);
 561                                 skl_init_chip(bus, true);
 562                         }
 563                 }
 564         }
 565 }
 566
 567 static const struct hdac_bus_ops bus_core_ops = {
 568         .command = snd_hdac_bus_send_cmd,
 569         .get_response = snd_hdac_bus_get_response,
 570 };
 571
 572 static int skl_i915_init(struct hdac_bus *bus)
 573 {
 574         int err;
 575
 576         /*
 577          * The HDMI codec is in GPU so we need to ensure that it is powered
 578          * up and ready for probe
 579          */
 580         err = snd_hdac_i915_init(bus);
 581         if (err < 0)
 582                 return err;
 583
 584         err = snd_hdac_display_power(bus, true);
 585         if (err < 0)
 586                 dev_err(bus->dev, "Cannot turn on display power on i915\n");
 587
 588         return err;
 589 }
 590
 591 static void skl_probe_work(struct work_struct *work)
 592 {
 593         struct skl *skl = container_of(work, struct skl, probe_work);
 594         struct hdac_ext_bus *ebus = &skl->ebus;
 595         struct hdac_bus *bus = ebus_to_hbus(ebus);
 596         struct hdac_ext_link *hlink = NULL;
 597         int err;
 598
 599         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
 600                 err = skl_i915_init(bus);
 601                 if (err < 0)
 602                         return;
 603         }
 604
 605         err = skl_init_chip(bus, true);
 606         if (err < 0) {
 607                 dev_err(bus->dev, "Init chip failed with err: %d\n", err);
 608                 goto out_err;
 609         }
 610
 611         /* codec detection */
 612         if (!bus->codec_mask)
 613                 dev_info(bus->dev, "no hda codecs found!\n");
 614
 615         /* create codec instances */
 616         skl_codec_create(ebus);
 617
 618         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
 619                 err = snd_hdac_display_power(bus, false);
 620                 if (err < 0) {
 621                         dev_err(bus->dev, "Cannot turn off display power on i915\n");
 622                         return;
 623                 }
 624         }
 625
 626         /* register platform dai and controls */
 627         err = skl_platform_register(bus->dev);
 628         if (err < 0)
 629                 return;
 630         /*
 631          * we are done probing so decrement link counts
 632          */
 633         list_for_each_entry(hlink, &ebus->hlink_list, list)
 634                 snd_hdac_ext_bus_link_put(ebus, hlink);
 635
 636         /* configure PM */
 637         pm_runtime_put_noidle(bus->dev);
 638         pm_runtime_allow(bus->dev);
 639         skl->init_done = 1;
 640
 641         return;
 642
 643 out_err:
 644         if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
 645                 err = snd_hdac_display_power(bus, false);
 646 }
 647
 648 /*
 649  * constructor
 650  */
 651 static int skl_create(struct pci_dev *pci,
 652                       const struct hdac_io_ops *io_ops,
 653                       struct skl **rskl)
 654 {
 655         struct skl *skl;
 656         struct hdac_ext_bus *ebus;
 657
 658         int err;
 659
 660         *rskl = NULL;
 661
 662         err = pci_enable_device(pci);
 663         if (err < 0)
 664                 return err;
 665
 666         skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
 667         if (!skl) {
 668                 pci_disable_device(pci);
 669                 return -ENOMEM;
 670         }
 671         ebus = &skl->ebus;
 672         snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
 673         ebus->bus.use_posbuf = 1;
 674         skl->pci = pci;
 675         INIT_WORK(&skl->probe_work, skl_probe_work);
 676
 677         ebus->bus.bdl_pos_adj = 0;
 678
 679         *rskl = skl;
 680
 681         return 0;
 682 }
 683
 684 static int skl_first_init(struct hdac_ext_bus *ebus)
 685 {
 686         struct skl *skl = ebus_to_skl(ebus);
 687         struct hdac_bus *bus = ebus_to_hbus(ebus);
 688         struct pci_dev *pci = skl->pci;
 689         int err;
 690         unsigned short gcap;
 691         int cp_streams, pb_streams, start_idx;
 692
 693         err = pci_request_regions(pci, "Skylake HD audio");
 694         if (err < 0)
 695                 return err;
 696
 697         bus->addr = pci_resource_start(pci, 0);
 698         bus->remap_addr = pci_ioremap_bar(pci, 0);
 699         if (bus->remap_addr == NULL) {
 700                 dev_err(bus->dev, "ioremap error\n");
 701                 return -ENXIO;
 702         }
 703
 704         snd_hdac_bus_reset_link(bus, true);
 705
 706         snd_hdac_bus_parse_capabilities(bus);
 707
 708         if (skl_acquire_irq(ebus, 0) < 0)
 709                 return -EBUSY;
 710
 711         pci_set_master(pci);
 712         synchronize_irq(bus->irq);
 713
 714         gcap = snd_hdac_chip_readw(bus, GCAP);
 715         dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
 716
 717         /* allow 64bit DMA address if supported by H/W */
 718         if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
 719                 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
 720         } else {
 721                 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
 722                 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
 723         }
 724
 725         /* read number of streams from GCAP register */
 726         cp_streams = (gcap >> 8) & 0x0f;
 727         pb_streams = (gcap >> 12) & 0x0f;
 728
 729         if (!pb_streams && !cp_streams)
 730                 return -EIO;
 731
 732         ebus->num_streams = cp_streams + pb_streams;
 733
 734         /* initialize streams */
 735         snd_hdac_ext_stream_init_all
 736                 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
 737         start_idx = cp_streams;
 738         snd_hdac_ext_stream_init_all
 739                 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
 740
 741         err = snd_hdac_bus_alloc_stream_pages(bus);
 742         if (err < 0)
 743                 return err;
 744
 745         /* initialize chip */
 746         skl_init_pci(skl);
 747
 748         return skl_init_chip(bus, true);
 749 }
 750
 751 static int skl_probe(struct pci_dev *pci,
 752                      const struct pci_device_id *pci_id)
 753 {
 754         struct skl *skl;
 755         struct hdac_ext_bus *ebus = NULL;
 756         struct hdac_bus *bus = NULL;
 757         int err;
 758
 759         /* we use ext core ops, so provide NULL for ops here */
 760         err = skl_create(pci, NULL, &skl);
 761         if (err < 0)
 762                 return err;
 763
 764         ebus = &skl->ebus;
 765         bus = ebus_to_hbus(ebus);
 766
 767         err = skl_first_init(ebus);
 768         if (err < 0)
 769                 goto out_free;
 770
 771         skl->pci_id = pci->device;
 772
 773         device_disable_async_suspend(bus->dev);
 774
 775         skl->nhlt = skl_nhlt_init(bus->dev);
 776
 777         if (skl->nhlt == NULL) {
 778                 err = -ENODEV;
 779                 goto out_free;
 780         }
 781
 782         err = skl_nhlt_create_sysfs(skl);
 783         if (err < 0)
 784                 goto out_nhlt_free;
 785
 786         skl_nhlt_update_topology_bin(skl);
 787
 788         pci_set_drvdata(skl->pci, ebus);
 789
 790         skl_dmic_data.dmic_num = skl_get_dmic_geo(skl);
 791
 792         /* check if dsp is there */
 793         if (bus->ppcap) {
 794                 err = skl_machine_device_register(skl,
 795                                   (void *)pci_id->driver_data);
 796                 if (err < 0)
 797                         goto out_nhlt_free;
 798
 799                 err = skl_init_dsp(skl);
 800                 if (err < 0) {
 801                         dev_dbg(bus->dev, "error failed to register dsp\n");
 802                         goto out_mach_free;
 803                 }
 804                 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
 805
 806         }
 807         if (bus->mlcap)
 808                 snd_hdac_ext_bus_get_ml_capabilities(ebus);
 809
 810         snd_hdac_bus_stop_chip(bus);
 811
 812         /* create device for soc dmic */
 813         err = skl_dmic_device_register(skl);
 814         if (err < 0)
 815                 goto out_dsp_free;
 816
 817         schedule_work(&skl->probe_work);
 818
 819         return 0;
 820
 821 out_dsp_free:
 822         skl_free_dsp(skl);
 823 out_mach_free:
 824         skl_machine_device_unregister(skl);
 825 out_nhlt_free:
 826         skl_nhlt_free(skl->nhlt);
 827 out_free:
 828         skl_free(ebus);
 829
 830         return err;
 831 }
 832
 833 static void skl_shutdown(struct pci_dev *pci)
 834 {
 835         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 836         struct hdac_bus *bus = ebus_to_hbus(ebus);
 837         struct hdac_stream *s;
 838         struct hdac_ext_stream *stream;
 839         struct skl *skl;
 840
 841         if (ebus == NULL)
 842                 return;
 843
 844         skl = ebus_to_skl(ebus);
 845
 846         if (!skl->init_done)
 847                 return;
 848
 849         snd_hdac_ext_stop_streams(ebus);
 850         list_for_each_entry(s, &bus->stream_list, list) {
 851                 stream = stream_to_hdac_ext_stream(s);
 852                 snd_hdac_ext_stream_decouple(ebus, stream, false);
 853         }
 854
 855         snd_hdac_bus_stop_chip(bus);
 856 }
 857
 858 static void skl_remove(struct pci_dev *pci)
 859 {
 860         struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 861         struct skl *skl = ebus_to_skl(ebus);
 862
 863         release_firmware(skl->tplg);
 864
 865         pm_runtime_get_noresume(&pci->dev);
 866
 867         /* codec removal, invoke bus_device_remove */
 868         snd_hdac_ext_bus_device_remove(ebus);
 869
 870         skl->debugfs = NULL;
 871         skl_platform_unregister(&pci->dev);
 872         skl_free_dsp(skl);
 873         skl_machine_device_unregister(skl);
 874         skl_dmic_device_unregister(skl);
 875         skl_nhlt_remove_sysfs(skl);
 876         skl_nhlt_free(skl->nhlt);
 877         skl_free(ebus);
 878         dev_set_drvdata(&pci->dev, NULL);
 879 }
 880
 881 static struct snd_soc_acpi_codecs skl_codecs = {
 882         .num_codecs = 1,
 883         .codecs = {"10508825"}
 884 };
 885
 886 static struct snd_soc_acpi_codecs kbl_codecs = {
 887         .num_codecs = 1,
 888         .codecs = {"10508825"}
 889 };
 890
 891 static struct snd_soc_acpi_codecs bxt_codecs = {
 892         .num_codecs = 1,
 893         .codecs = {"MX98357A"}
 894 };
 895
 896 static struct snd_soc_acpi_codecs kbl_poppy_codecs = {
 897         .num_codecs = 1,
 898         .codecs = {"10EC5663"}
 899 };
 900
 901 static struct snd_soc_acpi_codecs kbl_5663_5514_codecs = {
 902         .num_codecs = 2,
 903         .codecs = {"10EC5663", "10EC5514"}
 904 };
 905
 906 static struct skl_machine_pdata cnl_pdata = {
 907         .use_tplg_pcm = true,
 908 };
 909
 910 static struct snd_soc_acpi_mach sst_skl_devdata[] = {
 911         {
 912                 .id = "INT343A",
 913                 .drv_name = "skl_alc286s_i2s",
 914                 .fw_filename = "intel/dsp_fw_release.bin",
 915         },
 916         {
 917                 .id = "INT343B",
 918                 .drv_name = "skl_n88l25_s4567",
 919                 .fw_filename = "intel/dsp_fw_release.bin",
 920                 .machine_quirk = snd_soc_acpi_codec_list,
 921                 .quirk_data = &skl_codecs,
 922                 .pdata = &skl_dmic_data
 923         },
 924         {
 925                 .id = "MX98357A",
 926                 .drv_name = "skl_n88l25_m98357a",
 927                 .fw_filename = "intel/dsp_fw_release.bin",
 928                 .machine_quirk = snd_soc_acpi_codec_list,
 929                 .quirk_data = &skl_codecs,
 930                 .pdata = &skl_dmic_data
 931         },
 932         {}
 933 };
 934
 935 static struct snd_soc_acpi_mach sst_bxtp_devdata[] = {
 936         {
 937                 .id = "INT343A",
 938                 .drv_name = "bxt_alc298s_i2s",
 939                 .fw_filename = "intel/dsp_fw_bxtn.bin",
 940         },
 941         {
 942                 .id = "DLGS7219",
 943                 .drv_name = "bxt_da7219_max98357a_i2s",
 944                 .fw_filename = "intel/dsp_fw_bxtn.bin",
 945                 .machine_quirk = snd_soc_acpi_codec_list,
 946                 .quirk_data = &bxt_codecs,
 947         },
 948         {}
 949 };
 950
 951 static struct snd_soc_acpi_mach sst_kbl_devdata[] = {
 952         {
 953                 .id = "INT343A",
 954                 .drv_name = "kbl_alc286s_i2s",
 955                 .fw_filename = "intel/dsp_fw_kbl.bin",
 956         },
 957         {
 958                 .id = "INT343B",
 959                 .drv_name = "kbl_n88l25_s4567",
 960                 .fw_filename = "intel/dsp_fw_kbl.bin",
 961                 .machine_quirk = snd_soc_acpi_codec_list,
 962                 .quirk_data = &kbl_codecs,
 963                 .pdata = &skl_dmic_data
 964         },
 965         {
 966                 .id = "MX98357A",
 967                 .drv_name = "kbl_n88l25_m98357a",
 968                 .fw_filename = "intel/dsp_fw_kbl.bin",
 969                 .machine_quirk = snd_soc_acpi_codec_list,
 970                 .quirk_data = &kbl_codecs,
 971                 .pdata = &skl_dmic_data
 972         },
 973         {
 974                 .id = "MX98927",
 975                 .drv_name = "kbl_r5514_5663_max",
 976                 .fw_filename = "intel/dsp_fw_kbl.bin",
 977                 .machine_quirk = snd_soc_acpi_codec_list,
 978                 .quirk_data = &kbl_5663_5514_codecs,
 979                 .pdata = &skl_dmic_data
 980         },
 981         {
 982                 .id = "MX98927",
 983                 .drv_name = "kbl_rt5663_m98927",
 984                 .fw_filename = "intel/dsp_fw_kbl.bin",
 985                 .machine_quirk = snd_soc_acpi_codec_list,
 986                 .quirk_data = &kbl_poppy_codecs,
 987                 .pdata = &skl_dmic_data
 988         },
 989         {
 990                 .id = "10EC5663",
 991                 .drv_name = "kbl_rt5663",
 992                 .fw_filename = "intel/dsp_fw_kbl.bin",
 993         },
 994
 995         {}
 996 };
 997
 998 static struct snd_soc_acpi_mach sst_glk_devdata[] = {
 999         {
1000                 .id = "INT343A",
1001                 .drv_name = "glk_alc298s_i2s",
1002                 .fw_filename = "intel/dsp_fw_glk.bin",
1003         },
1004         {}
1005 };
1006
1007 static const struct snd_soc_acpi_mach sst_cnl_devdata[] = {
1008         {
1009                 .id = "INT34C2",
1010                 .drv_name = "cnl_rt274",
1011                 .fw_filename = "intel/dsp_fw_cnl.bin",
1012                 .pdata = &cnl_pdata,
1013         },
1014         {}
1015 };
1016
1017 /* PCI IDs */
1018 static const struct pci_device_id skl_ids[] = {
1019         /* Sunrise Point-LP */
1020         { PCI_DEVICE(0x8086, 0x9d70),
1021                 .driver_data = (unsigned long)&sst_skl_devdata},
1022         /* BXT-P */
1023         { PCI_DEVICE(0x8086, 0x5a98),
1024                 .driver_data = (unsigned long)&sst_bxtp_devdata},
1025         /* KBL */
1026         { PCI_DEVICE(0x8086, 0x9D71),
1027                 .driver_data = (unsigned long)&sst_kbl_devdata},
1028         /* GLK */
1029         { PCI_DEVICE(0x8086, 0x3198),
1030                 .driver_data = (unsigned long)&sst_glk_devdata},
1031         /* CNL */
1032         { PCI_DEVICE(0x8086, 0x9dc8),
1033                 .driver_data = (unsigned long)&sst_cnl_devdata},
1034         { 0, }
1035 };
1036 MODULE_DEVICE_TABLE(pci, skl_ids);
1037
1038 /* pci_driver definition */
1039 static struct pci_driver skl_driver = {
1040         .name = KBUILD_MODNAME,
1041         .id_table = skl_ids,
1042         .probe = skl_probe,
1043         .remove = skl_remove,
1044         .shutdown = skl_shutdown,
1045         .driver = {
1046                 .pm = &skl_pm,
1047         },
1048 };
1049 module_pci_driver(skl_driver);
1050
1051 MODULE_LICENSE("GPL v2");
1052 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");