2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <linux/delay.h>
30 #include <sound/pcm.h>
31 #include "../common/sst-acpi.h"
32 #include <sound/hda_register.h>
33 #include <sound/hdaudio.h>
34 #include <sound/hda_i915.h>
36 #include "skl-sst-dsp.h"
37 #include "skl-sst-ipc.h"
39 static struct skl_machine_pdata skl_dmic_data
;
42 * initialize the PCI registers
44 static void skl_update_pci_byte(struct pci_dev
*pci
, unsigned int reg
,
45 unsigned char mask
, unsigned char val
)
49 pci_read_config_byte(pci
, reg
, &data
);
52 pci_write_config_byte(pci
, reg
, data
);
55 static void skl_init_pci(struct skl
*skl
)
57 struct hdac_ext_bus
*ebus
= &skl
->ebus
;
60 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
61 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
62 * Ensuring these bits are 0 clears playback static on some HD Audio
64 * The PCI register TCSEL is defined in the Intel manuals.
66 dev_dbg(ebus_to_hbus(ebus
)->dev
, "Clearing TCSEL\n");
67 skl_update_pci_byte(skl
->pci
, AZX_PCIREG_TCSEL
, 0x07, 0);
70 static void update_pci_dword(struct pci_dev
*pci
,
71 unsigned int reg
, u32 mask
, u32 val
)
75 pci_read_config_dword(pci
, reg
, &data
);
78 pci_write_config_dword(pci
, reg
, data
);
82 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
84 * @dev: device pointer
85 * @enable: enable/disable flag
87 static void skl_enable_miscbdcge(struct device
*dev
, bool enable
)
89 struct pci_dev
*pci
= to_pci_dev(dev
);
92 val
= enable
? AZX_CGCTL_MISCBDCGE_MASK
: 0;
94 update_pci_dword(pci
, AZX_PCIREG_CGCTL
, AZX_CGCTL_MISCBDCGE_MASK
, val
);
98 * While performing reset, controller may not come back properly causing
99 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
100 * (init chip) and then again set CGCTL.MISCBDCGE to 1
102 static int skl_init_chip(struct hdac_bus
*bus
, bool full_reset
)
106 skl_enable_miscbdcge(bus
->dev
, false);
107 ret
= snd_hdac_bus_init_chip(bus
, full_reset
);
108 skl_enable_miscbdcge(bus
->dev
, true);
113 void skl_update_d0i3c(struct device
*dev
, bool enable
)
115 struct pci_dev
*pci
= to_pci_dev(dev
);
116 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
117 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
121 reg
= snd_hdac_chip_readb(bus
, VS_D0I3C
);
122 /* Do not write to D0I3C until command in progress bit is cleared */
123 while ((reg
& AZX_REG_VS_D0I3C_CIP
) && --timeout
) {
125 reg
= snd_hdac_chip_readb(bus
, VS_D0I3C
);
128 /* Highly unlikely. But if it happens, flag error explicitly */
130 dev_err(bus
->dev
, "Before D0I3C update: D0I3C CIP timeout\n");
135 reg
= reg
| AZX_REG_VS_D0I3C_I3
;
137 reg
= reg
& (~AZX_REG_VS_D0I3C_I3
);
139 snd_hdac_chip_writeb(bus
, VS_D0I3C
, reg
);
142 /* Wait for cmd in progress to be cleared before exiting the function */
143 reg
= snd_hdac_chip_readb(bus
, VS_D0I3C
);
144 while ((reg
& AZX_REG_VS_D0I3C_CIP
) && --timeout
) {
146 reg
= snd_hdac_chip_readb(bus
, VS_D0I3C
);
149 /* Highly unlikely. But if it happens, flag error explicitly */
151 dev_err(bus
->dev
, "After D0I3C update: D0I3C CIP timeout\n");
155 dev_dbg(bus
->dev
, "D0I3C register = 0x%x\n",
156 snd_hdac_chip_readb(bus
, VS_D0I3C
));
159 /* called from IRQ */
160 static void skl_stream_update(struct hdac_bus
*bus
, struct hdac_stream
*hstr
)
162 snd_pcm_period_elapsed(hstr
->substream
);
165 static irqreturn_t
skl_interrupt(int irq
, void *dev_id
)
167 struct hdac_ext_bus
*ebus
= dev_id
;
168 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
171 if (!pm_runtime_active(bus
->dev
))
174 spin_lock(&bus
->reg_lock
);
176 status
= snd_hdac_chip_readl(bus
, INTSTS
);
177 if (status
== 0 || status
== 0xffffffff) {
178 spin_unlock(&bus
->reg_lock
);
183 status
= snd_hdac_chip_readb(bus
, RIRBSTS
);
184 if (status
& RIRB_INT_MASK
) {
185 if (status
& RIRB_INT_RESPONSE
)
186 snd_hdac_bus_update_rirb(bus
);
187 snd_hdac_chip_writeb(bus
, RIRBSTS
, RIRB_INT_MASK
);
190 spin_unlock(&bus
->reg_lock
);
192 return snd_hdac_chip_readl(bus
, INTSTS
) ? IRQ_WAKE_THREAD
: IRQ_HANDLED
;
195 static irqreturn_t
skl_threaded_handler(int irq
, void *dev_id
)
197 struct hdac_ext_bus
*ebus
= dev_id
;
198 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
201 status
= snd_hdac_chip_readl(bus
, INTSTS
);
203 snd_hdac_bus_handle_stream_irq(bus
, status
, skl_stream_update
);
208 static int skl_acquire_irq(struct hdac_ext_bus
*ebus
, int do_disconnect
)
210 struct skl
*skl
= ebus_to_skl(ebus
);
211 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
214 ret
= request_threaded_irq(skl
->pci
->irq
, skl_interrupt
,
215 skl_threaded_handler
,
217 KBUILD_MODNAME
, ebus
);
220 "unable to grab IRQ %d, disabling device\n",
225 bus
->irq
= skl
->pci
->irq
;
226 pci_intx(skl
->pci
, 1);
231 static int skl_suspend_late(struct device
*dev
)
233 struct pci_dev
*pci
= to_pci_dev(dev
);
234 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
235 struct skl
*skl
= ebus_to_skl(ebus
);
237 return skl_suspend_late_dsp(skl
);
241 static int _skl_suspend(struct hdac_ext_bus
*ebus
)
243 struct skl
*skl
= ebus_to_skl(ebus
);
244 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
245 struct pci_dev
*pci
= to_pci_dev(bus
->dev
);
248 snd_hdac_ext_bus_link_power_down_all(ebus
);
250 ret
= skl_suspend_dsp(skl
);
254 snd_hdac_bus_stop_chip(bus
);
255 update_pci_dword(pci
, AZX_PCIREG_PGCTL
,
256 AZX_PGCTL_LSRMD_MASK
, AZX_PGCTL_LSRMD_MASK
);
257 skl_enable_miscbdcge(bus
->dev
, false);
258 snd_hdac_bus_enter_link_reset(bus
);
259 skl_enable_miscbdcge(bus
->dev
, true);
260 skl_cleanup_resources(skl
);
265 static int _skl_resume(struct hdac_ext_bus
*ebus
)
267 struct skl
*skl
= ebus_to_skl(ebus
);
268 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
271 skl_init_chip(bus
, true);
273 return skl_resume_dsp(skl
);
277 #ifdef CONFIG_PM_SLEEP
281 static int skl_suspend(struct device
*dev
)
283 struct pci_dev
*pci
= to_pci_dev(dev
);
284 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
285 struct skl
*skl
= ebus_to_skl(ebus
);
286 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
290 * Do not suspend if streams which are marked ignore suspend are
291 * running, we need to save the state for these and continue
293 if (skl
->supend_active
) {
294 /* turn off the links and stop the CORB/RIRB DMA if it is On */
295 snd_hdac_ext_bus_link_power_down_all(ebus
);
297 if (ebus
->cmd_dma_state
)
298 snd_hdac_bus_stop_cmd_io(&ebus
->bus
);
300 enable_irq_wake(bus
->irq
);
303 ret
= _skl_suspend(ebus
);
306 skl
->skl_sst
->fw_loaded
= false;
309 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
)) {
310 ret
= snd_hdac_display_power(bus
, false);
313 "Cannot turn OFF display power on i915\n");
319 static int skl_resume(struct device
*dev
)
321 struct pci_dev
*pci
= to_pci_dev(dev
);
322 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
323 struct skl
*skl
= ebus_to_skl(ebus
);
324 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
325 struct hdac_ext_link
*hlink
= NULL
;
328 /* Turned OFF in HDMI codec driver after codec reconfiguration */
329 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
)) {
330 ret
= snd_hdac_display_power(bus
, true);
333 "Cannot turn on display power on i915\n");
339 * resume only when we are not in suspend active, otherwise need to
342 if (skl
->supend_active
) {
343 pci_restore_state(pci
);
344 snd_hdac_ext_bus_link_power_up_all(ebus
);
345 disable_irq_wake(bus
->irq
);
347 * turn On the links which are On before active suspend
348 * and start the CORB/RIRB DMA if On before
351 list_for_each_entry(hlink
, &ebus
->hlink_list
, list
) {
352 if (hlink
->ref_count
)
353 snd_hdac_ext_bus_link_power_up(hlink
);
356 if (ebus
->cmd_dma_state
)
357 snd_hdac_bus_init_cmd_io(&ebus
->bus
);
359 ret
= _skl_resume(ebus
);
361 /* turn off the links which are off before suspend */
362 list_for_each_entry(hlink
, &ebus
->hlink_list
, list
) {
363 if (!hlink
->ref_count
)
364 snd_hdac_ext_bus_link_power_down(hlink
);
367 if (!ebus
->cmd_dma_state
)
368 snd_hdac_bus_stop_cmd_io(&ebus
->bus
);
373 #endif /* CONFIG_PM_SLEEP */
376 static int skl_runtime_suspend(struct device
*dev
)
378 struct pci_dev
*pci
= to_pci_dev(dev
);
379 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
380 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
382 dev_dbg(bus
->dev
, "in %s\n", __func__
);
384 return _skl_suspend(ebus
);
387 static int skl_runtime_resume(struct device
*dev
)
389 struct pci_dev
*pci
= to_pci_dev(dev
);
390 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
391 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
393 dev_dbg(bus
->dev
, "in %s\n", __func__
);
395 return _skl_resume(ebus
);
397 #endif /* CONFIG_PM */
399 static const struct dev_pm_ops skl_pm
= {
400 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend
, skl_resume
)
401 SET_RUNTIME_PM_OPS(skl_runtime_suspend
, skl_runtime_resume
, NULL
)
402 .suspend_late
= skl_suspend_late
,
408 static int skl_free(struct hdac_ext_bus
*ebus
)
410 struct skl
*skl
= ebus_to_skl(ebus
);
411 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
413 skl
->init_done
= 0; /* to be sure */
415 snd_hdac_ext_stop_streams(ebus
);
418 free_irq(bus
->irq
, (void *)bus
);
419 snd_hdac_bus_free_stream_pages(bus
);
420 snd_hdac_stream_free_all(ebus
);
421 snd_hdac_link_free_all(ebus
);
424 iounmap(bus
->remap_addr
);
426 pci_release_regions(skl
->pci
);
427 pci_disable_device(skl
->pci
);
429 snd_hdac_ext_bus_exit(ebus
);
431 cancel_work_sync(&skl
->probe_work
);
432 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
))
433 snd_hdac_i915_exit(&ebus
->bus
);
438 static int skl_machine_device_register(struct skl
*skl
, void *driver_data
)
440 struct hdac_bus
*bus
= ebus_to_hbus(&skl
->ebus
);
441 struct platform_device
*pdev
;
442 struct sst_acpi_mach
*mach
= driver_data
;
445 mach
= sst_acpi_find_machine(mach
);
447 dev_err(bus
->dev
, "No matching machine driver found\n");
450 skl
->fw_name
= mach
->fw_filename
;
452 pdev
= platform_device_alloc(mach
->drv_name
, -1);
454 dev_err(bus
->dev
, "platform device alloc failed\n");
458 ret
= platform_device_add(pdev
);
460 dev_err(bus
->dev
, "failed to add machine device\n");
461 platform_device_put(pdev
);
466 dev_set_drvdata(&pdev
->dev
, mach
->pdata
);
473 static void skl_machine_device_unregister(struct skl
*skl
)
476 platform_device_unregister(skl
->i2s_dev
);
479 static int skl_dmic_device_register(struct skl
*skl
)
481 struct hdac_bus
*bus
= ebus_to_hbus(&skl
->ebus
);
482 struct platform_device
*pdev
;
485 /* SKL has one dmic port, so allocate dmic device for this */
486 pdev
= platform_device_alloc("dmic-codec", -1);
488 dev_err(bus
->dev
, "failed to allocate dmic device\n");
492 ret
= platform_device_add(pdev
);
494 dev_err(bus
->dev
, "failed to add dmic device: %d\n", ret
);
495 platform_device_put(pdev
);
498 skl
->dmic_dev
= pdev
;
503 static void skl_dmic_device_unregister(struct skl
*skl
)
506 platform_device_unregister(skl
->dmic_dev
);
510 * Probe the given codec address
512 static int probe_codec(struct hdac_ext_bus
*ebus
, int addr
)
514 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
515 unsigned int cmd
= (addr
<< 28) | (AC_NODE_ROOT
<< 20) |
516 (AC_VERB_PARAMETERS
<< 8) | AC_PAR_VENDOR_ID
;
517 unsigned int res
= -1;
519 mutex_lock(&bus
->cmd_mutex
);
520 snd_hdac_bus_send_cmd(bus
, cmd
);
521 snd_hdac_bus_get_response(bus
, addr
, &res
);
522 mutex_unlock(&bus
->cmd_mutex
);
525 dev_dbg(bus
->dev
, "codec #%d probed OK\n", addr
);
527 return snd_hdac_ext_bus_device_init(ebus
, addr
);
530 /* Codec initialization */
531 static int skl_codec_create(struct hdac_ext_bus
*ebus
)
533 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
536 max_slots
= HDA_MAX_CODECS
;
538 /* First try to probe all given codec slots */
539 for (c
= 0; c
< max_slots
; c
++) {
540 if ((bus
->codec_mask
& (1 << c
))) {
541 if (probe_codec(ebus
, c
) < 0) {
543 * Some BIOSen give you wrong codec addresses
547 "Codec #%d probe error; disabling it...\n", c
);
548 bus
->codec_mask
&= ~(1 << c
);
550 * More badly, accessing to a non-existing
551 * codec often screws up the controller bus,
552 * and disturbs the further communications.
553 * Thus if an error occurs during probing,
554 * better to reset the controller bus to get
555 * back to the sanity state.
557 snd_hdac_bus_stop_chip(bus
);
558 skl_init_chip(bus
, true);
566 static const struct hdac_bus_ops bus_core_ops
= {
567 .command
= snd_hdac_bus_send_cmd
,
568 .get_response
= snd_hdac_bus_get_response
,
571 static int skl_i915_init(struct hdac_bus
*bus
)
576 * The HDMI codec is in GPU so we need to ensure that it is powered
577 * up and ready for probe
579 err
= snd_hdac_i915_init(bus
);
583 err
= snd_hdac_display_power(bus
, true);
585 dev_err(bus
->dev
, "Cannot turn on display power on i915\n");
590 static void skl_probe_work(struct work_struct
*work
)
592 struct skl
*skl
= container_of(work
, struct skl
, probe_work
);
593 struct hdac_ext_bus
*ebus
= &skl
->ebus
;
594 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
595 struct hdac_ext_link
*hlink
= NULL
;
598 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
)) {
599 err
= skl_i915_init(bus
);
604 err
= skl_init_chip(bus
, true);
606 dev_err(bus
->dev
, "Init chip failed with err: %d\n", err
);
610 /* codec detection */
611 if (!bus
->codec_mask
)
612 dev_info(bus
->dev
, "no hda codecs found!\n");
614 /* create codec instances */
615 err
= skl_codec_create(ebus
);
619 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
)) {
620 err
= snd_hdac_display_power(bus
, false);
622 dev_err(bus
->dev
, "Cannot turn off display power on i915\n");
627 /* register platform dai and controls */
628 err
= skl_platform_register(bus
->dev
);
632 * we are done probing so decrement link counts
634 list_for_each_entry(hlink
, &ebus
->hlink_list
, list
)
635 snd_hdac_ext_bus_link_put(ebus
, hlink
);
638 pm_runtime_put_noidle(bus
->dev
);
639 pm_runtime_allow(bus
->dev
);
645 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI
))
646 err
= snd_hdac_display_power(bus
, false);
652 static int skl_create(struct pci_dev
*pci
,
653 const struct hdac_io_ops
*io_ops
,
657 struct hdac_ext_bus
*ebus
;
663 err
= pci_enable_device(pci
);
667 skl
= devm_kzalloc(&pci
->dev
, sizeof(*skl
), GFP_KERNEL
);
669 pci_disable_device(pci
);
673 snd_hdac_ext_bus_init(ebus
, &pci
->dev
, &bus_core_ops
, io_ops
);
674 ebus
->bus
.use_posbuf
= 1;
676 INIT_WORK(&skl
->probe_work
, skl_probe_work
);
678 ebus
->bus
.bdl_pos_adj
= 0;
685 static int skl_first_init(struct hdac_ext_bus
*ebus
)
687 struct skl
*skl
= ebus_to_skl(ebus
);
688 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
689 struct pci_dev
*pci
= skl
->pci
;
692 int cp_streams
, pb_streams
, start_idx
;
694 err
= pci_request_regions(pci
, "Skylake HD audio");
698 bus
->addr
= pci_resource_start(pci
, 0);
699 bus
->remap_addr
= pci_ioremap_bar(pci
, 0);
700 if (bus
->remap_addr
== NULL
) {
701 dev_err(bus
->dev
, "ioremap error\n");
705 snd_hdac_bus_parse_capabilities(bus
);
707 if (skl_acquire_irq(ebus
, 0) < 0)
711 synchronize_irq(bus
->irq
);
713 gcap
= snd_hdac_chip_readw(bus
, GCAP
);
714 dev_dbg(bus
->dev
, "chipset global capabilities = 0x%x\n", gcap
);
716 /* allow 64bit DMA address if supported by H/W */
717 if (!dma_set_mask(bus
->dev
, DMA_BIT_MASK(64))) {
718 dma_set_coherent_mask(bus
->dev
, DMA_BIT_MASK(64));
720 dma_set_mask(bus
->dev
, DMA_BIT_MASK(32));
721 dma_set_coherent_mask(bus
->dev
, DMA_BIT_MASK(32));
724 /* read number of streams from GCAP register */
725 cp_streams
= (gcap
>> 8) & 0x0f;
726 pb_streams
= (gcap
>> 12) & 0x0f;
728 if (!pb_streams
&& !cp_streams
)
731 ebus
->num_streams
= cp_streams
+ pb_streams
;
733 /* initialize streams */
734 snd_hdac_ext_stream_init_all
735 (ebus
, 0, cp_streams
, SNDRV_PCM_STREAM_CAPTURE
);
736 start_idx
= cp_streams
;
737 snd_hdac_ext_stream_init_all
738 (ebus
, start_idx
, pb_streams
, SNDRV_PCM_STREAM_PLAYBACK
);
740 err
= snd_hdac_bus_alloc_stream_pages(bus
);
744 /* initialize chip */
747 return skl_init_chip(bus
, true);
750 static int skl_probe(struct pci_dev
*pci
,
751 const struct pci_device_id
*pci_id
)
754 struct hdac_ext_bus
*ebus
= NULL
;
755 struct hdac_bus
*bus
= NULL
;
758 /* we use ext core ops, so provide NULL for ops here */
759 err
= skl_create(pci
, NULL
, &skl
);
764 bus
= ebus_to_hbus(ebus
);
766 err
= skl_first_init(ebus
);
770 skl
->pci_id
= pci
->device
;
772 device_disable_async_suspend(bus
->dev
);
774 skl
->nhlt
= skl_nhlt_init(bus
->dev
);
776 if (skl
->nhlt
== NULL
) {
781 err
= skl_nhlt_create_sysfs(skl
);
785 skl_nhlt_update_topology_bin(skl
);
787 pci_set_drvdata(skl
->pci
, ebus
);
789 skl_dmic_data
.dmic_num
= skl_get_dmic_geo(skl
);
791 /* check if dsp is there */
793 err
= skl_machine_device_register(skl
,
794 (void *)pci_id
->driver_data
);
798 err
= skl_init_dsp(skl
);
800 dev_dbg(bus
->dev
, "error failed to register dsp\n");
803 skl
->skl_sst
->enable_miscbdcge
= skl_enable_miscbdcge
;
807 snd_hdac_ext_bus_get_ml_capabilities(ebus
);
809 snd_hdac_bus_stop_chip(bus
);
811 /* create device for soc dmic */
812 err
= skl_dmic_device_register(skl
);
816 schedule_work(&skl
->probe_work
);
823 skl_machine_device_unregister(skl
);
825 skl_nhlt_free(skl
->nhlt
);
832 static void skl_shutdown(struct pci_dev
*pci
)
834 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
835 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
836 struct hdac_stream
*s
;
837 struct hdac_ext_stream
*stream
;
843 skl
= ebus_to_skl(ebus
);
848 snd_hdac_ext_stop_streams(ebus
);
849 list_for_each_entry(s
, &bus
->stream_list
, list
) {
850 stream
= stream_to_hdac_ext_stream(s
);
851 snd_hdac_ext_stream_decouple(ebus
, stream
, false);
854 snd_hdac_bus_stop_chip(bus
);
857 static void skl_remove(struct pci_dev
*pci
)
859 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
860 struct skl
*skl
= ebus_to_skl(ebus
);
862 release_firmware(skl
->tplg
);
864 pm_runtime_get_noresume(&pci
->dev
);
866 /* codec removal, invoke bus_device_remove */
867 snd_hdac_ext_bus_device_remove(ebus
);
870 skl_platform_unregister(&pci
->dev
);
872 skl_machine_device_unregister(skl
);
873 skl_dmic_device_unregister(skl
);
874 skl_nhlt_remove_sysfs(skl
);
875 skl_nhlt_free(skl
->nhlt
);
877 dev_set_drvdata(&pci
->dev
, NULL
);
880 static struct sst_codecs skl_codecs
= {
882 .codecs
= {"NAU88L25"}
885 static struct sst_codecs kbl_codecs
= {
887 .codecs
= {"NAU88L25"}
890 static struct sst_codecs bxt_codecs
= {
892 .codecs
= {"MX98357A"}
895 static struct sst_codecs kbl_poppy_codecs
= {
897 .codecs
= {"10EC5663"}
900 static struct sst_codecs kbl_5663_5514_codecs
= {
902 .codecs
= {"10EC5663", "10EC5514"}
906 static struct sst_acpi_mach sst_skl_devdata
[] = {
909 .drv_name
= "skl_alc286s_i2s",
910 .fw_filename
= "intel/dsp_fw_release.bin",
914 .drv_name
= "skl_n88l25_s4567",
915 .fw_filename
= "intel/dsp_fw_release.bin",
916 .machine_quirk
= sst_acpi_codec_list
,
917 .quirk_data
= &skl_codecs
,
918 .pdata
= &skl_dmic_data
922 .drv_name
= "skl_n88l25_m98357a",
923 .fw_filename
= "intel/dsp_fw_release.bin",
924 .machine_quirk
= sst_acpi_codec_list
,
925 .quirk_data
= &skl_codecs
,
926 .pdata
= &skl_dmic_data
931 static struct sst_acpi_mach sst_bxtp_devdata
[] = {
934 .drv_name
= "bxt_alc298s_i2s",
935 .fw_filename
= "intel/dsp_fw_bxtn.bin",
939 .drv_name
= "bxt_da7219_max98357a_i2s",
940 .fw_filename
= "intel/dsp_fw_bxtn.bin",
941 .machine_quirk
= sst_acpi_codec_list
,
942 .quirk_data
= &bxt_codecs
,
947 static struct sst_acpi_mach sst_kbl_devdata
[] = {
950 .drv_name
= "kbl_alc286s_i2s",
951 .fw_filename
= "intel/dsp_fw_kbl.bin",
955 .drv_name
= "kbl_n88l25_s4567",
956 .fw_filename
= "intel/dsp_fw_kbl.bin",
957 .machine_quirk
= sst_acpi_codec_list
,
958 .quirk_data
= &kbl_codecs
,
959 .pdata
= &skl_dmic_data
963 .drv_name
= "kbl_n88l25_m98357a",
964 .fw_filename
= "intel/dsp_fw_kbl.bin",
965 .machine_quirk
= sst_acpi_codec_list
,
966 .quirk_data
= &kbl_codecs
,
967 .pdata
= &skl_dmic_data
971 .drv_name
= "kbl_r5514_5663_max",
972 .fw_filename
= "intel/dsp_fw_kbl.bin",
973 .machine_quirk
= sst_acpi_codec_list
,
974 .quirk_data
= &kbl_5663_5514_codecs
,
975 .pdata
= &skl_dmic_data
979 .drv_name
= "kbl_rt5663_m98927",
980 .fw_filename
= "intel/dsp_fw_kbl.bin",
981 .machine_quirk
= sst_acpi_codec_list
,
982 .quirk_data
= &kbl_poppy_codecs
,
983 .pdata
= &skl_dmic_data
989 static struct sst_acpi_mach sst_glk_devdata
[] = {
992 .drv_name
= "glk_alc298s_i2s",
993 .fw_filename
= "intel/dsp_fw_glk.bin",
999 static const struct pci_device_id skl_ids
[] = {
1000 /* Sunrise Point-LP */
1001 { PCI_DEVICE(0x8086, 0x9d70),
1002 .driver_data
= (unsigned long)&sst_skl_devdata
},
1004 { PCI_DEVICE(0x8086, 0x5a98),
1005 .driver_data
= (unsigned long)&sst_bxtp_devdata
},
1007 { PCI_DEVICE(0x8086, 0x9D71),
1008 .driver_data
= (unsigned long)&sst_kbl_devdata
},
1010 { PCI_DEVICE(0x8086, 0x3198),
1011 .driver_data
= (unsigned long)&sst_glk_devdata
},
1014 MODULE_DEVICE_TABLE(pci
, skl_ids
);
1016 /* pci_driver definition */
1017 static struct pci_driver skl_driver
= {
1018 .name
= KBUILD_MODNAME
,
1019 .id_table
= skl_ids
,
1021 .remove
= skl_remove
,
1022 .shutdown
= skl_shutdown
,
1027 module_pci_driver(skl_driver
);
1029 MODULE_LICENSE("GPL v2");
1030 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");