2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/interrupt.h>
17 #include <linux/wait.h>
18 #include <linux/clk.h>
19 #include <linux/delay.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/ac97_codec.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
28 #include <linux/mutex.h>
29 #include <asm/hardware.h>
30 #include <asm/arch/pxa-regs.h>
31 #include <asm/arch/pxa2xx-gpio.h>
32 #include <asm/arch/audio.h>
34 #include "pxa2xx-pcm.h"
35 #include "pxa2xx-ac97.h"
37 static DEFINE_MUTEX(car_mutex
);
38 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq
);
39 static volatile long gsr_bits
;
40 static struct clk
*ac97_clk
;
42 static struct clk
*ac97conf_clk
;
48 * o Slot 12 read from modem space will hang controller.
49 * o CDONE, SDONE interrupt fails after any slot 12 IO.
51 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
52 * 1 jiffy timeout if interrupt never comes).
55 static unsigned short pxa2xx_ac97_read(struct snd_ac97
*ac97
,
58 unsigned short val
= -1;
59 volatile u32
*reg_addr
;
61 mutex_lock(&car_mutex
);
63 /* set up primary or secondary codec/modem space */
65 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
67 if (reg
== AC97_GPIO_STATUS
)
68 reg_addr
= ac97
->num
? &SMC_REG_BASE
: &PMC_REG_BASE
;
70 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
72 reg_addr
+= (reg
>> 1);
75 if (reg
== AC97_GPIO_STATUS
) {
76 /* read from controller cache */
82 /* start read access across the ac97 link */
83 GSR
= GSR_CDONE
| GSR_SDONE
;
87 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1);
88 if (!((GSR
| gsr_bits
) & GSR_SDONE
)) {
89 printk(KERN_ERR
"%s: read error (ac97_reg=%x GSR=%#lx)\n",
90 __FUNCTION__
, reg
, GSR
| gsr_bits
);
96 GSR
= GSR_CDONE
| GSR_SDONE
;
99 /* but we've just started another cycle... */
100 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1);
102 out
: mutex_unlock(&car_mutex
);
106 static void pxa2xx_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
109 volatile u32
*reg_addr
;
111 mutex_lock(&car_mutex
);
113 /* set up primary or secondary codec/modem space */
115 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
117 if (reg
== AC97_GPIO_STATUS
)
118 reg_addr
= ac97
->num
? &SMC_REG_BASE
: &PMC_REG_BASE
;
120 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
122 reg_addr
+= (reg
>> 1);
124 GSR
= GSR_CDONE
| GSR_SDONE
;
127 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_CDONE
, 1);
128 if (!((GSR
| gsr_bits
) & GSR_CDONE
))
129 printk(KERN_ERR
"%s: write error (ac97_reg=%x GSR=%#lx)\n",
130 __FUNCTION__
, reg
, GSR
| gsr_bits
);
132 mutex_unlock(&car_mutex
);
135 static void pxa2xx_ac97_warm_reset(struct snd_ac97
*ac97
)
140 /* warm reset broken on Bulverde,
141 so manually keep AC97 reset high */
142 pxa_gpio_mode(113 | GPIO_OUT
| GPIO_DFLT_HIGH
);
145 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
148 GCR
|= GCR_WARM_RST
| GCR_PRIRDY_IEN
| GCR_SECRDY_IEN
;
149 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
152 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)))
153 printk(KERN_INFO
"%s: warm reset timeout (GSR=%#lx)\n",
154 __FUNCTION__
, gsr_bits
);
156 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
157 GCR
|= GCR_SDONE_IE
|GCR_CDONE_IE
;
160 static void pxa2xx_ac97_cold_reset(struct snd_ac97
*ac97
)
162 GCR
&= GCR_COLD_RST
; /* clear everything but nCRST */
163 GCR
&= ~GCR_COLD_RST
; /* then assert nCRST */
167 /* PXA27x Developers Manual section 13.5.2.2.1 */
168 clk_enable(ac97conf_clk
);
170 clk_disable(ac97conf_clk
);
175 GCR
|= GCR_CDONE_IE
|GCR_SDONE_IE
;
176 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
179 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)))
180 printk(KERN_INFO
"%s: cold reset timeout (GSR=%#lx)\n",
181 __FUNCTION__
, gsr_bits
);
183 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
184 GCR
|= GCR_SDONE_IE
|GCR_CDONE_IE
;
187 static irqreturn_t
pxa2xx_ac97_irq(int irq
, void *dev_id
)
198 /* Although we don't use those we still need to clear them
199 since they tend to spuriously trigger when MMC is used
200 (hardware bug? go figure)... */
212 struct snd_ac97_bus_ops soc_ac97_ops
= {
213 .read
= pxa2xx_ac97_read
,
214 .write
= pxa2xx_ac97_write
,
215 .warm_reset
= pxa2xx_ac97_warm_reset
,
216 .reset
= pxa2xx_ac97_cold_reset
,
219 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_stereo_out
= {
220 .name
= "AC97 PCM Stereo out",
221 .dev_addr
= __PREG(PCDR
),
222 .drcmr
= &DRCMRTXPCDR
,
223 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
224 DCMD_BURST32
| DCMD_WIDTH4
,
227 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_stereo_in
= {
228 .name
= "AC97 PCM Stereo in",
229 .dev_addr
= __PREG(PCDR
),
230 .drcmr
= &DRCMRRXPCDR
,
231 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
232 DCMD_BURST32
| DCMD_WIDTH4
,
235 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_aux_mono_out
= {
236 .name
= "AC97 Aux PCM (Slot 5) Mono out",
237 .dev_addr
= __PREG(MODR
),
238 .drcmr
= &DRCMRTXMODR
,
239 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
240 DCMD_BURST16
| DCMD_WIDTH2
,
243 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_aux_mono_in
= {
244 .name
= "AC97 Aux PCM (Slot 5) Mono in",
245 .dev_addr
= __PREG(MODR
),
246 .drcmr
= &DRCMRRXMODR
,
247 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
248 DCMD_BURST16
| DCMD_WIDTH2
,
251 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_mic_mono_in
= {
252 .name
= "AC97 Mic PCM (Slot 6) Mono in",
253 .dev_addr
= __PREG(MCDR
),
254 .drcmr
= &DRCMRRXMCDR
,
255 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
256 DCMD_BURST16
| DCMD_WIDTH2
,
260 static int pxa2xx_ac97_suspend(struct platform_device
*pdev
,
261 struct snd_soc_cpu_dai
*dai
)
263 GCR
|= GCR_ACLINK_OFF
;
264 clk_disable(ac97_clk
);
268 static int pxa2xx_ac97_resume(struct platform_device
*pdev
,
269 struct snd_soc_cpu_dai
*dai
)
271 pxa_gpio_mode(GPIO31_SYNC_AC97_MD
);
272 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD
);
273 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD
);
274 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD
);
276 /* Use GPIO 113 as AC97 Reset on Bulverde */
277 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
279 clk_enable(ac97_clk
);
284 #define pxa2xx_ac97_suspend NULL
285 #define pxa2xx_ac97_resume NULL
288 static int pxa2xx_ac97_probe(struct platform_device
*pdev
)
292 ret
= request_irq(IRQ_AC97
, pxa2xx_ac97_irq
, IRQF_DISABLED
, "AC97", NULL
);
296 pxa_gpio_mode(GPIO31_SYNC_AC97_MD
);
297 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD
);
298 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD
);
299 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD
);
301 /* Use GPIO 113 as AC97 Reset on Bulverde */
302 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
304 ac97conf_clk
= clk_get(&pdev
->dev
, "AC97CONFCLK");
305 if (IS_ERR(ac97conf_clk
)) {
306 ret
= PTR_ERR(ac97conf_clk
);
311 ac97_clk
= clk_get(&pdev
->dev
, "AC97CLK");
312 if (IS_ERR(ac97_clk
)) {
313 ret
= PTR_ERR(ac97_clk
);
317 clk_enable(ac97_clk
);
321 GCR
|= GCR_ACLINK_OFF
;
324 clk_put(ac97conf_clk
);
328 free_irq(IRQ_AC97
, NULL
);
333 static void pxa2xx_ac97_remove(struct platform_device
*pdev
)
335 GCR
|= GCR_ACLINK_OFF
;
336 free_irq(IRQ_AC97
, NULL
);
338 clk_put(ac97conf_clk
);
341 clk_disable(ac97_clk
);
346 static int pxa2xx_ac97_hw_params(struct snd_pcm_substream
*substream
,
347 struct snd_pcm_hw_params
*params
)
349 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
350 struct snd_soc_cpu_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
352 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
353 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_stereo_out
;
355 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_stereo_in
;
360 static int pxa2xx_ac97_hw_aux_params(struct snd_pcm_substream
*substream
,
361 struct snd_pcm_hw_params
*params
)
363 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
364 struct snd_soc_cpu_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
366 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
367 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_aux_mono_out
;
369 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_aux_mono_in
;
374 static int pxa2xx_ac97_hw_mic_params(struct snd_pcm_substream
*substream
,
375 struct snd_pcm_hw_params
*params
)
377 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
378 struct snd_soc_cpu_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
380 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
383 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_mic_mono_in
;
388 #define PXA2XX_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
389 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
390 SNDRV_PCM_RATE_48000)
393 * There is only 1 physical AC97 interface for pxa2xx, but it
394 * has extra fifo's that can be used for aux DACs and ADCs.
396 struct snd_soc_cpu_dai pxa_ac97_dai
[] = {
398 .name
= "pxa2xx-ac97",
400 .type
= SND_SOC_DAI_AC97
,
401 .probe
= pxa2xx_ac97_probe
,
402 .remove
= pxa2xx_ac97_remove
,
403 .suspend
= pxa2xx_ac97_suspend
,
404 .resume
= pxa2xx_ac97_resume
,
406 .stream_name
= "AC97 Playback",
409 .rates
= PXA2XX_AC97_RATES
,
410 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
412 .stream_name
= "AC97 Capture",
415 .rates
= PXA2XX_AC97_RATES
,
416 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
418 .hw_params
= pxa2xx_ac97_hw_params
,},
421 .name
= "pxa2xx-ac97-aux",
423 .type
= SND_SOC_DAI_AC97
,
425 .stream_name
= "AC97 Aux Playback",
428 .rates
= PXA2XX_AC97_RATES
,
429 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
431 .stream_name
= "AC97 Aux Capture",
434 .rates
= PXA2XX_AC97_RATES
,
435 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
437 .hw_params
= pxa2xx_ac97_hw_aux_params
,},
440 .name
= "pxa2xx-ac97-mic",
442 .type
= SND_SOC_DAI_AC97
,
444 .stream_name
= "AC97 Mic Capture",
447 .rates
= PXA2XX_AC97_RATES
,
448 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
450 .hw_params
= pxa2xx_ac97_hw_mic_params
,},
454 EXPORT_SYMBOL_GPL(pxa_ac97_dai
);
455 EXPORT_SYMBOL_GPL(soc_ac97_ops
);
457 MODULE_AUTHOR("Nicolas Pitre");
458 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
459 MODULE_LICENSE("GPL");