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Merge branch 'fix/sun8i' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[mirror_ubuntu-bionic-kernel.git] / sound / soc / samsung / i2s.c
1 /* sound/soc/samsung/i2s.c
2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27
28 #include <linux/platform_data/asoc-s3c.h>
29
30 #include "dma.h"
31 #include "idma.h"
32 #include "i2s.h"
33 #include "i2s-regs.h"
34
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37 struct samsung_i2s_variant_regs {
38 unsigned int bfs_off;
39 unsigned int rfs_off;
40 unsigned int sdf_off;
41 unsigned int txr_off;
42 unsigned int rclksrc_off;
43 unsigned int mss_off;
44 unsigned int cdclkcon_off;
45 unsigned int lrp_off;
46 unsigned int bfs_mask;
47 unsigned int rfs_mask;
48 unsigned int ftx0cnt_off;
49 };
50
51 struct samsung_i2s_dai_data {
52 u32 quirks;
53 const struct samsung_i2s_variant_regs *i2s_variant_regs;
54 };
55
56 struct i2s_dai {
57 /* Platform device for this DAI */
58 struct platform_device *pdev;
59 /* Memory mapped SFR region */
60 void __iomem *addr;
61 /* Rate of RCLK source clock */
62 unsigned long rclk_srcrate;
63 /* Frame Clock */
64 unsigned frmclk;
65 /*
66 * Specifically requested RCLK,BCLK by MACHINE Driver.
67 * 0 indicates CPU driver is free to choose any value.
68 */
69 unsigned rfs, bfs;
70 /* I2S Controller's core clock */
71 struct clk *clk;
72 /* Clock for generating I2S signals */
73 struct clk *op_clk;
74 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
75 struct i2s_dai *pri_dai;
76 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
77 struct i2s_dai *sec_dai;
78 #define DAI_OPENED (1 << 0) /* Dai is opened */
79 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
80 unsigned mode;
81 /* Driver for this DAI */
82 struct snd_soc_dai_driver i2s_dai_drv;
83 /* DMA parameters */
84 struct snd_dmaengine_dai_dma_data dma_playback;
85 struct snd_dmaengine_dai_dma_data dma_capture;
86 struct snd_dmaengine_dai_dma_data idma_playback;
87 dma_filter_fn filter;
88 u32 quirks;
89 u32 suspend_i2smod;
90 u32 suspend_i2scon;
91 u32 suspend_i2spsr;
92 const struct samsung_i2s_variant_regs *variant_regs;
93
94 /* Spinlock protecting access to the device's registers */
95 spinlock_t spinlock;
96 spinlock_t *lock;
97
98 /* Below fields are only valid if this is the primary FIFO */
99 struct clk *clk_table[3];
100 struct clk_onecell_data clk_data;
101 };
102
103 /* Lock for cross i/f checks */
104 static DEFINE_SPINLOCK(lock);
105
106 /* If this is the 'overlay' stereo DAI */
107 static inline bool is_secondary(struct i2s_dai *i2s)
108 {
109 return i2s->pri_dai ? true : false;
110 }
111
112 /* If operating in SoC-Slave mode */
113 static inline bool is_slave(struct i2s_dai *i2s)
114 {
115 u32 mod = readl(i2s->addr + I2SMOD);
116 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
117 }
118
119 /* If this interface of the controller is transmitting data */
120 static inline bool tx_active(struct i2s_dai *i2s)
121 {
122 u32 active;
123
124 if (!i2s)
125 return false;
126
127 active = readl(i2s->addr + I2SCON);
128
129 if (is_secondary(i2s))
130 active &= CON_TXSDMA_ACTIVE;
131 else
132 active &= CON_TXDMA_ACTIVE;
133
134 return active ? true : false;
135 }
136
137 /* Return pointer to the other DAI */
138 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
139 {
140 return i2s->pri_dai ? : i2s->sec_dai;
141 }
142
143 /* If the other interface of the controller is transmitting data */
144 static inline bool other_tx_active(struct i2s_dai *i2s)
145 {
146 struct i2s_dai *other = get_other_dai(i2s);
147
148 return tx_active(other);
149 }
150
151 /* If any interface of the controller is transmitting data */
152 static inline bool any_tx_active(struct i2s_dai *i2s)
153 {
154 return tx_active(i2s) || other_tx_active(i2s);
155 }
156
157 /* If this interface of the controller is receiving data */
158 static inline bool rx_active(struct i2s_dai *i2s)
159 {
160 u32 active;
161
162 if (!i2s)
163 return false;
164
165 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
166
167 return active ? true : false;
168 }
169
170 /* If the other interface of the controller is receiving data */
171 static inline bool other_rx_active(struct i2s_dai *i2s)
172 {
173 struct i2s_dai *other = get_other_dai(i2s);
174
175 return rx_active(other);
176 }
177
178 /* If any interface of the controller is receiving data */
179 static inline bool any_rx_active(struct i2s_dai *i2s)
180 {
181 return rx_active(i2s) || other_rx_active(i2s);
182 }
183
184 /* If the other DAI is transmitting or receiving data */
185 static inline bool other_active(struct i2s_dai *i2s)
186 {
187 return other_rx_active(i2s) || other_tx_active(i2s);
188 }
189
190 /* If this DAI is transmitting or receiving data */
191 static inline bool this_active(struct i2s_dai *i2s)
192 {
193 return tx_active(i2s) || rx_active(i2s);
194 }
195
196 /* If the controller is active anyway */
197 static inline bool any_active(struct i2s_dai *i2s)
198 {
199 return this_active(i2s) || other_active(i2s);
200 }
201
202 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
203 {
204 return snd_soc_dai_get_drvdata(dai);
205 }
206
207 static inline bool is_opened(struct i2s_dai *i2s)
208 {
209 if (i2s && (i2s->mode & DAI_OPENED))
210 return true;
211 else
212 return false;
213 }
214
215 static inline bool is_manager(struct i2s_dai *i2s)
216 {
217 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
218 return true;
219 else
220 return false;
221 }
222
223 /* Read RCLK of I2S (in multiples of LRCLK) */
224 static inline unsigned get_rfs(struct i2s_dai *i2s)
225 {
226 u32 rfs;
227 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
228 rfs &= i2s->variant_regs->rfs_mask;
229
230 switch (rfs) {
231 case 7: return 192;
232 case 6: return 96;
233 case 5: return 128;
234 case 4: return 64;
235 case 3: return 768;
236 case 2: return 384;
237 case 1: return 512;
238 default: return 256;
239 }
240 }
241
242 /* Write RCLK of I2S (in multiples of LRCLK) */
243 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
244 {
245 u32 mod = readl(i2s->addr + I2SMOD);
246 int rfs_shift = i2s->variant_regs->rfs_off;
247
248 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
249
250 switch (rfs) {
251 case 192:
252 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
253 break;
254 case 96:
255 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
256 break;
257 case 128:
258 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
259 break;
260 case 64:
261 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
262 break;
263 case 768:
264 mod |= (MOD_RCLK_768FS << rfs_shift);
265 break;
266 case 512:
267 mod |= (MOD_RCLK_512FS << rfs_shift);
268 break;
269 case 384:
270 mod |= (MOD_RCLK_384FS << rfs_shift);
271 break;
272 default:
273 mod |= (MOD_RCLK_256FS << rfs_shift);
274 break;
275 }
276
277 writel(mod, i2s->addr + I2SMOD);
278 }
279
280 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
281 static inline unsigned get_bfs(struct i2s_dai *i2s)
282 {
283 u32 bfs;
284 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
285 bfs &= i2s->variant_regs->bfs_mask;
286
287 switch (bfs) {
288 case 8: return 256;
289 case 7: return 192;
290 case 6: return 128;
291 case 5: return 96;
292 case 4: return 64;
293 case 3: return 24;
294 case 2: return 16;
295 case 1: return 48;
296 default: return 32;
297 }
298 }
299
300 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
301 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
302 {
303 u32 mod = readl(i2s->addr + I2SMOD);
304 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
305 int bfs_shift = i2s->variant_regs->bfs_off;
306
307 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
308 if (!tdm && bfs > 48) {
309 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
310 return;
311 }
312
313 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
314
315 switch (bfs) {
316 case 48:
317 mod |= (MOD_BCLK_48FS << bfs_shift);
318 break;
319 case 32:
320 mod |= (MOD_BCLK_32FS << bfs_shift);
321 break;
322 case 24:
323 mod |= (MOD_BCLK_24FS << bfs_shift);
324 break;
325 case 16:
326 mod |= (MOD_BCLK_16FS << bfs_shift);
327 break;
328 case 64:
329 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
330 break;
331 case 96:
332 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
333 break;
334 case 128:
335 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
336 break;
337 case 192:
338 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
339 break;
340 case 256:
341 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
342 break;
343 default:
344 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
345 return;
346 }
347
348 writel(mod, i2s->addr + I2SMOD);
349 }
350
351 /* Sample-Size */
352 static inline int get_blc(struct i2s_dai *i2s)
353 {
354 int blc = readl(i2s->addr + I2SMOD);
355
356 blc = (blc >> 13) & 0x3;
357
358 switch (blc) {
359 case 2: return 24;
360 case 1: return 8;
361 default: return 16;
362 }
363 }
364
365 /* TX Channel Control */
366 static void i2s_txctrl(struct i2s_dai *i2s, int on)
367 {
368 void __iomem *addr = i2s->addr;
369 int txr_off = i2s->variant_regs->txr_off;
370 u32 con = readl(addr + I2SCON);
371 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
372
373 if (on) {
374 con |= CON_ACTIVE;
375 con &= ~CON_TXCH_PAUSE;
376
377 if (is_secondary(i2s)) {
378 con |= CON_TXSDMA_ACTIVE;
379 con &= ~CON_TXSDMA_PAUSE;
380 } else {
381 con |= CON_TXDMA_ACTIVE;
382 con &= ~CON_TXDMA_PAUSE;
383 }
384
385 if (any_rx_active(i2s))
386 mod |= 2 << txr_off;
387 else
388 mod |= 0 << txr_off;
389 } else {
390 if (is_secondary(i2s)) {
391 con |= CON_TXSDMA_PAUSE;
392 con &= ~CON_TXSDMA_ACTIVE;
393 } else {
394 con |= CON_TXDMA_PAUSE;
395 con &= ~CON_TXDMA_ACTIVE;
396 }
397
398 if (other_tx_active(i2s)) {
399 writel(con, addr + I2SCON);
400 return;
401 }
402
403 con |= CON_TXCH_PAUSE;
404
405 if (any_rx_active(i2s))
406 mod |= 1 << txr_off;
407 else
408 con &= ~CON_ACTIVE;
409 }
410
411 writel(mod, addr + I2SMOD);
412 writel(con, addr + I2SCON);
413 }
414
415 /* RX Channel Control */
416 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
417 {
418 void __iomem *addr = i2s->addr;
419 int txr_off = i2s->variant_regs->txr_off;
420 u32 con = readl(addr + I2SCON);
421 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
422
423 if (on) {
424 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
425 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
426
427 if (any_tx_active(i2s))
428 mod |= 2 << txr_off;
429 else
430 mod |= 1 << txr_off;
431 } else {
432 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
433 con &= ~CON_RXDMA_ACTIVE;
434
435 if (any_tx_active(i2s))
436 mod |= 0 << txr_off;
437 else
438 con &= ~CON_ACTIVE;
439 }
440
441 writel(mod, addr + I2SMOD);
442 writel(con, addr + I2SCON);
443 }
444
445 /* Flush FIFO of an interface */
446 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
447 {
448 void __iomem *fic;
449 u32 val;
450
451 if (!i2s)
452 return;
453
454 if (is_secondary(i2s))
455 fic = i2s->addr + I2SFICS;
456 else
457 fic = i2s->addr + I2SFIC;
458
459 /* Flush the FIFO */
460 writel(readl(fic) | flush, fic);
461
462 /* Be patient */
463 val = msecs_to_loops(1) / 1000; /* 1 usec */
464 while (--val)
465 cpu_relax();
466
467 writel(readl(fic) & ~flush, fic);
468 }
469
470 static int i2s_set_sysclk(struct snd_soc_dai *dai,
471 int clk_id, unsigned int rfs, int dir)
472 {
473 struct i2s_dai *i2s = to_info(dai);
474 struct i2s_dai *other = get_other_dai(i2s);
475 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
476 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
477 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
478 u32 mod, mask, val = 0;
479 unsigned long flags;
480 int ret = 0;
481
482 pm_runtime_get_sync(dai->dev);
483
484 spin_lock_irqsave(i2s->lock, flags);
485 mod = readl(i2s->addr + I2SMOD);
486 spin_unlock_irqrestore(i2s->lock, flags);
487
488 switch (clk_id) {
489 case SAMSUNG_I2S_OPCLK:
490 mask = MOD_OPCLK_MASK;
491 val = dir;
492 break;
493 case SAMSUNG_I2S_CDCLK:
494 mask = 1 << i2s_regs->cdclkcon_off;
495 /* Shouldn't matter in GATING(CLOCK_IN) mode */
496 if (dir == SND_SOC_CLOCK_IN)
497 rfs = 0;
498
499 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
500 (any_active(i2s) &&
501 (((dir == SND_SOC_CLOCK_IN)
502 && !(mod & cdcon_mask)) ||
503 ((dir == SND_SOC_CLOCK_OUT)
504 && (mod & cdcon_mask))))) {
505 dev_err(&i2s->pdev->dev,
506 "%s:%d Other DAI busy\n", __func__, __LINE__);
507 ret = -EAGAIN;
508 goto err;
509 }
510
511 if (dir == SND_SOC_CLOCK_IN)
512 val = 1 << i2s_regs->cdclkcon_off;
513
514 i2s->rfs = rfs;
515 break;
516
517 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
518 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
519 mask = 1 << i2s_regs->rclksrc_off;
520
521 if ((i2s->quirks & QUIRK_NO_MUXPSR)
522 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
523 clk_id = 0;
524 else
525 clk_id = 1;
526
527 if (!any_active(i2s)) {
528 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
529 if ((clk_id && !(mod & rsrc_mask)) ||
530 (!clk_id && (mod & rsrc_mask))) {
531 clk_disable_unprepare(i2s->op_clk);
532 clk_put(i2s->op_clk);
533 } else {
534 i2s->rclk_srcrate =
535 clk_get_rate(i2s->op_clk);
536 goto done;
537 }
538 }
539
540 if (clk_id)
541 i2s->op_clk = clk_get(&i2s->pdev->dev,
542 "i2s_opclk1");
543 else
544 i2s->op_clk = clk_get(&i2s->pdev->dev,
545 "i2s_opclk0");
546
547 if (WARN_ON(IS_ERR(i2s->op_clk))) {
548 ret = PTR_ERR(i2s->op_clk);
549 i2s->op_clk = NULL;
550 goto err;
551 }
552
553 clk_prepare_enable(i2s->op_clk);
554 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
555
556 /* Over-ride the other's */
557 if (other) {
558 other->op_clk = i2s->op_clk;
559 other->rclk_srcrate = i2s->rclk_srcrate;
560 }
561 } else if ((!clk_id && (mod & rsrc_mask))
562 || (clk_id && !(mod & rsrc_mask))) {
563 dev_err(&i2s->pdev->dev,
564 "%s:%d Other DAI busy\n", __func__, __LINE__);
565 ret = -EAGAIN;
566 goto err;
567 } else {
568 /* Call can't be on the active DAI */
569 i2s->op_clk = other->op_clk;
570 i2s->rclk_srcrate = other->rclk_srcrate;
571 goto done;
572 }
573
574 if (clk_id == 1)
575 val = 1 << i2s_regs->rclksrc_off;
576 break;
577 default:
578 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
579 ret = -EINVAL;
580 goto err;
581 }
582
583 spin_lock_irqsave(i2s->lock, flags);
584 mod = readl(i2s->addr + I2SMOD);
585 mod = (mod & ~mask) | val;
586 writel(mod, i2s->addr + I2SMOD);
587 spin_unlock_irqrestore(i2s->lock, flags);
588 done:
589 pm_runtime_put(dai->dev);
590
591 return 0;
592 err:
593 pm_runtime_put(dai->dev);
594 return ret;
595 }
596
597 static int i2s_set_fmt(struct snd_soc_dai *dai,
598 unsigned int fmt)
599 {
600 struct i2s_dai *i2s = to_info(dai);
601 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
602 u32 mod, tmp = 0;
603 unsigned long flags;
604
605 lrp_shift = i2s->variant_regs->lrp_off;
606 sdf_shift = i2s->variant_regs->sdf_off;
607 mod_slave = 1 << i2s->variant_regs->mss_off;
608
609 sdf_mask = MOD_SDF_MASK << sdf_shift;
610 lrp_rlow = MOD_LR_RLOW << lrp_shift;
611
612 /* Format is priority */
613 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
614 case SND_SOC_DAIFMT_RIGHT_J:
615 tmp |= lrp_rlow;
616 tmp |= (MOD_SDF_MSB << sdf_shift);
617 break;
618 case SND_SOC_DAIFMT_LEFT_J:
619 tmp |= lrp_rlow;
620 tmp |= (MOD_SDF_LSB << sdf_shift);
621 break;
622 case SND_SOC_DAIFMT_I2S:
623 tmp |= (MOD_SDF_IIS << sdf_shift);
624 break;
625 default:
626 dev_err(&i2s->pdev->dev, "Format not supported\n");
627 return -EINVAL;
628 }
629
630 /*
631 * INV flag is relative to the FORMAT flag - if set it simply
632 * flips the polarity specified by the Standard
633 */
634 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
635 case SND_SOC_DAIFMT_NB_NF:
636 break;
637 case SND_SOC_DAIFMT_NB_IF:
638 if (tmp & lrp_rlow)
639 tmp &= ~lrp_rlow;
640 else
641 tmp |= lrp_rlow;
642 break;
643 default:
644 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
645 return -EINVAL;
646 }
647
648 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
649 case SND_SOC_DAIFMT_CBM_CFM:
650 tmp |= mod_slave;
651 break;
652 case SND_SOC_DAIFMT_CBS_CFS:
653 /* Set default source clock in Master mode */
654 if (i2s->rclk_srcrate == 0)
655 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
656 0, SND_SOC_CLOCK_IN);
657 break;
658 default:
659 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
660 return -EINVAL;
661 }
662
663 pm_runtime_get_sync(dai->dev);
664 spin_lock_irqsave(i2s->lock, flags);
665 mod = readl(i2s->addr + I2SMOD);
666 /*
667 * Don't change the I2S mode if any controller is active on this
668 * channel.
669 */
670 if (any_active(i2s) &&
671 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
672 spin_unlock_irqrestore(i2s->lock, flags);
673 pm_runtime_put(dai->dev);
674 dev_err(&i2s->pdev->dev,
675 "%s:%d Other DAI busy\n", __func__, __LINE__);
676 return -EAGAIN;
677 }
678
679 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
680 mod |= tmp;
681 writel(mod, i2s->addr + I2SMOD);
682 spin_unlock_irqrestore(i2s->lock, flags);
683 pm_runtime_put(dai->dev);
684
685 return 0;
686 }
687
688 static int i2s_hw_params(struct snd_pcm_substream *substream,
689 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
690 {
691 struct i2s_dai *i2s = to_info(dai);
692 u32 mod, mask = 0, val = 0;
693 unsigned long flags;
694
695 WARN_ON(!pm_runtime_active(dai->dev));
696
697 if (!is_secondary(i2s))
698 mask |= (MOD_DC2_EN | MOD_DC1_EN);
699
700 switch (params_channels(params)) {
701 case 6:
702 val |= MOD_DC2_EN;
703 case 4:
704 val |= MOD_DC1_EN;
705 break;
706 case 2:
707 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
708 i2s->dma_playback.addr_width = 4;
709 else
710 i2s->dma_capture.addr_width = 4;
711 break;
712 case 1:
713 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
714 i2s->dma_playback.addr_width = 2;
715 else
716 i2s->dma_capture.addr_width = 2;
717
718 break;
719 default:
720 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
721 params_channels(params));
722 return -EINVAL;
723 }
724
725 if (is_secondary(i2s))
726 mask |= MOD_BLCS_MASK;
727 else
728 mask |= MOD_BLCP_MASK;
729
730 if (is_manager(i2s))
731 mask |= MOD_BLC_MASK;
732
733 switch (params_width(params)) {
734 case 8:
735 if (is_secondary(i2s))
736 val |= MOD_BLCS_8BIT;
737 else
738 val |= MOD_BLCP_8BIT;
739 if (is_manager(i2s))
740 val |= MOD_BLC_8BIT;
741 break;
742 case 16:
743 if (is_secondary(i2s))
744 val |= MOD_BLCS_16BIT;
745 else
746 val |= MOD_BLCP_16BIT;
747 if (is_manager(i2s))
748 val |= MOD_BLC_16BIT;
749 break;
750 case 24:
751 if (is_secondary(i2s))
752 val |= MOD_BLCS_24BIT;
753 else
754 val |= MOD_BLCP_24BIT;
755 if (is_manager(i2s))
756 val |= MOD_BLC_24BIT;
757 break;
758 default:
759 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
760 params_format(params));
761 return -EINVAL;
762 }
763
764 spin_lock_irqsave(i2s->lock, flags);
765 mod = readl(i2s->addr + I2SMOD);
766 mod = (mod & ~mask) | val;
767 writel(mod, i2s->addr + I2SMOD);
768 spin_unlock_irqrestore(i2s->lock, flags);
769
770 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
771
772 i2s->frmclk = params_rate(params);
773
774 return 0;
775 }
776
777 /* We set constraints on the substream acc to the version of I2S */
778 static int i2s_startup(struct snd_pcm_substream *substream,
779 struct snd_soc_dai *dai)
780 {
781 struct i2s_dai *i2s = to_info(dai);
782 struct i2s_dai *other = get_other_dai(i2s);
783 unsigned long flags;
784
785 pm_runtime_get_sync(dai->dev);
786
787 spin_lock_irqsave(&lock, flags);
788
789 i2s->mode |= DAI_OPENED;
790
791 if (is_manager(other))
792 i2s->mode &= ~DAI_MANAGER;
793 else
794 i2s->mode |= DAI_MANAGER;
795
796 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
797 writel(CON_RSTCLR, i2s->addr + I2SCON);
798
799 spin_unlock_irqrestore(&lock, flags);
800
801 return 0;
802 }
803
804 static void i2s_shutdown(struct snd_pcm_substream *substream,
805 struct snd_soc_dai *dai)
806 {
807 struct i2s_dai *i2s = to_info(dai);
808 struct i2s_dai *other = get_other_dai(i2s);
809 unsigned long flags;
810
811 spin_lock_irqsave(&lock, flags);
812
813 i2s->mode &= ~DAI_OPENED;
814 i2s->mode &= ~DAI_MANAGER;
815
816 if (is_opened(other))
817 other->mode |= DAI_MANAGER;
818
819 /* Reset any constraint on RFS and BFS */
820 i2s->rfs = 0;
821 i2s->bfs = 0;
822
823 spin_unlock_irqrestore(&lock, flags);
824
825 pm_runtime_put(dai->dev);
826 }
827
828 static int config_setup(struct i2s_dai *i2s)
829 {
830 struct i2s_dai *other = get_other_dai(i2s);
831 unsigned rfs, bfs, blc;
832 u32 psr;
833
834 blc = get_blc(i2s);
835
836 bfs = i2s->bfs;
837
838 if (!bfs && other)
839 bfs = other->bfs;
840
841 /* Select least possible multiple(2) if no constraint set */
842 if (!bfs)
843 bfs = blc * 2;
844
845 rfs = i2s->rfs;
846
847 if (!rfs && other)
848 rfs = other->rfs;
849
850 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
851 dev_err(&i2s->pdev->dev,
852 "%d-RFS not supported for 24-blc\n", rfs);
853 return -EINVAL;
854 }
855
856 if (!rfs) {
857 if (bfs == 16 || bfs == 32)
858 rfs = 256;
859 else
860 rfs = 384;
861 }
862
863 /* If already setup and running */
864 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
865 dev_err(&i2s->pdev->dev,
866 "%s:%d Other DAI busy\n", __func__, __LINE__);
867 return -EAGAIN;
868 }
869
870 set_bfs(i2s, bfs);
871 set_rfs(i2s, rfs);
872
873 /* Don't bother with PSR in Slave mode */
874 if (is_slave(i2s))
875 return 0;
876
877 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
878 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
879 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
880 dev_dbg(&i2s->pdev->dev,
881 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
882 i2s->rclk_srcrate, psr, rfs, bfs);
883 }
884
885 return 0;
886 }
887
888 static int i2s_trigger(struct snd_pcm_substream *substream,
889 int cmd, struct snd_soc_dai *dai)
890 {
891 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
892 struct snd_soc_pcm_runtime *rtd = substream->private_data;
893 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
894 unsigned long flags;
895
896 switch (cmd) {
897 case SNDRV_PCM_TRIGGER_START:
898 case SNDRV_PCM_TRIGGER_RESUME:
899 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
900 pm_runtime_get_sync(dai->dev);
901 spin_lock_irqsave(i2s->lock, flags);
902
903 if (config_setup(i2s)) {
904 spin_unlock_irqrestore(i2s->lock, flags);
905 return -EINVAL;
906 }
907
908 if (capture)
909 i2s_rxctrl(i2s, 1);
910 else
911 i2s_txctrl(i2s, 1);
912
913 spin_unlock_irqrestore(i2s->lock, flags);
914 break;
915 case SNDRV_PCM_TRIGGER_STOP:
916 case SNDRV_PCM_TRIGGER_SUSPEND:
917 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
918 spin_lock_irqsave(i2s->lock, flags);
919
920 if (capture) {
921 i2s_rxctrl(i2s, 0);
922 i2s_fifo(i2s, FIC_RXFLUSH);
923 } else {
924 i2s_txctrl(i2s, 0);
925 i2s_fifo(i2s, FIC_TXFLUSH);
926 }
927
928 spin_unlock_irqrestore(i2s->lock, flags);
929 pm_runtime_put(dai->dev);
930 break;
931 }
932
933 return 0;
934 }
935
936 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
937 int div_id, int div)
938 {
939 struct i2s_dai *i2s = to_info(dai);
940 struct i2s_dai *other = get_other_dai(i2s);
941
942 switch (div_id) {
943 case SAMSUNG_I2S_DIV_BCLK:
944 pm_runtime_get_sync(dai->dev);
945 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
946 || (other && other->bfs && (other->bfs != div))) {
947 pm_runtime_put(dai->dev);
948 dev_err(&i2s->pdev->dev,
949 "%s:%d Other DAI busy\n", __func__, __LINE__);
950 return -EAGAIN;
951 }
952 i2s->bfs = div;
953 pm_runtime_put(dai->dev);
954 break;
955 default:
956 dev_err(&i2s->pdev->dev,
957 "Invalid clock divider(%d)\n", div_id);
958 return -EINVAL;
959 }
960
961 return 0;
962 }
963
964 static snd_pcm_sframes_t
965 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
966 {
967 struct i2s_dai *i2s = to_info(dai);
968 u32 reg = readl(i2s->addr + I2SFIC);
969 snd_pcm_sframes_t delay;
970 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
971
972 WARN_ON(!pm_runtime_active(dai->dev));
973
974 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
975 delay = FIC_RXCOUNT(reg);
976 else if (is_secondary(i2s))
977 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
978 else
979 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
980
981 return delay;
982 }
983
984 #ifdef CONFIG_PM
985 static int i2s_suspend(struct snd_soc_dai *dai)
986 {
987 return pm_runtime_force_suspend(dai->dev);
988 }
989
990 static int i2s_resume(struct snd_soc_dai *dai)
991 {
992 return pm_runtime_force_resume(dai->dev);
993 }
994 #else
995 #define i2s_suspend NULL
996 #define i2s_resume NULL
997 #endif
998
999 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1000 {
1001 struct i2s_dai *i2s = to_info(dai);
1002 struct i2s_dai *other = get_other_dai(i2s);
1003 unsigned long flags;
1004
1005 pm_runtime_get_sync(dai->dev);
1006
1007 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1008 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1009 NULL);
1010 } else {
1011 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1012 &i2s->dma_capture);
1013
1014 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1015 writel(CON_RSTCLR, i2s->addr + I2SCON);
1016
1017 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1018 idma_reg_addr_init(i2s->addr,
1019 i2s->sec_dai->idma_playback.addr);
1020 }
1021
1022 /* Reset any constraint on RFS and BFS */
1023 i2s->rfs = 0;
1024 i2s->bfs = 0;
1025 i2s->rclk_srcrate = 0;
1026
1027 spin_lock_irqsave(i2s->lock, flags);
1028 i2s_txctrl(i2s, 0);
1029 i2s_rxctrl(i2s, 0);
1030 i2s_fifo(i2s, FIC_TXFLUSH);
1031 i2s_fifo(other, FIC_TXFLUSH);
1032 i2s_fifo(i2s, FIC_RXFLUSH);
1033 spin_unlock_irqrestore(i2s->lock, flags);
1034
1035 /* Gate CDCLK by default */
1036 if (!is_opened(other))
1037 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1038 0, SND_SOC_CLOCK_IN);
1039 pm_runtime_put(dai->dev);
1040
1041 return 0;
1042 }
1043
1044 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1045 {
1046 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1047 unsigned long flags;
1048
1049 pm_runtime_get_sync(dai->dev);
1050
1051 if (!is_secondary(i2s)) {
1052 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1053 spin_lock_irqsave(i2s->lock, flags);
1054 writel(0, i2s->addr + I2SCON);
1055 spin_unlock_irqrestore(i2s->lock, flags);
1056 }
1057 }
1058
1059 pm_runtime_put(dai->dev);
1060
1061 return 0;
1062 }
1063
1064 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1065 .trigger = i2s_trigger,
1066 .hw_params = i2s_hw_params,
1067 .set_fmt = i2s_set_fmt,
1068 .set_clkdiv = i2s_set_clkdiv,
1069 .set_sysclk = i2s_set_sysclk,
1070 .startup = i2s_startup,
1071 .shutdown = i2s_shutdown,
1072 .delay = i2s_delay,
1073 };
1074
1075 static const struct snd_soc_component_driver samsung_i2s_component = {
1076 .name = "samsung-i2s",
1077 };
1078
1079 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1080
1081 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1082 SNDRV_PCM_FMTBIT_S16_LE | \
1083 SNDRV_PCM_FMTBIT_S24_LE)
1084
1085 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1086 {
1087 struct i2s_dai *i2s;
1088
1089 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1090 if (i2s == NULL)
1091 return NULL;
1092
1093 i2s->pdev = pdev;
1094 i2s->pri_dai = NULL;
1095 i2s->sec_dai = NULL;
1096 i2s->i2s_dai_drv.symmetric_rates = 1;
1097 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1098 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1099 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1100 i2s->i2s_dai_drv.suspend = i2s_suspend;
1101 i2s->i2s_dai_drv.resume = i2s_resume;
1102 i2s->i2s_dai_drv.playback.channels_min = 1;
1103 i2s->i2s_dai_drv.playback.channels_max = 2;
1104 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1105 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1106
1107 if (!sec) {
1108 i2s->i2s_dai_drv.capture.channels_min = 1;
1109 i2s->i2s_dai_drv.capture.channels_max = 2;
1110 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1111 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1112 }
1113 return i2s;
1114 }
1115
1116 #ifdef CONFIG_PM
1117 static int i2s_runtime_suspend(struct device *dev)
1118 {
1119 struct i2s_dai *i2s = dev_get_drvdata(dev);
1120
1121 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1122 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1123 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1124
1125 if (i2s->op_clk)
1126 clk_disable_unprepare(i2s->op_clk);
1127 clk_disable_unprepare(i2s->clk);
1128
1129 return 0;
1130 }
1131
1132 static int i2s_runtime_resume(struct device *dev)
1133 {
1134 struct i2s_dai *i2s = dev_get_drvdata(dev);
1135
1136 clk_prepare_enable(i2s->clk);
1137 if (i2s->op_clk)
1138 clk_prepare_enable(i2s->op_clk);
1139
1140 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1141 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1142 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1143
1144 return 0;
1145 }
1146 #endif /* CONFIG_PM */
1147
1148 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1149 {
1150 int i;
1151
1152 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1153 if (!IS_ERR(i2s->clk_table[i]))
1154 clk_unregister(i2s->clk_table[i]);
1155 }
1156 }
1157
1158 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1159 {
1160 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1161
1162 of_clk_del_provider(pdev->dev.of_node);
1163 i2s_unregister_clocks(i2s);
1164 }
1165
1166 static int i2s_register_clock_provider(struct platform_device *pdev)
1167 {
1168 struct device *dev = &pdev->dev;
1169 struct i2s_dai *i2s = dev_get_drvdata(dev);
1170 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1171 const char *p_names[2] = { NULL };
1172 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1173 struct clk *rclksrc;
1174 int ret, i;
1175
1176 /* Register the clock provider only if it's expected in the DTB */
1177 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1178 return 0;
1179
1180 /* Get the RCLKSRC mux clock parent clock names */
1181 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1182 rclksrc = clk_get(dev, clk_name[i]);
1183 if (IS_ERR(rclksrc))
1184 continue;
1185 p_names[i] = __clk_get_name(rclksrc);
1186 clk_put(rclksrc);
1187 }
1188
1189 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1190 /* Activate the prescaler */
1191 u32 val = readl(i2s->addr + I2SPSR);
1192 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1193
1194 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1195 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1196 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1197 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1198 1, 0, i2s->lock);
1199
1200 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1201 "i2s_presc", "i2s_rclksrc",
1202 CLK_SET_RATE_PARENT,
1203 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1204
1205 p_names[0] = "i2s_presc";
1206 i2s->clk_data.clk_num = 2;
1207 }
1208 of_property_read_string_index(dev->of_node,
1209 "clock-output-names", 0, &clk_name[0]);
1210
1211 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0],
1212 p_names[0], CLK_SET_RATE_PARENT,
1213 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1214 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1215
1216 i2s->clk_data.clk_num += 1;
1217 i2s->clk_data.clks = i2s->clk_table;
1218
1219 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1220 &i2s->clk_data);
1221 if (ret < 0) {
1222 dev_err(dev, "failed to add clock provider: %d\n", ret);
1223 i2s_unregister_clocks(i2s);
1224 }
1225
1226 return ret;
1227 }
1228
1229 static int samsung_i2s_probe(struct platform_device *pdev)
1230 {
1231 struct i2s_dai *pri_dai, *sec_dai = NULL;
1232 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1233 struct resource *res;
1234 u32 regs_base, quirks = 0, idma_addr = 0;
1235 struct device_node *np = pdev->dev.of_node;
1236 const struct samsung_i2s_dai_data *i2s_dai_data;
1237 int ret;
1238
1239 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1240 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1241 else
1242 i2s_dai_data = (struct samsung_i2s_dai_data *)
1243 platform_get_device_id(pdev)->driver_data;
1244
1245
1246 pri_dai = i2s_alloc_dai(pdev, false);
1247 if (!pri_dai) {
1248 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1249 return -ENOMEM;
1250 }
1251
1252 spin_lock_init(&pri_dai->spinlock);
1253 pri_dai->lock = &pri_dai->spinlock;
1254
1255 if (!np) {
1256 if (i2s_pdata == NULL) {
1257 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1258 return -EINVAL;
1259 }
1260
1261 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1262 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1263 pri_dai->filter = i2s_pdata->dma_filter;
1264
1265 quirks = i2s_pdata->type.quirks;
1266 idma_addr = i2s_pdata->type.idma_addr;
1267 } else {
1268 quirks = i2s_dai_data->quirks;
1269 if (of_property_read_u32(np, "samsung,idma-addr",
1270 &idma_addr)) {
1271 if (quirks & QUIRK_SUPPORTS_IDMA) {
1272 dev_info(&pdev->dev, "idma address is not"\
1273 "specified");
1274 }
1275 }
1276 }
1277
1278 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1279 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1280 if (IS_ERR(pri_dai->addr))
1281 return PTR_ERR(pri_dai->addr);
1282
1283 regs_base = res->start;
1284
1285 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1286 if (IS_ERR(pri_dai->clk)) {
1287 dev_err(&pdev->dev, "Failed to get iis clock\n");
1288 return PTR_ERR(pri_dai->clk);
1289 }
1290
1291 ret = clk_prepare_enable(pri_dai->clk);
1292 if (ret != 0) {
1293 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1294 return ret;
1295 }
1296 pri_dai->dma_playback.addr = regs_base + I2STXD;
1297 pri_dai->dma_capture.addr = regs_base + I2SRXD;
1298 pri_dai->dma_playback.chan_name = "tx";
1299 pri_dai->dma_capture.chan_name = "rx";
1300 pri_dai->dma_playback.addr_width = 4;
1301 pri_dai->dma_capture.addr_width = 4;
1302 pri_dai->quirks = quirks;
1303 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1304
1305 if (quirks & QUIRK_PRI_6CHAN)
1306 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1307
1308 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1309 NULL, NULL);
1310 if (ret < 0)
1311 goto err_disable_clk;
1312
1313 ret = devm_snd_soc_register_component(&pdev->dev,
1314 &samsung_i2s_component,
1315 &pri_dai->i2s_dai_drv, 1);
1316 if (ret < 0)
1317 goto err_disable_clk;
1318
1319 if (quirks & QUIRK_SEC_DAI) {
1320 sec_dai = i2s_alloc_dai(pdev, true);
1321 if (!sec_dai) {
1322 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1323 ret = -ENOMEM;
1324 goto err_disable_clk;
1325 }
1326
1327 sec_dai->lock = &pri_dai->spinlock;
1328 sec_dai->variant_regs = pri_dai->variant_regs;
1329 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1330 sec_dai->dma_playback.chan_name = "tx-sec";
1331
1332 if (!np) {
1333 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1334 sec_dai->filter = i2s_pdata->dma_filter;
1335 }
1336
1337 sec_dai->dma_playback.addr_width = 4;
1338 sec_dai->addr = pri_dai->addr;
1339 sec_dai->clk = pri_dai->clk;
1340 sec_dai->quirks = quirks;
1341 sec_dai->idma_playback.addr = idma_addr;
1342 sec_dai->pri_dai = pri_dai;
1343 pri_dai->sec_dai = sec_dai;
1344
1345 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1346 sec_dai->filter, "tx-sec", NULL);
1347 if (ret < 0)
1348 goto err_disable_clk;
1349
1350 ret = devm_snd_soc_register_component(&pdev->dev,
1351 &samsung_i2s_component,
1352 &sec_dai->i2s_dai_drv, 1);
1353 if (ret < 0)
1354 goto err_disable_clk;
1355 }
1356
1357 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1358 dev_err(&pdev->dev, "Unable to configure gpio\n");
1359 ret = -EINVAL;
1360 goto err_disable_clk;
1361 }
1362
1363 dev_set_drvdata(&pdev->dev, pri_dai);
1364
1365 pm_runtime_set_active(&pdev->dev);
1366 pm_runtime_enable(&pdev->dev);
1367
1368 ret = i2s_register_clock_provider(pdev);
1369 if (!ret)
1370 return 0;
1371
1372 pm_runtime_disable(&pdev->dev);
1373 err_disable_clk:
1374 clk_disable_unprepare(pri_dai->clk);
1375 return ret;
1376 }
1377
1378 static int samsung_i2s_remove(struct platform_device *pdev)
1379 {
1380 struct i2s_dai *pri_dai, *sec_dai;
1381
1382 pri_dai = dev_get_drvdata(&pdev->dev);
1383 sec_dai = pri_dai->sec_dai;
1384
1385 pri_dai->sec_dai = NULL;
1386 sec_dai->pri_dai = NULL;
1387
1388 pm_runtime_get_sync(&pdev->dev);
1389 pm_runtime_disable(&pdev->dev);
1390
1391 i2s_unregister_clock_provider(pdev);
1392 clk_disable_unprepare(pri_dai->clk);
1393 pm_runtime_put_noidle(&pdev->dev);
1394
1395 return 0;
1396 }
1397
1398 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1399 .bfs_off = 1,
1400 .rfs_off = 3,
1401 .sdf_off = 5,
1402 .txr_off = 8,
1403 .rclksrc_off = 10,
1404 .mss_off = 11,
1405 .cdclkcon_off = 12,
1406 .lrp_off = 7,
1407 .bfs_mask = 0x3,
1408 .rfs_mask = 0x3,
1409 .ftx0cnt_off = 8,
1410 };
1411
1412 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1413 .bfs_off = 0,
1414 .rfs_off = 4,
1415 .sdf_off = 6,
1416 .txr_off = 8,
1417 .rclksrc_off = 10,
1418 .mss_off = 11,
1419 .cdclkcon_off = 12,
1420 .lrp_off = 15,
1421 .bfs_mask = 0xf,
1422 .rfs_mask = 0x3,
1423 .ftx0cnt_off = 8,
1424 };
1425
1426 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1427 .bfs_off = 0,
1428 .rfs_off = 4,
1429 .sdf_off = 7,
1430 .txr_off = 9,
1431 .rclksrc_off = 11,
1432 .mss_off = 12,
1433 .cdclkcon_off = 22,
1434 .lrp_off = 15,
1435 .bfs_mask = 0xf,
1436 .rfs_mask = 0x7,
1437 .ftx0cnt_off = 0,
1438 };
1439
1440 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1441 .bfs_off = 0,
1442 .rfs_off = 3,
1443 .sdf_off = 6,
1444 .txr_off = 8,
1445 .rclksrc_off = 10,
1446 .mss_off = 11,
1447 .cdclkcon_off = 12,
1448 .lrp_off = 15,
1449 .bfs_mask = 0x7,
1450 .rfs_mask = 0x7,
1451 .ftx0cnt_off = 8,
1452 };
1453
1454 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1455 .quirks = QUIRK_NO_MUXPSR,
1456 .i2s_variant_regs = &i2sv3_regs,
1457 };
1458
1459 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1460 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1461 QUIRK_SUPPORTS_IDMA,
1462 .i2s_variant_regs = &i2sv3_regs,
1463 };
1464
1465 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1466 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1467 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1468 .i2s_variant_regs = &i2sv6_regs,
1469 };
1470
1471 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1472 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1473 QUIRK_SUPPORTS_TDM,
1474 .i2s_variant_regs = &i2sv7_regs,
1475 };
1476
1477 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1478 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1479 .i2s_variant_regs = &i2sv5_i2s1_regs,
1480 };
1481
1482 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1483 {
1484 .name = "samsung-i2s",
1485 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1486 },
1487 {},
1488 };
1489 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1490
1491 #ifdef CONFIG_OF
1492 static const struct of_device_id exynos_i2s_match[] = {
1493 {
1494 .compatible = "samsung,s3c6410-i2s",
1495 .data = &i2sv3_dai_type,
1496 }, {
1497 .compatible = "samsung,s5pv210-i2s",
1498 .data = &i2sv5_dai_type,
1499 }, {
1500 .compatible = "samsung,exynos5420-i2s",
1501 .data = &i2sv6_dai_type,
1502 }, {
1503 .compatible = "samsung,exynos7-i2s",
1504 .data = &i2sv7_dai_type,
1505 }, {
1506 .compatible = "samsung,exynos7-i2s1",
1507 .data = &i2sv5_dai_type_i2s1,
1508 },
1509 {},
1510 };
1511 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1512 #endif
1513
1514 static const struct dev_pm_ops samsung_i2s_pm = {
1515 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1516 i2s_runtime_resume, NULL)
1517 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1518 pm_runtime_force_resume)
1519 };
1520
1521 static struct platform_driver samsung_i2s_driver = {
1522 .probe = samsung_i2s_probe,
1523 .remove = samsung_i2s_remove,
1524 .id_table = samsung_i2s_driver_ids,
1525 .driver = {
1526 .name = "samsung-i2s",
1527 .of_match_table = of_match_ptr(exynos_i2s_match),
1528 .pm = &samsung_i2s_pm,
1529 },
1530 };
1531
1532 module_platform_driver(samsung_i2s_driver);
1533
1534 /* Module information */
1535 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1536 MODULE_DESCRIPTION("Samsung I2S Interface");
1537 MODULE_ALIAS("platform:samsung-i2s");
1538 MODULE_LICENSE("GPL");
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