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Merge branch 'for-2.6.33' into for-2.6.34
[mirror_ubuntu-artful-kernel.git] / sound / soc / sh / fsi.c
1 /*
2 * Fifo-attached Serial Interface (FSI) support for SH7724
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on ssi.c
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/io.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27 #include <sound/sh_fsi.h>
28 #include <asm/atomic.h>
29
30 #define DO_FMT 0x0000
31 #define DOFF_CTL 0x0004
32 #define DOFF_ST 0x0008
33 #define DI_FMT 0x000C
34 #define DIFF_CTL 0x0010
35 #define DIFF_ST 0x0014
36 #define CKG1 0x0018
37 #define CKG2 0x001C
38 #define DIDT 0x0020
39 #define DODT 0x0024
40 #define MUTE_ST 0x0028
41 #define REG_END MUTE_ST
42
43 #define INT_ST 0x0200
44 #define IEMSK 0x0204
45 #define IMSK 0x0208
46 #define MUTE 0x020C
47 #define CLK_RST 0x0210
48 #define SOFT_RST 0x0214
49 #define MREG_START INT_ST
50 #define MREG_END SOFT_RST
51
52 /* DO_FMT */
53 /* DI_FMT */
54 #define CR_FMT(param) ((param) << 4)
55 # define CR_MONO 0x0
56 # define CR_MONO_D 0x1
57 # define CR_PCM 0x2
58 # define CR_I2S 0x3
59 # define CR_TDM 0x4
60 # define CR_TDM_D 0x5
61
62 /* DOFF_CTL */
63 /* DIFF_CTL */
64 #define IRQ_HALF 0x00100000
65 #define FIFO_CLR 0x00000001
66
67 /* DOFF_ST */
68 #define ERR_OVER 0x00000010
69 #define ERR_UNDER 0x00000001
70 #define ST_ERR (ERR_OVER | ERR_UNDER)
71
72 /* CLK_RST */
73 #define B_CLK 0x00000010
74 #define A_CLK 0x00000001
75
76 /* INT_ST */
77 #define INT_B_IN (1 << 12)
78 #define INT_B_OUT (1 << 8)
79 #define INT_A_IN (1 << 4)
80 #define INT_A_OUT (1 << 0)
81
82 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
83
84 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
85
86 /************************************************************************
87
88
89 struct
90
91
92 ************************************************************************/
93 struct fsi_priv {
94 void __iomem *base;
95 struct snd_pcm_substream *substream;
96 struct fsi_master *master;
97
98 int fifo_max;
99 int chan;
100
101 int byte_offset;
102 int period_len;
103 int buffer_len;
104 int periods;
105 };
106
107 struct fsi_master {
108 void __iomem *base;
109 int irq;
110 struct fsi_priv fsia;
111 struct fsi_priv fsib;
112 struct sh_fsi_platform_info *info;
113 };
114
115 /************************************************************************
116
117
118 basic read write function
119
120
121 ************************************************************************/
122 static int __fsi_reg_write(u32 reg, u32 data)
123 {
124 /* valid data area is 24bit */
125 data &= 0x00ffffff;
126
127 return ctrl_outl(data, reg);
128 }
129
130 static u32 __fsi_reg_read(u32 reg)
131 {
132 return ctrl_inl(reg);
133 }
134
135 static int __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
136 {
137 u32 val = __fsi_reg_read(reg);
138
139 val &= ~mask;
140 val |= data & mask;
141
142 return __fsi_reg_write(reg, val);
143 }
144
145 static int fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
146 {
147 if (reg > REG_END)
148 return -1;
149
150 return __fsi_reg_write((u32)(fsi->base + reg), data);
151 }
152
153 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
154 {
155 if (reg > REG_END)
156 return 0;
157
158 return __fsi_reg_read((u32)(fsi->base + reg));
159 }
160
161 static int fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
162 {
163 if (reg > REG_END)
164 return -1;
165
166 return __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
167 }
168
169 static int fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
170 {
171 if ((reg < MREG_START) ||
172 (reg > MREG_END))
173 return -1;
174
175 return __fsi_reg_write((u32)(master->base + reg), data);
176 }
177
178 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
179 {
180 if ((reg < MREG_START) ||
181 (reg > MREG_END))
182 return 0;
183
184 return __fsi_reg_read((u32)(master->base + reg));
185 }
186
187 static int fsi_master_mask_set(struct fsi_master *master,
188 u32 reg, u32 mask, u32 data)
189 {
190 if ((reg < MREG_START) ||
191 (reg > MREG_END))
192 return -1;
193
194 return __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
195 }
196
197 /************************************************************************
198
199
200 basic function
201
202
203 ************************************************************************/
204 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
205 {
206 return fsi->master;
207 }
208
209 static int fsi_is_port_a(struct fsi_priv *fsi)
210 {
211 return fsi->master->base == fsi->base;
212 }
213
214 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
215 {
216 struct snd_soc_pcm_runtime *rtd = substream->private_data;
217 struct snd_soc_dai_link *machine = rtd->dai;
218
219 return machine->cpu_dai;
220 }
221
222 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
223 {
224 struct snd_soc_dai *dai = fsi_get_dai(substream);
225
226 return dai->private_data;
227 }
228
229 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
230 {
231 int is_porta = fsi_is_port_a(fsi);
232 struct fsi_master *master = fsi_get_master(fsi);
233
234 return is_porta ? master->info->porta_flags :
235 master->info->portb_flags;
236 }
237
238 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
239 {
240 u32 mode;
241 u32 flags = fsi_get_info_flags(fsi);
242
243 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
244
245 /* return
246 * 1 : master mode
247 * 0 : slave mode
248 */
249
250 return (mode & flags) != mode;
251 }
252
253 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
254 {
255 int is_porta = fsi_is_port_a(fsi);
256 u32 data;
257
258 if (is_porta)
259 data = is_play ? (1 << 0) : (1 << 4);
260 else
261 data = is_play ? (1 << 8) : (1 << 12);
262
263 return data;
264 }
265
266 static void fsi_stream_push(struct fsi_priv *fsi,
267 struct snd_pcm_substream *substream,
268 u32 buffer_len,
269 u32 period_len)
270 {
271 fsi->substream = substream;
272 fsi->buffer_len = buffer_len;
273 fsi->period_len = period_len;
274 fsi->byte_offset = 0;
275 fsi->periods = 0;
276 }
277
278 static void fsi_stream_pop(struct fsi_priv *fsi)
279 {
280 fsi->substream = NULL;
281 fsi->buffer_len = 0;
282 fsi->period_len = 0;
283 fsi->byte_offset = 0;
284 fsi->periods = 0;
285 }
286
287 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
288 {
289 u32 status;
290 u32 reg = is_play ? DOFF_ST : DIFF_ST;
291 int residue;
292
293 status = fsi_reg_read(fsi, reg);
294 residue = 0x1ff & (status >> 8);
295 residue *= fsi->chan;
296
297 return residue;
298 }
299
300 /************************************************************************
301
302
303 ctrl function
304
305
306 ************************************************************************/
307 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
308 {
309 u32 data = fsi_port_ab_io_bit(fsi, is_play);
310 struct fsi_master *master = fsi_get_master(fsi);
311
312 fsi_master_mask_set(master, IMSK, data, data);
313 fsi_master_mask_set(master, IEMSK, data, data);
314 }
315
316 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
317 {
318 u32 data = fsi_port_ab_io_bit(fsi, is_play);
319 struct fsi_master *master = fsi_get_master(fsi);
320
321 fsi_master_mask_set(master, IMSK, data, 0);
322 fsi_master_mask_set(master, IEMSK, data, 0);
323 }
324
325 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
326 {
327 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
328 struct fsi_master *master = fsi_get_master(fsi);
329
330 if (enable)
331 fsi_master_mask_set(master, CLK_RST, val, val);
332 else
333 fsi_master_mask_set(master, CLK_RST, val, 0);
334 }
335
336 static void fsi_irq_init(struct fsi_priv *fsi, int is_play)
337 {
338 u32 data;
339 u32 ctrl;
340
341 data = fsi_port_ab_io_bit(fsi, is_play);
342 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
343
344 /* set IMSK */
345 fsi_irq_disable(fsi, is_play);
346
347 /* set interrupt generation factor */
348 fsi_reg_write(fsi, ctrl, IRQ_HALF);
349
350 /* clear FIFO */
351 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
352
353 /* clear interrupt factor */
354 fsi_master_mask_set(fsi_get_master(fsi), INT_ST, data, 0);
355 }
356
357 static void fsi_soft_all_reset(struct fsi_master *master)
358 {
359 u32 status = fsi_master_read(master, SOFT_RST);
360
361 /* port AB reset */
362 status &= 0x000000ff;
363 fsi_master_write(master, SOFT_RST, status);
364 mdelay(10);
365
366 /* soft reset */
367 status &= 0x000000f0;
368 fsi_master_write(master, SOFT_RST, status);
369 status |= 0x00000001;
370 fsi_master_write(master, SOFT_RST, status);
371 mdelay(10);
372 }
373
374 /* playback interrupt */
375 static int fsi_data_push(struct fsi_priv *fsi)
376 {
377 struct snd_pcm_runtime *runtime;
378 struct snd_pcm_substream *substream = NULL;
379 u32 status;
380 int send;
381 int fifo_free;
382 int width;
383 u8 *start;
384 int i, ret, over_period;
385
386 if (!fsi ||
387 !fsi->substream ||
388 !fsi->substream->runtime)
389 return -EINVAL;
390
391 over_period = 0;
392 substream = fsi->substream;
393 runtime = substream->runtime;
394
395 /* FSI FIFO has limit.
396 * So, this driver can not send periods data at a time
397 */
398 if (fsi->byte_offset >=
399 fsi->period_len * (fsi->periods + 1)) {
400
401 over_period = 1;
402 fsi->periods = (fsi->periods + 1) % runtime->periods;
403
404 if (0 == fsi->periods)
405 fsi->byte_offset = 0;
406 }
407
408 /* get 1 channel data width */
409 width = frames_to_bytes(runtime, 1) / fsi->chan;
410
411 /* get send size for alsa */
412 send = (fsi->buffer_len - fsi->byte_offset) / width;
413
414 /* get FIFO free size */
415 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
416
417 /* size check */
418 if (fifo_free < send)
419 send = fifo_free;
420
421 start = runtime->dma_area;
422 start += fsi->byte_offset;
423
424 switch (width) {
425 case 2:
426 for (i = 0; i < send; i++)
427 fsi_reg_write(fsi, DODT,
428 ((u32)*((u16 *)start + i) << 8));
429 break;
430 case 4:
431 for (i = 0; i < send; i++)
432 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
433 break;
434 default:
435 return -EINVAL;
436 }
437
438 fsi->byte_offset += send * width;
439
440 ret = 0;
441 status = fsi_reg_read(fsi, DOFF_ST);
442 if (status & ERR_OVER) {
443 struct snd_soc_dai *dai = fsi_get_dai(substream);
444 dev_err(dai->dev, "over run error\n");
445 fsi_reg_write(fsi, DOFF_ST, status & ~ST_ERR);
446 ret = -EIO;
447 }
448
449 fsi_irq_enable(fsi, 1);
450
451 if (over_period)
452 snd_pcm_period_elapsed(substream);
453
454 return ret;
455 }
456
457 static int fsi_data_pop(struct fsi_priv *fsi)
458 {
459 struct snd_pcm_runtime *runtime;
460 struct snd_pcm_substream *substream = NULL;
461 u32 status;
462 int free;
463 int fifo_fill;
464 int width;
465 u8 *start;
466 int i, ret, over_period;
467
468 if (!fsi ||
469 !fsi->substream ||
470 !fsi->substream->runtime)
471 return -EINVAL;
472
473 over_period = 0;
474 substream = fsi->substream;
475 runtime = substream->runtime;
476
477 /* FSI FIFO has limit.
478 * So, this driver can not send periods data at a time
479 */
480 if (fsi->byte_offset >=
481 fsi->period_len * (fsi->periods + 1)) {
482
483 over_period = 1;
484 fsi->periods = (fsi->periods + 1) % runtime->periods;
485
486 if (0 == fsi->periods)
487 fsi->byte_offset = 0;
488 }
489
490 /* get 1 channel data width */
491 width = frames_to_bytes(runtime, 1) / fsi->chan;
492
493 /* get free space for alsa */
494 free = (fsi->buffer_len - fsi->byte_offset) / width;
495
496 /* get recv size */
497 fifo_fill = fsi_get_fifo_residue(fsi, 0);
498
499 if (free < fifo_fill)
500 fifo_fill = free;
501
502 start = runtime->dma_area;
503 start += fsi->byte_offset;
504
505 switch (width) {
506 case 2:
507 for (i = 0; i < fifo_fill; i++)
508 *((u16 *)start + i) =
509 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
510 break;
511 case 4:
512 for (i = 0; i < fifo_fill; i++)
513 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
514 break;
515 default:
516 return -EINVAL;
517 }
518
519 fsi->byte_offset += fifo_fill * width;
520
521 ret = 0;
522 status = fsi_reg_read(fsi, DIFF_ST);
523 if (status & ERR_UNDER) {
524 struct snd_soc_dai *dai = fsi_get_dai(substream);
525 dev_err(dai->dev, "under run error\n");
526 fsi_reg_write(fsi, DIFF_ST, status & ~ST_ERR);
527 ret = -EIO;
528 }
529
530 fsi_irq_enable(fsi, 0);
531
532 if (over_period)
533 snd_pcm_period_elapsed(substream);
534
535 return ret;
536 }
537
538 static irqreturn_t fsi_interrupt(int irq, void *data)
539 {
540 struct fsi_master *master = data;
541 u32 status = fsi_master_read(master, SOFT_RST) & ~0x00000010;
542 u32 int_st = fsi_master_read(master, INT_ST);
543
544 /* clear irq status */
545 fsi_master_write(master, SOFT_RST, status);
546 fsi_master_write(master, SOFT_RST, status | 0x00000010);
547
548 if (int_st & INT_A_OUT)
549 fsi_data_push(&master->fsia);
550 if (int_st & INT_B_OUT)
551 fsi_data_push(&master->fsib);
552 if (int_st & INT_A_IN)
553 fsi_data_pop(&master->fsia);
554 if (int_st & INT_B_IN)
555 fsi_data_pop(&master->fsib);
556
557 fsi_master_write(master, INT_ST, 0x0000000);
558
559 return IRQ_HANDLED;
560 }
561
562 /************************************************************************
563
564
565 dai ops
566
567
568 ************************************************************************/
569 static int fsi_dai_startup(struct snd_pcm_substream *substream,
570 struct snd_soc_dai *dai)
571 {
572 struct fsi_priv *fsi = fsi_get_priv(substream);
573 const char *msg;
574 u32 flags = fsi_get_info_flags(fsi);
575 u32 fmt;
576 u32 reg;
577 u32 data;
578 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
579 int is_master;
580 int ret = 0;
581
582 pm_runtime_get_sync(dai->dev);
583
584 /* CKG1 */
585 data = is_play ? (1 << 0) : (1 << 4);
586 is_master = fsi_is_master_mode(fsi, is_play);
587 if (is_master)
588 fsi_reg_mask_set(fsi, CKG1, data, data);
589 else
590 fsi_reg_mask_set(fsi, CKG1, data, 0);
591
592 /* clock inversion (CKG2) */
593 data = 0;
594 switch (SH_FSI_INVERSION_MASK & flags) {
595 case SH_FSI_LRM_INV:
596 data = 1 << 12;
597 break;
598 case SH_FSI_BRM_INV:
599 data = 1 << 8;
600 break;
601 case SH_FSI_LRS_INV:
602 data = 1 << 4;
603 break;
604 case SH_FSI_BRS_INV:
605 data = 1 << 0;
606 break;
607 }
608 fsi_reg_write(fsi, CKG2, data);
609
610 /* do fmt, di fmt */
611 data = 0;
612 reg = is_play ? DO_FMT : DI_FMT;
613 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
614 switch (fmt) {
615 case SH_FSI_FMT_MONO:
616 msg = "MONO";
617 data = CR_FMT(CR_MONO);
618 fsi->chan = 1;
619 break;
620 case SH_FSI_FMT_MONO_DELAY:
621 msg = "MONO Delay";
622 data = CR_FMT(CR_MONO_D);
623 fsi->chan = 1;
624 break;
625 case SH_FSI_FMT_PCM:
626 msg = "PCM";
627 data = CR_FMT(CR_PCM);
628 fsi->chan = 2;
629 break;
630 case SH_FSI_FMT_I2S:
631 msg = "I2S";
632 data = CR_FMT(CR_I2S);
633 fsi->chan = 2;
634 break;
635 case SH_FSI_FMT_TDM:
636 msg = "TDM";
637 data = CR_FMT(CR_TDM) | (fsi->chan - 1);
638 fsi->chan = is_play ?
639 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
640 break;
641 case SH_FSI_FMT_TDM_DELAY:
642 msg = "TDM Delay";
643 data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
644 fsi->chan = is_play ?
645 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
646 break;
647 default:
648 dev_err(dai->dev, "unknown format.\n");
649 return -EINVAL;
650 }
651
652 switch (fsi->chan) {
653 case 1:
654 fsi->fifo_max = 256;
655 break;
656 case 2:
657 fsi->fifo_max = 128;
658 break;
659 case 3:
660 case 4:
661 fsi->fifo_max = 64;
662 break;
663 case 5:
664 case 6:
665 case 7:
666 case 8:
667 fsi->fifo_max = 32;
668 break;
669 default:
670 dev_err(dai->dev, "channel size error.\n");
671 return -EINVAL;
672 }
673
674 fsi_reg_write(fsi, reg, data);
675
676 /*
677 * clear clk reset if master mode
678 */
679 if (is_master)
680 fsi_clk_ctrl(fsi, 1);
681
682 /* irq setting */
683 fsi_irq_init(fsi, is_play);
684
685 return ret;
686 }
687
688 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
689 struct snd_soc_dai *dai)
690 {
691 struct fsi_priv *fsi = fsi_get_priv(substream);
692 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
693
694 fsi_irq_disable(fsi, is_play);
695 fsi_clk_ctrl(fsi, 0);
696
697 pm_runtime_put_sync(dai->dev);
698 }
699
700 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
701 struct snd_soc_dai *dai)
702 {
703 struct fsi_priv *fsi = fsi_get_priv(substream);
704 struct snd_pcm_runtime *runtime = substream->runtime;
705 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
706 int ret = 0;
707
708 switch (cmd) {
709 case SNDRV_PCM_TRIGGER_START:
710 fsi_stream_push(fsi, substream,
711 frames_to_bytes(runtime, runtime->buffer_size),
712 frames_to_bytes(runtime, runtime->period_size));
713 ret = is_play ? fsi_data_push(fsi) : fsi_data_pop(fsi);
714 break;
715 case SNDRV_PCM_TRIGGER_STOP:
716 fsi_irq_disable(fsi, is_play);
717 fsi_stream_pop(fsi);
718 break;
719 }
720
721 return ret;
722 }
723
724 static struct snd_soc_dai_ops fsi_dai_ops = {
725 .startup = fsi_dai_startup,
726 .shutdown = fsi_dai_shutdown,
727 .trigger = fsi_dai_trigger,
728 };
729
730 /************************************************************************
731
732
733 pcm ops
734
735
736 ************************************************************************/
737 static struct snd_pcm_hardware fsi_pcm_hardware = {
738 .info = SNDRV_PCM_INFO_INTERLEAVED |
739 SNDRV_PCM_INFO_MMAP |
740 SNDRV_PCM_INFO_MMAP_VALID |
741 SNDRV_PCM_INFO_PAUSE,
742 .formats = FSI_FMTS,
743 .rates = FSI_RATES,
744 .rate_min = 8000,
745 .rate_max = 192000,
746 .channels_min = 1,
747 .channels_max = 2,
748 .buffer_bytes_max = 64 * 1024,
749 .period_bytes_min = 32,
750 .period_bytes_max = 8192,
751 .periods_min = 1,
752 .periods_max = 32,
753 .fifo_size = 256,
754 };
755
756 static int fsi_pcm_open(struct snd_pcm_substream *substream)
757 {
758 struct snd_pcm_runtime *runtime = substream->runtime;
759 int ret = 0;
760
761 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
762
763 ret = snd_pcm_hw_constraint_integer(runtime,
764 SNDRV_PCM_HW_PARAM_PERIODS);
765
766 return ret;
767 }
768
769 static int fsi_hw_params(struct snd_pcm_substream *substream,
770 struct snd_pcm_hw_params *hw_params)
771 {
772 return snd_pcm_lib_malloc_pages(substream,
773 params_buffer_bytes(hw_params));
774 }
775
776 static int fsi_hw_free(struct snd_pcm_substream *substream)
777 {
778 return snd_pcm_lib_free_pages(substream);
779 }
780
781 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
782 {
783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct fsi_priv *fsi = fsi_get_priv(substream);
785 long location;
786
787 location = (fsi->byte_offset - 1);
788 if (location < 0)
789 location = 0;
790
791 return bytes_to_frames(runtime, location);
792 }
793
794 static struct snd_pcm_ops fsi_pcm_ops = {
795 .open = fsi_pcm_open,
796 .ioctl = snd_pcm_lib_ioctl,
797 .hw_params = fsi_hw_params,
798 .hw_free = fsi_hw_free,
799 .pointer = fsi_pointer,
800 };
801
802 /************************************************************************
803
804
805 snd_soc_platform
806
807
808 ************************************************************************/
809 #define PREALLOC_BUFFER (32 * 1024)
810 #define PREALLOC_BUFFER_MAX (32 * 1024)
811
812 static void fsi_pcm_free(struct snd_pcm *pcm)
813 {
814 snd_pcm_lib_preallocate_free_for_all(pcm);
815 }
816
817 static int fsi_pcm_new(struct snd_card *card,
818 struct snd_soc_dai *dai,
819 struct snd_pcm *pcm)
820 {
821 /*
822 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
823 * in MMAP mode (i.e. aplay -M)
824 */
825 return snd_pcm_lib_preallocate_pages_for_all(
826 pcm,
827 SNDRV_DMA_TYPE_CONTINUOUS,
828 snd_dma_continuous_data(GFP_KERNEL),
829 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
830 }
831
832 /************************************************************************
833
834
835 alsa struct
836
837
838 ************************************************************************/
839 struct snd_soc_dai fsi_soc_dai[] = {
840 {
841 .name = "FSIA",
842 .id = 0,
843 .playback = {
844 .rates = FSI_RATES,
845 .formats = FSI_FMTS,
846 .channels_min = 1,
847 .channels_max = 8,
848 },
849 .capture = {
850 .rates = FSI_RATES,
851 .formats = FSI_FMTS,
852 .channels_min = 1,
853 .channels_max = 8,
854 },
855 .ops = &fsi_dai_ops,
856 },
857 {
858 .name = "FSIB",
859 .id = 1,
860 .playback = {
861 .rates = FSI_RATES,
862 .formats = FSI_FMTS,
863 .channels_min = 1,
864 .channels_max = 8,
865 },
866 .capture = {
867 .rates = FSI_RATES,
868 .formats = FSI_FMTS,
869 .channels_min = 1,
870 .channels_max = 8,
871 },
872 .ops = &fsi_dai_ops,
873 },
874 };
875 EXPORT_SYMBOL_GPL(fsi_soc_dai);
876
877 struct snd_soc_platform fsi_soc_platform = {
878 .name = "fsi-pcm",
879 .pcm_ops = &fsi_pcm_ops,
880 .pcm_new = fsi_pcm_new,
881 .pcm_free = fsi_pcm_free,
882 };
883 EXPORT_SYMBOL_GPL(fsi_soc_platform);
884
885 /************************************************************************
886
887
888 platform function
889
890
891 ************************************************************************/
892 static int fsi_probe(struct platform_device *pdev)
893 {
894 struct fsi_master *master;
895 struct resource *res;
896 unsigned int irq;
897 int ret;
898
899 if (0 != pdev->id) {
900 dev_err(&pdev->dev, "current fsi support id 0 only now\n");
901 return -ENODEV;
902 }
903
904 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
905 irq = platform_get_irq(pdev, 0);
906 if (!res || (int)irq <= 0) {
907 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
908 ret = -ENODEV;
909 goto exit;
910 }
911
912 master = kzalloc(sizeof(*master), GFP_KERNEL);
913 if (!master) {
914 dev_err(&pdev->dev, "Could not allocate master\n");
915 ret = -ENOMEM;
916 goto exit;
917 }
918
919 master->base = ioremap_nocache(res->start, resource_size(res));
920 if (!master->base) {
921 ret = -ENXIO;
922 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
923 goto exit_kfree;
924 }
925
926 master->irq = irq;
927 master->info = pdev->dev.platform_data;
928 master->fsia.base = master->base;
929 master->fsia.master = master;
930 master->fsib.base = master->base + 0x40;
931 master->fsib.master = master;
932
933 pm_runtime_enable(&pdev->dev);
934 pm_runtime_resume(&pdev->dev);
935
936 fsi_soc_dai[0].dev = &pdev->dev;
937 fsi_soc_dai[0].private_data = &master->fsia;
938 fsi_soc_dai[1].dev = &pdev->dev;
939 fsi_soc_dai[1].private_data = &master->fsib;
940
941 fsi_soft_all_reset(master);
942
943 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED, "fsi", master);
944 if (ret) {
945 dev_err(&pdev->dev, "irq request err\n");
946 goto exit_iounmap;
947 }
948
949 ret = snd_soc_register_platform(&fsi_soc_platform);
950 if (ret < 0) {
951 dev_err(&pdev->dev, "cannot snd soc register\n");
952 goto exit_free_irq;
953 }
954
955 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
956
957 exit_free_irq:
958 free_irq(irq, master);
959 exit_iounmap:
960 iounmap(master->base);
961 pm_runtime_disable(&pdev->dev);
962 exit_kfree:
963 kfree(master);
964 master = NULL;
965 exit:
966 return ret;
967 }
968
969 static int fsi_remove(struct platform_device *pdev)
970 {
971 struct fsi_master *master;
972
973 master = fsi_get_master(fsi_soc_dai[0].private_data);
974
975 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
976 snd_soc_unregister_platform(&fsi_soc_platform);
977
978 pm_runtime_disable(&pdev->dev);
979
980 free_irq(master->irq, master);
981
982 iounmap(master->base);
983 kfree(master);
984
985 fsi_soc_dai[0].dev = NULL;
986 fsi_soc_dai[0].private_data = NULL;
987 fsi_soc_dai[1].dev = NULL;
988 fsi_soc_dai[1].private_data = NULL;
989
990 return 0;
991 }
992
993 static int fsi_runtime_nop(struct device *dev)
994 {
995 /* Runtime PM callback shared between ->runtime_suspend()
996 * and ->runtime_resume(). Simply returns success.
997 *
998 * This driver re-initializes all registers after
999 * pm_runtime_get_sync() anyway so there is no need
1000 * to save and restore registers here.
1001 */
1002 return 0;
1003 }
1004
1005 static struct dev_pm_ops fsi_pm_ops = {
1006 .runtime_suspend = fsi_runtime_nop,
1007 .runtime_resume = fsi_runtime_nop,
1008 };
1009
1010 static struct platform_driver fsi_driver = {
1011 .driver = {
1012 .name = "sh_fsi",
1013 .pm = &fsi_pm_ops,
1014 },
1015 .probe = fsi_probe,
1016 .remove = fsi_remove,
1017 };
1018
1019 static int __init fsi_mobile_init(void)
1020 {
1021 return platform_driver_register(&fsi_driver);
1022 }
1023
1024 static void __exit fsi_mobile_exit(void)
1025 {
1026 platform_driver_unregister(&fsi_driver);
1027 }
1028 module_init(fsi_mobile_init);
1029 module_exit(fsi_mobile_exit);
1030
1031 MODULE_LICENSE("GPL");
1032 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1033 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
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