2 * Copyright 2014 Emilio López <emilio@elopez.com.ar>
3 * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
4 * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
5 * Copyright 2015 Adam Sampson <ats@offog.org>
6 * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
8 * Based on the Allwinner SDK driver, released under the GPL.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
28 #include <linux/of_address.h>
29 #include <linux/of_device.h>
30 #include <linux/of_platform.h>
31 #include <linux/clk.h>
32 #include <linux/regmap.h>
33 #include <linux/reset.h>
34 #include <linux/gpio/consumer.h>
36 #include <sound/core.h>
37 #include <sound/pcm.h>
38 #include <sound/pcm_params.h>
39 #include <sound/soc.h>
40 #include <sound/tlv.h>
41 #include <sound/initval.h>
42 #include <sound/dmaengine_pcm.h>
44 /* Codec DAC digital controls and FIFO registers */
45 #define SUN4I_CODEC_DAC_DPC (0x00)
46 #define SUN4I_CODEC_DAC_DPC_EN_DA (31)
47 #define SUN4I_CODEC_DAC_DPC_DVOL (12)
48 #define SUN4I_CODEC_DAC_FIFOC (0x04)
49 #define SUN4I_CODEC_DAC_FIFOC_DAC_FS (29)
50 #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION (28)
51 #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT (26)
52 #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE (24)
53 #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT (21)
54 #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL (8)
55 #define SUN4I_CODEC_DAC_FIFOC_MONO_EN (6)
56 #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS (5)
57 #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN (4)
58 #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH (0)
59 #define SUN4I_CODEC_DAC_FIFOS (0x08)
60 #define SUN4I_CODEC_DAC_TXDATA (0x0c)
62 /* Codec DAC side analog signal controls */
63 #define SUN4I_CODEC_DAC_ACTL (0x10)
64 #define SUN4I_CODEC_DAC_ACTL_DACAENR (31)
65 #define SUN4I_CODEC_DAC_ACTL_DACAENL (30)
66 #define SUN4I_CODEC_DAC_ACTL_MIXEN (29)
67 #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS (15)
68 #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS (14)
69 #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS (13)
70 #define SUN4I_CODEC_DAC_ACTL_DACPAS (8)
71 #define SUN4I_CODEC_DAC_ACTL_MIXPAS (7)
72 #define SUN4I_CODEC_DAC_ACTL_PA_MUTE (6)
73 #define SUN4I_CODEC_DAC_ACTL_PA_VOL (0)
74 #define SUN4I_CODEC_DAC_TUNE (0x14)
75 #define SUN4I_CODEC_DAC_DEBUG (0x18)
77 /* Codec ADC digital controls and FIFO registers */
78 #define SUN4I_CODEC_ADC_FIFOC (0x1c)
79 #define SUN4I_CODEC_ADC_FIFOC_ADC_FS (29)
80 #define SUN4I_CODEC_ADC_FIFOC_EN_AD (28)
81 #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE (24)
82 #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL (8)
83 #define SUN4I_CODEC_ADC_FIFOC_MONO_EN (7)
84 #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS (6)
85 #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN (4)
86 #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH (0)
87 #define SUN4I_CODEC_ADC_FIFOS (0x20)
88 #define SUN4I_CODEC_ADC_RXDATA (0x24)
90 /* Codec ADC side analog signal controls */
91 #define SUN4I_CODEC_ADC_ACTL (0x28)
92 #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN (31)
93 #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN (30)
94 #define SUN4I_CODEC_ADC_ACTL_PREG1EN (29)
95 #define SUN4I_CODEC_ADC_ACTL_PREG2EN (28)
96 #define SUN4I_CODEC_ADC_ACTL_VMICEN (27)
97 #define SUN4I_CODEC_ADC_ACTL_VADCG (20)
98 #define SUN4I_CODEC_ADC_ACTL_ADCIS (17)
99 #define SUN4I_CODEC_ADC_ACTL_PA_EN (4)
100 #define SUN4I_CODEC_ADC_ACTL_DDE (3)
101 #define SUN4I_CODEC_ADC_DEBUG (0x2c)
104 #define SUN4I_CODEC_DAC_TXCNT (0x30)
105 #define SUN4I_CODEC_ADC_RXCNT (0x34)
107 /* Calibration register (sun7i only) */
108 #define SUN7I_CODEC_AC_DAC_CAL (0x38)
110 /* Microphone controls (sun7i only) */
111 #define SUN7I_CODEC_AC_MIC_PHONE_CAL (0x3c)
114 * sun6i specific registers
116 * sun6i shares the same digital control and FIFO registers as sun4i,
117 * but only the DAC digital controls are at the same offset. The others
118 * have been moved around to accommodate extra analog controls.
121 /* Codec DAC digital controls and FIFO registers */
122 #define SUN6I_CODEC_ADC_FIFOC (0x10)
123 #define SUN6I_CODEC_ADC_FIFOC_EN_AD (28)
124 #define SUN6I_CODEC_ADC_FIFOS (0x14)
125 #define SUN6I_CODEC_ADC_RXDATA (0x18)
127 /* Output mixer and gain controls */
128 #define SUN6I_CODEC_OM_DACA_CTRL (0x20)
129 #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN (31)
130 #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN (30)
131 #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN (29)
132 #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN (28)
133 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1 (23)
134 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2 (22)
135 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE (21)
136 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP (20)
137 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR (19)
138 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR (18)
139 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL (17)
140 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1 (16)
141 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2 (15)
142 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE (14)
143 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN (13)
144 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL (12)
145 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL (11)
146 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR (10)
147 #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS (9)
148 #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS (8)
149 #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE (7)
150 #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE (6)
151 #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL (0)
152 #define SUN6I_CODEC_OM_PA_CTRL (0x24)
153 #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN (31)
154 #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL (29)
155 #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN (28)
156 #define SUN6I_CODEC_OM_PA_CTRL_MIC1G (15)
157 #define SUN6I_CODEC_OM_PA_CTRL_MIC2G (12)
158 #define SUN6I_CODEC_OM_PA_CTRL_LINEING (9)
159 #define SUN6I_CODEC_OM_PA_CTRL_PHONEG (6)
160 #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG (3)
161 #define SUN6I_CODEC_OM_PA_CTRL_PHONENG (0)
163 /* Microphone, line out and phone out controls */
164 #define SUN6I_CODEC_MIC_CTRL (0x28)
165 #define SUN6I_CODEC_MIC_CTRL_HBIASEN (31)
166 #define SUN6I_CODEC_MIC_CTRL_MBIASEN (30)
167 #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN (28)
168 #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST (25)
169 #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN (24)
170 #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST (21)
171 #define SUN6I_CODEC_MIC_CTRL_MIC2SLT (20)
172 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN (19)
173 #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN (18)
174 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC (17)
175 #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC (16)
176 #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC (11)
177 #define SUN6I_CODEC_MIC_CTRL_PHONEPREG (8)
179 /* ADC mixer controls */
180 #define SUN6I_CODEC_ADC_ACTL (0x2c)
181 #define SUN6I_CODEC_ADC_ACTL_ADCREN (31)
182 #define SUN6I_CODEC_ADC_ACTL_ADCLEN (30)
183 #define SUN6I_CODEC_ADC_ACTL_ADCRG (27)
184 #define SUN6I_CODEC_ADC_ACTL_ADCLG (24)
185 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1 (13)
186 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2 (12)
187 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE (11)
188 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP (10)
189 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR (9)
190 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR (8)
191 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL (7)
192 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1 (6)
193 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2 (5)
194 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE (4)
195 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN (3)
196 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL (2)
197 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL (1)
198 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR (0)
200 /* Analog performance tuning controls */
201 #define SUN6I_CODEC_ADDA_TUNE (0x30)
203 /* Calibration controls */
204 #define SUN6I_CODEC_CALIBRATION (0x34)
207 #define SUN6I_CODEC_DAC_TXCNT (0x40)
208 #define SUN6I_CODEC_ADC_RXCNT (0x44)
210 /* headset jack detection and button support registers */
211 #define SUN6I_CODEC_HMIC_CTL (0x50)
212 #define SUN6I_CODEC_HMIC_DATA (0x54)
214 /* TODO sun6i DAP (Digital Audio Processing) bits */
216 /* FIFO counters moved on A23 */
217 #define SUN8I_A23_CODEC_DAC_TXCNT (0x1c)
218 #define SUN8I_A23_CODEC_ADC_RXCNT (0x20)
220 /* TX FIFO moved on H3 */
221 #define SUN8I_H3_CODEC_DAC_TXDATA (0x20)
222 #define SUN8I_H3_CODEC_DAC_DBG (0x48)
223 #define SUN8I_H3_CODEC_ADC_DBG (0x4c)
225 /* TODO H3 DAP (Digital Audio Processing) bits */
229 struct regmap
*regmap
;
231 struct clk
*clk_module
;
232 struct reset_control
*rst
;
233 struct gpio_desc
*gpio_pa
;
235 /* ADC_FIFOC register is at different offset on different SoCs */
236 struct regmap_field
*reg_adc_fifoc
;
238 struct snd_dmaengine_dai_dma_data capture_dma_data
;
239 struct snd_dmaengine_dai_dma_data playback_dma_data
;
242 static void sun4i_codec_start_playback(struct sun4i_codec
*scodec
)
245 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
246 BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH
),
247 BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH
));
250 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
251 BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN
),
252 BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN
));
255 static void sun4i_codec_stop_playback(struct sun4i_codec
*scodec
)
257 /* Disable DAC DRQ */
258 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
259 BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN
),
263 static void sun4i_codec_start_capture(struct sun4i_codec
*scodec
)
266 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
267 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN
),
268 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN
));
271 static void sun4i_codec_stop_capture(struct sun4i_codec
*scodec
)
273 /* Disable ADC DRQ */
274 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
275 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN
), 0);
278 static int sun4i_codec_trigger(struct snd_pcm_substream
*substream
, int cmd
,
279 struct snd_soc_dai
*dai
)
281 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
282 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
285 case SNDRV_PCM_TRIGGER_START
:
286 case SNDRV_PCM_TRIGGER_RESUME
:
287 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
288 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
289 sun4i_codec_start_playback(scodec
);
291 sun4i_codec_start_capture(scodec
);
294 case SNDRV_PCM_TRIGGER_STOP
:
295 case SNDRV_PCM_TRIGGER_SUSPEND
:
296 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
297 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
298 sun4i_codec_stop_playback(scodec
);
300 sun4i_codec_stop_capture(scodec
);
310 static int sun4i_codec_prepare_capture(struct snd_pcm_substream
*substream
,
311 struct snd_soc_dai
*dai
)
313 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
314 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
318 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
319 BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH
),
320 BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH
));
323 /* Set RX FIFO trigger level */
324 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
325 0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL
,
326 0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL
);
329 * FIXME: Undocumented in the datasheet, but
330 * Allwinner's code mentions that it is related
331 * related to microphone gain
333 if (of_device_is_compatible(scodec
->dev
->of_node
,
334 "allwinner,sun4i-a10-codec") ||
335 of_device_is_compatible(scodec
->dev
->of_node
,
336 "allwinner,sun7i-a20-codec")) {
337 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_ADC_ACTL
,
342 if (of_device_is_compatible(scodec
->dev
->of_node
,
343 "allwinner,sun7i-a20-codec"))
344 /* FIXME: Undocumented bits */
345 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_TUNE
,
349 /* Fill most significant bits with valid data MSB */
350 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
351 BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE
),
352 BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE
));
357 static int sun4i_codec_prepare_playback(struct snd_pcm_substream
*substream
,
358 struct snd_soc_dai
*dai
)
360 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
361 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
364 /* Flush the TX FIFO */
365 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
366 BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH
),
367 BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH
));
369 /* Set TX FIFO Empty Trigger Level */
370 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
371 0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL
,
372 0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL
);
374 if (substream
->runtime
->rate
> 32000)
375 /* Use 64 bits FIR filter */
378 /* Use 32 bits FIR filter */
379 val
= BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION
);
381 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
382 BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION
),
385 /* Send zeros when we have an underrun */
386 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
387 BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT
),
393 static int sun4i_codec_prepare(struct snd_pcm_substream
*substream
,
394 struct snd_soc_dai
*dai
)
396 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
397 return sun4i_codec_prepare_playback(substream
, dai
);
399 return sun4i_codec_prepare_capture(substream
, dai
);
402 static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params
*params
)
404 unsigned int rate
= params_rate(params
);
432 static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params
*params
)
434 unsigned int rate
= params_rate(params
);
474 static int sun4i_codec_hw_params_capture(struct sun4i_codec
*scodec
,
475 struct snd_pcm_hw_params
*params
,
478 /* Set ADC sample rate */
479 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
480 7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS
,
481 hwrate
<< SUN4I_CODEC_ADC_FIFOC_ADC_FS
);
483 /* Set the number of channels we want to use */
484 if (params_channels(params
) == 1)
485 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
486 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN
),
487 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN
));
489 regmap_field_update_bits(scodec
->reg_adc_fifoc
,
490 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN
),
496 static int sun4i_codec_hw_params_playback(struct sun4i_codec
*scodec
,
497 struct snd_pcm_hw_params
*params
,
502 /* Set DAC sample rate */
503 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
504 7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS
,
505 hwrate
<< SUN4I_CODEC_DAC_FIFOC_DAC_FS
);
507 /* Set the number of channels we want to use */
508 if (params_channels(params
) == 1)
509 val
= BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN
);
513 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
514 BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN
),
517 /* Set the number of sample bits to either 16 or 24 bits */
518 if (hw_param_interval(params
, SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
== 32) {
519 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
520 BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS
),
521 BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS
));
523 /* Set TX FIFO mode to padding the LSBs with 0 */
524 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
525 BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE
),
528 scodec
->playback_dma_data
.addr_width
= DMA_SLAVE_BUSWIDTH_4_BYTES
;
530 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
531 BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS
),
534 /* Set TX FIFO mode to repeat the MSB */
535 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
536 BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE
),
537 BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE
));
539 scodec
->playback_dma_data
.addr_width
= DMA_SLAVE_BUSWIDTH_2_BYTES
;
545 static int sun4i_codec_hw_params(struct snd_pcm_substream
*substream
,
546 struct snd_pcm_hw_params
*params
,
547 struct snd_soc_dai
*dai
)
549 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
550 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
551 unsigned long clk_freq
;
554 clk_freq
= sun4i_codec_get_mod_freq(params
);
558 ret
= clk_set_rate(scodec
->clk_module
, clk_freq
);
562 hwrate
= sun4i_codec_get_hw_rate(params
);
566 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
567 return sun4i_codec_hw_params_playback(scodec
, params
,
570 return sun4i_codec_hw_params_capture(scodec
, params
,
574 static int sun4i_codec_startup(struct snd_pcm_substream
*substream
,
575 struct snd_soc_dai
*dai
)
577 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
578 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
581 * Stop issuing DRQ when we have room for less than 16 samples
584 regmap_update_bits(scodec
->regmap
, SUN4I_CODEC_DAC_FIFOC
,
585 3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT
,
586 3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT
);
588 return clk_prepare_enable(scodec
->clk_module
);
591 static void sun4i_codec_shutdown(struct snd_pcm_substream
*substream
,
592 struct snd_soc_dai
*dai
)
594 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
595 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(rtd
->card
);
597 clk_disable_unprepare(scodec
->clk_module
);
600 static const struct snd_soc_dai_ops sun4i_codec_dai_ops
= {
601 .startup
= sun4i_codec_startup
,
602 .shutdown
= sun4i_codec_shutdown
,
603 .trigger
= sun4i_codec_trigger
,
604 .hw_params
= sun4i_codec_hw_params
,
605 .prepare
= sun4i_codec_prepare
,
608 static struct snd_soc_dai_driver sun4i_codec_dai
= {
610 .ops
= &sun4i_codec_dai_ops
,
612 .stream_name
= "Codec Playback",
617 .rates
= SNDRV_PCM_RATE_8000_48000
|
618 SNDRV_PCM_RATE_96000
|
619 SNDRV_PCM_RATE_192000
,
620 .formats
= SNDRV_PCM_FMTBIT_S16_LE
|
621 SNDRV_PCM_FMTBIT_S32_LE
,
625 .stream_name
= "Codec Capture",
630 .rates
= SNDRV_PCM_RATE_8000_48000
|
631 SNDRV_PCM_RATE_96000
|
632 SNDRV_PCM_RATE_192000
|
634 .formats
= SNDRV_PCM_FMTBIT_S16_LE
|
635 SNDRV_PCM_FMTBIT_S32_LE
,
640 /*** sun4i Codec ***/
641 static const struct snd_kcontrol_new sun4i_codec_pa_mute
=
642 SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL
,
643 SUN4I_CODEC_DAC_ACTL_PA_MUTE
, 1, 0);
645 static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale
, -6300, 100, 1);
647 static const struct snd_kcontrol_new sun4i_codec_controls
[] = {
648 SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL
,
649 SUN4I_CODEC_DAC_ACTL_PA_VOL
, 0x3F, 0,
650 sun4i_codec_pa_volume_scale
),
653 static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls
[] = {
654 SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL
,
655 SUN4I_CODEC_DAC_ACTL_LDACLMIXS
, 1, 0),
658 static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls
[] = {
659 SOC_DAPM_SINGLE("Right DAC Playback Switch", SUN4I_CODEC_DAC_ACTL
,
660 SUN4I_CODEC_DAC_ACTL_RDACRMIXS
, 1, 0),
661 SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL
,
662 SUN4I_CODEC_DAC_ACTL_LDACRMIXS
, 1, 0),
665 static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls
[] = {
666 SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL
,
667 SUN4I_CODEC_DAC_ACTL_DACPAS
, 1, 0),
668 SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL
,
669 SUN4I_CODEC_DAC_ACTL_MIXPAS
, 1, 0),
672 static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets
[] = {
673 /* Digital parts of the ADCs */
674 SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC
,
675 SUN4I_CODEC_ADC_FIFOC_EN_AD
, 0,
678 /* Digital parts of the DACs */
679 SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC
,
680 SUN4I_CODEC_DAC_DPC_EN_DA
, 0,
683 /* Analog parts of the ADCs */
684 SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL
,
685 SUN4I_CODEC_ADC_ACTL_ADC_L_EN
, 0),
686 SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL
,
687 SUN4I_CODEC_ADC_ACTL_ADC_R_EN
, 0),
689 /* Analog parts of the DACs */
690 SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL
,
691 SUN4I_CODEC_DAC_ACTL_DACAENL
, 0),
692 SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL
,
693 SUN4I_CODEC_DAC_ACTL_DACAENR
, 0),
696 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM
, 0, 0,
697 sun4i_codec_left_mixer_controls
,
698 ARRAY_SIZE(sun4i_codec_left_mixer_controls
)),
699 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM
, 0, 0,
700 sun4i_codec_right_mixer_controls
,
701 ARRAY_SIZE(sun4i_codec_right_mixer_controls
)),
703 /* Global Mixer Enable */
704 SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL
,
705 SUN4I_CODEC_DAC_ACTL_MIXEN
, 0, NULL
, 0),
708 SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL
,
709 SUN4I_CODEC_ADC_ACTL_VMICEN
, 0, NULL
, 0),
711 /* Mic Pre-Amplifiers */
712 SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL
,
713 SUN4I_CODEC_ADC_ACTL_PREG1EN
, 0, NULL
, 0),
715 /* Power Amplifier */
716 SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL
,
717 SUN4I_CODEC_ADC_ACTL_PA_EN
, 0,
718 sun4i_codec_pa_mixer_controls
,
719 ARRAY_SIZE(sun4i_codec_pa_mixer_controls
)),
720 SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM
, 0, 0,
721 &sun4i_codec_pa_mute
),
723 SND_SOC_DAPM_INPUT("Mic1"),
725 SND_SOC_DAPM_OUTPUT("HP Right"),
726 SND_SOC_DAPM_OUTPUT("HP Left"),
729 static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes
[] = {
730 /* Left ADC / DAC Routes */
731 { "Left ADC", NULL
, "ADC" },
732 { "Left DAC", NULL
, "DAC" },
734 /* Right ADC / DAC Routes */
735 { "Right ADC", NULL
, "ADC" },
736 { "Right DAC", NULL
, "DAC" },
738 /* Right Mixer Routes */
739 { "Right Mixer", NULL
, "Mixer Enable" },
740 { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
741 { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
743 /* Left Mixer Routes */
744 { "Left Mixer", NULL
, "Mixer Enable" },
745 { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
747 /* Power Amplifier Routes */
748 { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
749 { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
750 { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
751 { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
753 /* Headphone Output Routes */
754 { "Power Amplifier Mute", "Switch", "Power Amplifier" },
755 { "HP Right", NULL
, "Power Amplifier Mute" },
756 { "HP Left", NULL
, "Power Amplifier Mute" },
759 { "Left ADC", NULL
, "MIC1 Pre-Amplifier" },
760 { "Right ADC", NULL
, "MIC1 Pre-Amplifier" },
761 { "MIC1 Pre-Amplifier", NULL
, "Mic1"},
762 { "Mic1", NULL
, "VMIC" },
765 static struct snd_soc_codec_driver sun4i_codec_codec
= {
766 .component_driver
= {
767 .controls
= sun4i_codec_controls
,
768 .num_controls
= ARRAY_SIZE(sun4i_codec_controls
),
769 .dapm_widgets
= sun4i_codec_codec_dapm_widgets
,
770 .num_dapm_widgets
= ARRAY_SIZE(sun4i_codec_codec_dapm_widgets
),
771 .dapm_routes
= sun4i_codec_codec_dapm_routes
,
772 .num_dapm_routes
= ARRAY_SIZE(sun4i_codec_codec_dapm_routes
),
776 /*** sun6i Codec ***/
779 static const struct snd_kcontrol_new sun6i_codec_mixer_controls
[] = {
780 SOC_DAPM_DOUBLE("DAC Playback Switch",
781 SUN6I_CODEC_OM_DACA_CTRL
,
782 SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL
,
783 SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR
, 1, 0),
784 SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
785 SUN6I_CODEC_OM_DACA_CTRL
,
786 SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR
,
787 SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL
, 1, 0),
788 SOC_DAPM_DOUBLE("Line In Playback Switch",
789 SUN6I_CODEC_OM_DACA_CTRL
,
790 SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL
,
791 SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR
, 1, 0),
792 SOC_DAPM_DOUBLE("Mic1 Playback Switch",
793 SUN6I_CODEC_OM_DACA_CTRL
,
794 SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1
,
795 SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1
, 1, 0),
796 SOC_DAPM_DOUBLE("Mic2 Playback Switch",
797 SUN6I_CODEC_OM_DACA_CTRL
,
798 SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2
,
799 SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2
, 1, 0),
802 /* ADC mixer controls */
803 static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls
[] = {
804 SOC_DAPM_DOUBLE("Mixer Capture Switch",
805 SUN6I_CODEC_ADC_ACTL
,
806 SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL
,
807 SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR
, 1, 0),
808 SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
809 SUN6I_CODEC_ADC_ACTL
,
810 SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR
,
811 SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL
, 1, 0),
812 SOC_DAPM_DOUBLE("Line In Capture Switch",
813 SUN6I_CODEC_ADC_ACTL
,
814 SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL
,
815 SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR
, 1, 0),
816 SOC_DAPM_DOUBLE("Mic1 Capture Switch",
817 SUN6I_CODEC_ADC_ACTL
,
818 SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1
,
819 SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1
, 1, 0),
820 SOC_DAPM_DOUBLE("Mic2 Capture Switch",
821 SUN6I_CODEC_ADC_ACTL
,
822 SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2
,
823 SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2
, 1, 0),
826 /* headphone controls */
827 static const char * const sun6i_codec_hp_src_enum_text
[] = {
831 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum
,
832 SUN6I_CODEC_OM_DACA_CTRL
,
833 SUN6I_CODEC_OM_DACA_CTRL_LHPIS
,
834 SUN6I_CODEC_OM_DACA_CTRL_RHPIS
,
835 sun6i_codec_hp_src_enum_text
);
837 static const struct snd_kcontrol_new sun6i_codec_hp_src
[] = {
838 SOC_DAPM_ENUM("Headphone Source Playback Route",
839 sun6i_codec_hp_src_enum
),
842 /* microphone controls */
843 static const char * const sun6i_codec_mic2_src_enum_text
[] = {
847 static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum
,
848 SUN6I_CODEC_MIC_CTRL
,
849 SUN6I_CODEC_MIC_CTRL_MIC2SLT
,
850 sun6i_codec_mic2_src_enum_text
);
852 static const struct snd_kcontrol_new sun6i_codec_mic2_src
[] = {
853 SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
854 sun6i_codec_mic2_src_enum
),
857 /* line out controls */
858 static const char * const sun6i_codec_lineout_src_enum_text
[] = {
859 "Stereo", "Mono Differential",
862 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum
,
863 SUN6I_CODEC_MIC_CTRL
,
864 SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC
,
865 SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC
,
866 sun6i_codec_lineout_src_enum_text
);
868 static const struct snd_kcontrol_new sun6i_codec_lineout_src
[] = {
869 SOC_DAPM_ENUM("Line Out Source Playback Route",
870 sun6i_codec_lineout_src_enum
),
873 /* volume / mute controls */
874 static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale
, -7308, 116, 0);
875 static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale
, -6300, 100, 1);
876 static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale
,
878 static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale
,
879 0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE
, 0, 1),
880 2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
882 static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale
,
883 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
884 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
887 static const struct snd_kcontrol_new sun6i_codec_codec_widgets
[] = {
888 SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC
,
889 SUN4I_CODEC_DAC_DPC_DVOL
, 0x3f, 1,
890 sun6i_codec_dvol_scale
),
891 SOC_SINGLE_TLV("Headphone Playback Volume",
892 SUN6I_CODEC_OM_DACA_CTRL
,
893 SUN6I_CODEC_OM_DACA_CTRL_HPVOL
, 0x3f, 0,
894 sun6i_codec_hp_vol_scale
),
895 SOC_SINGLE_TLV("Line Out Playback Volume",
896 SUN6I_CODEC_MIC_CTRL
,
897 SUN6I_CODEC_MIC_CTRL_LINEOUTVC
, 0x1f, 0,
898 sun6i_codec_lineout_vol_scale
),
899 SOC_DOUBLE("Headphone Playback Switch",
900 SUN6I_CODEC_OM_DACA_CTRL
,
901 SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE
,
902 SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE
, 1, 0),
903 SOC_DOUBLE("Line Out Playback Switch",
904 SUN6I_CODEC_MIC_CTRL
,
905 SUN6I_CODEC_MIC_CTRL_LINEOUTLEN
,
906 SUN6I_CODEC_MIC_CTRL_LINEOUTREN
, 1, 0),
907 /* Mixer pre-gains */
908 SOC_SINGLE_TLV("Line In Playback Volume",
909 SUN6I_CODEC_OM_PA_CTRL
, SUN6I_CODEC_OM_PA_CTRL_LINEING
,
910 0x7, 0, sun6i_codec_out_mixer_pregain_scale
),
911 SOC_SINGLE_TLV("Mic1 Playback Volume",
912 SUN6I_CODEC_OM_PA_CTRL
, SUN6I_CODEC_OM_PA_CTRL_MIC1G
,
913 0x7, 0, sun6i_codec_out_mixer_pregain_scale
),
914 SOC_SINGLE_TLV("Mic2 Playback Volume",
915 SUN6I_CODEC_OM_PA_CTRL
, SUN6I_CODEC_OM_PA_CTRL_MIC2G
,
916 0x7, 0, sun6i_codec_out_mixer_pregain_scale
),
918 /* Microphone Amp boost gains */
919 SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL
,
920 SUN6I_CODEC_MIC_CTRL_MIC1BOOST
, 0x7, 0,
921 sun6i_codec_mic_gain_scale
),
922 SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL
,
923 SUN6I_CODEC_MIC_CTRL_MIC2BOOST
, 0x7, 0,
924 sun6i_codec_mic_gain_scale
),
925 SOC_DOUBLE_TLV("ADC Capture Volume",
926 SUN6I_CODEC_ADC_ACTL
, SUN6I_CODEC_ADC_ACTL_ADCLG
,
927 SUN6I_CODEC_ADC_ACTL_ADCRG
, 0x7, 0,
928 sun6i_codec_out_mixer_pregain_scale
),
931 static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets
[] = {
932 /* Microphone inputs */
933 SND_SOC_DAPM_INPUT("MIC1"),
934 SND_SOC_DAPM_INPUT("MIC2"),
935 SND_SOC_DAPM_INPUT("MIC3"),
937 /* Microphone Bias */
938 SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL
,
939 SUN6I_CODEC_MIC_CTRL_HBIASEN
, 0, NULL
, 0),
940 SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL
,
941 SUN6I_CODEC_MIC_CTRL_MBIASEN
, 0, NULL
, 0),
944 SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
945 SND_SOC_NOPM
, 0, 0, sun6i_codec_mic2_src
),
946 SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL
,
947 SUN6I_CODEC_MIC_CTRL_MIC1AMPEN
, 0, NULL
, 0),
948 SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL
,
949 SUN6I_CODEC_MIC_CTRL_MIC2AMPEN
, 0, NULL
, 0),
952 SND_SOC_DAPM_INPUT("LINEIN"),
954 /* Digital parts of the ADCs */
955 SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC
,
956 SUN6I_CODEC_ADC_FIFOC_EN_AD
, 0,
959 /* Analog parts of the ADCs */
960 SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL
,
961 SUN6I_CODEC_ADC_ACTL_ADCLEN
, 0),
962 SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL
,
963 SUN6I_CODEC_ADC_ACTL_ADCREN
, 0),
966 SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM
, 0, 0,
967 sun6i_codec_adc_mixer_controls
),
968 SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM
, 0, 0,
969 sun6i_codec_adc_mixer_controls
),
971 /* Digital parts of the DACs */
972 SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC
,
973 SUN4I_CODEC_DAC_DPC_EN_DA
, 0,
976 /* Analog parts of the DACs */
977 SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
978 SUN6I_CODEC_OM_DACA_CTRL
,
979 SUN6I_CODEC_OM_DACA_CTRL_DACALEN
, 0),
980 SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
981 SUN6I_CODEC_OM_DACA_CTRL
,
982 SUN6I_CODEC_OM_DACA_CTRL_DACAREN
, 0),
985 SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL
,
986 SUN6I_CODEC_OM_DACA_CTRL_LMIXEN
, 0,
987 sun6i_codec_mixer_controls
),
988 SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL
,
989 SUN6I_CODEC_OM_DACA_CTRL_RMIXEN
, 0,
990 sun6i_codec_mixer_controls
),
992 /* Headphone output path */
993 SND_SOC_DAPM_MUX("Headphone Source Playback Route",
994 SND_SOC_NOPM
, 0, 0, sun6i_codec_hp_src
),
995 SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL
,
996 SUN6I_CODEC_OM_PA_CTRL_HPPAEN
, 0, NULL
, 0),
997 SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL
,
998 SUN6I_CODEC_OM_PA_CTRL_COMPTEN
, 0, NULL
, 0),
999 SND_SOC_DAPM_REG(snd_soc_dapm_supply
, "HPCOM", SUN6I_CODEC_OM_PA_CTRL
,
1000 SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL
, 0x3, 0x3, 0),
1001 SND_SOC_DAPM_OUTPUT("HP"),
1004 SND_SOC_DAPM_MUX("Line Out Source Playback Route",
1005 SND_SOC_NOPM
, 0, 0, sun6i_codec_lineout_src
),
1006 SND_SOC_DAPM_OUTPUT("LINEOUT"),
1009 static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes
[] = {
1011 { "Left DAC", NULL
, "DAC Enable" },
1012 { "Right DAC", NULL
, "DAC Enable" },
1014 /* Microphone Routes */
1015 { "Mic1 Amplifier", NULL
, "MIC1"},
1016 { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
1017 { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
1018 { "Mic2 Amplifier", NULL
, "Mic2 Amplifier Source Route"},
1020 /* Left Mixer Routes */
1021 { "Left Mixer", "DAC Playback Switch", "Left DAC" },
1022 { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
1023 { "Left Mixer", "Line In Playback Switch", "LINEIN" },
1024 { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1025 { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1027 /* Right Mixer Routes */
1028 { "Right Mixer", "DAC Playback Switch", "Right DAC" },
1029 { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
1030 { "Right Mixer", "Line In Playback Switch", "LINEIN" },
1031 { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1032 { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1034 /* Left ADC Mixer Routes */
1035 { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
1036 { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
1037 { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
1038 { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1039 { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1041 /* Right ADC Mixer Routes */
1042 { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
1043 { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
1044 { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
1045 { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1046 { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1048 /* Headphone Routes */
1049 { "Headphone Source Playback Route", "DAC", "Left DAC" },
1050 { "Headphone Source Playback Route", "DAC", "Right DAC" },
1051 { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
1052 { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
1053 { "Headphone Amp", NULL
, "Headphone Source Playback Route" },
1054 { "HP", NULL
, "Headphone Amp" },
1055 { "HPCOM", NULL
, "HPCOM Protection" },
1057 /* Line Out Routes */
1058 { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
1059 { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
1060 { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
1061 { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
1062 { "LINEOUT", NULL
, "Line Out Source Playback Route" },
1065 { "Left ADC", NULL
, "ADC Enable" },
1066 { "Right ADC", NULL
, "ADC Enable" },
1067 { "Left ADC", NULL
, "Left ADC Mixer" },
1068 { "Right ADC", NULL
, "Right ADC Mixer" },
1071 static struct snd_soc_codec_driver sun6i_codec_codec
= {
1072 .component_driver
= {
1073 .controls
= sun6i_codec_codec_widgets
,
1074 .num_controls
= ARRAY_SIZE(sun6i_codec_codec_widgets
),
1075 .dapm_widgets
= sun6i_codec_codec_dapm_widgets
,
1076 .num_dapm_widgets
= ARRAY_SIZE(sun6i_codec_codec_dapm_widgets
),
1077 .dapm_routes
= sun6i_codec_codec_dapm_routes
,
1078 .num_dapm_routes
= ARRAY_SIZE(sun6i_codec_codec_dapm_routes
),
1082 /* sun8i A23 codec */
1083 static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls
[] = {
1084 SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC
,
1085 SUN4I_CODEC_DAC_DPC_DVOL
, 0x3f, 1,
1086 sun6i_codec_dvol_scale
),
1089 static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets
[] = {
1090 /* Digital parts of the ADCs */
1091 SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC
,
1092 SUN6I_CODEC_ADC_FIFOC_EN_AD
, 0, NULL
, 0),
1093 /* Digital parts of the DACs */
1094 SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC
,
1095 SUN4I_CODEC_DAC_DPC_EN_DA
, 0, NULL
, 0),
1099 static struct snd_soc_codec_driver sun8i_a23_codec_codec
= {
1100 .component_driver
= {
1101 .controls
= sun8i_a23_codec_codec_controls
,
1102 .num_controls
= ARRAY_SIZE(sun8i_a23_codec_codec_controls
),
1103 .dapm_widgets
= sun8i_a23_codec_codec_widgets
,
1104 .num_dapm_widgets
= ARRAY_SIZE(sun8i_a23_codec_codec_widgets
),
1108 static const struct snd_soc_component_driver sun4i_codec_component
= {
1109 .name
= "sun4i-codec",
1112 #define SUN4I_CODEC_RATES SNDRV_PCM_RATE_8000_192000
1113 #define SUN4I_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
1114 SNDRV_PCM_FMTBIT_S32_LE)
1116 static int sun4i_codec_dai_probe(struct snd_soc_dai
*dai
)
1118 struct snd_soc_card
*card
= snd_soc_dai_get_drvdata(dai
);
1119 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(card
);
1121 snd_soc_dai_init_dma_data(dai
, &scodec
->playback_dma_data
,
1122 &scodec
->capture_dma_data
);
1127 static struct snd_soc_dai_driver dummy_cpu_dai
= {
1128 .name
= "sun4i-codec-cpu-dai",
1129 .probe
= sun4i_codec_dai_probe
,
1131 .stream_name
= "Playback",
1134 .rates
= SUN4I_CODEC_RATES
,
1135 .formats
= SUN4I_CODEC_FORMATS
,
1139 .stream_name
= "Capture",
1142 .rates
= SUN4I_CODEC_RATES
,
1143 .formats
= SUN4I_CODEC_FORMATS
,
1148 static struct snd_soc_dai_link
*sun4i_codec_create_link(struct device
*dev
,
1151 struct snd_soc_dai_link
*link
= devm_kzalloc(dev
, sizeof(*link
),
1157 link
->stream_name
= "CDC PCM";
1158 link
->codec_dai_name
= "Codec";
1159 link
->cpu_dai_name
= dev_name(dev
);
1160 link
->codec_name
= dev_name(dev
);
1161 link
->platform_name
= dev_name(dev
);
1162 link
->dai_fmt
= SND_SOC_DAIFMT_I2S
;
1169 static int sun4i_codec_spk_event(struct snd_soc_dapm_widget
*w
,
1170 struct snd_kcontrol
*k
, int event
)
1172 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(w
->dapm
->card
);
1174 if (scodec
->gpio_pa
)
1175 gpiod_set_value_cansleep(scodec
->gpio_pa
,
1176 !!SND_SOC_DAPM_EVENT_ON(event
));
1181 static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets
[] = {
1182 SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event
),
1185 static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes
[] = {
1186 { "Speaker", NULL
, "HP Right" },
1187 { "Speaker", NULL
, "HP Left" },
1190 static struct snd_soc_card
*sun4i_codec_create_card(struct device
*dev
)
1192 struct snd_soc_card
*card
;
1194 card
= devm_kzalloc(dev
, sizeof(*card
), GFP_KERNEL
);
1196 return ERR_PTR(-ENOMEM
);
1198 card
->dai_link
= sun4i_codec_create_link(dev
, &card
->num_links
);
1199 if (!card
->dai_link
)
1200 return ERR_PTR(-ENOMEM
);
1203 card
->name
= "sun4i-codec";
1204 card
->dapm_widgets
= sun4i_codec_card_dapm_widgets
;
1205 card
->num_dapm_widgets
= ARRAY_SIZE(sun4i_codec_card_dapm_widgets
);
1206 card
->dapm_routes
= sun4i_codec_card_dapm_routes
;
1207 card
->num_dapm_routes
= ARRAY_SIZE(sun4i_codec_card_dapm_routes
);
1212 static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets
[] = {
1213 SND_SOC_DAPM_HP("Headphone", NULL
),
1214 SND_SOC_DAPM_LINE("Line In", NULL
),
1215 SND_SOC_DAPM_LINE("Line Out", NULL
),
1216 SND_SOC_DAPM_MIC("Headset Mic", NULL
),
1217 SND_SOC_DAPM_MIC("Mic", NULL
),
1218 SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event
),
1221 static struct snd_soc_card
*sun6i_codec_create_card(struct device
*dev
)
1223 struct snd_soc_card
*card
;
1226 card
= devm_kzalloc(dev
, sizeof(*card
), GFP_KERNEL
);
1228 return ERR_PTR(-ENOMEM
);
1230 card
->dai_link
= sun4i_codec_create_link(dev
, &card
->num_links
);
1231 if (!card
->dai_link
)
1232 return ERR_PTR(-ENOMEM
);
1235 card
->name
= "A31 Audio Codec";
1236 card
->dapm_widgets
= sun6i_codec_card_dapm_widgets
;
1237 card
->num_dapm_widgets
= ARRAY_SIZE(sun6i_codec_card_dapm_widgets
);
1238 card
->fully_routed
= true;
1240 ret
= snd_soc_of_parse_audio_routing(card
, "allwinner,audio-routing");
1242 dev_warn(dev
, "failed to parse audio-routing: %d\n", ret
);
1247 /* Connect digital side enables to analog side widgets */
1248 static const struct snd_soc_dapm_route sun8i_codec_card_routes
[] = {
1250 { "Left ADC", NULL
, "ADC Enable" },
1251 { "Right ADC", NULL
, "ADC Enable" },
1252 { "Codec Capture", NULL
, "Left ADC" },
1253 { "Codec Capture", NULL
, "Right ADC" },
1256 { "Left DAC", NULL
, "DAC Enable" },
1257 { "Right DAC", NULL
, "DAC Enable" },
1258 { "Left DAC", NULL
, "Codec Playback" },
1259 { "Right DAC", NULL
, "Codec Playback" },
1262 static struct snd_soc_aux_dev aux_dev
= {
1263 .name
= "Codec Analog Controls",
1266 static struct snd_soc_card
*sun8i_a23_codec_create_card(struct device
*dev
)
1268 struct snd_soc_card
*card
;
1271 card
= devm_kzalloc(dev
, sizeof(*card
), GFP_KERNEL
);
1273 return ERR_PTR(-ENOMEM
);
1275 aux_dev
.codec_of_node
= of_parse_phandle(dev
->of_node
,
1276 "allwinner,codec-analog-controls",
1278 if (!aux_dev
.codec_of_node
) {
1279 dev_err(dev
, "Can't find analog controls for codec.\n");
1280 return ERR_PTR(-EINVAL
);
1283 card
->dai_link
= sun4i_codec_create_link(dev
, &card
->num_links
);
1284 if (!card
->dai_link
)
1285 return ERR_PTR(-ENOMEM
);
1288 card
->name
= "A23 Audio Codec";
1289 card
->dapm_widgets
= sun6i_codec_card_dapm_widgets
;
1290 card
->num_dapm_widgets
= ARRAY_SIZE(sun6i_codec_card_dapm_widgets
);
1291 card
->dapm_routes
= sun8i_codec_card_routes
;
1292 card
->num_dapm_routes
= ARRAY_SIZE(sun8i_codec_card_routes
);
1293 card
->aux_dev
= &aux_dev
;
1294 card
->num_aux_devs
= 1;
1295 card
->fully_routed
= true;
1297 ret
= snd_soc_of_parse_audio_routing(card
, "allwinner,audio-routing");
1299 dev_warn(dev
, "failed to parse audio-routing: %d\n", ret
);
1304 static struct snd_soc_card
*sun8i_h3_codec_create_card(struct device
*dev
)
1306 struct snd_soc_card
*card
;
1309 card
= devm_kzalloc(dev
, sizeof(*card
), GFP_KERNEL
);
1311 return ERR_PTR(-ENOMEM
);
1313 aux_dev
.codec_of_node
= of_parse_phandle(dev
->of_node
,
1314 "allwinner,codec-analog-controls",
1316 if (!aux_dev
.codec_of_node
) {
1317 dev_err(dev
, "Can't find analog controls for codec.\n");
1318 return ERR_PTR(-EINVAL
);
1321 card
->dai_link
= sun4i_codec_create_link(dev
, &card
->num_links
);
1322 if (!card
->dai_link
)
1323 return ERR_PTR(-ENOMEM
);
1326 card
->name
= "H3 Audio Codec";
1327 card
->dapm_widgets
= sun6i_codec_card_dapm_widgets
;
1328 card
->num_dapm_widgets
= ARRAY_SIZE(sun6i_codec_card_dapm_widgets
);
1329 card
->dapm_routes
= sun8i_codec_card_routes
;
1330 card
->num_dapm_routes
= ARRAY_SIZE(sun8i_codec_card_routes
);
1331 card
->aux_dev
= &aux_dev
;
1332 card
->num_aux_devs
= 1;
1333 card
->fully_routed
= true;
1335 ret
= snd_soc_of_parse_audio_routing(card
, "allwinner,audio-routing");
1337 dev_warn(dev
, "failed to parse audio-routing: %d\n", ret
);
1342 static const struct regmap_config sun4i_codec_regmap_config
= {
1346 .max_register
= SUN4I_CODEC_ADC_RXCNT
,
1349 static const struct regmap_config sun6i_codec_regmap_config
= {
1353 .max_register
= SUN6I_CODEC_HMIC_DATA
,
1356 static const struct regmap_config sun7i_codec_regmap_config
= {
1360 .max_register
= SUN7I_CODEC_AC_MIC_PHONE_CAL
,
1363 static const struct regmap_config sun8i_a23_codec_regmap_config
= {
1367 .max_register
= SUN8I_A23_CODEC_ADC_RXCNT
,
1370 static const struct regmap_config sun8i_h3_codec_regmap_config
= {
1374 .max_register
= SUN8I_H3_CODEC_ADC_DBG
,
1377 struct sun4i_codec_quirks
{
1378 const struct regmap_config
*regmap_config
;
1379 const struct snd_soc_codec_driver
*codec
;
1380 struct snd_soc_card
* (*create_card
)(struct device
*dev
);
1381 struct reg_field reg_adc_fifoc
; /* used for regmap_field */
1382 unsigned int reg_dac_txdata
; /* TX FIFO offset for DMA config */
1383 unsigned int reg_adc_rxdata
; /* RX FIFO offset for DMA config */
1387 static const struct sun4i_codec_quirks sun4i_codec_quirks
= {
1388 .regmap_config
= &sun4i_codec_regmap_config
,
1389 .codec
= &sun4i_codec_codec
,
1390 .create_card
= sun4i_codec_create_card
,
1391 .reg_adc_fifoc
= REG_FIELD(SUN4I_CODEC_ADC_FIFOC
, 0, 31),
1392 .reg_dac_txdata
= SUN4I_CODEC_DAC_TXDATA
,
1393 .reg_adc_rxdata
= SUN4I_CODEC_ADC_RXDATA
,
1396 static const struct sun4i_codec_quirks sun6i_a31_codec_quirks
= {
1397 .regmap_config
= &sun6i_codec_regmap_config
,
1398 .codec
= &sun6i_codec_codec
,
1399 .create_card
= sun6i_codec_create_card
,
1400 .reg_adc_fifoc
= REG_FIELD(SUN6I_CODEC_ADC_FIFOC
, 0, 31),
1401 .reg_dac_txdata
= SUN4I_CODEC_DAC_TXDATA
,
1402 .reg_adc_rxdata
= SUN6I_CODEC_ADC_RXDATA
,
1406 static const struct sun4i_codec_quirks sun7i_codec_quirks
= {
1407 .regmap_config
= &sun7i_codec_regmap_config
,
1408 .codec
= &sun4i_codec_codec
,
1409 .create_card
= sun4i_codec_create_card
,
1410 .reg_adc_fifoc
= REG_FIELD(SUN4I_CODEC_ADC_FIFOC
, 0, 31),
1411 .reg_dac_txdata
= SUN4I_CODEC_DAC_TXDATA
,
1412 .reg_adc_rxdata
= SUN4I_CODEC_ADC_RXDATA
,
1415 static const struct sun4i_codec_quirks sun8i_a23_codec_quirks
= {
1416 .regmap_config
= &sun8i_a23_codec_regmap_config
,
1417 .codec
= &sun8i_a23_codec_codec
,
1418 .create_card
= sun8i_a23_codec_create_card
,
1419 .reg_adc_fifoc
= REG_FIELD(SUN6I_CODEC_ADC_FIFOC
, 0, 31),
1420 .reg_dac_txdata
= SUN4I_CODEC_DAC_TXDATA
,
1421 .reg_adc_rxdata
= SUN6I_CODEC_ADC_RXDATA
,
1425 static const struct sun4i_codec_quirks sun8i_h3_codec_quirks
= {
1426 .regmap_config
= &sun8i_h3_codec_regmap_config
,
1428 * TODO Share the codec structure with A23 for now.
1429 * This should be split out when adding digital audio
1430 * processing support for the H3.
1432 .codec
= &sun8i_a23_codec_codec
,
1433 .create_card
= sun8i_h3_codec_create_card
,
1434 .reg_adc_fifoc
= REG_FIELD(SUN6I_CODEC_ADC_FIFOC
, 0, 31),
1435 .reg_dac_txdata
= SUN8I_H3_CODEC_DAC_TXDATA
,
1436 .reg_adc_rxdata
= SUN6I_CODEC_ADC_RXDATA
,
1440 static const struct of_device_id sun4i_codec_of_match
[] = {
1442 .compatible
= "allwinner,sun4i-a10-codec",
1443 .data
= &sun4i_codec_quirks
,
1446 .compatible
= "allwinner,sun6i-a31-codec",
1447 .data
= &sun6i_a31_codec_quirks
,
1450 .compatible
= "allwinner,sun7i-a20-codec",
1451 .data
= &sun7i_codec_quirks
,
1454 .compatible
= "allwinner,sun8i-a23-codec",
1455 .data
= &sun8i_a23_codec_quirks
,
1458 .compatible
= "allwinner,sun8i-h3-codec",
1459 .data
= &sun8i_h3_codec_quirks
,
1463 MODULE_DEVICE_TABLE(of
, sun4i_codec_of_match
);
1465 static int sun4i_codec_probe(struct platform_device
*pdev
)
1467 struct snd_soc_card
*card
;
1468 struct sun4i_codec
*scodec
;
1469 const struct sun4i_codec_quirks
*quirks
;
1470 struct resource
*res
;
1474 scodec
= devm_kzalloc(&pdev
->dev
, sizeof(*scodec
), GFP_KERNEL
);
1478 scodec
->dev
= &pdev
->dev
;
1480 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1481 base
= devm_ioremap_resource(&pdev
->dev
, res
);
1483 dev_err(&pdev
->dev
, "Failed to map the registers\n");
1484 return PTR_ERR(base
);
1487 quirks
= of_device_get_match_data(&pdev
->dev
);
1488 if (quirks
== NULL
) {
1489 dev_err(&pdev
->dev
, "Failed to determine the quirks to use\n");
1493 scodec
->regmap
= devm_regmap_init_mmio(&pdev
->dev
, base
,
1494 quirks
->regmap_config
);
1495 if (IS_ERR(scodec
->regmap
)) {
1496 dev_err(&pdev
->dev
, "Failed to create our regmap\n");
1497 return PTR_ERR(scodec
->regmap
);
1500 /* Get the clocks from the DT */
1501 scodec
->clk_apb
= devm_clk_get(&pdev
->dev
, "apb");
1502 if (IS_ERR(scodec
->clk_apb
)) {
1503 dev_err(&pdev
->dev
, "Failed to get the APB clock\n");
1504 return PTR_ERR(scodec
->clk_apb
);
1507 scodec
->clk_module
= devm_clk_get(&pdev
->dev
, "codec");
1508 if (IS_ERR(scodec
->clk_module
)) {
1509 dev_err(&pdev
->dev
, "Failed to get the module clock\n");
1510 return PTR_ERR(scodec
->clk_module
);
1513 if (quirks
->has_reset
) {
1514 scodec
->rst
= devm_reset_control_get(&pdev
->dev
, NULL
);
1515 if (IS_ERR(scodec
->rst
)) {
1516 dev_err(&pdev
->dev
, "Failed to get reset control\n");
1517 return PTR_ERR(scodec
->rst
);
1521 scodec
->gpio_pa
= devm_gpiod_get_optional(&pdev
->dev
, "allwinner,pa",
1523 if (IS_ERR(scodec
->gpio_pa
)) {
1524 ret
= PTR_ERR(scodec
->gpio_pa
);
1525 if (ret
!= -EPROBE_DEFER
)
1526 dev_err(&pdev
->dev
, "Failed to get pa gpio: %d\n", ret
);
1530 /* reg_field setup */
1531 scodec
->reg_adc_fifoc
= devm_regmap_field_alloc(&pdev
->dev
,
1533 quirks
->reg_adc_fifoc
);
1534 if (IS_ERR(scodec
->reg_adc_fifoc
)) {
1535 ret
= PTR_ERR(scodec
->reg_adc_fifoc
);
1536 dev_err(&pdev
->dev
, "Failed to create regmap fields: %d\n",
1541 /* Enable the bus clock */
1542 if (clk_prepare_enable(scodec
->clk_apb
)) {
1543 dev_err(&pdev
->dev
, "Failed to enable the APB clock\n");
1547 /* Deassert the reset control */
1549 ret
= reset_control_deassert(scodec
->rst
);
1552 "Failed to deassert the reset control\n");
1553 goto err_clk_disable
;
1557 /* DMA configuration for TX FIFO */
1558 scodec
->playback_dma_data
.addr
= res
->start
+ quirks
->reg_dac_txdata
;
1559 scodec
->playback_dma_data
.maxburst
= 8;
1560 scodec
->playback_dma_data
.addr_width
= DMA_SLAVE_BUSWIDTH_2_BYTES
;
1562 /* DMA configuration for RX FIFO */
1563 scodec
->capture_dma_data
.addr
= res
->start
+ quirks
->reg_adc_rxdata
;
1564 scodec
->capture_dma_data
.maxburst
= 8;
1565 scodec
->capture_dma_data
.addr_width
= DMA_SLAVE_BUSWIDTH_2_BYTES
;
1567 ret
= snd_soc_register_codec(&pdev
->dev
, quirks
->codec
,
1568 &sun4i_codec_dai
, 1);
1570 dev_err(&pdev
->dev
, "Failed to register our codec\n");
1571 goto err_assert_reset
;
1574 ret
= devm_snd_soc_register_component(&pdev
->dev
,
1575 &sun4i_codec_component
,
1578 dev_err(&pdev
->dev
, "Failed to register our DAI\n");
1579 goto err_unregister_codec
;
1582 ret
= devm_snd_dmaengine_pcm_register(&pdev
->dev
, NULL
, 0);
1584 dev_err(&pdev
->dev
, "Failed to register against DMAEngine\n");
1585 goto err_unregister_codec
;
1588 card
= quirks
->create_card(&pdev
->dev
);
1590 ret
= PTR_ERR(card
);
1591 dev_err(&pdev
->dev
, "Failed to create our card\n");
1592 goto err_unregister_codec
;
1595 platform_set_drvdata(pdev
, card
);
1596 snd_soc_card_set_drvdata(card
, scodec
);
1598 ret
= snd_soc_register_card(card
);
1600 dev_err(&pdev
->dev
, "Failed to register our card\n");
1601 goto err_unregister_codec
;
1606 err_unregister_codec
:
1607 snd_soc_unregister_codec(&pdev
->dev
);
1610 reset_control_assert(scodec
->rst
);
1612 clk_disable_unprepare(scodec
->clk_apb
);
1616 static int sun4i_codec_remove(struct platform_device
*pdev
)
1618 struct snd_soc_card
*card
= platform_get_drvdata(pdev
);
1619 struct sun4i_codec
*scodec
= snd_soc_card_get_drvdata(card
);
1621 snd_soc_unregister_card(card
);
1622 snd_soc_unregister_codec(&pdev
->dev
);
1624 reset_control_assert(scodec
->rst
);
1625 clk_disable_unprepare(scodec
->clk_apb
);
1630 static struct platform_driver sun4i_codec_driver
= {
1632 .name
= "sun4i-codec",
1633 .of_match_table
= sun4i_codec_of_match
,
1635 .probe
= sun4i_codec_probe
,
1636 .remove
= sun4i_codec_remove
,
1638 module_platform_driver(sun4i_codec_driver
);
1640 MODULE_DESCRIPTION("Allwinner A10 codec driver");
1641 MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
1642 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
1643 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1644 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
1645 MODULE_LICENSE("GPL");