sound/soc/tegra/tegra210_dmic.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // tegra210_dmic.c - Tegra210 DMIC driver
   4 //
   5 // Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.
   6
   7 #include <linux/clk.h>
   8 #include <linux/device.h>
   9 #include <linux/math64.h>
  10 #include <linux/module.h>
  11 #include <linux/of_device.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/pm_runtime.h>
  14 #include <linux/regmap.h>
  15 #include <sound/core.h>
  16 #include <sound/pcm_params.h>
  17 #include <sound/soc.h>
  18 #include "tegra210_dmic.h"
  19 #include "tegra_cif.h"
  20
  21 static const struct reg_default tegra210_dmic_reg_defaults[] = {
  22         { TEGRA210_DMIC_TX_INT_MASK, 0x00000001 },
  23         { TEGRA210_DMIC_TX_CIF_CTRL, 0x00007700 },
  24         { TEGRA210_DMIC_CG, 0x1 },
  25         { TEGRA210_DMIC_CTRL, 0x00000301 },
  26         /* Below enables all filters - DCR, LP and SC */
  27         { TEGRA210_DMIC_DBG_CTRL, 0xe },
  28         /* Below as per latest POR value */
  29         { TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4, 0x0 },
  30         /* LP filter is configured for pass through and used to apply gain */
  31         { TEGRA210_DMIC_LP_BIQUAD_0_COEF_0, 0x00800000 },
  32         { TEGRA210_DMIC_LP_BIQUAD_0_COEF_1, 0x0 },
  33         { TEGRA210_DMIC_LP_BIQUAD_0_COEF_2, 0x0 },
  34         { TEGRA210_DMIC_LP_BIQUAD_0_COEF_3, 0x0 },
  35         { TEGRA210_DMIC_LP_BIQUAD_0_COEF_4, 0x0 },
  36         { TEGRA210_DMIC_LP_BIQUAD_1_COEF_0, 0x00800000 },
  37         { TEGRA210_DMIC_LP_BIQUAD_1_COEF_1, 0x0 },
  38         { TEGRA210_DMIC_LP_BIQUAD_1_COEF_2, 0x0 },
  39         { TEGRA210_DMIC_LP_BIQUAD_1_COEF_3, 0x0 },
  40         { TEGRA210_DMIC_LP_BIQUAD_1_COEF_4, 0x0 },
  41 };
  42
  43 static int __maybe_unused tegra210_dmic_runtime_suspend(struct device *dev)
  44 {
  45         struct tegra210_dmic *dmic = dev_get_drvdata(dev);
  46
  47         regcache_cache_only(dmic->regmap, true);
  48         regcache_mark_dirty(dmic->regmap);
  49
  50         clk_disable_unprepare(dmic->clk_dmic);
  51
  52         return 0;
  53 }
  54
  55 static int __maybe_unused tegra210_dmic_runtime_resume(struct device *dev)
  56 {
  57         struct tegra210_dmic *dmic = dev_get_drvdata(dev);
  58         int err;
  59
  60         err = clk_prepare_enable(dmic->clk_dmic);
  61         if (err) {
  62                 dev_err(dev, "failed to enable DMIC clock, err: %d\n", err);
  63                 return err;
  64         }
  65
  66         regcache_cache_only(dmic->regmap, false);
  67         regcache_sync(dmic->regmap);
  68
  69         return 0;
  70 }
  71
  72 static int tegra210_dmic_hw_params(struct snd_pcm_substream *substream,
  73                                    struct snd_pcm_hw_params *params,
  74                                    struct snd_soc_dai *dai)
  75 {
  76         struct tegra210_dmic *dmic = snd_soc_dai_get_drvdata(dai);
  77         unsigned int srate, clk_rate, channels;
  78         struct tegra_cif_conf cif_conf;
  79         unsigned long long gain_q23 = DEFAULT_GAIN_Q23;
  80         int err;
  81
  82         memset(&cif_conf, 0, sizeof(struct tegra_cif_conf));
  83
  84         channels = params_channels(params);
  85
  86         cif_conf.audio_ch = channels;
  87
  88         switch (dmic->ch_select) {
  89         case DMIC_CH_SELECT_LEFT:
  90         case DMIC_CH_SELECT_RIGHT:
  91                 cif_conf.client_ch = 1;
  92                 break;
  93         case DMIC_CH_SELECT_STEREO:
  94                 cif_conf.client_ch = 2;
  95                 break;
  96         default:
  97                 dev_err(dai->dev, "invalid DMIC client channels\n");
  98                 return -EINVAL;
  99         }
 100
 101         srate = params_rate(params);
 102
 103         /*
 104          * DMIC clock rate is a multiple of 'Over Sampling Ratio' and
 105          * 'Sample Rate'. The supported OSR values are 64, 128 and 256.
 106          */
 107         clk_rate = (DMIC_OSR_FACTOR << dmic->osr_val) * srate;
 108
 109         err = clk_set_rate(dmic->clk_dmic, clk_rate);
 110         if (err) {
 111                 dev_err(dai->dev, "can't set DMIC clock rate %u, err: %d\n",
 112                         clk_rate, err);
 113                 return err;
 114         }
 115
 116         regmap_update_bits(dmic->regmap,
 117                            /* Reg */
 118                            TEGRA210_DMIC_CTRL,
 119                            /* Mask */
 120                            TEGRA210_DMIC_CTRL_LRSEL_POLARITY_MASK |
 121                            TEGRA210_DMIC_CTRL_OSR_MASK |
 122                            TEGRA210_DMIC_CTRL_CHANNEL_SELECT_MASK,
 123                            /* Value */
 124                            (dmic->lrsel << LRSEL_POL_SHIFT) |
 125                            (dmic->osr_val << OSR_SHIFT) |
 126                            ((dmic->ch_select + 1) << CH_SEL_SHIFT));
 127
 128         /*
 129          * Use LP filter gain register to apply boost.
 130          * Boost Gain Volume control has 100x factor.
 131          */
 132         if (dmic->boost_gain)
 133                 gain_q23 = div_u64(gain_q23 * dmic->boost_gain, 100);
 134
 135         regmap_write(dmic->regmap, TEGRA210_DMIC_LP_FILTER_GAIN,
 136                      (unsigned int)gain_q23);
 137
 138         switch (params_format(params)) {
 139         case SNDRV_PCM_FORMAT_S16_LE:
 140                 cif_conf.audio_bits = TEGRA_ACIF_BITS_16;
 141                 break;
 142         case SNDRV_PCM_FORMAT_S32_LE:
 143                 cif_conf.audio_bits = TEGRA_ACIF_BITS_32;
 144                 break;
 145         default:
 146                 dev_err(dai->dev, "unsupported format!\n");
 147                 return -EOPNOTSUPP;
 148         }
 149
 150         cif_conf.client_bits = TEGRA_ACIF_BITS_24;
 151         cif_conf.mono_conv = dmic->mono_to_stereo;
 152         cif_conf.stereo_conv = dmic->stereo_to_mono;
 153
 154         tegra_set_cif(dmic->regmap, TEGRA210_DMIC_TX_CIF_CTRL, &cif_conf);
 155
 156         return 0;
 157 }
 158
 159 static int tegra210_dmic_get_control(struct snd_kcontrol *kcontrol,
 160                                      struct snd_ctl_elem_value *ucontrol)
 161 {
 162         struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
 163         struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
 164
 165         if (strstr(kcontrol->id.name, "Boost Gain Volume"))
 166                 ucontrol->value.integer.value[0] = dmic->boost_gain;
 167         else if (strstr(kcontrol->id.name, "Channel Select"))
 168                 ucontrol->value.enumerated.item[0] = dmic->ch_select;
 169         else if (strstr(kcontrol->id.name, "Mono To Stereo"))
 170                 ucontrol->value.enumerated.item[0] = dmic->mono_to_stereo;
 171         else if (strstr(kcontrol->id.name, "Stereo To Mono"))
 172                 ucontrol->value.enumerated.item[0] = dmic->stereo_to_mono;
 173         else if (strstr(kcontrol->id.name, "OSR Value"))
 174                 ucontrol->value.enumerated.item[0] = dmic->osr_val;
 175         else if (strstr(kcontrol->id.name, "LR Polarity Select"))
 176                 ucontrol->value.enumerated.item[0] = dmic->lrsel;
 177
 178         return 0;
 179 }
 180
 181 static int tegra210_dmic_put_control(struct snd_kcontrol *kcontrol,
 182                                      struct snd_ctl_elem_value *ucontrol)
 183 {
 184         struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
 185         struct tegra210_dmic *dmic = snd_soc_component_get_drvdata(comp);
 186
 187         if (strstr(kcontrol->id.name, "Boost Gain Volume"))
 188                 dmic->boost_gain = ucontrol->value.integer.value[0];
 189         else if (strstr(kcontrol->id.name, "Channel Select"))
 190                 dmic->ch_select = ucontrol->value.enumerated.item[0];
 191         else if (strstr(kcontrol->id.name, "Mono To Stereo"))
 192                 dmic->mono_to_stereo = ucontrol->value.enumerated.item[0];
 193         else if (strstr(kcontrol->id.name, "Stereo To Mono"))
 194                 dmic->stereo_to_mono = ucontrol->value.enumerated.item[0];
 195         else if (strstr(kcontrol->id.name, "OSR Value"))
 196                 dmic->osr_val = ucontrol->value.enumerated.item[0];
 197         else if (strstr(kcontrol->id.name, "LR Polarity Select"))
 198                 dmic->lrsel = ucontrol->value.enumerated.item[0];
 199
 200         return 0;
 201 }
 202
 203 static const struct snd_soc_dai_ops tegra210_dmic_dai_ops = {
 204         .hw_params      = tegra210_dmic_hw_params,
 205 };
 206
 207 static struct snd_soc_dai_driver tegra210_dmic_dais[] = {
 208         {
 209                 .name = "DMIC-CIF",
 210                 .capture = {
 211                         .stream_name = "CIF-Capture",
 212                         .channels_min = 1,
 213                         .channels_max = 2,
 214                         .rates = SNDRV_PCM_RATE_8000_48000,
 215                         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 216                                    SNDRV_PCM_FMTBIT_S32_LE,
 217                 },
 218         },
 219         {
 220                 .name = "DMIC-DAP",
 221                 .capture = {
 222                         .stream_name = "DAP-Capture",
 223                         .channels_min = 1,
 224                         .channels_max = 2,
 225                         .rates = SNDRV_PCM_RATE_8000_48000,
 226                         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 227                                    SNDRV_PCM_FMTBIT_S32_LE,
 228                 },
 229                 .ops = &tegra210_dmic_dai_ops,
 230                 .symmetric_rate = 1,
 231         },
 232 };
 233
 234 static const struct snd_soc_dapm_widget tegra210_dmic_widgets[] = {
 235         SND_SOC_DAPM_AIF_OUT("TX", NULL, 0, TEGRA210_DMIC_ENABLE, 0, 0),
 236         SND_SOC_DAPM_MIC("MIC", NULL),
 237 };
 238
 239 static const struct snd_soc_dapm_route tegra210_dmic_routes[] = {
 240         { "XBAR-RX",            NULL,   "XBAR-Capture" },
 241         { "XBAR-Capture",       NULL,   "CIF-Capture" },
 242         { "CIF-Capture",        NULL,   "TX" },
 243         { "TX",                 NULL,   "DAP-Capture" },
 244         { "DAP-Capture",        NULL,   "MIC" },
 245 };
 246
 247 static const char * const tegra210_dmic_ch_select[] = {
 248         "Left", "Right", "Stereo",
 249 };
 250
 251 static const struct soc_enum tegra210_dmic_ch_enum =
 252         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_ch_select),
 253                         tegra210_dmic_ch_select);
 254
 255 static const char * const tegra210_dmic_mono_conv_text[] = {
 256         "Zero", "Copy",
 257 };
 258
 259 static const char * const tegra210_dmic_stereo_conv_text[] = {
 260         "CH0", "CH1", "AVG",
 261 };
 262
 263 static const struct soc_enum tegra210_dmic_mono_conv_enum =
 264         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_mono_conv_text),
 265                         tegra210_dmic_mono_conv_text);
 266
 267 static const struct soc_enum tegra210_dmic_stereo_conv_enum =
 268         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_stereo_conv_text),
 269                         tegra210_dmic_stereo_conv_text);
 270
 271 static const char * const tegra210_dmic_osr_text[] = {
 272         "OSR_64", "OSR_128", "OSR_256",
 273 };
 274
 275 static const struct soc_enum tegra210_dmic_osr_enum =
 276         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_osr_text),
 277                         tegra210_dmic_osr_text);
 278
 279 static const char * const tegra210_dmic_lrsel_text[] = {
 280         "Left", "Right",
 281 };
 282
 283 static const struct soc_enum tegra210_dmic_lrsel_enum =
 284         SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(tegra210_dmic_lrsel_text),
 285                         tegra210_dmic_lrsel_text);
 286
 287 static const struct snd_kcontrol_new tegra210_dmic_controls[] = {
 288         SOC_SINGLE_EXT("Boost Gain Volume", 0, 0, MAX_BOOST_GAIN, 0,
 289                        tegra210_dmic_get_control, tegra210_dmic_put_control),
 290         SOC_ENUM_EXT("Channel Select", tegra210_dmic_ch_enum,
 291                      tegra210_dmic_get_control, tegra210_dmic_put_control),
 292         SOC_ENUM_EXT("Mono To Stereo",
 293                      tegra210_dmic_mono_conv_enum, tegra210_dmic_get_control,
 294                      tegra210_dmic_put_control),
 295         SOC_ENUM_EXT("Stereo To Mono",
 296                      tegra210_dmic_stereo_conv_enum, tegra210_dmic_get_control,
 297                      tegra210_dmic_put_control),
 298         SOC_ENUM_EXT("OSR Value", tegra210_dmic_osr_enum,
 299                      tegra210_dmic_get_control, tegra210_dmic_put_control),
 300         SOC_ENUM_EXT("LR Polarity Select", tegra210_dmic_lrsel_enum,
 301                      tegra210_dmic_get_control, tegra210_dmic_put_control),
 302 };
 303
 304 static const struct snd_soc_component_driver tegra210_dmic_compnt = {
 305         .dapm_widgets           = tegra210_dmic_widgets,
 306         .num_dapm_widgets       = ARRAY_SIZE(tegra210_dmic_widgets),
 307         .dapm_routes            = tegra210_dmic_routes,
 308         .num_dapm_routes        = ARRAY_SIZE(tegra210_dmic_routes),
 309         .controls               = tegra210_dmic_controls,
 310         .num_controls           = ARRAY_SIZE(tegra210_dmic_controls),
 311 };
 312
 313 static bool tegra210_dmic_wr_reg(struct device *dev, unsigned int reg)
 314 {
 315         switch (reg) {
 316         case TEGRA210_DMIC_TX_INT_MASK ... TEGRA210_DMIC_TX_CIF_CTRL:
 317         case TEGRA210_DMIC_ENABLE ... TEGRA210_DMIC_CG:
 318         case TEGRA210_DMIC_CTRL:
 319         case TEGRA210_DMIC_DBG_CTRL:
 320         case TEGRA210_DMIC_DCR_BIQUAD_0_COEF_4 ... TEGRA210_DMIC_LP_BIQUAD_1_COEF_4:
 321                 return true;
 322         default:
 323                 return false;
 324         }
 325 }
 326
 327 static bool tegra210_dmic_rd_reg(struct device *dev, unsigned int reg)
 328 {
 329         if (tegra210_dmic_wr_reg(dev, reg))
 330                 return true;
 331
 332         switch (reg) {
 333         case TEGRA210_DMIC_TX_STATUS:
 334         case TEGRA210_DMIC_TX_INT_STATUS:
 335         case TEGRA210_DMIC_STATUS:
 336         case TEGRA210_DMIC_INT_STATUS:
 337                 return true;
 338         default:
 339                 return false;
 340         }
 341 }
 342
 343 static bool tegra210_dmic_volatile_reg(struct device *dev, unsigned int reg)
 344 {
 345         switch (reg) {
 346         case TEGRA210_DMIC_TX_STATUS:
 347         case TEGRA210_DMIC_TX_INT_STATUS:
 348         case TEGRA210_DMIC_TX_INT_SET:
 349         case TEGRA210_DMIC_SOFT_RESET:
 350         case TEGRA210_DMIC_STATUS:
 351         case TEGRA210_DMIC_INT_STATUS:
 352                 return true;
 353         default:
 354                 return false;
 355         }
 356 }
 357
 358 static const struct regmap_config tegra210_dmic_regmap_config = {
 359         .reg_bits = 32,
 360         .reg_stride = 4,
 361         .val_bits = 32,
 362         .max_register = TEGRA210_DMIC_LP_BIQUAD_1_COEF_4,
 363         .writeable_reg = tegra210_dmic_wr_reg,
 364         .readable_reg = tegra210_dmic_rd_reg,
 365         .volatile_reg = tegra210_dmic_volatile_reg,
 366         .reg_defaults = tegra210_dmic_reg_defaults,
 367         .num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
 368         .cache_type = REGCACHE_FLAT,
 369 };
 370
 371 static int tegra210_dmic_probe(struct platform_device *pdev)
 372 {
 373         struct device *dev = &pdev->dev;
 374         struct tegra210_dmic *dmic;
 375         void __iomem *regs;
 376         int err;
 377
 378         dmic = devm_kzalloc(dev, sizeof(*dmic), GFP_KERNEL);
 379         if (!dmic)
 380                 return -ENOMEM;
 381
 382         dmic->osr_val = DMIC_OSR_64;
 383         dmic->ch_select = DMIC_CH_SELECT_STEREO;
 384         dmic->lrsel = DMIC_LRSEL_LEFT;
 385         dmic->boost_gain = 0;
 386         dmic->stereo_to_mono = 0; /* "CH0" */
 387
 388         dev_set_drvdata(dev, dmic);
 389
 390         dmic->clk_dmic = devm_clk_get(dev, "dmic");
 391         if (IS_ERR(dmic->clk_dmic)) {
 392                 dev_err(dev, "can't retrieve DMIC clock\n");
 393                 return PTR_ERR(dmic->clk_dmic);
 394         }
 395
 396         regs = devm_platform_ioremap_resource(pdev, 0);
 397         if (IS_ERR(regs))
 398                 return PTR_ERR(regs);
 399
 400         dmic->regmap = devm_regmap_init_mmio(dev, regs,
 401                                              &tegra210_dmic_regmap_config);
 402         if (IS_ERR(dmic->regmap)) {
 403                 dev_err(dev, "regmap init failed\n");
 404                 return PTR_ERR(dmic->regmap);
 405         }
 406
 407         regcache_cache_only(dmic->regmap, true);
 408
 409         err = devm_snd_soc_register_component(dev, &tegra210_dmic_compnt,
 410                                               tegra210_dmic_dais,
 411                                               ARRAY_SIZE(tegra210_dmic_dais));
 412         if (err) {
 413                 dev_err(dev, "can't register DMIC component, err: %d\n", err);
 414                 return err;
 415         }
 416
 417         pm_runtime_enable(dev);
 418
 419         return 0;
 420 }
 421
 422 static int tegra210_dmic_remove(struct platform_device *pdev)
 423 {
 424         pm_runtime_disable(&pdev->dev);
 425
 426         return 0;
 427 }
 428
 429 static const struct dev_pm_ops tegra210_dmic_pm_ops = {
 430         SET_RUNTIME_PM_OPS(tegra210_dmic_runtime_suspend,
 431                            tegra210_dmic_runtime_resume, NULL)
 432         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 433                                 pm_runtime_force_resume)
 434 };
 435
 436 static const struct of_device_id tegra210_dmic_of_match[] = {
 437         { .compatible = "nvidia,tegra210-dmic" },
 438         {},
 439 };
 440 MODULE_DEVICE_TABLE(of, tegra210_dmic_of_match);
 441
 442 static struct platform_driver tegra210_dmic_driver = {
 443         .driver = {
 444                 .name = "tegra210-dmic",
 445                 .of_match_table = tegra210_dmic_of_match,
 446                 .pm = &tegra210_dmic_pm_ops,
 447         },
 448         .probe = tegra210_dmic_probe,
 449         .remove = tegra210_dmic_remove,
 450 };
 451 module_platform_driver(tegra210_dmic_driver)
 452
 453 MODULE_AUTHOR("Rahul Mittal <rmittal@nvidia.com>");
 454 MODULE_DESCRIPTION("Tegra210 ASoC DMIC driver");
 455 MODULE_LICENSE("GPL v2");