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ALSA: x86: intel_hdmi: add definitions and logic for DP audio
[mirror_ubuntu-bionic-kernel.git] / sound / x86 / intel_hdmi_audio.c
1 /*
2 * intel_hdmi_audio.c - Intel HDMI audio driver
3 *
4 * Copyright (C) 2016 Intel Corp
5 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
6 * Ramesh Babu K V <ramesh.babu@intel.com>
7 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
8 * Jerome Anand <jerome.anand@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 * ALSA driver for Intel HDMI audio
22 */
23
24 #define pr_fmt(fmt) "had: " fmt
25
26 #include <linux/platform_device.h>
27 #include <linux/io.h>
28 #include <linux/slab.h>
29 #include <linux/module.h>
30 #include <linux/acpi.h>
31 #include <asm/cacheflush.h>
32 #include <sound/pcm.h>
33 #include <sound/core.h>
34 #include <sound/pcm_params.h>
35 #include <sound/initval.h>
36 #include <sound/control.h>
37 #include <sound/initval.h>
38 #include "intel_hdmi_audio.h"
39
40 static DEFINE_MUTEX(had_mutex);
41
42 /*standard module options for ALSA. This module supports only one card*/
43 static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
44 static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
45 static struct snd_intelhad *had_data;
46 static int underrun_count;
47
48 module_param_named(index, hdmi_card_index, int, 0444);
49 MODULE_PARM_DESC(index,
50 "Index value for INTEL Intel HDMI Audio controller.");
51 module_param_named(id, hdmi_card_id, charp, 0444);
52 MODULE_PARM_DESC(id,
53 "ID string for INTEL Intel HDMI Audio controller.");
54
55 /*
56 * ELD SA bits in the CEA Speaker Allocation data block
57 */
58 static int eld_speaker_allocation_bits[] = {
59 [0] = FL | FR,
60 [1] = LFE,
61 [2] = FC,
62 [3] = RL | RR,
63 [4] = RC,
64 [5] = FLC | FRC,
65 [6] = RLC | RRC,
66 /* the following are not defined in ELD yet */
67 [7] = 0,
68 };
69
70 /*
71 * This is an ordered list!
72 *
73 * The preceding ones have better chances to be selected by
74 * hdmi_channel_allocation().
75 */
76 static struct cea_channel_speaker_allocation channel_allocations[] = {
77 /* channel: 7 6 5 4 3 2 1 0 */
78 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
79 /* 2.1 */
80 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
81 /* Dolby Surround */
82 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
83 /* surround40 */
84 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
85 /* surround41 */
86 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
87 /* surround50 */
88 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
89 /* surround51 */
90 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
91 /* 6.1 */
92 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
93 /* surround71 */
94 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
95
96 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
97 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
98 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
99 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
100 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
101 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
102 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
103 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
104 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
105 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
106 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
107 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
108 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
109 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
110 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
111 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
112 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
113 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
114 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
115 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
116 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
117 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
118 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
119 };
120
121 static struct channel_map_table map_tables[] = {
122 { SNDRV_CHMAP_FL, 0x00, FL },
123 { SNDRV_CHMAP_FR, 0x01, FR },
124 { SNDRV_CHMAP_RL, 0x04, RL },
125 { SNDRV_CHMAP_RR, 0x05, RR },
126 { SNDRV_CHMAP_LFE, 0x02, LFE },
127 { SNDRV_CHMAP_FC, 0x03, FC },
128 { SNDRV_CHMAP_RLC, 0x06, RLC },
129 { SNDRV_CHMAP_RRC, 0x07, RRC },
130 {} /* terminator */
131 };
132
133 /* hardware capability structure */
134 static const struct snd_pcm_hardware snd_intel_hadstream = {
135 .info = (SNDRV_PCM_INFO_INTERLEAVED |
136 SNDRV_PCM_INFO_DOUBLE |
137 SNDRV_PCM_INFO_MMAP|
138 SNDRV_PCM_INFO_MMAP_VALID |
139 SNDRV_PCM_INFO_BATCH),
140 .formats = (SNDRV_PCM_FMTBIT_S24 |
141 SNDRV_PCM_FMTBIT_U24),
142 .rates = SNDRV_PCM_RATE_32000 |
143 SNDRV_PCM_RATE_44100 |
144 SNDRV_PCM_RATE_48000 |
145 SNDRV_PCM_RATE_88200 |
146 SNDRV_PCM_RATE_96000 |
147 SNDRV_PCM_RATE_176400 |
148 SNDRV_PCM_RATE_192000,
149 .rate_min = HAD_MIN_RATE,
150 .rate_max = HAD_MAX_RATE,
151 .channels_min = HAD_MIN_CHANNEL,
152 .channels_max = HAD_MAX_CHANNEL,
153 .buffer_bytes_max = HAD_MAX_BUFFER,
154 .period_bytes_min = HAD_MIN_PERIOD_BYTES,
155 .period_bytes_max = HAD_MAX_PERIOD_BYTES,
156 .periods_min = HAD_MIN_PERIODS,
157 .periods_max = HAD_MAX_PERIODS,
158 .fifo_size = HAD_FIFO_SIZE,
159 };
160
161 /* Register access functions */
162
163 int had_get_hwstate(struct snd_intelhad *intelhaddata)
164 {
165 /* Check for device presence -SW state */
166 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
167 pr_debug("%s:Device not connected:%d\n", __func__,
168 intelhaddata->drv_status);
169 return -ENODEV;
170 }
171
172 return 0;
173 }
174
175 int had_get_caps(enum had_caps_list query, void *caps)
176 {
177 int retval;
178 struct snd_intelhad *intelhaddata = had_data;
179
180 retval = had_get_hwstate(intelhaddata);
181 if (!retval)
182 retval = intelhaddata->query_ops.hdmi_audio_get_caps(query,
183 caps);
184
185 return retval;
186 }
187
188 int had_set_caps(enum had_caps_list set_element, void *caps)
189 {
190 int retval;
191 struct snd_intelhad *intelhaddata = had_data;
192
193 retval = had_get_hwstate(intelhaddata);
194 if (!retval)
195 retval = intelhaddata->query_ops.hdmi_audio_set_caps(
196 set_element, caps);
197
198 return retval;
199 }
200
201 int had_read_register(u32 offset, u32 *data)
202 {
203 int retval;
204 struct snd_intelhad *intelhaddata = had_data;
205
206 retval = had_get_hwstate(intelhaddata);
207 if (!retval)
208 retval = intelhaddata->reg_ops.hdmi_audio_read_register(
209 offset + intelhaddata->audio_cfg_offset, data);
210
211 return retval;
212 }
213
214 int had_write_register(u32 offset, u32 data)
215 {
216 int retval;
217 struct snd_intelhad *intelhaddata = had_data;
218
219 retval = had_get_hwstate(intelhaddata);
220 if (!retval)
221 retval = intelhaddata->reg_ops.hdmi_audio_write_register(
222 offset + intelhaddata->audio_cfg_offset, data);
223
224 return retval;
225 }
226
227 int had_read_modify(u32 offset, u32 data, u32 mask)
228 {
229 int retval;
230 struct snd_intelhad *intelhaddata = had_data;
231
232 retval = had_get_hwstate(intelhaddata);
233 if (!retval)
234 retval = intelhaddata->reg_ops.hdmi_audio_read_modify(
235 offset + intelhaddata->audio_cfg_offset,
236 data, mask);
237
238 return retval;
239 }
240 /**
241 * function to read-modify
242 * AUD_CONFIG register on VLV2.The had_read_modify() function should not
243 * directly be used on VLV2 for updating AUD_CONFIG register.
244 * This is because:
245 * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
246 * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
247 * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
248 * register. This field should be 1xy binary for configuration with 6 or
249 * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
250 * causes the "channels" field to be updated as 0xy binary resulting in
251 * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
252 * appropriate value when doing read-modify of AUD_CONFIG register.
253 *
254 * @substream: the current substream or NULL if no active substream
255 * @data : data to be written
256 * @mask : mask
257 *
258 */
259 static int had_read_modify_aud_config_v2(struct snd_pcm_substream *substream,
260 u32 data, u32 mask)
261 {
262 union aud_cfg cfg_val = {.cfg_regval = 0};
263 u8 channels;
264
265 /*
266 * If substream is NULL, there is no active stream.
267 * In this case just set channels to 2
268 */
269 if (substream)
270 channels = substream->runtime->channels;
271 else
272 channels = 2;
273 cfg_val.cfg_regx_v2.num_ch = channels - 2;
274
275 data = data | cfg_val.cfg_regval;
276 mask = mask | AUD_CONFIG_CH_MASK_V2;
277
278 pr_debug("%s : data = %x, mask =%x\n", __func__, data, mask);
279
280 return had_read_modify(AUD_CONFIG, data, mask);
281 }
282
283 static void snd_intelhad_enable_audio_v1(struct snd_pcm_substream *substream,
284 u8 enable)
285 {
286 had_read_modify(AUD_CONFIG, enable, BIT(0));
287 }
288
289 static void snd_intelhad_enable_audio_v2(struct snd_pcm_substream *substream,
290 u8 enable)
291 {
292 had_read_modify_aud_config_v2(substream, enable, BIT(0));
293 }
294
295 static void snd_intelhad_reset_audio_v1(u8 reset)
296 {
297 had_write_register(AUD_HDMI_STATUS, reset);
298 }
299
300 static void snd_intelhad_reset_audio_v2(u8 reset)
301 {
302 had_write_register(AUD_HDMI_STATUS_v2, reset);
303 }
304
305 /**
306 * initialize audio channel status registers
307 * This function is called in the prepare callback
308 */
309 static int had_prog_status_reg(struct snd_pcm_substream *substream,
310 struct snd_intelhad *intelhaddata)
311 {
312 union aud_cfg cfg_val = {.cfg_regval = 0};
313 union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
314 union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
315 int format;
316
317 pr_debug("Entry %s\n", __func__);
318
319 ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits &
320 IEC958_AES0_NONAUDIO)>>1;
321 ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
322 IEC958_AES3_CON_CLOCK)>>4;
323 cfg_val.cfg_regx.val_bit = ch_stat0.status_0_regx.lpcm_id;
324
325 switch (substream->runtime->rate) {
326 case AUD_SAMPLE_RATE_32:
327 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
328 break;
329
330 case AUD_SAMPLE_RATE_44_1:
331 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ;
332 break;
333 case AUD_SAMPLE_RATE_48:
334 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ;
335 break;
336 case AUD_SAMPLE_RATE_88_2:
337 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ;
338 break;
339 case AUD_SAMPLE_RATE_96:
340 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ;
341 break;
342 case AUD_SAMPLE_RATE_176_4:
343 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ;
344 break;
345 case AUD_SAMPLE_RATE_192:
346 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ;
347 break;
348
349 default:
350 /* control should never come here */
351 return -EINVAL;
352 break;
353
354 }
355 had_write_register(AUD_CH_STATUS_0, ch_stat0.status_0_regval);
356
357 format = substream->runtime->format;
358
359 if (format == SNDRV_PCM_FORMAT_S16_LE) {
360 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20;
361 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS;
362 } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
363 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24;
364 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS;
365 } else {
366 ch_stat1.status_1_regx.max_wrd_len = 0;
367 ch_stat1.status_1_regx.wrd_len = 0;
368 }
369 had_write_register(AUD_CH_STATUS_1, ch_stat1.status_1_regval);
370 return 0;
371 }
372
373 /**
374 * function to initialize audio
375 * registers and buffer confgiuration registers
376 * This function is called in the prepare callback
377 */
378 static int snd_intelhad_prog_audio_ctrl_v2(struct snd_pcm_substream *substream,
379 struct snd_intelhad *intelhaddata)
380 {
381 union aud_cfg cfg_val = {.cfg_regval = 0};
382 union aud_buf_config buf_cfg = {.buf_cfgval = 0};
383 u8 channels;
384
385 had_prog_status_reg(substream, intelhaddata);
386
387 buf_cfg.buf_cfg_regx_v2.audio_fifo_watermark = FIFO_THRESHOLD;
388 buf_cfg.buf_cfg_regx_v2.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
389 buf_cfg.buf_cfg_regx_v2.aud_delay = 0;
390 had_write_register(AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
391
392 channels = substream->runtime->channels;
393 cfg_val.cfg_regx_v2.num_ch = channels - 2;
394 if (channels <= 2)
395 cfg_val.cfg_regx_v2.layout = LAYOUT0;
396 else
397 cfg_val.cfg_regx_v2.layout = LAYOUT1;
398
399 cfg_val.cfg_regx_v2.val_bit = 1;
400 had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
401 return 0;
402 }
403
404 /**
405 * function to initialize audio
406 * registers and buffer confgiuration registers
407 * This function is called in the prepare callback
408 */
409 static int snd_intelhad_prog_audio_ctrl_v1(struct snd_pcm_substream *substream,
410 struct snd_intelhad *intelhaddata)
411 {
412 union aud_cfg cfg_val = {.cfg_regval = 0};
413 union aud_buf_config buf_cfg = {.buf_cfgval = 0};
414 u8 channels;
415
416 had_prog_status_reg(substream, intelhaddata);
417
418 buf_cfg.buf_cfg_regx.fifo_width = FIFO_THRESHOLD;
419 buf_cfg.buf_cfg_regx.aud_delay = 0;
420 had_write_register(AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
421
422 channels = substream->runtime->channels;
423
424 switch (channels) {
425 case 1:
426 case 2:
427 cfg_val.cfg_regx.num_ch = CH_STEREO;
428 cfg_val.cfg_regx.layout = LAYOUT0;
429 break;
430
431 case 3:
432 case 4:
433 cfg_val.cfg_regx.num_ch = CH_THREE_FOUR;
434 cfg_val.cfg_regx.layout = LAYOUT1;
435 break;
436
437 case 5:
438 case 6:
439 cfg_val.cfg_regx.num_ch = CH_FIVE_SIX;
440 cfg_val.cfg_regx.layout = LAYOUT1;
441 break;
442
443 case 7:
444 case 8:
445 cfg_val.cfg_regx.num_ch = CH_SEVEN_EIGHT;
446 cfg_val.cfg_regx.layout = LAYOUT1;
447 break;
448
449 }
450
451 cfg_val.cfg_regx.val_bit = 1;
452 had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
453 return 0;
454 }
455
456 /*
457 * Compute derived values in channel_allocations[].
458 */
459 static void init_channel_allocations(void)
460 {
461 int i, j;
462 struct cea_channel_speaker_allocation *p;
463
464 pr_debug("%s: Enter\n", __func__);
465
466 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
467 p = channel_allocations + i;
468 p->channels = 0;
469 p->spk_mask = 0;
470 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
471 if (p->speakers[j]) {
472 p->channels++;
473 p->spk_mask |= p->speakers[j];
474 }
475 }
476 }
477
478 /*
479 * The transformation takes two steps:
480 *
481 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
482 * spk_mask => (channel_allocations[]) => ai->CA
483 *
484 * TODO: it could select the wrong CA from multiple candidates.
485 */
486 static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
487 int channels)
488 {
489 int i;
490 int ca = 0;
491 int spk_mask = 0;
492
493 /*
494 * CA defaults to 0 for basic stereo audio
495 */
496 if (channels <= 2)
497 return 0;
498
499 /*
500 * expand ELD's speaker allocation mask
501 *
502 * ELD tells the speaker mask in a compact(paired) form,
503 * expand ELD's notions to match the ones used by Audio InfoFrame.
504 */
505
506 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
507 if (intelhaddata->eeld.speaker_allocation_block & (1 << i))
508 spk_mask |= eld_speaker_allocation_bits[i];
509 }
510
511 /* search for the first working match in the CA table */
512 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
513 if (channels == channel_allocations[i].channels &&
514 (spk_mask & channel_allocations[i].spk_mask) ==
515 channel_allocations[i].spk_mask) {
516 ca = channel_allocations[i].ca_index;
517 break;
518 }
519 }
520
521 pr_debug("HDMI: select CA 0x%x for %d\n", ca, channels);
522
523 return ca;
524 }
525
526 /* from speaker bit mask to ALSA API channel position */
527 static int spk_to_chmap(int spk)
528 {
529 struct channel_map_table *t = map_tables;
530
531 for (; t->map; t++) {
532 if (t->spk_mask == spk)
533 return t->map;
534 }
535 return 0;
536 }
537
538 void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
539 {
540 int i = 0, c = 0;
541 int spk_mask = 0;
542 struct snd_pcm_chmap_elem *chmap;
543 u8 eld_high, eld_high_mask = 0xF0;
544 u8 high_msb;
545
546 chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
547 if (chmap == NULL) {
548 intelhaddata->chmap->chmap = NULL;
549 return;
550 }
551
552 had_get_caps(HAD_GET_ELD, &intelhaddata->eeld);
553 had_get_caps(HAD_GET_DP_OUTPUT, &intelhaddata->dp_output);
554
555 pr_debug("eeld.speaker_allocation_block = %x\n",
556 intelhaddata->eeld.speaker_allocation_block);
557
558 /* WA: Fix the max channel supported to 8 */
559
560 /*
561 * Sink may support more than 8 channels, if eld_high has more than
562 * one bit set. SOC supports max 8 channels.
563 * Refer eld_speaker_allocation_bits, for sink speaker allocation
564 */
565
566 /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
567 eld_high = intelhaddata->eeld.speaker_allocation_block & eld_high_mask;
568 if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
569 /* eld_high & (eld_high-1): if more than 1 bit set */
570 /* 0x1F: 7 channels */
571 for (i = 1; i < 4; i++) {
572 high_msb = eld_high & (0x80 >> i);
573 if (high_msb) {
574 intelhaddata->eeld.speaker_allocation_block &=
575 high_msb | 0xF;
576 break;
577 }
578 }
579 }
580
581 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
582 if (intelhaddata->eeld.speaker_allocation_block & (1 << i))
583 spk_mask |= eld_speaker_allocation_bits[i];
584 }
585
586 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
587 if (spk_mask == channel_allocations[i].spk_mask) {
588 for (c = 0; c < channel_allocations[i].channels; c++) {
589 chmap->map[c] = spk_to_chmap(
590 channel_allocations[i].speakers[
591 (MAX_SPEAKERS - 1)-c]);
592 }
593 chmap->channels = channel_allocations[i].channels;
594 intelhaddata->chmap->chmap = chmap;
595 break;
596 }
597 }
598 if (i >= ARRAY_SIZE(channel_allocations)) {
599 intelhaddata->chmap->chmap = NULL;
600 kfree(chmap);
601 }
602 }
603
604 /*
605 * ALSA API channel-map control callbacks
606 */
607 static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
608 struct snd_ctl_elem_info *uinfo)
609 {
610 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
611 struct snd_intelhad *intelhaddata = info->private_data;
612
613 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
614 return -ENODEV;
615 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
616 uinfo->count = HAD_MAX_CHANNEL;
617 uinfo->value.integer.min = 0;
618 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
619 return 0;
620 }
621
622 static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624 {
625 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
626 struct snd_intelhad *intelhaddata = info->private_data;
627 int i = 0;
628 const struct snd_pcm_chmap_elem *chmap;
629
630 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
631 return -ENODEV;
632 if (intelhaddata->chmap->chmap == NULL)
633 return -ENODATA;
634 chmap = intelhaddata->chmap->chmap;
635 for (i = 0; i < chmap->channels; i++) {
636 ucontrol->value.integer.value[i] = chmap->map[i];
637 pr_debug("chmap->map[%d] = %d\n", i, chmap->map[i]);
638 }
639
640 return 0;
641 }
642
643 static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
644 struct snd_pcm *pcm)
645 {
646 int err = 0;
647
648 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
649 NULL, 0, (unsigned long)intelhaddata,
650 &intelhaddata->chmap);
651 if (err < 0)
652 return err;
653
654 intelhaddata->chmap->private_data = intelhaddata;
655 intelhaddata->kctl = intelhaddata->chmap->kctl;
656 intelhaddata->kctl->info = had_chmap_ctl_info;
657 intelhaddata->kctl->get = had_chmap_ctl_get;
658 intelhaddata->chmap->chmap = NULL;
659 return 0;
660 }
661
662 /**
663 * snd_intelhad_prog_dip_v1 - to initialize Data Island Packets registers
664 *
665 * @substream:substream for which the prepare function is called
666 * @intelhaddata:substream private data
667 *
668 * This function is called in the prepare callback
669 */
670 static void snd_intelhad_prog_dip_v1(struct snd_pcm_substream *substream,
671 struct snd_intelhad *intelhaddata)
672 {
673 int i;
674 union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
675 union aud_info_frame2 frame2 = {.fr2_val = 0};
676 union aud_info_frame3 frame3 = {.fr3_val = 0};
677 u8 checksum = 0;
678 int channels;
679
680 channels = substream->runtime->channels;
681
682 had_write_register(AUD_CNTL_ST, ctrl_state.ctrl_val);
683
684 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
685
686 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
687 intelhaddata, channels);
688
689 /*Calculte the byte wide checksum for all valid DIP words*/
690 for (i = 0; i < BYTES_PER_WORD; i++)
691 checksum += (HDMI_INFO_FRAME_WORD1 >> i*BITS_PER_BYTE) & MASK_BYTE0;
692 for (i = 0; i < BYTES_PER_WORD; i++)
693 checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
694 for (i = 0; i < BYTES_PER_WORD; i++)
695 checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
696
697 frame2.fr2_regx.chksum = -(checksum);
698
699 had_write_register(AUD_HDMIW_INFOFR, HDMI_INFO_FRAME_WORD1);
700 had_write_register(AUD_HDMIW_INFOFR, frame2.fr2_val);
701 had_write_register(AUD_HDMIW_INFOFR, frame3.fr3_val);
702
703 /* program remaining DIP words with zero */
704 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
705 had_write_register(AUD_HDMIW_INFOFR, 0x0);
706
707 ctrl_state.ctrl_regx.dip_freq = 1;
708 ctrl_state.ctrl_regx.dip_en_sta = 1;
709 had_write_register(AUD_CNTL_ST, ctrl_state.ctrl_val);
710 }
711
712 /**
713 * snd_intelhad_prog_dip_v2 - to initialize Data Island Packets registers
714 *
715 * @substream:substream for which the prepare function is called
716 * @intelhaddata:substream private data
717 *
718 * This function is called in the prepare callback
719 */
720 static void snd_intelhad_prog_dip_v2(struct snd_pcm_substream *substream,
721 struct snd_intelhad *intelhaddata)
722 {
723 int i;
724 union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
725 union aud_info_frame2 frame2 = {.fr2_val = 0};
726 union aud_info_frame3 frame3 = {.fr3_val = 0};
727 u8 checksum = 0;
728 u32 info_frame;
729 int channels;
730
731 channels = substream->runtime->channels;
732
733 had_write_register(AUD_CNTL_ST, ctrl_state.ctrl_val);
734
735 if (intelhaddata->dp_output) {
736 info_frame = DP_INFO_FRAME_WORD1;
737 frame2.fr2_val = 1;
738 } else {
739 info_frame = HDMI_INFO_FRAME_WORD1;
740 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
741
742 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
743 intelhaddata, channels);
744
745 /*Calculte the byte wide checksum for all valid DIP words*/
746 for (i = 0; i < BYTES_PER_WORD; i++)
747 checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0;
748 for (i = 0; i < BYTES_PER_WORD; i++)
749 checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
750 for (i = 0; i < BYTES_PER_WORD; i++)
751 checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
752
753 frame2.fr2_regx.chksum = -(checksum);
754 }
755
756 had_write_register(AUD_HDMIW_INFOFR_v2, info_frame);
757 had_write_register(AUD_HDMIW_INFOFR_v2, frame2.fr2_val);
758 had_write_register(AUD_HDMIW_INFOFR_v2, frame3.fr3_val);
759
760 /* program remaining DIP words with zero */
761 for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
762 had_write_register(AUD_HDMIW_INFOFR_v2, 0x0);
763
764 ctrl_state.ctrl_regx.dip_freq = 1;
765 ctrl_state.ctrl_regx.dip_en_sta = 1;
766 had_write_register(AUD_CNTL_ST, ctrl_state.ctrl_val);
767 }
768
769 /**
770 * snd_intelhad_prog_buffer - programs buffer
771 * address and length registers
772 *
773 * @substream:substream for which the prepare function is called
774 * @intelhaddata:substream private data
775 *
776 * This function programs ring buffer address and length into registers.
777 */
778 int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata,
779 int start, int end)
780 {
781 u32 ring_buf_addr, ring_buf_size, period_bytes;
782 u8 i, num_periods;
783 struct snd_pcm_substream *substream;
784
785 substream = intelhaddata->stream_info.had_substream;
786 if (!substream) {
787 pr_err("substream is NULL\n");
788 dump_stack();
789 return 0;
790 }
791
792 ring_buf_addr = substream->runtime->dma_addr;
793 ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
794 intelhaddata->stream_info.ring_buf_size = ring_buf_size;
795 period_bytes = frames_to_bytes(substream->runtime,
796 substream->runtime->period_size);
797 num_periods = substream->runtime->periods;
798
799 /*
800 * buffer addr should be 64 byte aligned, period bytes
801 * will be used to calculate addr offset
802 */
803 period_bytes &= ~0x3F;
804
805 /* Hardware supports MAX_PERIODS buffers */
806 if (end >= HAD_MAX_PERIODS)
807 return -EINVAL;
808
809 for (i = start; i <= end; i++) {
810 /* Program the buf registers with addr and len */
811 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
812 (i * period_bytes);
813 if (i < num_periods-1)
814 intelhaddata->buf_info[i].buf_size = period_bytes;
815 else
816 intelhaddata->buf_info[i].buf_size = ring_buf_size -
817 (period_bytes*i);
818
819 had_write_register(AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
820 intelhaddata->buf_info[i].buf_addr |
821 BIT(0) | BIT(1));
822 had_write_register(AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
823 period_bytes);
824 intelhaddata->buf_info[i].is_valid = true;
825 }
826 pr_debug("%s:buf[%d-%d] addr=%#x and size=%d\n", __func__, start, end,
827 intelhaddata->buf_info[start].buf_addr,
828 intelhaddata->buf_info[start].buf_size);
829 intelhaddata->valid_buf_cnt = num_periods;
830 return 0;
831 }
832
833 int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
834 {
835 int i, retval = 0;
836 u32 len[4];
837
838 for (i = 0; i < 4 ; i++) {
839 had_read_register(AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
840 &len[i]);
841 if (!len[i])
842 retval++;
843 }
844 if (retval != 1) {
845 for (i = 0; i < 4 ; i++)
846 pr_debug("buf[%d] size=%d\n", i, len[i]);
847 }
848
849 return retval;
850 }
851
852 static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
853 {
854 u32 maud_val;
855
856 /* Select maud according to DP 1.2 spec*/
857 if (link_rate == DP_2_7_GHZ) {
858 switch (aud_samp_freq) {
859 case AUD_SAMPLE_RATE_32:
860 maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
861 break;
862
863 case AUD_SAMPLE_RATE_44_1:
864 maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
865 break;
866
867 case AUD_SAMPLE_RATE_48:
868 maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
869 break;
870
871 case AUD_SAMPLE_RATE_88_2:
872 maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
873 break;
874
875 case AUD_SAMPLE_RATE_96:
876 maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
877 break;
878
879 case AUD_SAMPLE_RATE_176_4:
880 maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
881 break;
882
883 case HAD_MAX_RATE:
884 maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
885 break;
886
887 default:
888 maud_val = -EINVAL;
889 break;
890 }
891 } else if (link_rate == DP_1_62_GHZ) {
892 switch (aud_samp_freq) {
893 case AUD_SAMPLE_RATE_32:
894 maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
895 break;
896
897 case AUD_SAMPLE_RATE_44_1:
898 maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
899 break;
900
901 case AUD_SAMPLE_RATE_48:
902 maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
903 break;
904
905 case AUD_SAMPLE_RATE_88_2:
906 maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
907 break;
908
909 case AUD_SAMPLE_RATE_96:
910 maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
911 break;
912
913 case AUD_SAMPLE_RATE_176_4:
914 maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
915 break;
916
917 case HAD_MAX_RATE:
918 maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
919 break;
920
921 default:
922 maud_val = -EINVAL;
923 break;
924 }
925 } else
926 maud_val = -EINVAL;
927
928 return maud_val;
929 }
930
931 /**
932 * snd_intelhad_prog_cts_v1 - Program HDMI audio CTS value
933 *
934 * @aud_samp_freq: sampling frequency of audio data
935 * @tmds: sampling frequency of the display data
936 * @n_param: N value, depends on aud_samp_freq
937 * @intelhaddata:substream private data
938 *
939 * Program CTS register based on the audio and display sampling frequency
940 */
941 static void snd_intelhad_prog_cts_v1(u32 aud_samp_freq, u32 tmds,
942 u32 link_rate, u32 n_param,
943 struct snd_intelhad *intelhaddata)
944 {
945 u32 cts_val;
946 u64 dividend, divisor;
947
948 /* Calculate CTS according to HDMI 1.3a spec*/
949 dividend = (u64)tmds * n_param*1000;
950 divisor = 128 * aud_samp_freq;
951 cts_val = div64_u64(dividend, divisor);
952 pr_debug("TMDS value=%d, N value=%d, CTS Value=%d\n",
953 tmds, n_param, cts_val);
954 had_write_register(AUD_HDMI_CTS, (BIT(20) | cts_val));
955 }
956
957 /**
958 * snd_intelhad_prog_cts_v2 - Program HDMI audio CTS value
959 *
960 * @aud_samp_freq: sampling frequency of audio data
961 * @tmds: sampling frequency of the display data
962 * @n_param: N value, depends on aud_samp_freq
963 * @intelhaddata:substream private data
964 *
965 * Program CTS register based on the audio and display sampling frequency
966 */
967 static void snd_intelhad_prog_cts_v2(u32 aud_samp_freq, u32 tmds,
968 u32 link_rate, u32 n_param,
969 struct snd_intelhad *intelhaddata)
970 {
971 u32 cts_val;
972 u64 dividend, divisor;
973
974 if (intelhaddata->dp_output) {
975 /* Substitute cts_val with Maud according to DP 1.2 spec*/
976 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
977 } else {
978 /* Calculate CTS according to HDMI 1.3a spec*/
979 dividend = (u64)tmds * n_param*1000;
980 divisor = 128 * aud_samp_freq;
981 cts_val = div64_u64(dividend, divisor);
982 }
983 pr_debug("TMDS value=%d, N value=%d, CTS Value=%d\n",
984 tmds, n_param, cts_val);
985 had_write_register(AUD_HDMI_CTS, (BIT(24) | cts_val));
986 }
987
988 static int had_calculate_n_value(u32 aud_samp_freq)
989 {
990 s32 n_val;
991
992 /* Select N according to HDMI 1.3a spec*/
993 switch (aud_samp_freq) {
994 case AUD_SAMPLE_RATE_32:
995 n_val = 4096;
996 break;
997
998 case AUD_SAMPLE_RATE_44_1:
999 n_val = 6272;
1000 break;
1001
1002 case AUD_SAMPLE_RATE_48:
1003 n_val = 6144;
1004 break;
1005
1006 case AUD_SAMPLE_RATE_88_2:
1007 n_val = 12544;
1008 break;
1009
1010 case AUD_SAMPLE_RATE_96:
1011 n_val = 12288;
1012 break;
1013
1014 case AUD_SAMPLE_RATE_176_4:
1015 n_val = 25088;
1016 break;
1017
1018 case HAD_MAX_RATE:
1019 n_val = 24576;
1020 break;
1021
1022 default:
1023 n_val = -EINVAL;
1024 break;
1025 }
1026 return n_val;
1027 }
1028
1029 /**
1030 * snd_intelhad_prog_n_v1 - Program HDMI audio N value
1031 *
1032 * @aud_samp_freq: sampling frequency of audio data
1033 * @n_param: N value, depends on aud_samp_freq
1034 * @intelhaddata:substream private data
1035 *
1036 * This function is called in the prepare callback.
1037 * It programs based on the audio and display sampling frequency
1038 */
1039 static int snd_intelhad_prog_n_v1(u32 aud_samp_freq, u32 *n_param,
1040 struct snd_intelhad *intelhaddata)
1041 {
1042 s32 n_val;
1043
1044 n_val = had_calculate_n_value(aud_samp_freq);
1045
1046 if (n_val < 0)
1047 return n_val;
1048
1049 had_write_register(AUD_N_ENABLE, (BIT(20) | n_val));
1050 *n_param = n_val;
1051 return 0;
1052 }
1053
1054 /**
1055 * snd_intelhad_prog_n_v2 - Program HDMI audio N value
1056 *
1057 * @aud_samp_freq: sampling frequency of audio data
1058 * @n_param: N value, depends on aud_samp_freq
1059 * @intelhaddata:substream private data
1060 *
1061 * This function is called in the prepare callback.
1062 * It programs based on the audio and display sampling frequency
1063 */
1064 static int snd_intelhad_prog_n_v2(u32 aud_samp_freq, u32 *n_param,
1065 struct snd_intelhad *intelhaddata)
1066 {
1067 s32 n_val;
1068
1069 if (intelhaddata->dp_output) {
1070 /*
1071 * According to DP specs, Maud and Naud values hold
1072 * a relationship, which is stated as:
1073 * Maud/Naud = 512 * fs / f_LS_Clk
1074 * where, fs is the sampling frequency of the audio stream
1075 * and Naud is 32768 for Async clock.
1076 */
1077
1078 n_val = DP_NAUD_VAL;
1079 } else
1080 n_val = had_calculate_n_value(aud_samp_freq);
1081
1082 if (n_val < 0)
1083 return n_val;
1084
1085 had_write_register(AUD_N_ENABLE, (BIT(24) | n_val));
1086 *n_param = n_val;
1087 return 0;
1088 }
1089
1090 static void had_clear_underrun_intr_v1(struct snd_intelhad *intelhaddata)
1091 {
1092 u32 hdmi_status, i = 0;
1093
1094 /* Handle Underrun interrupt within Audio Unit */
1095 had_write_register(AUD_CONFIG, 0);
1096 /* Reset buffer pointers */
1097 had_write_register(AUD_HDMI_STATUS, 1);
1098 had_write_register(AUD_HDMI_STATUS, 0);
1099 /**
1100 * The interrupt status 'sticky' bits might not be cleared by
1101 * setting '1' to that bit once...
1102 */
1103 do { /* clear bit30, 31 AUD_HDMI_STATUS */
1104 had_read_register(AUD_HDMI_STATUS, &hdmi_status);
1105 pr_debug("HDMI status =0x%x\n", hdmi_status);
1106 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
1107 i++;
1108 hdmi_status &= (AUD_CONFIG_MASK_SRDBG |
1109 AUD_CONFIG_MASK_FUNCRST);
1110 hdmi_status |= ~AUD_CONFIG_MASK_UNDERRUN;
1111 had_write_register(AUD_HDMI_STATUS, hdmi_status);
1112 } else
1113 break;
1114 } while (i < MAX_CNT);
1115 if (i >= MAX_CNT)
1116 pr_err("Unable to clear UNDERRUN bits\n");
1117 }
1118
1119 static void had_clear_underrun_intr_v2(struct snd_intelhad *intelhaddata)
1120 {
1121 u32 hdmi_status, i = 0;
1122
1123 /* Handle Underrun interrupt within Audio Unit */
1124 had_write_register(AUD_CONFIG, 0);
1125 /* Reset buffer pointers */
1126 had_write_register(AUD_HDMI_STATUS_v2, 1);
1127 had_write_register(AUD_HDMI_STATUS_v2, 0);
1128 /**
1129 * The interrupt status 'sticky' bits might not be cleared by
1130 * setting '1' to that bit once...
1131 */
1132 do { /* clear bit30, 31 AUD_HDMI_STATUS */
1133 had_read_register(AUD_HDMI_STATUS_v2, &hdmi_status);
1134 pr_debug("HDMI status =0x%x\n", hdmi_status);
1135 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
1136 i++;
1137 had_write_register(AUD_HDMI_STATUS_v2, hdmi_status);
1138 } else
1139 break;
1140 } while (i < MAX_CNT);
1141 if (i >= MAX_CNT)
1142 pr_err("Unable to clear UNDERRUN bits\n");
1143 }
1144
1145 /**
1146 * snd_intelhad_open - stream initializations are done here
1147 * @substream:substream for which the stream function is called
1148 *
1149 * This function is called whenever a PCM stream is opened
1150 */
1151 static int snd_intelhad_open(struct snd_pcm_substream *substream)
1152 {
1153 struct snd_intelhad *intelhaddata;
1154 struct snd_pcm_runtime *runtime;
1155 struct had_stream_pvt *stream;
1156 struct had_pvt_data *had_stream;
1157 int retval;
1158
1159 pr_debug("snd_intelhad_open called\n");
1160 intelhaddata = snd_pcm_substream_chip(substream);
1161 had_stream = intelhaddata->private_data;
1162 runtime = substream->runtime;
1163 underrun_count = 0;
1164
1165 pm_runtime_get(intelhaddata->dev);
1166
1167 if (had_get_hwstate(intelhaddata)) {
1168 pr_err("%s: HDMI cable plugged-out\n", __func__);
1169 retval = -ENODEV;
1170 goto exit_put_handle;
1171 }
1172
1173 /* Check, if device already in use */
1174 if (runtime->private_data) {
1175 pr_err("Device already in use\n");
1176 retval = -EBUSY;
1177 goto exit_put_handle;
1178 }
1179
1180 /* set the runtime hw parameter with local snd_pcm_hardware struct */
1181 runtime->hw = snd_intel_hadstream;
1182
1183 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
1184 if (!stream) {
1185 retval = -ENOMEM;
1186 goto exit_put_handle;
1187 }
1188 stream->stream_status = STREAM_INIT;
1189 runtime->private_data = stream;
1190
1191 retval = snd_pcm_hw_constraint_integer(runtime,
1192 SNDRV_PCM_HW_PARAM_PERIODS);
1193 if (retval < 0)
1194 goto exit_err;
1195
1196 /* Make sure, that the period size is always aligned
1197 * 64byte boundary
1198 */
1199 retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
1200 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
1201 if (retval < 0) {
1202 pr_err("%s:step_size=64 failed,err=%d\n", __func__, retval);
1203 goto exit_err;
1204 }
1205
1206 return retval;
1207 exit_err:
1208 kfree(stream);
1209 exit_put_handle:
1210 pm_runtime_put(intelhaddata->dev);
1211 runtime->private_data = NULL;
1212 return retval;
1213 }
1214
1215 /**
1216 * had_period_elapsed - updates the hardware pointer status
1217 * @had_substream:substream for which the stream function is called
1218 *
1219 */
1220 static void had_period_elapsed(void *had_substream)
1221 {
1222 struct snd_pcm_substream *substream = had_substream;
1223 struct had_stream_pvt *stream;
1224
1225 /* pr_debug("had_period_elapsed called\n"); */
1226
1227 if (!substream || !substream->runtime)
1228 return;
1229 stream = substream->runtime->private_data;
1230 if (!stream)
1231 return;
1232
1233 if (stream->stream_status != STREAM_RUNNING)
1234 return;
1235 snd_pcm_period_elapsed(substream);
1236 }
1237
1238 /**
1239 * snd_intelhad_init_stream - internal function to initialize stream info
1240 * @substream:substream for which the stream function is called
1241 *
1242 */
1243 static int snd_intelhad_init_stream(struct snd_pcm_substream *substream)
1244 {
1245 struct snd_intelhad *intelhaddata = snd_pcm_substream_chip(substream);
1246
1247 pr_debug("snd_intelhad_init_stream called\n");
1248
1249 pr_debug("setting buffer ptr param\n");
1250 intelhaddata->stream_info.period_elapsed = had_period_elapsed;
1251 intelhaddata->stream_info.had_substream = substream;
1252 intelhaddata->stream_info.buffer_ptr = 0;
1253 intelhaddata->stream_info.buffer_rendered = 0;
1254 intelhaddata->stream_info.sfreq = substream->runtime->rate;
1255 return 0;
1256 }
1257
1258 /**
1259 * snd_intelhad_close- to free parameteres when stream is stopped
1260 *
1261 * @substream: substream for which the function is called
1262 *
1263 * This function is called by ALSA framework when stream is stopped
1264 */
1265 static int snd_intelhad_close(struct snd_pcm_substream *substream)
1266 {
1267 struct snd_intelhad *intelhaddata;
1268 struct snd_pcm_runtime *runtime;
1269
1270 pr_debug("snd_intelhad_close called\n");
1271
1272 intelhaddata = snd_pcm_substream_chip(substream);
1273 runtime = substream->runtime;
1274
1275 if (!runtime->private_data) {
1276 pr_debug("close() might have called after failed open");
1277 return 0;
1278 }
1279
1280 intelhaddata->stream_info.buffer_rendered = 0;
1281 intelhaddata->stream_info.buffer_ptr = 0;
1282 intelhaddata->stream_info.str_id = 0;
1283 intelhaddata->stream_info.had_substream = NULL;
1284
1285 /* Check if following drv_status modification is required - VA */
1286 if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1287 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1288 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1289 __func__, __LINE__);
1290 }
1291 kfree(runtime->private_data);
1292 runtime->private_data = NULL;
1293 pm_runtime_put(intelhaddata->dev);
1294 return 0;
1295 }
1296
1297 /**
1298 * snd_intelhad_hw_params- to setup the hardware parameters
1299 * like allocating the buffers
1300 *
1301 * @substream: substream for which the function is called
1302 * @hw_params: hardware parameters
1303 *
1304 * This function is called by ALSA framework when hardware params are set
1305 */
1306 static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1307 struct snd_pcm_hw_params *hw_params)
1308 {
1309 unsigned long addr;
1310 int pages, buf_size, retval;
1311
1312 pr_debug("snd_intelhad_hw_params called\n");
1313
1314 if (!hw_params)
1315 return -EINVAL;
1316
1317 buf_size = params_buffer_bytes(hw_params);
1318 retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1319 if (retval < 0)
1320 return retval;
1321 pr_debug("%s:allocated memory = %d\n", __func__, buf_size);
1322 /* mark the pages as uncached region */
1323 addr = (unsigned long) substream->runtime->dma_area;
1324 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1325 retval = set_memory_uc(addr, pages);
1326 if (retval) {
1327 pr_err("set_memory_uc failed.Error:%d\n", retval);
1328 return retval;
1329 }
1330 memset(substream->runtime->dma_area, 0, buf_size);
1331
1332 return retval;
1333 }
1334
1335 /**
1336 * snd_intelhad_hw_free- to release the resources allocated during
1337 * hardware params setup
1338 *
1339 * @substream: substream for which the function is called
1340 *
1341 * This function is called by ALSA framework before close callback.
1342 *
1343 */
1344 static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1345 {
1346 unsigned long addr;
1347 u32 pages;
1348
1349 pr_debug("snd_intelhad_hw_free called\n");
1350
1351 /* mark back the pages as cached/writeback region before the free */
1352 if (substream->runtime->dma_area != NULL) {
1353 addr = (unsigned long) substream->runtime->dma_area;
1354 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1355 PAGE_SIZE;
1356 set_memory_wb(addr, pages);
1357 return snd_pcm_lib_free_pages(substream);
1358 }
1359 return 0;
1360 }
1361
1362 /**
1363 * snd_intelhad_pcm_trigger - stream activities are handled here
1364 * @substream:substream for which the stream function is called
1365 * @cmd:the stream commamd thats requested from upper layer
1366 * This function is called whenever an a stream activity is invoked
1367 */
1368 static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1369 int cmd)
1370 {
1371 int caps, retval = 0;
1372 unsigned long flag_irq;
1373 struct snd_intelhad *intelhaddata;
1374 struct had_stream_pvt *stream;
1375 struct had_pvt_data *had_stream;
1376
1377 pr_debug("snd_intelhad_pcm_trigger called\n");
1378
1379 intelhaddata = snd_pcm_substream_chip(substream);
1380 stream = substream->runtime->private_data;
1381 had_stream = intelhaddata->private_data;
1382
1383 switch (cmd) {
1384 case SNDRV_PCM_TRIGGER_START:
1385 pr_debug("Trigger Start\n");
1386
1387 /* Disable local INTRs till register prgmng is done */
1388 if (had_get_hwstate(intelhaddata)) {
1389 pr_err("_START: HDMI cable plugged-out\n");
1390 retval = -ENODEV;
1391 break;
1392 }
1393 stream->stream_status = STREAM_RUNNING;
1394
1395 had_stream->stream_type = HAD_RUNNING_STREAM;
1396
1397 /* Enable Audio */
1398 /*
1399 * ToDo: Need to enable UNDERRUN interrupts as well
1400 * caps = HDMI_AUDIO_UNDERRUN | HDMI_AUDIO_BUFFER_DONE;
1401 */
1402 caps = HDMI_AUDIO_BUFFER_DONE;
1403 retval = had_set_caps(HAD_SET_ENABLE_AUDIO_INT, &caps);
1404 retval = had_set_caps(HAD_SET_ENABLE_AUDIO, NULL);
1405 intelhaddata->ops->enable_audio(substream, 1);
1406
1407 pr_debug("Processed _Start\n");
1408
1409 break;
1410
1411 case SNDRV_PCM_TRIGGER_STOP:
1412 pr_debug("Trigger Stop\n");
1413 spin_lock_irqsave(&intelhaddata->had_spinlock, flag_irq);
1414 intelhaddata->stream_info.str_id = 0;
1415 intelhaddata->curr_buf = 0;
1416
1417 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers*/
1418
1419 had_stream->stream_type = HAD_INIT;
1420 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flag_irq);
1421 /* Disable Audio */
1422 /*
1423 * ToDo: Need to disable UNDERRUN interrupts as well
1424 * caps = HDMI_AUDIO_UNDERRUN | HDMI_AUDIO_BUFFER_DONE;
1425 */
1426 caps = HDMI_AUDIO_BUFFER_DONE;
1427 had_set_caps(HAD_SET_DISABLE_AUDIO_INT, &caps);
1428 intelhaddata->ops->enable_audio(substream, 0);
1429 /* Reset buffer pointers */
1430 intelhaddata->ops->reset_audio(1);
1431 intelhaddata->ops->reset_audio(0);
1432 stream->stream_status = STREAM_DROPPED;
1433 had_set_caps(HAD_SET_DISABLE_AUDIO, NULL);
1434 break;
1435
1436 default:
1437 retval = -EINVAL;
1438 }
1439 return retval;
1440 }
1441
1442 /**
1443 * snd_intelhad_pcm_prepare- internal preparation before starting a stream
1444 *
1445 * @substream: substream for which the function is called
1446 *
1447 * This function is called when a stream is started for internal preparation.
1448 */
1449 static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1450 {
1451 int retval;
1452 u32 disp_samp_freq, n_param;
1453 u32 link_rate = 0;
1454 struct snd_intelhad *intelhaddata;
1455 struct snd_pcm_runtime *runtime;
1456 struct had_pvt_data *had_stream;
1457
1458 pr_debug("snd_intelhad_pcm_prepare called\n");
1459
1460 intelhaddata = snd_pcm_substream_chip(substream);
1461 runtime = substream->runtime;
1462 had_stream = intelhaddata->private_data;
1463
1464 if (had_get_hwstate(intelhaddata)) {
1465 pr_err("%s: HDMI cable plugged-out\n", __func__);
1466 retval = -ENODEV;
1467 goto prep_end;
1468 }
1469
1470 pr_debug("period_size=%d\n",
1471 (int)frames_to_bytes(runtime, runtime->period_size));
1472 pr_debug("periods=%d\n", runtime->periods);
1473 pr_debug("buffer_size=%d\n", (int)snd_pcm_lib_buffer_bytes(substream));
1474 pr_debug("rate=%d\n", runtime->rate);
1475 pr_debug("channels=%d\n", runtime->channels);
1476
1477 if (intelhaddata->stream_info.str_id) {
1478 pr_debug("_prepare is called for existing str_id#%d\n",
1479 intelhaddata->stream_info.str_id);
1480 retval = snd_intelhad_pcm_trigger(substream,
1481 SNDRV_PCM_TRIGGER_STOP);
1482 return retval;
1483 }
1484
1485 retval = snd_intelhad_init_stream(substream);
1486 if (retval)
1487 goto prep_end;
1488
1489
1490 /* Get N value in KHz */
1491 retval = had_get_caps(HAD_GET_DISPLAY_RATE, &disp_samp_freq);
1492 if (retval) {
1493 pr_err("querying display sampling freq failed %#x\n", retval);
1494 goto prep_end;
1495 }
1496
1497 had_get_caps(HAD_GET_ELD, &intelhaddata->eeld);
1498 had_get_caps(HAD_GET_DP_OUTPUT, &intelhaddata->dp_output);
1499
1500 retval = intelhaddata->ops->prog_n(substream->runtime->rate, &n_param,
1501 intelhaddata);
1502 if (retval) {
1503 pr_err("programming N value failed %#x\n", retval);
1504 goto prep_end;
1505 }
1506
1507 if (intelhaddata->dp_output)
1508 had_get_caps(HAD_GET_LINK_RATE, &link_rate);
1509
1510
1511 intelhaddata->ops->prog_cts(substream->runtime->rate,
1512 disp_samp_freq, link_rate,
1513 n_param, intelhaddata);
1514
1515 intelhaddata->ops->prog_dip(substream, intelhaddata);
1516
1517 retval = intelhaddata->ops->audio_ctrl(substream, intelhaddata);
1518
1519 /* Prog buffer address */
1520 retval = snd_intelhad_prog_buffer(intelhaddata,
1521 HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1522
1523 /*
1524 * Program channel mapping in following order:
1525 * FL, FR, C, LFE, RL, RR
1526 */
1527
1528 had_write_register(AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
1529
1530 prep_end:
1531 return retval;
1532 }
1533
1534 /**
1535 * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
1536 *
1537 * @substream: substream for which the function is called
1538 *
1539 * This function is called by ALSA framework to get the current hw buffer ptr
1540 * when a period is elapsed
1541 */
1542 static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1543 struct snd_pcm_substream *substream)
1544 {
1545 struct snd_intelhad *intelhaddata;
1546 u32 bytes_rendered = 0;
1547 u32 t;
1548 int buf_id;
1549
1550 /* pr_debug("snd_intelhad_pcm_pointer called\n"); */
1551
1552 intelhaddata = snd_pcm_substream_chip(substream);
1553
1554 if (intelhaddata->flag_underrun) {
1555 intelhaddata->flag_underrun = 0;
1556 return SNDRV_PCM_POS_XRUN;
1557 }
1558
1559 /* Use a hw register to calculate sub-period position reports.
1560 * This makes PulseAudio happier.
1561 */
1562
1563 buf_id = intelhaddata->curr_buf % 4;
1564 had_read_register(AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
1565
1566 if ((t == 0) || (t == ((u32)-1L))) {
1567 underrun_count++;
1568 pr_debug("discovered buffer done for buf %d, count = %d\n",
1569 buf_id, underrun_count);
1570
1571 if (underrun_count > (HAD_MIN_PERIODS/2)) {
1572 pr_debug("assume audio_codec_reset, underrun = %d - do xrun\n",
1573 underrun_count);
1574 underrun_count = 0;
1575 return SNDRV_PCM_POS_XRUN;
1576 }
1577 } else {
1578 /* Reset Counter */
1579 underrun_count = 0;
1580 }
1581
1582 t = intelhaddata->buf_info[buf_id].buf_size - t;
1583
1584 if (intelhaddata->stream_info.buffer_rendered)
1585 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1586 intelhaddata->stream_info.ring_buf_size,
1587 &(bytes_rendered));
1588
1589 intelhaddata->stream_info.buffer_ptr = bytes_to_frames(
1590 substream->runtime,
1591 bytes_rendered + t);
1592 return intelhaddata->stream_info.buffer_ptr;
1593 }
1594
1595 /**
1596 * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
1597 *
1598 * @substream: substream for which the function is called
1599 * @vma: struct instance of memory VMM memory area
1600 *
1601 * This function is called by OS when a user space component
1602 * tries to get mmap memory from driver
1603 */
1604 static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1605 struct vm_area_struct *vma)
1606 {
1607
1608 pr_debug("snd_intelhad_pcm_mmap called\n");
1609
1610 pr_debug("entry with prot:%s\n", __func__);
1611 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1612 return remap_pfn_range(vma, vma->vm_start,
1613 substream->dma_buffer.addr >> PAGE_SHIFT,
1614 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1615 }
1616
1617 int hdmi_audio_mode_change(struct snd_pcm_substream *substream)
1618 {
1619 int retval = 0;
1620 u32 disp_samp_freq, n_param;
1621 u32 link_rate = 0;
1622 struct snd_intelhad *intelhaddata;
1623
1624 intelhaddata = snd_pcm_substream_chip(substream);
1625
1626 /* Disable Audio */
1627 intelhaddata->ops->enable_audio(substream, 0);
1628
1629 /* Update CTS value */
1630 retval = had_get_caps(HAD_GET_DISPLAY_RATE, &disp_samp_freq);
1631 if (retval) {
1632 pr_err("querying display sampling freq failed %#x\n", retval);
1633 goto out;
1634 }
1635
1636 retval = intelhaddata->ops->prog_n(substream->runtime->rate, &n_param,
1637 intelhaddata);
1638 if (retval) {
1639 pr_err("programming N value failed %#x\n", retval);
1640 goto out;
1641 }
1642
1643 if (intelhaddata->dp_output)
1644 had_get_caps(HAD_GET_LINK_RATE, &link_rate);
1645
1646 intelhaddata->ops->prog_cts(substream->runtime->rate,
1647 disp_samp_freq, link_rate,
1648 n_param, intelhaddata);
1649
1650 /* Enable Audio */
1651 intelhaddata->ops->enable_audio(substream, 1);
1652
1653 out:
1654 return retval;
1655 }
1656
1657 /*PCM operations structure and the calls back for the same */
1658 struct snd_pcm_ops snd_intelhad_playback_ops = {
1659 .open = snd_intelhad_open,
1660 .close = snd_intelhad_close,
1661 .ioctl = snd_pcm_lib_ioctl,
1662 .hw_params = snd_intelhad_hw_params,
1663 .hw_free = snd_intelhad_hw_free,
1664 .prepare = snd_intelhad_pcm_prepare,
1665 .trigger = snd_intelhad_pcm_trigger,
1666 .pointer = snd_intelhad_pcm_pointer,
1667 .mmap = snd_intelhad_pcm_mmap,
1668 };
1669
1670 /**
1671 * snd_intelhad_create - to crete alsa card instance
1672 *
1673 * @intelhaddata: pointer to internal context
1674 * @card: pointer to card
1675 *
1676 * This function is called when the hdmi cable is plugged in
1677 */
1678 static int snd_intelhad_create(
1679 struct snd_intelhad *intelhaddata,
1680 struct snd_card *card)
1681 {
1682 int retval;
1683 static struct snd_device_ops ops = {
1684 };
1685
1686 pr_debug("snd_intelhad_create called\n");
1687
1688 if (!intelhaddata)
1689 return -EINVAL;
1690
1691 /* ALSA api to register the device */
1692 retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, intelhaddata, &ops);
1693 return retval;
1694 }
1695 /**
1696 * snd_intelhad_pcm_free - to free the memory allocated
1697 *
1698 * @pcm: pointer to pcm instance
1699 * This function is called when the device is removed
1700 */
1701 static void snd_intelhad_pcm_free(struct snd_pcm *pcm)
1702 {
1703 pr_debug("Freeing PCM preallocated pages\n");
1704 snd_pcm_lib_preallocate_free_for_all(pcm);
1705 }
1706
1707 static int had_iec958_info(struct snd_kcontrol *kcontrol,
1708 struct snd_ctl_elem_info *uinfo)
1709 {
1710 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1711 uinfo->count = 1;
1712 return 0;
1713 }
1714
1715 static int had_iec958_get(struct snd_kcontrol *kcontrol,
1716 struct snd_ctl_elem_value *ucontrol)
1717 {
1718 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1719
1720 ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1721 ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1722 ucontrol->value.iec958.status[2] =
1723 (intelhaddata->aes_bits >> 16) & 0xff;
1724 ucontrol->value.iec958.status[3] =
1725 (intelhaddata->aes_bits >> 24) & 0xff;
1726 return 0;
1727 }
1728 static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1729 struct snd_ctl_elem_value *ucontrol)
1730 {
1731 ucontrol->value.iec958.status[0] = 0xff;
1732 ucontrol->value.iec958.status[1] = 0xff;
1733 ucontrol->value.iec958.status[2] = 0xff;
1734 ucontrol->value.iec958.status[3] = 0xff;
1735 return 0;
1736 }
1737 static int had_iec958_put(struct snd_kcontrol *kcontrol,
1738 struct snd_ctl_elem_value *ucontrol)
1739 {
1740 unsigned int val;
1741 struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1742
1743 pr_debug("entered had_iec958_put\n");
1744 val = (ucontrol->value.iec958.status[0] << 0) |
1745 (ucontrol->value.iec958.status[1] << 8) |
1746 (ucontrol->value.iec958.status[2] << 16) |
1747 (ucontrol->value.iec958.status[3] << 24);
1748 if (intelhaddata->aes_bits != val) {
1749 intelhaddata->aes_bits = val;
1750 return 1;
1751 }
1752 return 1;
1753 }
1754
1755 static struct snd_kcontrol_new had_control_iec958_mask = {
1756 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1757 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1758 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1759 .info = had_iec958_info, /* shared */
1760 .get = had_iec958_mask_get,
1761 };
1762
1763 static struct snd_kcontrol_new had_control_iec958 = {
1764 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1765 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1766 .info = had_iec958_info,
1767 .get = had_iec958_get,
1768 .put = had_iec958_put
1769 };
1770
1771 static struct snd_intel_had_interface had_interface = {
1772 .name = "hdmi-audio",
1773 .query = hdmi_audio_query,
1774 .suspend = hdmi_audio_suspend,
1775 .resume = hdmi_audio_resume,
1776 };
1777
1778 static struct had_ops had_ops_v1 = {
1779 .enable_audio = snd_intelhad_enable_audio_v1,
1780 .reset_audio = snd_intelhad_reset_audio_v1,
1781 .prog_n = snd_intelhad_prog_n_v1,
1782 .prog_cts = snd_intelhad_prog_cts_v1,
1783 .audio_ctrl = snd_intelhad_prog_audio_ctrl_v1,
1784 .prog_dip = snd_intelhad_prog_dip_v1,
1785 .handle_underrun = had_clear_underrun_intr_v1,
1786 };
1787
1788 static struct had_ops had_ops_v2 = {
1789 .enable_audio = snd_intelhad_enable_audio_v2,
1790 .reset_audio = snd_intelhad_reset_audio_v2,
1791 .prog_n = snd_intelhad_prog_n_v2,
1792 .prog_cts = snd_intelhad_prog_cts_v2,
1793 .audio_ctrl = snd_intelhad_prog_audio_ctrl_v2,
1794 .prog_dip = snd_intelhad_prog_dip_v2,
1795 .handle_underrun = had_clear_underrun_intr_v2,
1796 };
1797 /**
1798 * hdmi_audio_probe - to create sound card instance for HDMI audio playabck
1799 *
1800 *@haddata: pointer to HAD private data
1801 *@card_id: card for which probe is called
1802 *
1803 * This function is called when the hdmi cable is plugged in. This function
1804 * creates and registers the sound card with ALSA
1805 */
1806 int hdmi_audio_probe(void *deviceptr)
1807 {
1808 int retval;
1809 struct snd_pcm *pcm;
1810 struct snd_card *card;
1811 struct had_callback_ops ops_cb;
1812 struct snd_intelhad *intelhaddata;
1813 struct had_pvt_data *had_stream;
1814 struct platform_device *devptr = deviceptr;
1815
1816 pr_debug("Enter %s\n", __func__);
1817
1818 pr_debug("hdmi_audio_probe dma_mask: %p\n", devptr->dev.dma_mask);
1819
1820 /* allocate memory for saving internal context and working */
1821 intelhaddata = kzalloc(sizeof(*intelhaddata), GFP_KERNEL);
1822 if (!intelhaddata)
1823 return -ENOMEM;
1824
1825 had_stream = kzalloc(sizeof(*had_stream), GFP_KERNEL);
1826 if (!had_stream) {
1827 retval = -ENOMEM;
1828 goto free_haddata;
1829 }
1830
1831 had_data = intelhaddata;
1832 ops_cb.intel_had_event_call_back = had_event_handler;
1833
1834 /* registering with display driver to get access to display APIs */
1835
1836 retval = mid_hdmi_audio_setup(
1837 ops_cb.intel_had_event_call_back,
1838 &(intelhaddata->reg_ops),
1839 &(intelhaddata->query_ops));
1840 if (retval) {
1841 pr_err("querying display driver APIs failed %#x\n", retval);
1842 goto free_hadstream;
1843 }
1844 mutex_lock(&had_mutex);
1845 spin_lock_init(&intelhaddata->had_spinlock);
1846 intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
1847 pr_debug("%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1848 __func__, __LINE__);
1849
1850 /* create a card instance with ALSA framework */
1851 retval = snd_card_new(&devptr->dev, hdmi_card_index, hdmi_card_id,
1852 THIS_MODULE, 0, &card);
1853
1854 if (retval)
1855 goto unlock_mutex;
1856 intelhaddata->card = card;
1857 intelhaddata->card_id = hdmi_card_id;
1858 intelhaddata->card_index = card->number;
1859 intelhaddata->private_data = had_stream;
1860 intelhaddata->flag_underrun = 0;
1861 intelhaddata->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1862 strncpy(card->driver, INTEL_HAD, strlen(INTEL_HAD));
1863 strncpy(card->shortname, INTEL_HAD, strlen(INTEL_HAD));
1864
1865 retval = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1866 MAX_CAP_STREAMS, &pcm);
1867 if (retval)
1868 goto err;
1869
1870 /* setup private data which can be retrieved when required */
1871 pcm->private_data = intelhaddata;
1872 pcm->private_free = snd_intelhad_pcm_free;
1873 pcm->info_flags = 0;
1874 strncpy(pcm->name, card->shortname, strlen(card->shortname));
1875 /* setup the ops for palyabck */
1876 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1877 &snd_intelhad_playback_ops);
1878 /* allocate dma pages for ALSA stream operations
1879 * memory allocated is based on size, not max value
1880 * thus using same argument for max & size
1881 */
1882 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
1883 SNDRV_DMA_TYPE_DEV, NULL,
1884 HAD_MAX_BUFFER, HAD_MAX_BUFFER);
1885
1886 if (card->dev == NULL)
1887 pr_debug("card->dev is NULL!!!!! Should not be this case\n");
1888 else if (card->dev->dma_mask == NULL)
1889 pr_debug("hdmi_audio_probe dma_mask is NULL!!!!!\n");
1890 else
1891 pr_debug("hdmi_audio_probe dma_mask is : %p\n",
1892 card->dev->dma_mask);
1893
1894 if (retval)
1895 goto err;
1896
1897 /* internal function call to register device with ALSA */
1898 retval = snd_intelhad_create(intelhaddata, card);
1899 if (retval)
1900 goto err;
1901
1902 card->private_data = &intelhaddata;
1903 retval = snd_card_register(card);
1904 if (retval)
1905 goto err;
1906
1907 /* IEC958 controls */
1908 retval = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask,
1909 intelhaddata));
1910 if (retval < 0)
1911 goto err;
1912 retval = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958,
1913 intelhaddata));
1914 if (retval < 0)
1915 goto err;
1916
1917 init_channel_allocations();
1918
1919 /* Register channel map controls */
1920 retval = had_register_chmap_ctls(intelhaddata, pcm);
1921 if (retval < 0)
1922 goto err;
1923
1924 intelhaddata->dev = &devptr->dev;
1925 pm_runtime_set_active(intelhaddata->dev);
1926 pm_runtime_enable(intelhaddata->dev);
1927
1928 mutex_unlock(&had_mutex);
1929 retval = mid_hdmi_audio_register(&had_interface, intelhaddata);
1930 if (retval) {
1931 pr_err("registering with display driver failed %#x\n", retval);
1932 snd_card_free(card);
1933 goto free_hadstream;
1934 }
1935
1936 intelhaddata->hw_silence = 1;
1937 had_ops_v1 = had_ops_v1; /* unused */
1938 intelhaddata->ops = &had_ops_v2;
1939
1940 return retval;
1941 err:
1942 snd_card_free(card);
1943 unlock_mutex:
1944 mutex_unlock(&had_mutex);
1945 free_hadstream:
1946 kfree(had_stream);
1947 pm_runtime_disable(intelhaddata->dev);
1948 intelhaddata->dev = NULL;
1949 free_haddata:
1950 kfree(intelhaddata);
1951 intelhaddata = NULL;
1952 pr_err("Error returned from %s api %#x\n", __func__, retval);
1953 return retval;
1954 }
1955
1956 /**
1957 * hdmi_audio_remove - removes the alsa card
1958 *
1959 *@haddata: pointer to HAD private data
1960 *
1961 * This function is called when the hdmi cable is un-plugged. This function
1962 * free the sound card.
1963 */
1964 int hdmi_audio_remove(void *pdevptr)
1965 {
1966 struct snd_intelhad *intelhaddata = had_data;
1967 int caps;
1968
1969 pr_debug("Enter %s\n", __func__);
1970
1971 if (!intelhaddata)
1972 return 0;
1973
1974 if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1975 caps = HDMI_AUDIO_UNDERRUN | HDMI_AUDIO_BUFFER_DONE;
1976 had_set_caps(HAD_SET_DISABLE_AUDIO_INT, &caps);
1977 had_set_caps(HAD_SET_DISABLE_AUDIO, NULL);
1978 }
1979 snd_card_free(intelhaddata->card);
1980 kfree(intelhaddata->private_data);
1981 kfree(intelhaddata);
1982 return 0;
1983 }
1984
1985 MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
1986 MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
1987 MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
1988 MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
1989 MODULE_DESCRIPTION("Intel HDMI Audio driver");
1990 MODULE_LICENSE("GPL v2");
1991 MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");
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