src/llvm/include/llvm/CodeGen/RegisterScavenging.h

   1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file declares the machine register scavenger class. It can provide
  11 // information such as unused register at any point in a machine basic block.
  12 // It also provides a mechanism to make registers availbale by evicting them
  13 // to spill slots.
  14 //
  15 //===----------------------------------------------------------------------===//
  16
  17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
  18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
  19
  20 #include "llvm/ADT/BitVector.h"
  21 #include "llvm/CodeGen/MachineBasicBlock.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23
  24 namespace llvm {
  25
  26 class MachineRegisterInfo;
  27 class TargetRegisterInfo;
  28 class TargetInstrInfo;
  29 class TargetRegisterClass;
  30
  31 class RegScavenger {
  32   const TargetRegisterInfo *TRI;
  33   const TargetInstrInfo *TII;
  34   MachineRegisterInfo* MRI;
  35   MachineBasicBlock *MBB;
  36   MachineBasicBlock::iterator MBBI;
  37   unsigned NumPhysRegs;
  38
  39   /// Tracking - True if RegScavenger is currently tracking the liveness of
  40   /// registers.
  41   bool Tracking;
  42
  43   /// ScavengingFrameIndex - Special spill slot used for scavenging a register
  44   /// post register allocation.
  45   int ScavengingFrameIndex;
  46
  47   /// ScavengedReg - If none zero, the specific register is currently being
  48   /// scavenged. That is, it is spilled to the special scavenging stack slot.
  49   unsigned ScavengedReg;
  50
  51   /// ScavengedRC - Register class of the scavenged register.
  52   ///
  53   const TargetRegisterClass *ScavengedRC;
  54
  55   /// ScavengeRestore - Instruction that restores the scavenged register from
  56   /// stack.
  57   const MachineInstr *ScavengeRestore;
  58
  59   /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
  60   ///
  61   BitVector CalleeSavedRegs;
  62
  63   /// RegsAvailable - The current state of all the physical registers immediately
  64   /// before MBBI. One bit per physical register. If bit is set that means it's
  65   /// available, unset means the register is currently being used.
  66   BitVector RegsAvailable;
  67
  68   // These BitVectors are only used internally to forward(). They are members
  69   // to avoid frequent reallocations.
  70   BitVector KillRegs, DefRegs;
  71
  72 public:
  73   RegScavenger()
  74     : MBB(NULL), NumPhysRegs(0), Tracking(false),
  75       ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
  76
  77   /// enterBasicBlock - Start tracking liveness from the begin of the specific
  78   /// basic block.
  79   void enterBasicBlock(MachineBasicBlock *mbb);
  80
  81   /// initRegState - allow resetting register state info for multiple
  82   /// passes over/within the same function.
  83   void initRegState();
  84
  85   /// forward - Move the internal MBB iterator and update register states.
  86   void forward();
  87
  88   /// forward - Move the internal MBB iterator and update register states until
  89   /// it has processed the specific iterator.
  90   void forward(MachineBasicBlock::iterator I) {
  91     if (!Tracking && MBB->begin() != I) forward();
  92     while (MBBI != I) forward();
  93   }
  94
  95   /// skipTo - Move the internal MBB iterator but do not update register states.
  96   ///
  97   void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
  98
  99   /// getRegsUsed - return all registers currently in use in used.
 100   void getRegsUsed(BitVector &used, bool includeReserved);
 101
 102   /// getRegsAvailable - Return all available registers in the register class
 103   /// in Mask.
 104   BitVector getRegsAvailable(const TargetRegisterClass *RC);
 105
 106   /// FindUnusedReg - Find a unused register of the specified register class.
 107   /// Return 0 if none is found.
 108   unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
 109
 110   /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
 111   /// ScavengingFrameIndex.
 112   void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
 113   int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
 114
 115   /// scavengeRegister - Make a register of the specific register class
 116   /// available and do the appropriate bookkeeping. SPAdj is the stack
 117   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
 118   /// Returns the scavenged register.
 119   unsigned scavengeRegister(const TargetRegisterClass *RegClass,
 120                             MachineBasicBlock::iterator I, int SPAdj);
 121   unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
 122     return scavengeRegister(RegClass, MBBI, SPAdj);
 123   }
 124
 125   /// setUsed - Tell the scavenger a register is used.
 126   ///
 127   void setUsed(unsigned Reg);
 128 private:
 129   /// isReserved - Returns true if a register is reserved. It is never "unused".
 130   bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
 131
 132   /// isUsed - Test if a register is currently being used.  When called by the
 133   /// isAliasUsed function, we only check isReserved if this is the original
 134   /// register, not an alias register.
 135   ///
 136   bool isUsed(unsigned Reg, bool CheckReserved = true) const   {
 137     return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
 138   }
 139
 140   /// isAliasUsed - Is Reg or an alias currently in use?
 141   bool isAliasUsed(unsigned Reg) const;
 142
 143   /// setUsed / setUnused - Mark the state of one or a number of registers.
 144   ///
 145   void setUsed(BitVector &Regs) {
 146     RegsAvailable.reset(Regs);
 147   }
 148   void setUnused(BitVector &Regs) {
 149     RegsAvailable |= Regs;
 150   }
 151
 152   /// Add Reg and all its sub-registers to BV.
 153   void addRegWithSubRegs(BitVector &BV, unsigned Reg);
 154
 155   /// findSurvivorReg - Return the candidate register that is unused for the
 156   /// longest after StartMI. UseMI is set to the instruction where the search
 157   /// stopped.
 158   ///
 159   /// No more than InstrLimit instructions are inspected.
 160   unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
 161                            BitVector &Candidates,
 162                            unsigned InstrLimit,
 163                            MachineBasicBlock::iterator &UseMI);
 164
 165 };
 166
 167 } // End llvm namespace
 168
 169 #endif