src/llvm/lib/Target/Hexagon/HexagonOperands.td

   1 //===- HexagonOperands.td - Hexagon immediate processing -*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illnois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 // Immediate operands.
  11
  12 let PrintMethod = "printImmOperand" in {
  13   // f32Ext type is used to identify constant extended floating point immediates.
  14   def f32Ext : Operand<f32>;
  15   def s32Imm : Operand<i32>;
  16   def s26_6Imm : Operand<i32>;
  17   def s16Imm : Operand<i32>;
  18   def s12Imm : Operand<i32>;
  19   def s11Imm : Operand<i32>;
  20   def s11_0Imm : Operand<i32>;
  21   def s11_1Imm : Operand<i32>;
  22   def s11_2Imm : Operand<i32>;
  23   def s11_3Imm : Operand<i32>;
  24   def s10Imm : Operand<i32>;
  25   def s9Imm : Operand<i32>;
  26   def m9Imm : Operand<i32>;
  27   def s8Imm : Operand<i32>;
  28   def s8Imm64 : Operand<i64>;
  29   def s6Imm : Operand<i32>;
  30   def s4Imm : Operand<i32>;
  31   def s4_0Imm : Operand<i32>;
  32   def s4_1Imm : Operand<i32>;
  33   def s4_2Imm : Operand<i32>;
  34   def s4_3Imm : Operand<i32>;
  35   def u64Imm : Operand<i64>;
  36   def u32Imm : Operand<i32>;
  37   def u26_6Imm : Operand<i32>;
  38   def u16Imm : Operand<i32>;
  39   def u16_0Imm : Operand<i32>;
  40   def u16_1Imm : Operand<i32>;
  41   def u16_2Imm : Operand<i32>;
  42   def u11_3Imm : Operand<i32>;
  43   def u10Imm : Operand<i32>;
  44   def u9Imm : Operand<i32>;
  45   def u8Imm : Operand<i32>;
  46   def u7Imm : Operand<i32>;
  47   def u6Imm : Operand<i32>;
  48   def u6_0Imm : Operand<i32>;
  49   def u6_1Imm : Operand<i32>;
  50   def u6_2Imm : Operand<i32>;
  51   def u6_3Imm : Operand<i32>;
  52   def u5Imm : Operand<i32>;
  53   def u4Imm : Operand<i32>;
  54   def u3Imm : Operand<i32>;
  55   def u2Imm : Operand<i32>;
  56   def u1Imm : Operand<i32>;
  57   def n8Imm : Operand<i32>;
  58   def m6Imm : Operand<i32>;
  59 }
  60
  61 let PrintMethod = "printNOneImmOperand" in
  62 def nOneImm : Operand<i32>;
  63
  64 //
  65 // Immediate predicates
  66 //
  67 def s32ImmPred  : PatLeaf<(i32 imm), [{
  68   // s32ImmPred predicate - True if the immediate fits in a 32-bit sign extended
  69   // field.
  70   int64_t v = (int64_t)N->getSExtValue();
  71   return isInt<32>(v);
  72 }]>;
  73
  74 def s32_24ImmPred  : PatLeaf<(i32 imm), [{
  75   // s32_24ImmPred predicate - True if the immediate fits in a 32-bit sign
  76   // extended field that is a multiple of 0x1000000.
  77   int64_t v = (int64_t)N->getSExtValue();
  78   return isShiftedInt<32,24>(v);
  79 }]>;
  80
  81 def s32_16s8ImmPred  : PatLeaf<(i32 imm), [{
  82   // s32_16s8ImmPred predicate - True if the immediate fits in a 32-bit sign
  83   // extended field that is a multiple of 0x10000.
  84   int64_t v = (int64_t)N->getSExtValue();
  85   return isShiftedInt<24,16>(v);
  86 }]>;
  87
  88 def s26_6ImmPred  : PatLeaf<(i32 imm), [{
  89   // s26_6ImmPred predicate - True if the immediate fits in a 32-bit
  90   // sign extended field.
  91   int64_t v = (int64_t)N->getSExtValue();
  92   return isShiftedInt<26,6>(v);
  93 }]>;
  94
  95
  96 def s16ImmPred  : PatLeaf<(i32 imm), [{
  97   // s16ImmPred predicate - True if the immediate fits in a 16-bit sign extended
  98   // field.
  99   int64_t v = (int64_t)N->getSExtValue();
 100   return isInt<16>(v);
 101 }]>;
 102
 103
 104 def s13ImmPred  : PatLeaf<(i32 imm), [{
 105   // s13ImmPred predicate - True if the immediate fits in a 13-bit sign extended
 106   // field.
 107   int64_t v = (int64_t)N->getSExtValue();
 108   return isInt<13>(v);
 109 }]>;
 110
 111
 112 def s12ImmPred  : PatLeaf<(i32 imm), [{
 113   // s12ImmPred predicate - True if the immediate fits in a 12-bit
 114   // sign extended field.
 115   int64_t v = (int64_t)N->getSExtValue();
 116   return isInt<12>(v);
 117 }]>;
 118
 119 def s11_0ImmPred  : PatLeaf<(i32 imm), [{
 120   // s11_0ImmPred predicate - True if the immediate fits in a 11-bit
 121   // sign extended field.
 122   int64_t v = (int64_t)N->getSExtValue();
 123   return isInt<11>(v);
 124 }]>;
 125
 126
 127 def s11_1ImmPred  : PatLeaf<(i32 imm), [{
 128   // s11_1ImmPred predicate - True if the immediate fits in a 12-bit
 129   // sign extended field and is a multiple of 2.
 130   int64_t v = (int64_t)N->getSExtValue();
 131   return isShiftedInt<11,1>(v);
 132 }]>;
 133
 134
 135 def s11_2ImmPred  : PatLeaf<(i32 imm), [{
 136   // s11_2ImmPred predicate - True if the immediate fits in a 13-bit
 137   // sign extended field and is a multiple of 4.
 138   int64_t v = (int64_t)N->getSExtValue();
 139   return isShiftedInt<11,2>(v);
 140 }]>;
 141
 142
 143 def s11_3ImmPred  : PatLeaf<(i32 imm), [{
 144   // s11_3ImmPred predicate - True if the immediate fits in a 14-bit
 145   // sign extended field and is a multiple of 8.
 146   int64_t v = (int64_t)N->getSExtValue();
 147   return isShiftedInt<11,3>(v);
 148 }]>;
 149
 150
 151 def s10ImmPred  : PatLeaf<(i32 imm), [{
 152   // s10ImmPred predicate - True if the immediate fits in a 10-bit sign extended
 153   // field.
 154   int64_t v = (int64_t)N->getSExtValue();
 155   return isInt<10>(v);
 156 }]>;
 157
 158
 159 def s9ImmPred  : PatLeaf<(i32 imm), [{
 160   // s9ImmPred predicate - True if the immediate fits in a 9-bit sign extended
 161   // field.
 162   int64_t v = (int64_t)N->getSExtValue();
 163   return isInt<9>(v);
 164 }]>;
 165
 166 def m9ImmPred  : PatLeaf<(i32 imm), [{
 167   // m9ImmPred predicate - True if the immediate fits in a 9-bit magnitude
 168   // field. The range of m9 is -255 to 255.
 169   int64_t v = (int64_t)N->getSExtValue();
 170   return isInt<9>(v) && (v != -256);
 171 }]>;
 172
 173 def s8ImmPred  : PatLeaf<(i32 imm), [{
 174   // s8ImmPred predicate - True if the immediate fits in a 8-bit sign extended
 175   // field.
 176   int64_t v = (int64_t)N->getSExtValue();
 177   return isInt<8>(v);
 178 }]>;
 179
 180
 181 def s8Imm64Pred  : PatLeaf<(i64 imm), [{
 182   // s8ImmPred predicate - True if the immediate fits in a 8-bit sign extended
 183   // field.
 184   int64_t v = (int64_t)N->getSExtValue();
 185   return isInt<8>(v);
 186 }]>;
 187
 188
 189 def s6ImmPred  : PatLeaf<(i32 imm), [{
 190   // s6ImmPred predicate - True if the immediate fits in a 6-bit sign extended
 191   // field.
 192   int64_t v = (int64_t)N->getSExtValue();
 193   return isInt<6>(v);
 194 }]>;
 195
 196
 197 def s4_0ImmPred  : PatLeaf<(i32 imm), [{
 198   // s4_0ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 199   // field.
 200   int64_t v = (int64_t)N->getSExtValue();
 201   return isInt<4>(v);
 202 }]>;
 203
 204
 205 def s4_1ImmPred  : PatLeaf<(i32 imm), [{
 206   // s4_1ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 207   // field of 2.
 208   int64_t v = (int64_t)N->getSExtValue();
 209   return isShiftedInt<4,1>(v);
 210 }]>;
 211
 212
 213 def s4_2ImmPred  : PatLeaf<(i32 imm), [{
 214   // s4_2ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 215   // field that is a multiple of 4.
 216   int64_t v = (int64_t)N->getSExtValue();
 217   return isShiftedInt<4,2>(v);
 218 }]>;
 219
 220
 221 def s4_3ImmPred  : PatLeaf<(i32 imm), [{
 222   // s4_3ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 223   // field that is a multiple of 8.
 224   int64_t v = (int64_t)N->getSExtValue();
 225   return isShiftedInt<4,3>(v);
 226 }]>;
 227
 228
 229 def u64ImmPred  : PatLeaf<(i64 imm), [{
 230   // Adding "N ||" to suppress gcc unused warning.
 231   return (N || true);
 232 }]>;
 233
 234 def u32ImmPred  : PatLeaf<(i32 imm), [{
 235   // u32ImmPred predicate - True if the immediate fits in a 32-bit field.
 236   int64_t v = (int64_t)N->getSExtValue();
 237   return isUInt<32>(v);
 238 }]>;
 239
 240 def u26_6ImmPred  : PatLeaf<(i32 imm), [{
 241   // u26_6ImmPred - True if the immediate fits in a 32-bit field and
 242   // is a multiple of 64.
 243   int64_t v = (int64_t)N->getSExtValue();
 244   return isShiftedUInt<26,6>(v);
 245 }]>;
 246
 247 def u16ImmPred  : PatLeaf<(i32 imm), [{
 248   // u16ImmPred predicate - True if the immediate fits in a 16-bit unsigned
 249   // field.
 250   int64_t v = (int64_t)N->getSExtValue();
 251   return isUInt<16>(v);
 252 }]>;
 253
 254 def u16_s8ImmPred  : PatLeaf<(i32 imm), [{
 255   // u16_s8ImmPred predicate - True if the immediate fits in a 16-bit sign
 256   // extended s8 field.
 257   int64_t v = (int64_t)N->getSExtValue();
 258   return isShiftedUInt<16,8>(v);
 259 }]>;
 260
 261 def u9ImmPred  : PatLeaf<(i32 imm), [{
 262   // u9ImmPred predicate - True if the immediate fits in a 9-bit unsigned
 263   // field.
 264   int64_t v = (int64_t)N->getSExtValue();
 265   return isUInt<9>(v);
 266 }]>;
 267
 268
 269 def u8ImmPred  : PatLeaf<(i32 imm), [{
 270   // u8ImmPred predicate - True if the immediate fits in a 8-bit unsigned
 271   // field.
 272   int64_t v = (int64_t)N->getSExtValue();
 273   return isUInt<8>(v);
 274 }]>;
 275
 276 def u7StrictPosImmPred : ImmLeaf<i32, [{
 277   // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
 278   // unsigned field and is strictly greater than 0.
 279   return isUInt<7>(Imm) && Imm > 0;
 280 }]>;
 281
 282 def u7ImmPred  : PatLeaf<(i32 imm), [{
 283   // u7ImmPred predicate - True if the immediate fits in a 7-bit unsigned
 284   // field.
 285   int64_t v = (int64_t)N->getSExtValue();
 286   return isUInt<7>(v);
 287 }]>;
 288
 289
 290 def u6ImmPred  : PatLeaf<(i32 imm), [{
 291   // u6ImmPred predicate - True if the immediate fits in a 6-bit unsigned
 292   // field.
 293   int64_t v = (int64_t)N->getSExtValue();
 294   return isUInt<6>(v);
 295 }]>;
 296
 297 def u6_0ImmPred  : PatLeaf<(i32 imm), [{
 298   // u6_0ImmPred predicate - True if the immediate fits in a 6-bit unsigned
 299   // field. Same as u6ImmPred.
 300   int64_t v = (int64_t)N->getSExtValue();
 301   return isUInt<6>(v);
 302 }]>;
 303
 304 def u6_1ImmPred  : PatLeaf<(i32 imm), [{
 305   // u6_1ImmPred predicate - True if the immediate fits in a 7-bit unsigned
 306   // field that is 1 bit alinged - multiple of 2.
 307   int64_t v = (int64_t)N->getSExtValue();
 308   return isShiftedUInt<6,1>(v);
 309 }]>;
 310
 311 def u6_2ImmPred  : PatLeaf<(i32 imm), [{
 312   // u6_2ImmPred predicate - True if the immediate fits in a 8-bit unsigned
 313   // field that is 2 bits alinged - multiple of 4.
 314   int64_t v = (int64_t)N->getSExtValue();
 315   return isShiftedUInt<6,2>(v);
 316 }]>;
 317
 318 def u6_3ImmPred  : PatLeaf<(i32 imm), [{
 319   // u6_3ImmPred predicate - True if the immediate fits in a 9-bit unsigned
 320   // field that is 3 bits alinged - multiple of 8.
 321   int64_t v = (int64_t)N->getSExtValue();
 322   return isShiftedUInt<6,3>(v);
 323 }]>;
 324
 325 def u5ImmPred  : PatLeaf<(i32 imm), [{
 326   // u5ImmPred predicate - True if the immediate fits in a 5-bit unsigned
 327   // field.
 328   int64_t v = (int64_t)N->getSExtValue();
 329   return isUInt<5>(v);
 330 }]>;
 331
 332
 333 def u3ImmPred  : PatLeaf<(i32 imm), [{
 334   // u3ImmPred predicate - True if the immediate fits in a 3-bit unsigned
 335   // field.
 336   int64_t v = (int64_t)N->getSExtValue();
 337   return isUInt<3>(v);
 338 }]>;
 339
 340
 341 def u2ImmPred  : PatLeaf<(i32 imm), [{
 342   // u2ImmPred predicate - True if the immediate fits in a 2-bit unsigned
 343   // field.
 344   int64_t v = (int64_t)N->getSExtValue();
 345   return isUInt<2>(v);
 346 }]>;
 347
 348
 349 def u1ImmPred  : PatLeaf<(i1 imm), [{
 350   // u1ImmPred predicate - True if the immediate fits in a 1-bit unsigned
 351   // field.
 352   int64_t v = (int64_t)N->getSExtValue();
 353   return isUInt<1>(v);
 354 }]>;
 355
 356 def m5BImmPred  : PatLeaf<(i32 imm), [{
 357   // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
 358   // and will fit in a 5 bit field when made positive, for use in memops.
 359   // this is specific to the zero extending of a negative by CombineInstr
 360   int8_t v = (int8_t)N->getSExtValue();
 361   return (-31 <= v && v <= -1);
 362 }]>;
 363
 364 def m5HImmPred  : PatLeaf<(i32 imm), [{
 365   // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
 366   // and will fit in a 5 bit field when made positive, for use in memops.
 367   // this is specific to the zero extending of a negative by CombineInstr
 368   int16_t v = (int16_t)N->getSExtValue();
 369   return (-31 <= v && v <= -1);
 370 }]>;
 371
 372 def m5ImmPred  : PatLeaf<(i32 imm), [{
 373   // m5ImmPred predicate - True if the number is in range -1 .. -31
 374   // and will fit in a 5 bit field when made positive, for use in memops.
 375   int64_t v = (int64_t)N->getSExtValue();
 376   return (-31 <= v && v <= -1);
 377 }]>;
 378
 379 //InN means negative integers in [-(2^N - 1), 0]
 380 def n8ImmPred  : PatLeaf<(i32 imm), [{
 381   // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
 382   // field.
 383   int64_t v = (int64_t)N->getSExtValue();
 384   return (-255 <= v && v <= 0);
 385 }]>;
 386
 387 def nOneImmPred  : PatLeaf<(i32 imm), [{
 388   // nOneImmPred predicate - True if the immediate is -1.
 389   int64_t v = (int64_t)N->getSExtValue();
 390   return (-1 == v);
 391 }]>;
 392
 393 def Set5ImmPred : PatLeaf<(i32 imm), [{
 394   // Set5ImmPred predicate - True if the number is in the series of values.
 395   // [ 2^0, 2^1, ... 2^31 ]
 396   // For use in setbit immediate.
 397   uint32_t v = (int32_t)N->getSExtValue();
 398   // Constrain to 32 bits, and then check for single bit.
 399   return ImmIsSingleBit(v);
 400 }]>;
 401
 402 def Clr5ImmPred : PatLeaf<(i32 imm), [{
 403   // Clr5ImmPred predicate - True if the number is in the series of
 404   // bit negated values.
 405   // [ 2^0, 2^1, ... 2^31 ]
 406   // For use in clrbit immediate.
 407   // Note: we are bit NOTing the value.
 408   uint32_t v = ~ (int32_t)N->getSExtValue();
 409   // Constrain to 32 bits, and then check for single bit.
 410   return ImmIsSingleBit(v);
 411 }]>;
 412
 413 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
 414   // SetClr5ImmPred predicate - True if the immediate is in range 0..31.
 415   int32_t v = (int32_t)N->getSExtValue();
 416   return (v >= 0 && v <= 31);
 417 }]>;
 418
 419 def Set4ImmPred : PatLeaf<(i32 imm), [{
 420   // Set4ImmPred predicate - True if the number is in the series of values:
 421   // [ 2^0, 2^1, ... 2^15 ].
 422   // For use in setbit immediate.
 423   uint16_t v = (int16_t)N->getSExtValue();
 424   // Constrain to 16 bits, and then check for single bit.
 425   return ImmIsSingleBit(v);
 426 }]>;
 427
 428 def Clr4ImmPred : PatLeaf<(i32 imm), [{
 429   // Clr4ImmPred predicate - True if the number is in the series of
 430   // bit negated values:
 431   // [ 2^0, 2^1, ... 2^15 ].
 432   // For use in setbit and clrbit immediate.
 433   uint16_t v = ~ (int16_t)N->getSExtValue();
 434   // Constrain to 16 bits, and then check for single bit.
 435   return ImmIsSingleBit(v);
 436 }]>;
 437
 438 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
 439   // SetClr4ImmPred predicate - True if the immediate is in the range 0..15.
 440   int16_t v = (int16_t)N->getSExtValue();
 441   return (v >= 0 && v <= 15);
 442 }]>;
 443
 444 def Set3ImmPred : PatLeaf<(i32 imm), [{
 445   // Set3ImmPred predicate - True if the number is in the series of values:
 446   // [ 2^0, 2^1, ... 2^7 ].
 447   // For use in setbit immediate.
 448   uint8_t v = (int8_t)N->getSExtValue();
 449   // Constrain to 8 bits, and then check for single bit.
 450   return ImmIsSingleBit(v);
 451 }]>;
 452
 453 def Clr3ImmPred : PatLeaf<(i32 imm), [{
 454   // Clr3ImmPred predicate - True if the number is in the series of
 455   // bit negated values:
 456   // [ 2^0, 2^1, ... 2^7 ].
 457   // For use in setbit and clrbit immediate.
 458   uint8_t v = ~ (int8_t)N->getSExtValue();
 459   // Constrain to 8 bits, and then check for single bit.
 460   return ImmIsSingleBit(v);
 461 }]>;
 462
 463 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
 464   // SetClr3ImmPred predicate - True if the immediate is in the range  0..7.
 465   int8_t v = (int8_t)N->getSExtValue();
 466   return (v >= 0 && v <= 7);
 467 }]>;
 468
 469
 470 // Extendable immediate operands.
 471
 472 let PrintMethod = "printExtOperand" in {
 473   def s16Ext : Operand<i32>;
 474   def s12Ext : Operand<i32>;
 475   def s10Ext : Operand<i32>;
 476   def s9Ext : Operand<i32>;
 477   def s8Ext : Operand<i32>;
 478   def s6Ext : Operand<i32>;
 479   def s11_0Ext : Operand<i32>;
 480   def s11_1Ext : Operand<i32>;
 481   def s11_2Ext : Operand<i32>;
 482   def s11_3Ext : Operand<i32>;
 483   def u6Ext : Operand<i32>;
 484   def u7Ext : Operand<i32>;
 485   def u8Ext : Operand<i32>;
 486   def u9Ext : Operand<i32>;
 487   def u10Ext : Operand<i32>;
 488   def u6_0Ext : Operand<i32>;
 489   def u6_1Ext : Operand<i32>;
 490   def u6_2Ext : Operand<i32>;
 491   def u6_3Ext : Operand<i32>;
 492 }
 493
 494 let PrintMethod = "printImmOperand" in
 495 def u0AlwaysExt : Operand<i32>;
 496
 497 // Predicates for constant extendable operands
 498 def s16ExtPred  : PatLeaf<(i32 imm), [{
 499   int64_t v = (int64_t)N->getSExtValue();
 500   if (!Subtarget.hasV4TOps())
 501     // Return true if the immediate can fit in a 16-bit sign extended field.
 502     return isInt<16>(v);
 503   else {
 504     if (isInt<16>(v))
 505       return true;
 506
 507     // Return true if extending this immediate is profitable and the value
 508     // can fit in a 32-bit signed field.
 509     return isConstExtProfitable(Node) && isInt<32>(v);
 510   }
 511 }]>;
 512
 513 def s10ExtPred  : PatLeaf<(i32 imm), [{
 514   int64_t v = (int64_t)N->getSExtValue();
 515   if (!Subtarget.hasV4TOps())
 516     // Return true if the immediate can fit in a 10-bit sign extended field.
 517     return isInt<10>(v);
 518   else {
 519     if (isInt<10>(v))
 520       return true;
 521
 522     // Return true if extending this immediate is profitable and the value
 523     // can fit in a 32-bit signed field.
 524     return isConstExtProfitable(Node) && isInt<32>(v);
 525   }
 526 }]>;
 527
 528 def s9ExtPred  : PatLeaf<(i32 imm), [{
 529   int64_t v = (int64_t)N->getSExtValue();
 530   if (!Subtarget.hasV4TOps())
 531     // Return true if the immediate can fit in a 9-bit sign extended field.
 532     return isInt<9>(v);
 533   else {
 534     if (isInt<9>(v))
 535       return true;
 536
 537     // Return true if extending this immediate is profitable and the value
 538     // can fit in a 32-bit unsigned field.
 539     return isConstExtProfitable(Node) && isInt<32>(v);
 540   }
 541 }]>;
 542
 543 def s8ExtPred  : PatLeaf<(i32 imm), [{
 544   int64_t v = (int64_t)N->getSExtValue();
 545   if (!Subtarget.hasV4TOps())
 546     // Return true if the immediate can fit in a 8-bit sign extended field.
 547     return isInt<8>(v);
 548   else {
 549     if (isInt<8>(v))
 550       return true;
 551
 552     // Return true if extending this immediate is profitable and the value
 553     // can fit in a 32-bit signed field.
 554     return isConstExtProfitable(Node) && isInt<32>(v);
 555   }
 556 }]>;
 557
 558 def s8_16ExtPred  : PatLeaf<(i32 imm), [{
 559   int64_t v = (int64_t)N->getSExtValue();
 560   if (!Subtarget.hasV4TOps())
 561     // Return true if the immediate fits in a 8-bit sign extended field.
 562     return isInt<8>(v);
 563   else {
 564     if (isInt<8>(v))
 565       return true;
 566
 567     // Return true if extending this immediate is profitable and the value
 568     // can't fit in a 16-bit signed field. This is required to avoid
 569     // unnecessary constant extenders.
 570     return isConstExtProfitable(Node) && !isInt<16>(v);
 571   }
 572 }]>;
 573
 574 def s6ExtPred  : PatLeaf<(i32 imm), [{
 575   int64_t v = (int64_t)N->getSExtValue();
 576   if (!Subtarget.hasV4TOps())
 577     // Return true if the immediate can fit in a 6-bit sign extended field.
 578     return isInt<6>(v);
 579   else {
 580     if (isInt<6>(v))
 581       return true;
 582
 583     // Return true if extending this immediate is profitable and the value
 584     // can fit in a 32-bit unsigned field.
 585     return isConstExtProfitable(Node) && isInt<32>(v);
 586   }
 587 }]>;
 588
 589 def s6_16ExtPred  : PatLeaf<(i32 imm), [{
 590   int64_t v = (int64_t)N->getSExtValue();
 591   if (!Subtarget.hasV4TOps())
 592     // Return true if the immediate fits in a 6-bit sign extended field.
 593     return isInt<6>(v);
 594   else {
 595     if (isInt<6>(v))
 596       return true;
 597
 598     // Return true if extending this immediate is profitable and the value
 599     // can't fit in a 16-bit signed field. This is required to avoid
 600     // unnecessary constant extenders.
 601     return isConstExtProfitable(Node) && !isInt<16>(v);
 602   }
 603 }]>;
 604
 605 def s6_10ExtPred  : PatLeaf<(i32 imm), [{
 606   int64_t v = (int64_t)N->getSExtValue();
 607   if (!Subtarget.hasV4TOps())
 608     // Return true if the immediate can fit in a 6-bit sign extended field.
 609     return isInt<6>(v);
 610   else {
 611     if (isInt<6>(v))
 612       return true;
 613
 614     // Return true if extending this immediate is profitable and the value
 615     // can't fit in a 10-bit signed field. This is required to avoid
 616     // unnecessary constant extenders.
 617     return isConstExtProfitable(Node) && !isInt<10>(v);
 618   }
 619 }]>;
 620
 621 def s11_0ExtPred  : PatLeaf<(i32 imm), [{
 622   int64_t v = (int64_t)N->getSExtValue();
 623   if (!Subtarget.hasV4TOps())
 624     // Return true if the immediate can fit in a 11-bit sign extended field.
 625     return isShiftedInt<11,0>(v);
 626   else {
 627     if (isInt<11>(v))
 628       return true;
 629
 630     // Return true if extending this immediate is profitable and the value
 631     // can fit in a 32-bit signed field.
 632     return isConstExtProfitable(Node) && isInt<32>(v);
 633   }
 634 }]>;
 635
 636 def s11_1ExtPred  : PatLeaf<(i32 imm), [{
 637   int64_t v = (int64_t)N->getSExtValue();
 638   if (!Subtarget.hasV4TOps())
 639     // Return true if the immediate can fit in a 12-bit sign extended field and
 640     // is 2 byte aligned.
 641     return isShiftedInt<11,1>(v);
 642   else {
 643     if (isInt<12>(v))
 644       return isShiftedInt<11,1>(v);
 645
 646     // Return true if extending this immediate is profitable and the low 1 bit
 647     // is zero (2-byte aligned).
 648     return isConstExtProfitable(Node) && isInt<32>(v) && ((v % 2) == 0);
 649   }
 650 }]>;
 651
 652 def s11_2ExtPred  : PatLeaf<(i32 imm), [{
 653   int64_t v = (int64_t)N->getSExtValue();
 654   if (!Subtarget.hasV4TOps())
 655     // Return true if the immediate can fit in a 13-bit sign extended field and
 656     // is 4-byte aligned.
 657     return isShiftedInt<11,2>(v);
 658   else {
 659     if (isInt<13>(v))
 660       return isShiftedInt<11,2>(v);
 661
 662     // Return true if extending this immediate is profitable and the low 2-bits
 663     // are zero (4-byte aligned).
 664     return isConstExtProfitable(Node)  && isInt<32>(v) && ((v % 4) == 0);
 665   }
 666 }]>;
 667
 668 def s11_3ExtPred  : PatLeaf<(i32 imm), [{
 669   int64_t v = (int64_t)N->getSExtValue();
 670   if (!Subtarget.hasV4TOps())
 671     // Return true if the immediate can fit in a 14-bit sign extended field and
 672     // is 8-byte aligned.
 673     return isShiftedInt<11,3>(v);
 674   else {
 675     if (isInt<14>(v))
 676      return isShiftedInt<11,3>(v);
 677
 678     // Return true if extending this immediate is profitable and the low 3-bits
 679     // are zero (8-byte aligned).
 680     return isConstExtProfitable(Node)  && isInt<32>(v) && ((v % 8) == 0);
 681   }
 682 }]>;
 683
 684 def u0AlwaysExtPred : PatLeaf<(i32 imm), [{
 685   // Predicate for an unsigned 32-bit value that always needs to be extended.
 686   if (Subtarget.hasV4TOps()) {
 687     if (isConstExtProfitable(Node)) {
 688       int64_t v = (int64_t)N->getSExtValue();
 689       return isUInt<32>(v);
 690     }
 691   }
 692   return false;
 693 }]>;
 694
 695 def u6ExtPred  : PatLeaf<(i32 imm), [{
 696   int64_t v = (int64_t)N->getSExtValue();
 697   if (!Subtarget.hasV4TOps())
 698     // Return true if the immediate can fit in a 6-bit unsigned field.
 699     return isUInt<6>(v);
 700   else {
 701     if (isUInt<6>(v))
 702       return true;
 703
 704     // Return true if extending this immediate is profitable and the value
 705     // can fit in a 32-bit unsigned field.
 706     return isConstExtProfitable(Node) && isUInt<32>(v);
 707   }
 708 }]>;
 709
 710 def u7ExtPred  : PatLeaf<(i32 imm), [{
 711   int64_t v = (int64_t)N->getSExtValue();
 712   if (!Subtarget.hasV4TOps())
 713     // Return true if the immediate can fit in a 7-bit unsigned field.
 714     return isUInt<7>(v);
 715   else {
 716     if (isUInt<7>(v))
 717       return true;
 718
 719     // Return true if extending this immediate is profitable and the value
 720     // can fit in a 32-bit unsigned field.
 721     return isConstExtProfitable(Node) && isUInt<32>(v);
 722   }
 723 }]>;
 724
 725 def u8ExtPred  : PatLeaf<(i32 imm), [{
 726   int64_t v = (int64_t)N->getSExtValue();
 727   if (!Subtarget.hasV4TOps())
 728     // Return true if the immediate can fit in a 8-bit unsigned field.
 729     return isUInt<8>(v);
 730   else {
 731     if (isUInt<8>(v))
 732       return true;
 733
 734     // Return true if extending this immediate is profitable and the value
 735     // can fit in a 32-bit unsigned field.
 736     return isConstExtProfitable(Node) && isUInt<32>(v);
 737   }
 738 }]>;
 739
 740 def u9ExtPred  : PatLeaf<(i32 imm), [{
 741   int64_t v = (int64_t)N->getSExtValue();
 742   if (!Subtarget.hasV4TOps())
 743     // Return true if the immediate can fit in a 9-bit unsigned field.
 744     return isUInt<9>(v);
 745   else {
 746     if (isUInt<9>(v))
 747       return true;
 748
 749     // Return true if extending this immediate is profitable and the value
 750     // can fit in a 32-bit unsigned field.
 751     return isConstExtProfitable(Node) && isUInt<32>(v);
 752   }
 753 }]>;
 754
 755 def u6_1ExtPred  : PatLeaf<(i32 imm), [{
 756   int64_t v = (int64_t)N->getSExtValue();
 757   if (!Subtarget.hasV4TOps())
 758     // Return true if the immediate can fit in a 7-bit unsigned field and
 759     // is 2-byte aligned.
 760     return isShiftedUInt<6,1>(v);
 761   else {
 762     if (isUInt<7>(v))
 763       return isShiftedUInt<6,1>(v);
 764
 765     // Return true if extending this immediate is profitable and the value
 766     // can fit in a 32-bit unsigned field.
 767     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 2) == 0);
 768   }
 769 }]>;
 770
 771 def u6_2ExtPred  : PatLeaf<(i32 imm), [{
 772   int64_t v = (int64_t)N->getSExtValue();
 773   if (!Subtarget.hasV4TOps())
 774     // Return true if the immediate can fit in a 8-bit unsigned field and
 775     // is 4-byte aligned.
 776     return isShiftedUInt<6,2>(v);
 777   else {
 778     if (isUInt<8>(v))
 779       return isShiftedUInt<6,2>(v);
 780
 781     // Return true if extending this immediate is profitable and the value
 782     // can fit in a 32-bit unsigned field.
 783     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 4) == 0);
 784   }
 785 }]>;
 786
 787 def u6_3ExtPred  : PatLeaf<(i32 imm), [{
 788   int64_t v = (int64_t)N->getSExtValue();
 789   if (!Subtarget.hasV4TOps())
 790     // Return true if the immediate can fit in a 9-bit unsigned field and
 791     // is 8-byte aligned.
 792     return isShiftedUInt<6,3>(v);
 793   else {
 794     if (isUInt<9>(v))
 795       return isShiftedUInt<6,3>(v);
 796
 797     // Return true if extending this immediate is profitable and the value
 798     // can fit in a 32-bit unsigned field.
 799     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 8) == 0);
 800   }
 801 }]>;
 802
 803 // Addressing modes.
 804
 805 def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
 806 def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>;
 807 def ADDRriS11_0 : ComplexPattern<i32, 2, "SelectADDRriS11_0", [frameindex], []>;
 808 def ADDRriS11_1 : ComplexPattern<i32, 2, "SelectADDRriS11_1", [frameindex], []>;
 809 def ADDRriS11_2 : ComplexPattern<i32, 2, "SelectADDRriS11_2", [frameindex], []>;
 810 def ADDRriS11_3 : ComplexPattern<i32, 2, "SelectADDRriS11_3", [frameindex], []>;
 811 def ADDRriU6_0 : ComplexPattern<i32, 2, "SelectADDRriU6_0", [frameindex], []>;
 812 def ADDRriU6_1 : ComplexPattern<i32, 2, "SelectADDRriU6_1", [frameindex], []>;
 813 def ADDRriU6_2 : ComplexPattern<i32, 2, "SelectADDRriU6_2", [frameindex], []>;
 814
 815 // Address operands.
 816
 817 def MEMrr : Operand<i32> {
 818   let PrintMethod = "printMEMrrOperand";
 819   let MIOperandInfo = (ops IntRegs, IntRegs);
 820 }
 821
 822 def MEMri : Operand<i32> {
 823   let PrintMethod = "printMEMriOperand";
 824   let MIOperandInfo = (ops IntRegs, IntRegs);
 825 }
 826
 827 def MEMri_s11_2 : Operand<i32>,
 828   ComplexPattern<i32, 2, "SelectMEMriS11_2", []> {
 829   let PrintMethod = "printMEMriOperand";
 830   let MIOperandInfo = (ops IntRegs, s11Imm);
 831 }
 832
 833 def FrameIndex : Operand<i32> {
 834   let PrintMethod = "printFrameIndexOperand";
 835   let MIOperandInfo = (ops IntRegs, s11Imm);
 836 }
 837
 838 let PrintMethod = "printGlobalOperand" in {
 839   def globaladdress : Operand<i32>;
 840   def globaladdressExt : Operand<i32>;
 841 }
 842
 843 let PrintMethod = "printJumpTable" in
 844 def jumptablebase : Operand<i32>;
 845
 846 def brtarget : Operand<OtherVT>;
 847 def brtargetExt : Operand<OtherVT>;
 848 def calltarget : Operand<i32>;
 849
 850 def bblabel : Operand<i32>;
 851 def bbl   : SDNode<"ISD::BasicBlock", SDTPtrLeaf   , [], "BasicBlockSDNode">;
 852
 853 def symbolHi32 : Operand<i32> {
 854   let PrintMethod = "printSymbolHi";
 855 }
 856 def symbolLo32 : Operand<i32> {
 857   let PrintMethod = "printSymbolLo";
 858 }