src/llvm/lib/Target/Hexagon/HexagonOperands.td

   1 //===- HexagonOperands.td - Hexagon immediate processing -*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illnois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 // Immediate operands.
  11
  12 let PrintMethod = "printImmOperand" in {
  13   // f32Ext type is used to identify constant extended floating point immediates.
  14   def f32Ext : Operand<f32>;
  15   def s32Imm : Operand<i32>;
  16   def s26_6Imm : Operand<i32>;
  17   def s16Imm : Operand<i32>;
  18   def s12Imm : Operand<i32>;
  19   def s11Imm : Operand<i32>;
  20   def s11_0Imm : Operand<i32>;
  21   def s11_1Imm : Operand<i32>;
  22   def s11_2Imm : Operand<i32>;
  23   def s11_3Imm : Operand<i32>;
  24   def s10Imm : Operand<i32>;
  25   def s9Imm : Operand<i32>;
  26   def m9Imm : Operand<i32>;
  27   def s8Imm : Operand<i32>;
  28   def s8Imm64 : Operand<i64>;
  29   def s6Imm : Operand<i32>;
  30   def s4Imm : Operand<i32>;
  31   def s4_0Imm : Operand<i32>;
  32   def s4_1Imm : Operand<i32>;
  33   def s4_2Imm : Operand<i32>;
  34   def s4_3Imm : Operand<i32>;
  35   def u64Imm : Operand<i64>;
  36   def u32Imm : Operand<i32>;
  37   def u26_6Imm : Operand<i32>;
  38   def u16Imm : Operand<i32>;
  39   def u16_0Imm : Operand<i32>;
  40   def u16_1Imm : Operand<i32>;
  41   def u16_2Imm : Operand<i32>;
  42   def u16_3Imm : Operand<i32>;
  43   def u11_3Imm : Operand<i32>;
  44   def u10Imm : Operand<i32>;
  45   def u9Imm : Operand<i32>;
  46   def u8Imm : Operand<i32>;
  47   def u7Imm : Operand<i32>;
  48   def u6Imm : Operand<i32>;
  49   def u6_0Imm : Operand<i32>;
  50   def u6_1Imm : Operand<i32>;
  51   def u6_2Imm : Operand<i32>;
  52   def u6_3Imm : Operand<i32>;
  53   def u5Imm : Operand<i32>;
  54   def u4Imm : Operand<i32>;
  55   def u3Imm : Operand<i32>;
  56   def u2Imm : Operand<i32>;
  57   def u1Imm : Operand<i32>;
  58   def n8Imm : Operand<i32>;
  59   def m6Imm : Operand<i32>;
  60 }
  61
  62 let PrintMethod = "printNOneImmOperand" in
  63 def nOneImm : Operand<i32>;
  64
  65 //
  66 // Immediate predicates
  67 //
  68 def s32ImmPred  : PatLeaf<(i32 imm), [{
  69   // s32ImmPred predicate - True if the immediate fits in a 32-bit sign extended
  70   // field.
  71   int64_t v = (int64_t)N->getSExtValue();
  72   return isInt<32>(v);
  73 }]>;
  74
  75 def s32_24ImmPred  : PatLeaf<(i32 imm), [{
  76   // s32_24ImmPred predicate - True if the immediate fits in a 32-bit sign
  77   // extended field that is a multiple of 0x1000000.
  78   int64_t v = (int64_t)N->getSExtValue();
  79   return isShiftedInt<32,24>(v);
  80 }]>;
  81
  82 def s32_16s8ImmPred  : PatLeaf<(i32 imm), [{
  83   // s32_16s8ImmPred predicate - True if the immediate fits in a 32-bit sign
  84   // extended field that is a multiple of 0x10000.
  85   int64_t v = (int64_t)N->getSExtValue();
  86   return isShiftedInt<24,16>(v);
  87 }]>;
  88
  89 def s26_6ImmPred  : PatLeaf<(i32 imm), [{
  90   // s26_6ImmPred predicate - True if the immediate fits in a 32-bit
  91   // sign extended field.
  92   int64_t v = (int64_t)N->getSExtValue();
  93   return isShiftedInt<26,6>(v);
  94 }]>;
  95
  96
  97 def s16ImmPred  : PatLeaf<(i32 imm), [{
  98   // s16ImmPred predicate - True if the immediate fits in a 16-bit sign extended
  99   // field.
 100   int64_t v = (int64_t)N->getSExtValue();
 101   return isInt<16>(v);
 102 }]>;
 103
 104
 105 def s13ImmPred  : PatLeaf<(i32 imm), [{
 106   // s13ImmPred predicate - True if the immediate fits in a 13-bit sign extended
 107   // field.
 108   int64_t v = (int64_t)N->getSExtValue();
 109   return isInt<13>(v);
 110 }]>;
 111
 112
 113 def s12ImmPred  : PatLeaf<(i32 imm), [{
 114   // s12ImmPred predicate - True if the immediate fits in a 12-bit
 115   // sign extended field.
 116   int64_t v = (int64_t)N->getSExtValue();
 117   return isInt<12>(v);
 118 }]>;
 119
 120 def s11_0ImmPred  : PatLeaf<(i32 imm), [{
 121   // s11_0ImmPred predicate - True if the immediate fits in a 11-bit
 122   // sign extended field.
 123   int64_t v = (int64_t)N->getSExtValue();
 124   return isInt<11>(v);
 125 }]>;
 126
 127
 128 def s11_1ImmPred  : PatLeaf<(i32 imm), [{
 129   // s11_1ImmPred predicate - True if the immediate fits in a 12-bit
 130   // sign extended field and is a multiple of 2.
 131   int64_t v = (int64_t)N->getSExtValue();
 132   return isShiftedInt<11,1>(v);
 133 }]>;
 134
 135
 136 def s11_2ImmPred  : PatLeaf<(i32 imm), [{
 137   // s11_2ImmPred predicate - True if the immediate fits in a 13-bit
 138   // sign extended field and is a multiple of 4.
 139   int64_t v = (int64_t)N->getSExtValue();
 140   return isShiftedInt<11,2>(v);
 141 }]>;
 142
 143
 144 def s11_3ImmPred  : PatLeaf<(i32 imm), [{
 145   // s11_3ImmPred predicate - True if the immediate fits in a 14-bit
 146   // sign extended field and is a multiple of 8.
 147   int64_t v = (int64_t)N->getSExtValue();
 148   return isShiftedInt<11,3>(v);
 149 }]>;
 150
 151
 152 def s10ImmPred  : PatLeaf<(i32 imm), [{
 153   // s10ImmPred predicate - True if the immediate fits in a 10-bit sign extended
 154   // field.
 155   int64_t v = (int64_t)N->getSExtValue();
 156   return isInt<10>(v);
 157 }]>;
 158
 159
 160 def s9ImmPred  : PatLeaf<(i32 imm), [{
 161   // s9ImmPred predicate - True if the immediate fits in a 9-bit sign extended
 162   // field.
 163   int64_t v = (int64_t)N->getSExtValue();
 164   return isInt<9>(v);
 165 }]>;
 166
 167 def m9ImmPred  : PatLeaf<(i32 imm), [{
 168   // m9ImmPred predicate - True if the immediate fits in a 9-bit magnitude
 169   // field. The range of m9 is -255 to 255.
 170   int64_t v = (int64_t)N->getSExtValue();
 171   return isInt<9>(v) && (v != -256);
 172 }]>;
 173
 174 def s8ImmPred  : PatLeaf<(i32 imm), [{
 175   // s8ImmPred predicate - True if the immediate fits in a 8-bit sign extended
 176   // field.
 177   int64_t v = (int64_t)N->getSExtValue();
 178   return isInt<8>(v);
 179 }]>;
 180
 181
 182 def s8Imm64Pred  : PatLeaf<(i64 imm), [{
 183   // s8ImmPred predicate - True if the immediate fits in a 8-bit sign extended
 184   // field.
 185   int64_t v = (int64_t)N->getSExtValue();
 186   return isInt<8>(v);
 187 }]>;
 188
 189
 190 def s6ImmPred  : PatLeaf<(i32 imm), [{
 191   // s6ImmPred predicate - True if the immediate fits in a 6-bit sign extended
 192   // field.
 193   int64_t v = (int64_t)N->getSExtValue();
 194   return isInt<6>(v);
 195 }]>;
 196
 197
 198 def s4_0ImmPred  : PatLeaf<(i32 imm), [{
 199   // s4_0ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 200   // field.
 201   int64_t v = (int64_t)N->getSExtValue();
 202   return isInt<4>(v);
 203 }]>;
 204
 205
 206 def s4_1ImmPred  : PatLeaf<(i32 imm), [{
 207   // s4_1ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 208   // field of 2.
 209   int64_t v = (int64_t)N->getSExtValue();
 210   return isShiftedInt<4,1>(v);
 211 }]>;
 212
 213
 214 def s4_2ImmPred  : PatLeaf<(i32 imm), [{
 215   // s4_2ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 216   // field that is a multiple of 4.
 217   int64_t v = (int64_t)N->getSExtValue();
 218   return isShiftedInt<4,2>(v);
 219 }]>;
 220
 221
 222 def s4_3ImmPred  : PatLeaf<(i32 imm), [{
 223   // s4_3ImmPred predicate - True if the immediate fits in a 4-bit sign extended
 224   // field that is a multiple of 8.
 225   int64_t v = (int64_t)N->getSExtValue();
 226   return isShiftedInt<4,3>(v);
 227 }]>;
 228
 229
 230 def u64ImmPred  : PatLeaf<(i64 imm), [{
 231   // Adding "N ||" to suppress gcc unused warning.
 232   return (N || true);
 233 }]>;
 234
 235 def u32ImmPred  : PatLeaf<(i32 imm), [{
 236   // u32ImmPred predicate - True if the immediate fits in a 32-bit field.
 237   int64_t v = (int64_t)N->getSExtValue();
 238   return isUInt<32>(v);
 239 }]>;
 240
 241 def u26_6ImmPred  : PatLeaf<(i32 imm), [{
 242   // u26_6ImmPred - True if the immediate fits in a 32-bit field and
 243   // is a multiple of 64.
 244   int64_t v = (int64_t)N->getSExtValue();
 245   return isShiftedUInt<26,6>(v);
 246 }]>;
 247
 248 def u16ImmPred  : PatLeaf<(i32 imm), [{
 249   // u16ImmPred predicate - True if the immediate fits in a 16-bit unsigned
 250   // field.
 251   int64_t v = (int64_t)N->getSExtValue();
 252   return isUInt<16>(v);
 253 }]>;
 254
 255 def u16_s8ImmPred  : PatLeaf<(i32 imm), [{
 256   // u16_s8ImmPred predicate - True if the immediate fits in a 16-bit sign
 257   // extended s8 field.
 258   int64_t v = (int64_t)N->getSExtValue();
 259   return isShiftedUInt<16,8>(v);
 260 }]>;
 261
 262 def u11_3ImmPred : PatLeaf<(i32 imm), [{
 263   // True if the immediate fits in a 14-bit unsigned field, and the lowest
 264   // three bits are 0.
 265   int64_t v = (int64_t)N->getSExtValue();
 266   return isShiftedUInt<11,3>(v);
 267 }]>;
 268
 269 def u9ImmPred  : PatLeaf<(i32 imm), [{
 270   // u9ImmPred predicate - True if the immediate fits in a 9-bit unsigned
 271   // field.
 272   int64_t v = (int64_t)N->getSExtValue();
 273   return isUInt<9>(v);
 274 }]>;
 275
 276
 277 def u8ImmPred  : PatLeaf<(i32 imm), [{
 278   // u8ImmPred predicate - True if the immediate fits in a 8-bit unsigned
 279   // field.
 280   int64_t v = (int64_t)N->getSExtValue();
 281   return isUInt<8>(v);
 282 }]>;
 283
 284 def u7StrictPosImmPred : ImmLeaf<i32, [{
 285   // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
 286   // unsigned field and is strictly greater than 0.
 287   return isUInt<7>(Imm) && Imm > 0;
 288 }]>;
 289
 290 def u7ImmPred  : PatLeaf<(i32 imm), [{
 291   // u7ImmPred predicate - True if the immediate fits in a 7-bit unsigned
 292   // field.
 293   int64_t v = (int64_t)N->getSExtValue();
 294   return isUInt<7>(v);
 295 }]>;
 296
 297
 298 def u6ImmPred  : PatLeaf<(i32 imm), [{
 299   // u6ImmPred predicate - True if the immediate fits in a 6-bit unsigned
 300   // field.
 301   int64_t v = (int64_t)N->getSExtValue();
 302   return isUInt<6>(v);
 303 }]>;
 304
 305 def u6_0ImmPred  : PatLeaf<(i32 imm), [{
 306   // u6_0ImmPred predicate - True if the immediate fits in a 6-bit unsigned
 307   // field. Same as u6ImmPred.
 308   int64_t v = (int64_t)N->getSExtValue();
 309   return isUInt<6>(v);
 310 }]>;
 311
 312 def u6_1ImmPred  : PatLeaf<(i32 imm), [{
 313   // u6_1ImmPred predicate - True if the immediate fits in a 7-bit unsigned
 314   // field that is 1 bit alinged - multiple of 2.
 315   int64_t v = (int64_t)N->getSExtValue();
 316   return isShiftedUInt<6,1>(v);
 317 }]>;
 318
 319 def u6_2ImmPred  : PatLeaf<(i32 imm), [{
 320   // u6_2ImmPred predicate - True if the immediate fits in a 8-bit unsigned
 321   // field that is 2 bits alinged - multiple of 4.
 322   int64_t v = (int64_t)N->getSExtValue();
 323   return isShiftedUInt<6,2>(v);
 324 }]>;
 325
 326 def u6_3ImmPred  : PatLeaf<(i32 imm), [{
 327   // u6_3ImmPred predicate - True if the immediate fits in a 9-bit unsigned
 328   // field that is 3 bits alinged - multiple of 8.
 329   int64_t v = (int64_t)N->getSExtValue();
 330   return isShiftedUInt<6,3>(v);
 331 }]>;
 332
 333 def u5ImmPred  : PatLeaf<(i32 imm), [{
 334   // u5ImmPred predicate - True if the immediate fits in a 5-bit unsigned
 335   // field.
 336   int64_t v = (int64_t)N->getSExtValue();
 337   return isUInt<5>(v);
 338 }]>;
 339
 340
 341 def u3ImmPred  : PatLeaf<(i32 imm), [{
 342   // u3ImmPred predicate - True if the immediate fits in a 3-bit unsigned
 343   // field.
 344   int64_t v = (int64_t)N->getSExtValue();
 345   return isUInt<3>(v);
 346 }]>;
 347
 348
 349 def u2ImmPred  : PatLeaf<(i32 imm), [{
 350   // u2ImmPred predicate - True if the immediate fits in a 2-bit unsigned
 351   // field.
 352   int64_t v = (int64_t)N->getSExtValue();
 353   return isUInt<2>(v);
 354 }]>;
 355
 356
 357 def u1ImmPred  : PatLeaf<(i1 imm), [{
 358   // u1ImmPred predicate - True if the immediate fits in a 1-bit unsigned
 359   // field.
 360   int64_t v = (int64_t)N->getSExtValue();
 361   return isUInt<1>(v);
 362 }]>;
 363
 364 def m5BImmPred  : PatLeaf<(i32 imm), [{
 365   // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
 366   // and will fit in a 5 bit field when made positive, for use in memops.
 367   // this is specific to the zero extending of a negative by CombineInstr
 368   int8_t v = (int8_t)N->getSExtValue();
 369   return (-31 <= v && v <= -1);
 370 }]>;
 371
 372 def m5HImmPred  : PatLeaf<(i32 imm), [{
 373   // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
 374   // and will fit in a 5 bit field when made positive, for use in memops.
 375   // this is specific to the zero extending of a negative by CombineInstr
 376   int16_t v = (int16_t)N->getSExtValue();
 377   return (-31 <= v && v <= -1);
 378 }]>;
 379
 380 def m5ImmPred  : PatLeaf<(i32 imm), [{
 381   // m5ImmPred predicate - True if the number is in range -1 .. -31
 382   // and will fit in a 5 bit field when made positive, for use in memops.
 383   int64_t v = (int64_t)N->getSExtValue();
 384   return (-31 <= v && v <= -1);
 385 }]>;
 386
 387 //InN means negative integers in [-(2^N - 1), 0]
 388 def n8ImmPred  : PatLeaf<(i32 imm), [{
 389   // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
 390   // field.
 391   int64_t v = (int64_t)N->getSExtValue();
 392   return (-255 <= v && v <= 0);
 393 }]>;
 394
 395 def nOneImmPred  : PatLeaf<(i32 imm), [{
 396   // nOneImmPred predicate - True if the immediate is -1.
 397   int64_t v = (int64_t)N->getSExtValue();
 398   return (-1 == v);
 399 }]>;
 400
 401 def Set5ImmPred : PatLeaf<(i32 imm), [{
 402   // Set5ImmPred predicate - True if the number is in the series of values.
 403   // [ 2^0, 2^1, ... 2^31 ]
 404   // For use in setbit immediate.
 405   uint32_t v = (int32_t)N->getSExtValue();
 406   // Constrain to 32 bits, and then check for single bit.
 407   return ImmIsSingleBit(v);
 408 }]>;
 409
 410 def Clr5ImmPred : PatLeaf<(i32 imm), [{
 411   // Clr5ImmPred predicate - True if the number is in the series of
 412   // bit negated values.
 413   // [ 2^0, 2^1, ... 2^31 ]
 414   // For use in clrbit immediate.
 415   // Note: we are bit NOTing the value.
 416   uint32_t v = ~ (int32_t)N->getSExtValue();
 417   // Constrain to 32 bits, and then check for single bit.
 418   return ImmIsSingleBit(v);
 419 }]>;
 420
 421 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
 422   // SetClr5ImmPred predicate - True if the immediate is in range 0..31.
 423   int32_t v = (int32_t)N->getSExtValue();
 424   return (v >= 0 && v <= 31);
 425 }]>;
 426
 427 def Set4ImmPred : PatLeaf<(i32 imm), [{
 428   // Set4ImmPred predicate - True if the number is in the series of values:
 429   // [ 2^0, 2^1, ... 2^15 ].
 430   // For use in setbit immediate.
 431   uint16_t v = (int16_t)N->getSExtValue();
 432   // Constrain to 16 bits, and then check for single bit.
 433   return ImmIsSingleBit(v);
 434 }]>;
 435
 436 def Clr4ImmPred : PatLeaf<(i32 imm), [{
 437   // Clr4ImmPred predicate - True if the number is in the series of
 438   // bit negated values:
 439   // [ 2^0, 2^1, ... 2^15 ].
 440   // For use in setbit and clrbit immediate.
 441   uint16_t v = ~ (int16_t)N->getSExtValue();
 442   // Constrain to 16 bits, and then check for single bit.
 443   return ImmIsSingleBit(v);
 444 }]>;
 445
 446 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
 447   // SetClr4ImmPred predicate - True if the immediate is in the range 0..15.
 448   int16_t v = (int16_t)N->getSExtValue();
 449   return (v >= 0 && v <= 15);
 450 }]>;
 451
 452 def Set3ImmPred : PatLeaf<(i32 imm), [{
 453   // Set3ImmPred predicate - True if the number is in the series of values:
 454   // [ 2^0, 2^1, ... 2^7 ].
 455   // For use in setbit immediate.
 456   uint8_t v = (int8_t)N->getSExtValue();
 457   // Constrain to 8 bits, and then check for single bit.
 458   return ImmIsSingleBit(v);
 459 }]>;
 460
 461 def Clr3ImmPred : PatLeaf<(i32 imm), [{
 462   // Clr3ImmPred predicate - True if the number is in the series of
 463   // bit negated values:
 464   // [ 2^0, 2^1, ... 2^7 ].
 465   // For use in setbit and clrbit immediate.
 466   uint8_t v = ~ (int8_t)N->getSExtValue();
 467   // Constrain to 8 bits, and then check for single bit.
 468   return ImmIsSingleBit(v);
 469 }]>;
 470
 471 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
 472   // SetClr3ImmPred predicate - True if the immediate is in the range  0..7.
 473   int8_t v = (int8_t)N->getSExtValue();
 474   return (v >= 0 && v <= 7);
 475 }]>;
 476
 477
 478 // Extendable immediate operands.
 479
 480 let PrintMethod = "printExtOperand" in {
 481   def s16Ext : Operand<i32>;
 482   def s12Ext : Operand<i32>;
 483   def s10Ext : Operand<i32>;
 484   def s9Ext : Operand<i32>;
 485   def s8Ext : Operand<i32>;
 486   def s6Ext : Operand<i32>;
 487   def s11_0Ext : Operand<i32>;
 488   def s11_1Ext : Operand<i32>;
 489   def s11_2Ext : Operand<i32>;
 490   def s11_3Ext : Operand<i32>;
 491   def u6Ext : Operand<i32>;
 492   def u7Ext : Operand<i32>;
 493   def u8Ext : Operand<i32>;
 494   def u9Ext : Operand<i32>;
 495   def u10Ext : Operand<i32>;
 496   def u6_0Ext : Operand<i32>;
 497   def u6_1Ext : Operand<i32>;
 498   def u6_2Ext : Operand<i32>;
 499   def u6_3Ext : Operand<i32>;
 500 }
 501
 502 let PrintMethod = "printImmOperand" in
 503 def u0AlwaysExt : Operand<i32>;
 504
 505 // Predicates for constant extendable operands
 506 def s16ExtPred  : PatLeaf<(i32 imm), [{
 507   int64_t v = (int64_t)N->getSExtValue();
 508   if (!Subtarget.hasV4TOps())
 509     // Return true if the immediate can fit in a 16-bit sign extended field.
 510     return isInt<16>(v);
 511   else {
 512     if (isInt<16>(v))
 513       return true;
 514
 515     // Return true if extending this immediate is profitable and the value
 516     // can fit in a 32-bit signed field.
 517     return isConstExtProfitable(Node) && isInt<32>(v);
 518   }
 519 }]>;
 520
 521 def s10ExtPred  : PatLeaf<(i32 imm), [{
 522   int64_t v = (int64_t)N->getSExtValue();
 523   if (!Subtarget.hasV4TOps())
 524     // Return true if the immediate can fit in a 10-bit sign extended field.
 525     return isInt<10>(v);
 526   else {
 527     if (isInt<10>(v))
 528       return true;
 529
 530     // Return true if extending this immediate is profitable and the value
 531     // can fit in a 32-bit signed field.
 532     return isConstExtProfitable(Node) && isInt<32>(v);
 533   }
 534 }]>;
 535
 536 def s9ExtPred  : PatLeaf<(i32 imm), [{
 537   int64_t v = (int64_t)N->getSExtValue();
 538   if (!Subtarget.hasV4TOps())
 539     // Return true if the immediate can fit in a 9-bit sign extended field.
 540     return isInt<9>(v);
 541   else {
 542     if (isInt<9>(v))
 543       return true;
 544
 545     // Return true if extending this immediate is profitable and the value
 546     // can fit in a 32-bit unsigned field.
 547     return isConstExtProfitable(Node) && isInt<32>(v);
 548   }
 549 }]>;
 550
 551 def s8ExtPred  : PatLeaf<(i32 imm), [{
 552   int64_t v = (int64_t)N->getSExtValue();
 553   if (!Subtarget.hasV4TOps())
 554     // Return true if the immediate can fit in a 8-bit sign extended field.
 555     return isInt<8>(v);
 556   else {
 557     if (isInt<8>(v))
 558       return true;
 559
 560     // Return true if extending this immediate is profitable and the value
 561     // can fit in a 32-bit signed field.
 562     return isConstExtProfitable(Node) && isInt<32>(v);
 563   }
 564 }]>;
 565
 566 def s8_16ExtPred  : PatLeaf<(i32 imm), [{
 567   int64_t v = (int64_t)N->getSExtValue();
 568   if (!Subtarget.hasV4TOps())
 569     // Return true if the immediate fits in a 8-bit sign extended field.
 570     return isInt<8>(v);
 571   else {
 572     if (isInt<8>(v))
 573       return true;
 574
 575     // Return true if extending this immediate is profitable and the value
 576     // can't fit in a 16-bit signed field. This is required to avoid
 577     // unnecessary constant extenders.
 578     return isConstExtProfitable(Node) && !isInt<16>(v);
 579   }
 580 }]>;
 581
 582 def s6ExtPred  : PatLeaf<(i32 imm), [{
 583   int64_t v = (int64_t)N->getSExtValue();
 584   if (!Subtarget.hasV4TOps())
 585     // Return true if the immediate can fit in a 6-bit sign extended field.
 586     return isInt<6>(v);
 587   else {
 588     if (isInt<6>(v))
 589       return true;
 590
 591     // Return true if extending this immediate is profitable and the value
 592     // can fit in a 32-bit unsigned field.
 593     return isConstExtProfitable(Node) && isInt<32>(v);
 594   }
 595 }]>;
 596
 597 def s6_16ExtPred  : PatLeaf<(i32 imm), [{
 598   int64_t v = (int64_t)N->getSExtValue();
 599   if (!Subtarget.hasV4TOps())
 600     // Return true if the immediate fits in a 6-bit sign extended field.
 601     return isInt<6>(v);
 602   else {
 603     if (isInt<6>(v))
 604       return true;
 605
 606     // Return true if extending this immediate is profitable and the value
 607     // can't fit in a 16-bit signed field. This is required to avoid
 608     // unnecessary constant extenders.
 609     return isConstExtProfitable(Node) && !isInt<16>(v);
 610   }
 611 }]>;
 612
 613 def s6_10ExtPred  : PatLeaf<(i32 imm), [{
 614   int64_t v = (int64_t)N->getSExtValue();
 615   if (!Subtarget.hasV4TOps())
 616     // Return true if the immediate can fit in a 6-bit sign extended field.
 617     return isInt<6>(v);
 618   else {
 619     if (isInt<6>(v))
 620       return true;
 621
 622     // Return true if extending this immediate is profitable and the value
 623     // can't fit in a 10-bit signed field. This is required to avoid
 624     // unnecessary constant extenders.
 625     return isConstExtProfitable(Node) && !isInt<10>(v);
 626   }
 627 }]>;
 628
 629 def s11_0ExtPred  : PatLeaf<(i32 imm), [{
 630   int64_t v = (int64_t)N->getSExtValue();
 631   if (!Subtarget.hasV4TOps())
 632     // Return true if the immediate can fit in a 11-bit sign extended field.
 633     return isShiftedInt<11,0>(v);
 634   else {
 635     if (isInt<11>(v))
 636       return true;
 637
 638     // Return true if extending this immediate is profitable and the value
 639     // can fit in a 32-bit signed field.
 640     return isConstExtProfitable(Node) && isInt<32>(v);
 641   }
 642 }]>;
 643
 644 def s11_1ExtPred  : PatLeaf<(i32 imm), [{
 645   int64_t v = (int64_t)N->getSExtValue();
 646   if (!Subtarget.hasV4TOps())
 647     // Return true if the immediate can fit in a 12-bit sign extended field and
 648     // is 2 byte aligned.
 649     return isShiftedInt<11,1>(v);
 650   else {
 651     if (isInt<12>(v))
 652       return isShiftedInt<11,1>(v);
 653
 654     // Return true if extending this immediate is profitable and the low 1 bit
 655     // is zero (2-byte aligned).
 656     return isConstExtProfitable(Node) && isInt<32>(v) && ((v % 2) == 0);
 657   }
 658 }]>;
 659
 660 def s11_2ExtPred  : PatLeaf<(i32 imm), [{
 661   int64_t v = (int64_t)N->getSExtValue();
 662   if (!Subtarget.hasV4TOps())
 663     // Return true if the immediate can fit in a 13-bit sign extended field and
 664     // is 4-byte aligned.
 665     return isShiftedInt<11,2>(v);
 666   else {
 667     if (isInt<13>(v))
 668       return isShiftedInt<11,2>(v);
 669
 670     // Return true if extending this immediate is profitable and the low 2-bits
 671     // are zero (4-byte aligned).
 672     return isConstExtProfitable(Node)  && isInt<32>(v) && ((v % 4) == 0);
 673   }
 674 }]>;
 675
 676 def s11_3ExtPred  : PatLeaf<(i32 imm), [{
 677   int64_t v = (int64_t)N->getSExtValue();
 678   if (!Subtarget.hasV4TOps())
 679     // Return true if the immediate can fit in a 14-bit sign extended field and
 680     // is 8-byte aligned.
 681     return isShiftedInt<11,3>(v);
 682   else {
 683     if (isInt<14>(v))
 684      return isShiftedInt<11,3>(v);
 685
 686     // Return true if extending this immediate is profitable and the low 3-bits
 687     // are zero (8-byte aligned).
 688     return isConstExtProfitable(Node)  && isInt<32>(v) && ((v % 8) == 0);
 689   }
 690 }]>;
 691
 692 def u0AlwaysExtPred : PatLeaf<(i32 imm), [{
 693   // Predicate for an unsigned 32-bit value that always needs to be extended.
 694   if (Subtarget.hasV4TOps()) {
 695     if (isConstExtProfitable(Node)) {
 696       int64_t v = (int64_t)N->getSExtValue();
 697       return isUInt<32>(v);
 698     }
 699   }
 700   return false;
 701 }]>;
 702
 703 def u6ExtPred  : PatLeaf<(i32 imm), [{
 704   int64_t v = (int64_t)N->getSExtValue();
 705   if (!Subtarget.hasV4TOps())
 706     // Return true if the immediate can fit in a 6-bit unsigned field.
 707     return isUInt<6>(v);
 708   else {
 709     if (isUInt<6>(v))
 710       return true;
 711
 712     // Return true if extending this immediate is profitable and the value
 713     // can fit in a 32-bit unsigned field.
 714     return isConstExtProfitable(Node) && isUInt<32>(v);
 715   }
 716 }]>;
 717
 718 def u7ExtPred  : PatLeaf<(i32 imm), [{
 719   int64_t v = (int64_t)N->getSExtValue();
 720   if (!Subtarget.hasV4TOps())
 721     // Return true if the immediate can fit in a 7-bit unsigned field.
 722     return isUInt<7>(v);
 723   else {
 724     if (isUInt<7>(v))
 725       return true;
 726
 727     // Return true if extending this immediate is profitable and the value
 728     // can fit in a 32-bit unsigned field.
 729     return isConstExtProfitable(Node) && isUInt<32>(v);
 730   }
 731 }]>;
 732
 733 def u8ExtPred  : PatLeaf<(i32 imm), [{
 734   int64_t v = (int64_t)N->getSExtValue();
 735   if (!Subtarget.hasV4TOps())
 736     // Return true if the immediate can fit in a 8-bit unsigned field.
 737     return isUInt<8>(v);
 738   else {
 739     if (isUInt<8>(v))
 740       return true;
 741
 742     // Return true if extending this immediate is profitable and the value
 743     // can fit in a 32-bit unsigned field.
 744     return isConstExtProfitable(Node) && isUInt<32>(v);
 745   }
 746 }]>;
 747
 748 def u9ExtPred  : PatLeaf<(i32 imm), [{
 749   int64_t v = (int64_t)N->getSExtValue();
 750   if (!Subtarget.hasV4TOps())
 751     // Return true if the immediate can fit in a 9-bit unsigned field.
 752     return isUInt<9>(v);
 753   else {
 754     if (isUInt<9>(v))
 755       return true;
 756
 757     // Return true if extending this immediate is profitable and the value
 758     // can fit in a 32-bit unsigned field.
 759     return isConstExtProfitable(Node) && isUInt<32>(v);
 760   }
 761 }]>;
 762
 763 def u6_1ExtPred  : PatLeaf<(i32 imm), [{
 764   int64_t v = (int64_t)N->getSExtValue();
 765   if (!Subtarget.hasV4TOps())
 766     // Return true if the immediate can fit in a 7-bit unsigned field and
 767     // is 2-byte aligned.
 768     return isShiftedUInt<6,1>(v);
 769   else {
 770     if (isUInt<7>(v))
 771       return isShiftedUInt<6,1>(v);
 772
 773     // Return true if extending this immediate is profitable and the value
 774     // can fit in a 32-bit unsigned field.
 775     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 2) == 0);
 776   }
 777 }]>;
 778
 779 def u6_2ExtPred  : PatLeaf<(i32 imm), [{
 780   int64_t v = (int64_t)N->getSExtValue();
 781   if (!Subtarget.hasV4TOps())
 782     // Return true if the immediate can fit in a 8-bit unsigned field and
 783     // is 4-byte aligned.
 784     return isShiftedUInt<6,2>(v);
 785   else {
 786     if (isUInt<8>(v))
 787       return isShiftedUInt<6,2>(v);
 788
 789     // Return true if extending this immediate is profitable and the value
 790     // can fit in a 32-bit unsigned field.
 791     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 4) == 0);
 792   }
 793 }]>;
 794
 795 def u6_3ExtPred  : PatLeaf<(i32 imm), [{
 796   int64_t v = (int64_t)N->getSExtValue();
 797   if (!Subtarget.hasV4TOps())
 798     // Return true if the immediate can fit in a 9-bit unsigned field and
 799     // is 8-byte aligned.
 800     return isShiftedUInt<6,3>(v);
 801   else {
 802     if (isUInt<9>(v))
 803       return isShiftedUInt<6,3>(v);
 804
 805     // Return true if extending this immediate is profitable and the value
 806     // can fit in a 32-bit unsigned field.
 807     return isConstExtProfitable(Node) && isUInt<32>(v) && ((v % 8) == 0);
 808   }
 809 }]>;
 810
 811
 812 // This complex pattern exists only to create a machine instruction operand
 813 // of type "frame index". There doesn't seem to be a way to do that directly
 814 // in the patterns.
 815 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
 816
 817 // Addressing modes.
 818
 819 def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
 820 def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>;
 821 def ADDRriS11_0 : ComplexPattern<i32, 2, "SelectADDRriS11_0", [frameindex], []>;
 822 def ADDRriS11_1 : ComplexPattern<i32, 2, "SelectADDRriS11_1", [frameindex], []>;
 823 def ADDRriS11_2 : ComplexPattern<i32, 2, "SelectADDRriS11_2", [frameindex], []>;
 824 def ADDRriS11_3 : ComplexPattern<i32, 2, "SelectADDRriS11_3", [frameindex], []>;
 825 def ADDRriU6_0 : ComplexPattern<i32, 2, "SelectADDRriU6_0", [frameindex], []>;
 826 def ADDRriU6_1 : ComplexPattern<i32, 2, "SelectADDRriU6_1", [frameindex], []>;
 827 def ADDRriU6_2 : ComplexPattern<i32, 2, "SelectADDRriU6_2", [frameindex], []>;
 828
 829 // Address operands.
 830
 831 def MEMrr : Operand<i32> {
 832   let PrintMethod = "printMEMrrOperand";
 833   let MIOperandInfo = (ops IntRegs, IntRegs);
 834 }
 835
 836 def MEMri : Operand<i32> {
 837   let PrintMethod = "printMEMriOperand";
 838   let MIOperandInfo = (ops IntRegs, IntRegs);
 839 }
 840
 841 def MEMri_s11_2 : Operand<i32>,
 842   ComplexPattern<i32, 2, "SelectMEMriS11_2", []> {
 843   let PrintMethod = "printMEMriOperand";
 844   let MIOperandInfo = (ops IntRegs, s11Imm);
 845 }
 846
 847 def FrameIndex : Operand<i32> {
 848   let PrintMethod = "printFrameIndexOperand";
 849   let MIOperandInfo = (ops IntRegs, s11Imm);
 850 }
 851
 852 let PrintMethod = "printGlobalOperand" in {
 853   def globaladdress : Operand<i32>;
 854   def globaladdressExt : Operand<i32>;
 855 }
 856
 857 let PrintMethod = "printJumpTable" in
 858 def jumptablebase : Operand<i32>;
 859
 860 def brtarget : Operand<OtherVT>;
 861 def brtargetExt : Operand<OtherVT>;
 862 def calltarget : Operand<i32>;
 863
 864 def bblabel : Operand<i32>;
 865 def bbl   : SDNode<"ISD::BasicBlock", SDTPtrLeaf   , [], "BasicBlockSDNode">;
 866
 867 def symbolHi32 : Operand<i32> {
 868   let PrintMethod = "printSymbolHi";
 869 }
 870 def symbolLo32 : Operand<i32> {
 871   let PrintMethod = "printSymbolLo";
 872 }
 873
 874 // Return true if for a 32 to 64-bit sign-extended load.
 875 def is_sext_i32 : PatLeaf<(i64 DoubleRegs:$src1), [{
 876   LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
 877   if (!LD)
 878     return false;
 879   return LD->getExtensionType() == ISD::SEXTLOAD &&
 880          LD->getMemoryVT().getScalarType() == MVT::i32;
 881 }]>;