src/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp

   1 //===-- HexagonSubtarget.cpp - Hexagon Subtarget Information --------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the Hexagon specific subclass of TargetSubtarget.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "HexagonSubtarget.h"
  15 #include "Hexagon.h"
  16 #include "HexagonRegisterInfo.h"
  17 #include "llvm/Support/CommandLine.h"
  18 #include "llvm/Support/ErrorHandling.h"
  19 using namespace llvm;
  20
  21 #define GET_SUBTARGETINFO_CTOR
  22 #define GET_SUBTARGETINFO_TARGET_DESC
  23 #include "HexagonGenSubtargetInfo.inc"
  24
  25 static cl::opt<bool>
  26 EnableV3("enable-hexagon-v3", cl::Hidden,
  27          cl::desc("Enable Hexagon V3 instructions."));
  28
  29 static cl::opt<bool>
  30 EnableMemOps(
  31     "enable-hexagon-memops",
  32     cl::Hidden, cl::ZeroOrMore, cl::ValueDisallowed,
  33     cl::desc("Generate V4 memop instructions."));
  34
  35 static cl::opt<bool>
  36 EnableIEEERndNear(
  37     "enable-hexagon-ieee-rnd-near",
  38     cl::Hidden, cl::ZeroOrMore, cl::init(false),
  39     cl::desc("Generate non-chopped conversion from fp to int."));
  40
  41 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS):
  42   HexagonGenSubtargetInfo(TT, CPU, FS),
  43   CPUString(CPU.str()) {
  44
  45   // If the programmer has not specified a Hexagon version, default to -mv4.
  46   if (CPUString.empty())
  47     CPUString = "hexagonv4";
  48
  49   if (CPUString == "hexagonv2") {
  50     HexagonArchVersion = V2;
  51   } else if (CPUString == "hexagonv3") {
  52     EnableV3 = true;
  53     HexagonArchVersion = V3;
  54   } else if (CPUString == "hexagonv4") {
  55     HexagonArchVersion = V4;
  56   } else if (CPUString == "hexagonv5") {
  57     HexagonArchVersion = V5;
  58   } else {
  59     llvm_unreachable("Unrecognized Hexagon processor version");
  60   }
  61
  62   ParseSubtargetFeatures(CPUString, FS);
  63
  64   // Initialize scheduling itinerary for the specified CPU.
  65   InstrItins = getInstrItineraryForCPU(CPUString);
  66
  67   if (EnableMemOps)
  68     UseMemOps = true;
  69   else
  70     UseMemOps = false;
  71
  72   if (EnableIEEERndNear)
  73     ModeIEEERndNear = true;
  74   else
  75     ModeIEEERndNear = false;
  76 }
  77