src/llvm/lib/Target/NVPTX/NVPTX.h

   1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the entry points for global functions defined in
  11 // the LLVM NVPTX back-end.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef LLVM_TARGET_NVPTX_H
  16 #define LLVM_TARGET_NVPTX_H
  17
  18 #include "llvm/Value.h"
  19 #include "llvm/Module.h"
  20 #include "llvm/Support/ErrorHandling.h"
  21 #include "llvm/Target/TargetMachine.h"
  22 #include "MCTargetDesc/NVPTXBaseInfo.h"
  23 #include <cassert>
  24 #include <iosfwd>
  25
  26 namespace llvm {
  27 class NVPTXTargetMachine;
  28 class FunctionPass;
  29 class formatted_raw_ostream;
  30
  31 namespace NVPTXCC {
  32 enum CondCodes {
  33   EQ,
  34   NE,
  35   LT,
  36   LE,
  37   GT,
  38   GE
  39 };
  40 }
  41
  42 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
  43   switch (CC) {
  44   case NVPTXCC::NE:  return "ne";
  45   case NVPTXCC::EQ:   return "eq";
  46   case NVPTXCC::LT:   return "lt";
  47   case NVPTXCC::LE:  return "le";
  48   case NVPTXCC::GT:  return "gt";
  49   case NVPTXCC::GE:   return "ge";
  50   }
  51   llvm_unreachable("Unknown condition code");
  52 }
  53
  54 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
  55                                  llvm::CodeGenOpt::Level OptLevel);
  56 FunctionPass *createVectorElementizePass(NVPTXTargetMachine &);
  57 FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &);
  58 FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &);
  59 FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &);
  60
  61 bool isImageOrSamplerVal(const Value *, const Module *);
  62
  63 extern Target TheNVPTXTarget32;
  64 extern Target TheNVPTXTarget64;
  65
  66 namespace NVPTX
  67 {
  68 enum DrvInterface {
  69   NVCL,
  70   CUDA,
  71   TEST
  72 };
  73
  74 // A field inside TSFlags needs a shift and a mask. The usage is
  75 // always as follows :
  76 // ((TSFlags & fieldMask) >> fieldShift)
  77 // The enum keeps the mask, the shift, and all valid values of the
  78 // field in one place.
  79 enum VecInstType {
  80   VecInstTypeShift = 0,
  81   VecInstTypeMask = 0xF,
  82
  83   VecNOP = 0,
  84   VecLoad = 1,
  85   VecStore = 2,
  86   VecBuild = 3,
  87   VecShuffle = 4,
  88   VecExtract = 5,
  89   VecInsert = 6,
  90   VecDest = 7,
  91   VecOther = 15
  92 };
  93
  94 enum SimpleMove {
  95   SimpleMoveMask = 0x10,
  96   SimpleMoveShift = 4
  97 };
  98 enum LoadStore {
  99   isLoadMask = 0x20,
 100   isLoadShift = 5,
 101   isStoreMask = 0x40,
 102   isStoreShift = 6
 103 };
 104
 105 namespace PTXLdStInstCode {
 106 enum AddressSpace{
 107   GENERIC = 0,
 108   GLOBAL = 1,
 109   CONSTANT = 2,
 110   SHARED = 3,
 111   PARAM = 4,
 112   LOCAL = 5
 113 };
 114 enum FromType {
 115   Unsigned = 0,
 116   Signed,
 117   Float
 118 };
 119 enum VecType {
 120   Scalar = 1,
 121   V2 = 2,
 122   V4 = 4
 123 };
 124 }
 125 }
 126 } // end namespace llvm;
 127
 128 // Defines symbolic names for NVPTX registers.  This defines a mapping from
 129 // register name to register number.
 130 #define GET_REGINFO_ENUM
 131 #include "NVPTXGenRegisterInfo.inc"
 132
 133 // Defines symbolic names for the NVPTX instructions.
 134 #define GET_INSTRINFO_ENUM
 135 #include "NVPTXGenInstrInfo.inc"
 136
 137 #endif