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1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
16
17 #include "llvm/ADT/Triple.h"
18 #include "llvm/MC/MCInstrItineraries.h"
19 #include "llvm/Target/TargetSubtargetInfo.h"
20 #include <string>
21
22 #define GET_SUBTARGETINFO_HEADER
23 #include "PPCGenSubtargetInfo.inc"
24
25 // GCC #defines PPC on Linux but we use it as our namespace name
26 #undef PPC
27
28 namespace llvm {
29 class StringRef;
30
31 namespace PPC {
32 // -m directive values.
33 enum {
34 DIR_NONE,
35 DIR_32,
36 DIR_440,
37 DIR_601,
38 DIR_602,
39 DIR_603,
40 DIR_7400,
41 DIR_750,
42 DIR_970,
43 DIR_A2,
44 DIR_E500mc,
45 DIR_E5500,
46 DIR_PWR3,
47 DIR_PWR4,
48 DIR_PWR5,
49 DIR_PWR5X,
50 DIR_PWR6,
51 DIR_PWR6X,
52 DIR_PWR7,
53 DIR_64
54 };
55 }
56
57 class GlobalValue;
58 class TargetMachine;
59
60 class PPCSubtarget : public PPCGenSubtargetInfo {
61 protected:
62 /// stackAlignment - The minimum alignment known to hold of the stack frame on
63 /// entry to the function and which must be maintained by every function.
64 unsigned StackAlignment;
65
66 /// Selected instruction itineraries (one entry per itinerary class.)
67 InstrItineraryData InstrItins;
68
69 /// Which cpu directive was used.
70 unsigned DarwinDirective;
71
72 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
73 bool HasMFOCRF;
74 bool Has64BitSupport;
75 bool Use64BitRegs;
76 bool IsPPC64;
77 bool HasAltivec;
78 bool HasQPX;
79 bool HasFSQRT;
80 bool HasSTFIWX;
81 bool HasISEL;
82 bool IsBookE;
83 bool HasLazyResolverStubs;
84 bool IsJITCodeModel;
85
86 /// TargetTriple - What processor and OS we're targeting.
87 Triple TargetTriple;
88
89 public:
90 /// This constructor initializes the data members to match that
91 /// of the specified triple.
92 ///
93 PPCSubtarget(const std::string &TT, const std::string &CPU,
94 const std::string &FS, bool is64Bit);
95
96 /// ParseSubtargetFeatures - Parses features string setting specified
97 /// subtarget options. Definition of function is auto generated by tblgen.
98 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
99
100 /// SetJITMode - This is called to inform the subtarget info that we are
101 /// producing code for the JIT.
102 void SetJITMode();
103
104 /// getStackAlignment - Returns the minimum alignment known to hold of the
105 /// stack frame on entry to the function and which must be maintained by every
106 /// function for this subtarget.
107 unsigned getStackAlignment() const { return StackAlignment; }
108
109 /// getDarwinDirective - Returns the -m directive specified for the cpu.
110 ///
111 unsigned getDarwinDirective() const { return DarwinDirective; }
112
113 /// getInstrItins - Return the instruction itineraies based on subtarget
114 /// selection.
115 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
116
117 /// getDataLayoutString - Return the pointer size and type alignment
118 /// properties of this subtarget.
119 const char *getDataLayoutString() const {
120 // Note, the alignment values for f64 and i64 on ppc64 in Darwin
121 // documentation are wrong; these are correct (i.e. "what gcc does").
122 if (isPPC64() && isSVR4ABI()) {
123 if (TargetTriple.getOS() == llvm::Triple::FreeBSD)
124 return "E-p:64:64-f64:64:64-i64:64:64-f128:64:64-v128:128:128-n32:64";
125 else
126 return "E-p:64:64-f64:64:64-i64:64:64-f128:128:128-v128:128:128-n32:64";
127 }
128
129 return isPPC64() ? "E-p:64:64-f64:64:64-i64:64:64-f128:64:128-n32:64"
130 : "E-p:32:32-f64:64:64-i64:64:64-f128:64:128-n32";
131 }
132
133 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
134 ///
135 bool isPPC64() const { return IsPPC64; }
136
137 /// has64BitSupport - Return true if the selected CPU supports 64-bit
138 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
139 bool has64BitSupport() const { return Has64BitSupport; }
140
141 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
142 /// registers in 32-bit mode when possible. This can only true if
143 /// has64BitSupport() returns true.
144 bool use64BitRegs() const { return Use64BitRegs; }
145
146 /// hasLazyResolverStub - Return true if accesses to the specified global have
147 /// to go through a dyld lazy resolution stub. This means that an extra load
148 /// is required to get the address of the global.
149 bool hasLazyResolverStub(const GlobalValue *GV,
150 const TargetMachine &TM) const;
151
152 // isJITCodeModel - True if we're generating code for the JIT
153 bool isJITCodeModel() const { return IsJITCodeModel; }
154
155 // Specific obvious features.
156 bool hasFSQRT() const { return HasFSQRT; }
157 bool hasSTFIWX() const { return HasSTFIWX; }
158 bool hasAltivec() const { return HasAltivec; }
159 bool hasQPX() const { return HasQPX; }
160 bool hasMFOCRF() const { return HasMFOCRF; }
161 bool hasISEL() const { return HasISEL; }
162 bool isBookE() const { return IsBookE; }
163
164 const Triple &getTargetTriple() const { return TargetTriple; }
165
166 /// isDarwin - True if this is any darwin platform.
167 bool isDarwin() const { return TargetTriple.isMacOSX(); }
168 /// isBGP - True if this is a BG/P platform.
169 bool isBGP() const { return TargetTriple.getVendor() == Triple::BGP; }
170 /// isBGQ - True if this is a BG/Q platform.
171 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
172
173 bool isDarwinABI() const { return isDarwin(); }
174 bool isSVR4ABI() const { return !isDarwin(); }
175
176 /// enablePostRAScheduler - True at 'More' optimization.
177 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
178 TargetSubtargetInfo::AntiDepBreakMode& Mode,
179 RegClassVector& CriticalPathRCs) const;
180 };
181 } // End llvm namespace
182
183 #endif