src/stdarch/crates/core_arch/src/arm/crc.rs

   1 extern "C" {
   2     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32b")]
   3     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32b")]
   4     fn crc32b_(crc: u32, data: u32) -> u32;
   5     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32h")]
   6     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32h")]
   7     fn crc32h_(crc: u32, data: u32) -> u32;
   8     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32w")]
   9     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32w")]
  10     fn crc32w_(crc: u32, data: u32) -> u32;
  11
  12     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32cb")]
  13     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cb")]
  14     fn crc32cb_(crc: u32, data: u32) -> u32;
  15     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32ch")]
  16     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32ch")]
  17     fn crc32ch_(crc: u32, data: u32) -> u32;
  18     #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.crc32cw")]
  19     #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cw")]
  20     fn crc32cw_(crc: u32, data: u32) -> u32;
  21 }
  22
  23 #[cfg(test)]
  24 use stdarch_test::assert_instr;
  25
  26 /// CRC32 single round checksum for bytes (8 bits).
  27 #[inline]
  28 #[target_feature(enable = "crc")]
  29 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  30 #[cfg_attr(test, assert_instr(crc32b))]
  31 pub unsafe fn __crc32b(crc: u32, data: u8) -> u32 {
  32     crc32b_(crc, data as u32)
  33 }
  34
  35 /// CRC32 single round checksum for half words (16 bits).
  36 #[inline]
  37 #[target_feature(enable = "crc")]
  38 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  39 #[cfg_attr(test, assert_instr(crc32h))]
  40 pub unsafe fn __crc32h(crc: u32, data: u16) -> u32 {
  41     crc32h_(crc, data as u32)
  42 }
  43
  44 /// CRC32 single round checksum for words (32 bits).
  45 #[inline]
  46 #[target_feature(enable = "crc")]
  47 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  48 #[cfg_attr(test, assert_instr(crc32w))]
  49 pub unsafe fn __crc32w(crc: u32, data: u32) -> u32 {
  50     crc32w_(crc, data)
  51 }
  52
  53 /// CRC32-C single round checksum for bytes (8 bits).
  54 #[inline]
  55 #[target_feature(enable = "crc")]
  56 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  57 #[cfg_attr(test, assert_instr(crc32cb))]
  58 pub unsafe fn __crc32cb(crc: u32, data: u8) -> u32 {
  59     crc32cb_(crc, data as u32)
  60 }
  61
  62 /// CRC32-C single round checksum for half words (16 bits).
  63 #[inline]
  64 #[target_feature(enable = "crc")]
  65 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  66 #[cfg_attr(test, assert_instr(crc32ch))]
  67 pub unsafe fn __crc32ch(crc: u32, data: u16) -> u32 {
  68     crc32ch_(crc, data as u32)
  69 }
  70
  71 /// CRC32-C single round checksum for words (32 bits).
  72 #[inline]
  73 #[target_feature(enable = "crc")]
  74 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
  75 #[cfg_attr(test, assert_instr(crc32cw))]
  76 pub unsafe fn __crc32cw(crc: u32, data: u32) -> u32 {
  77     crc32cw_(crc, data)
  78 }
  79
  80 #[cfg(test)]
  81 mod tests {
  82     use crate::core_arch::{arm::*, simd::*};
  83     use std::mem;
  84     use stdarch_test::simd_test;
  85
  86     #[simd_test(enable = "crc")]
  87     unsafe fn test_crc32b() {
  88         assert_eq!(__crc32b(0, 0), 0);
  89         assert_eq!(__crc32b(0, 255), 755167117);
  90     }
  91
  92     #[simd_test(enable = "crc")]
  93     unsafe fn test_crc32h() {
  94         assert_eq!(__crc32h(0, 0), 0);
  95         assert_eq!(__crc32h(0, 16384), 1994146192);
  96     }
  97
  98     #[simd_test(enable = "crc")]
  99     unsafe fn test_crc32w() {
 100         assert_eq!(__crc32w(0, 0), 0);
 101         assert_eq!(__crc32w(0, 4294967295), 3736805603);
 102     }
 103
 104     #[simd_test(enable = "crc")]
 105     unsafe fn test_crc32cb() {
 106         assert_eq!(__crc32cb(0, 0), 0);
 107         assert_eq!(__crc32cb(0, 255), 2910671697);
 108     }
 109
 110     #[simd_test(enable = "crc")]
 111     unsafe fn test_crc32ch() {
 112         assert_eq!(__crc32ch(0, 0), 0);
 113         assert_eq!(__crc32ch(0, 16384), 1098587580);
 114     }
 115
 116     #[simd_test(enable = "crc")]
 117     unsafe fn test_crc32cw() {
 118         assert_eq!(__crc32cw(0, 0), 0);
 119         assert_eq!(__crc32cw(0, 4294967295), 3080238136);
 120     }
 121 }