src/stdarch/crates/core_arch/src/arm/neon/generated.rs

   1 // This code is automatically generated. DO NOT MODIFY.
   2 //
   3 // Instead, modify `crates/stdarch-gen/neon.spec` and run the following command to re-generate this file:
   4 //
   5 // ```
   6 // OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen -- crates/stdarch-gen/neon.spec
   7 // ```
   8 use super::*;
   9 #[cfg(test)]
  10 use stdarch_test::assert_instr;
  11
  12 /// Vector bitwise and
  13 #[inline]
  14 #[target_feature(enable = "neon")]
  15 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  16 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  17 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  18 pub unsafe fn vand_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
  19     simd_and(a, b)
  20 }
  21
  22 /// Vector bitwise and
  23 #[inline]
  24 #[target_feature(enable = "neon")]
  25 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  26 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  27 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  28 pub unsafe fn vandq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
  29     simd_and(a, b)
  30 }
  31
  32 /// Vector bitwise and
  33 #[inline]
  34 #[target_feature(enable = "neon")]
  35 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  36 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  37 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  38 pub unsafe fn vand_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
  39     simd_and(a, b)
  40 }
  41
  42 /// Vector bitwise and
  43 #[inline]
  44 #[target_feature(enable = "neon")]
  45 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  46 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  47 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  48 pub unsafe fn vandq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
  49     simd_and(a, b)
  50 }
  51
  52 /// Vector bitwise and
  53 #[inline]
  54 #[target_feature(enable = "neon")]
  55 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  56 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  57 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  58 pub unsafe fn vand_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
  59     simd_and(a, b)
  60 }
  61
  62 /// Vector bitwise and
  63 #[inline]
  64 #[target_feature(enable = "neon")]
  65 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  66 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  67 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  68 pub unsafe fn vandq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
  69     simd_and(a, b)
  70 }
  71
  72 /// Vector bitwise and
  73 #[inline]
  74 #[target_feature(enable = "neon")]
  75 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  76 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  77 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  78 pub unsafe fn vand_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
  79     simd_and(a, b)
  80 }
  81
  82 /// Vector bitwise and
  83 #[inline]
  84 #[target_feature(enable = "neon")]
  85 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  86 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  87 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  88 pub unsafe fn vandq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
  89     simd_and(a, b)
  90 }
  91
  92 /// Vector bitwise and
  93 #[inline]
  94 #[target_feature(enable = "neon")]
  95 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
  96 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
  97 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
  98 pub unsafe fn vand_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
  99     simd_and(a, b)
 100 }
 101
 102 /// Vector bitwise and
 103 #[inline]
 104 #[target_feature(enable = "neon")]
 105 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 106 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 107 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 108 pub unsafe fn vandq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 109     simd_and(a, b)
 110 }
 111
 112 /// Vector bitwise and
 113 #[inline]
 114 #[target_feature(enable = "neon")]
 115 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 116 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 117 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 118 pub unsafe fn vand_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 119     simd_and(a, b)
 120 }
 121
 122 /// Vector bitwise and
 123 #[inline]
 124 #[target_feature(enable = "neon")]
 125 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 126 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 127 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 128 pub unsafe fn vandq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 129     simd_and(a, b)
 130 }
 131
 132 /// Vector bitwise and
 133 #[inline]
 134 #[target_feature(enable = "neon")]
 135 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 136 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 137 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 138 pub unsafe fn vand_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
 139     simd_and(a, b)
 140 }
 141
 142 /// Vector bitwise and
 143 #[inline]
 144 #[target_feature(enable = "neon")]
 145 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 146 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 147 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 148 pub unsafe fn vandq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
 149     simd_and(a, b)
 150 }
 151
 152 /// Vector bitwise and
 153 #[inline]
 154 #[target_feature(enable = "neon")]
 155 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 156 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 157 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 158 pub unsafe fn vand_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
 159     simd_and(a, b)
 160 }
 161
 162 /// Vector bitwise and
 163 #[inline]
 164 #[target_feature(enable = "neon")]
 165 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 166 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
 167 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))]
 168 pub unsafe fn vandq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
 169     simd_and(a, b)
 170 }
 171
 172 /// Vector bitwise or (immediate, inclusive)
 173 #[inline]
 174 #[target_feature(enable = "neon")]
 175 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 176 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 177 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 178 pub unsafe fn vorr_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
 179     simd_or(a, b)
 180 }
 181
 182 /// Vector bitwise or (immediate, inclusive)
 183 #[inline]
 184 #[target_feature(enable = "neon")]
 185 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 186 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 187 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 188 pub unsafe fn vorrq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
 189     simd_or(a, b)
 190 }
 191
 192 /// Vector bitwise or (immediate, inclusive)
 193 #[inline]
 194 #[target_feature(enable = "neon")]
 195 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 196 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 197 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 198 pub unsafe fn vorr_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
 199     simd_or(a, b)
 200 }
 201
 202 /// Vector bitwise or (immediate, inclusive)
 203 #[inline]
 204 #[target_feature(enable = "neon")]
 205 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 206 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 207 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 208 pub unsafe fn vorrq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
 209     simd_or(a, b)
 210 }
 211
 212 /// Vector bitwise or (immediate, inclusive)
 213 #[inline]
 214 #[target_feature(enable = "neon")]
 215 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 216 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 217 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 218 pub unsafe fn vorr_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
 219     simd_or(a, b)
 220 }
 221
 222 /// Vector bitwise or (immediate, inclusive)
 223 #[inline]
 224 #[target_feature(enable = "neon")]
 225 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 226 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 227 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 228 pub unsafe fn vorrq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
 229     simd_or(a, b)
 230 }
 231
 232 /// Vector bitwise or (immediate, inclusive)
 233 #[inline]
 234 #[target_feature(enable = "neon")]
 235 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 236 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 237 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 238 pub unsafe fn vorr_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 239     simd_or(a, b)
 240 }
 241
 242 /// Vector bitwise or (immediate, inclusive)
 243 #[inline]
 244 #[target_feature(enable = "neon")]
 245 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 246 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 247 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 248 pub unsafe fn vorrq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 249     simd_or(a, b)
 250 }
 251
 252 /// Vector bitwise or (immediate, inclusive)
 253 #[inline]
 254 #[target_feature(enable = "neon")]
 255 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 256 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 257 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 258 pub unsafe fn vorr_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 259     simd_or(a, b)
 260 }
 261
 262 /// Vector bitwise or (immediate, inclusive)
 263 #[inline]
 264 #[target_feature(enable = "neon")]
 265 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 266 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 267 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 268 pub unsafe fn vorrq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 269     simd_or(a, b)
 270 }
 271
 272 /// Vector bitwise or (immediate, inclusive)
 273 #[inline]
 274 #[target_feature(enable = "neon")]
 275 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 276 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 277 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 278 pub unsafe fn vorr_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 279     simd_or(a, b)
 280 }
 281
 282 /// Vector bitwise or (immediate, inclusive)
 283 #[inline]
 284 #[target_feature(enable = "neon")]
 285 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 286 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 287 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 288 pub unsafe fn vorrq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 289     simd_or(a, b)
 290 }
 291
 292 /// Vector bitwise or (immediate, inclusive)
 293 #[inline]
 294 #[target_feature(enable = "neon")]
 295 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 296 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 297 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 298 pub unsafe fn vorr_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
 299     simd_or(a, b)
 300 }
 301
 302 /// Vector bitwise or (immediate, inclusive)
 303 #[inline]
 304 #[target_feature(enable = "neon")]
 305 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 306 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 307 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 308 pub unsafe fn vorrq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
 309     simd_or(a, b)
 310 }
 311
 312 /// Vector bitwise or (immediate, inclusive)
 313 #[inline]
 314 #[target_feature(enable = "neon")]
 315 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 316 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 317 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 318 pub unsafe fn vorr_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
 319     simd_or(a, b)
 320 }
 321
 322 /// Vector bitwise or (immediate, inclusive)
 323 #[inline]
 324 #[target_feature(enable = "neon")]
 325 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 326 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))]
 327 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))]
 328 pub unsafe fn vorrq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
 329     simd_or(a, b)
 330 }
 331
 332 /// Vector bitwise exclusive or (vector)
 333 #[inline]
 334 #[target_feature(enable = "neon")]
 335 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 336 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 337 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 338 pub unsafe fn veor_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
 339     simd_xor(a, b)
 340 }
 341
 342 /// Vector bitwise exclusive or (vector)
 343 #[inline]
 344 #[target_feature(enable = "neon")]
 345 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 346 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 347 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 348 pub unsafe fn veorq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
 349     simd_xor(a, b)
 350 }
 351
 352 /// Vector bitwise exclusive or (vector)
 353 #[inline]
 354 #[target_feature(enable = "neon")]
 355 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 356 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 357 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 358 pub unsafe fn veor_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
 359     simd_xor(a, b)
 360 }
 361
 362 /// Vector bitwise exclusive or (vector)
 363 #[inline]
 364 #[target_feature(enable = "neon")]
 365 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 366 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 367 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 368 pub unsafe fn veorq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
 369     simd_xor(a, b)
 370 }
 371
 372 /// Vector bitwise exclusive or (vector)
 373 #[inline]
 374 #[target_feature(enable = "neon")]
 375 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 376 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 377 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 378 pub unsafe fn veor_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
 379     simd_xor(a, b)
 380 }
 381
 382 /// Vector bitwise exclusive or (vector)
 383 #[inline]
 384 #[target_feature(enable = "neon")]
 385 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 386 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 387 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 388 pub unsafe fn veorq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
 389     simd_xor(a, b)
 390 }
 391
 392 /// Vector bitwise exclusive or (vector)
 393 #[inline]
 394 #[target_feature(enable = "neon")]
 395 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 396 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 397 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 398 pub unsafe fn veor_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 399     simd_xor(a, b)
 400 }
 401
 402 /// Vector bitwise exclusive or (vector)
 403 #[inline]
 404 #[target_feature(enable = "neon")]
 405 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 406 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 407 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 408 pub unsafe fn veorq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 409     simd_xor(a, b)
 410 }
 411
 412 /// Vector bitwise exclusive or (vector)
 413 #[inline]
 414 #[target_feature(enable = "neon")]
 415 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 416 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 417 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 418 pub unsafe fn veor_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 419     simd_xor(a, b)
 420 }
 421
 422 /// Vector bitwise exclusive or (vector)
 423 #[inline]
 424 #[target_feature(enable = "neon")]
 425 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 426 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 427 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 428 pub unsafe fn veorq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 429     simd_xor(a, b)
 430 }
 431
 432 /// Vector bitwise exclusive or (vector)
 433 #[inline]
 434 #[target_feature(enable = "neon")]
 435 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 436 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 437 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 438 pub unsafe fn veor_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 439     simd_xor(a, b)
 440 }
 441
 442 /// Vector bitwise exclusive or (vector)
 443 #[inline]
 444 #[target_feature(enable = "neon")]
 445 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 446 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 447 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 448 pub unsafe fn veorq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 449     simd_xor(a, b)
 450 }
 451
 452 /// Vector bitwise exclusive or (vector)
 453 #[inline]
 454 #[target_feature(enable = "neon")]
 455 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 456 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 457 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 458 pub unsafe fn veor_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
 459     simd_xor(a, b)
 460 }
 461
 462 /// Vector bitwise exclusive or (vector)
 463 #[inline]
 464 #[target_feature(enable = "neon")]
 465 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 466 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 467 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 468 pub unsafe fn veorq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
 469     simd_xor(a, b)
 470 }
 471
 472 /// Vector bitwise exclusive or (vector)
 473 #[inline]
 474 #[target_feature(enable = "neon")]
 475 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 476 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 477 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 478 pub unsafe fn veor_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
 479     simd_xor(a, b)
 480 }
 481
 482 /// Vector bitwise exclusive or (vector)
 483 #[inline]
 484 #[target_feature(enable = "neon")]
 485 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 486 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))]
 487 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))]
 488 pub unsafe fn veorq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
 489     simd_xor(a, b)
 490 }
 491
 492 /// Compare bitwise Equal (vector)
 493 #[inline]
 494 #[target_feature(enable = "neon")]
 495 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 496 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
 497 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 498 pub unsafe fn vceq_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 499     simd_eq(a, b)
 500 }
 501
 502 /// Compare bitwise Equal (vector)
 503 #[inline]
 504 #[target_feature(enable = "neon")]
 505 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 506 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
 507 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 508 pub unsafe fn vceqq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 509     simd_eq(a, b)
 510 }
 511
 512 /// Compare bitwise Equal (vector)
 513 #[inline]
 514 #[target_feature(enable = "neon")]
 515 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 516 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
 517 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 518 pub unsafe fn vceq_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 519     simd_eq(a, b)
 520 }
 521
 522 /// Compare bitwise Equal (vector)
 523 #[inline]
 524 #[target_feature(enable = "neon")]
 525 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 526 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
 527 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 528 pub unsafe fn vceqq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 529     simd_eq(a, b)
 530 }
 531
 532 /// Compare bitwise Equal (vector)
 533 #[inline]
 534 #[target_feature(enable = "neon")]
 535 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 536 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
 537 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 538 pub unsafe fn vceq_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 539     simd_eq(a, b)
 540 }
 541
 542 /// Compare bitwise Equal (vector)
 543 #[inline]
 544 #[target_feature(enable = "neon")]
 545 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 546 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
 547 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 548 pub unsafe fn vceqq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 549     simd_eq(a, b)
 550 }
 551
 552 /// Compare bitwise Equal (vector)
 553 #[inline]
 554 #[target_feature(enable = "neon")]
 555 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 556 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
 557 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 558 pub unsafe fn vceq_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
 559     simd_eq(a, b)
 560 }
 561
 562 /// Compare bitwise Equal (vector)
 563 #[inline]
 564 #[target_feature(enable = "neon")]
 565 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 566 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
 567 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 568 pub unsafe fn vceqq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
 569     simd_eq(a, b)
 570 }
 571
 572 /// Compare bitwise Equal (vector)
 573 #[inline]
 574 #[target_feature(enable = "neon")]
 575 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 576 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
 577 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 578 pub unsafe fn vceq_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
 579     simd_eq(a, b)
 580 }
 581
 582 /// Compare bitwise Equal (vector)
 583 #[inline]
 584 #[target_feature(enable = "neon")]
 585 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 586 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
 587 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 588 pub unsafe fn vceqq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
 589     simd_eq(a, b)
 590 }
 591
 592 /// Compare bitwise Equal (vector)
 593 #[inline]
 594 #[target_feature(enable = "neon")]
 595 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 596 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
 597 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 598 pub unsafe fn vceq_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
 599     simd_eq(a, b)
 600 }
 601
 602 /// Compare bitwise Equal (vector)
 603 #[inline]
 604 #[target_feature(enable = "neon")]
 605 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 606 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
 607 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))]
 608 pub unsafe fn vceqq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
 609     simd_eq(a, b)
 610 }
 611
 612 /// Floating-point compare equal
 613 #[inline]
 614 #[target_feature(enable = "neon")]
 615 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 616 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))]
 617 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmeq))]
 618 pub unsafe fn vceq_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
 619     simd_eq(a, b)
 620 }
 621
 622 /// Floating-point compare equal
 623 #[inline]
 624 #[target_feature(enable = "neon")]
 625 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 626 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))]
 627 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmeq))]
 628 pub unsafe fn vceqq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
 629     simd_eq(a, b)
 630 }
 631
 632 /// Compare signed greater than
 633 #[inline]
 634 #[target_feature(enable = "neon")]
 635 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 636 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
 637 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 638 pub unsafe fn vcgt_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
 639     simd_gt(a, b)
 640 }
 641
 642 /// Compare signed greater than
 643 #[inline]
 644 #[target_feature(enable = "neon")]
 645 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 646 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
 647 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 648 pub unsafe fn vcgtq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
 649     simd_gt(a, b)
 650 }
 651
 652 /// Compare signed greater than
 653 #[inline]
 654 #[target_feature(enable = "neon")]
 655 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 656 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
 657 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 658 pub unsafe fn vcgt_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
 659     simd_gt(a, b)
 660 }
 661
 662 /// Compare signed greater than
 663 #[inline]
 664 #[target_feature(enable = "neon")]
 665 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 666 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
 667 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 668 pub unsafe fn vcgtq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
 669     simd_gt(a, b)
 670 }
 671
 672 /// Compare signed greater than
 673 #[inline]
 674 #[target_feature(enable = "neon")]
 675 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 676 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
 677 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 678 pub unsafe fn vcgt_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
 679     simd_gt(a, b)
 680 }
 681
 682 /// Compare signed greater than
 683 #[inline]
 684 #[target_feature(enable = "neon")]
 685 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 686 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
 687 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 688 pub unsafe fn vcgtq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
 689     simd_gt(a, b)
 690 }
 691
 692 /// Compare unsigned highe
 693 #[inline]
 694 #[target_feature(enable = "neon")]
 695 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 696 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
 697 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 698 pub unsafe fn vcgt_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 699     simd_gt(a, b)
 700 }
 701
 702 /// Compare unsigned highe
 703 #[inline]
 704 #[target_feature(enable = "neon")]
 705 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 706 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
 707 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 708 pub unsafe fn vcgtq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 709     simd_gt(a, b)
 710 }
 711
 712 /// Compare unsigned highe
 713 #[inline]
 714 #[target_feature(enable = "neon")]
 715 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 716 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
 717 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 718 pub unsafe fn vcgt_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 719     simd_gt(a, b)
 720 }
 721
 722 /// Compare unsigned highe
 723 #[inline]
 724 #[target_feature(enable = "neon")]
 725 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 726 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
 727 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 728 pub unsafe fn vcgtq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 729     simd_gt(a, b)
 730 }
 731
 732 /// Compare unsigned highe
 733 #[inline]
 734 #[target_feature(enable = "neon")]
 735 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 736 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
 737 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 738 pub unsafe fn vcgt_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 739     simd_gt(a, b)
 740 }
 741
 742 /// Compare unsigned highe
 743 #[inline]
 744 #[target_feature(enable = "neon")]
 745 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 746 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
 747 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 748 pub unsafe fn vcgtq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 749     simd_gt(a, b)
 750 }
 751
 752 /// Floating-point compare greater than
 753 #[inline]
 754 #[target_feature(enable = "neon")]
 755 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 756 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
 757 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))]
 758 pub unsafe fn vcgt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
 759     simd_gt(a, b)
 760 }
 761
 762 /// Floating-point compare greater than
 763 #[inline]
 764 #[target_feature(enable = "neon")]
 765 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 766 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
 767 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))]
 768 pub unsafe fn vcgtq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
 769     simd_gt(a, b)
 770 }
 771
 772 /// Compare signed less than
 773 #[inline]
 774 #[target_feature(enable = "neon")]
 775 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 776 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
 777 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 778 pub unsafe fn vclt_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
 779     simd_lt(a, b)
 780 }
 781
 782 /// Compare signed less than
 783 #[inline]
 784 #[target_feature(enable = "neon")]
 785 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 786 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
 787 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 788 pub unsafe fn vcltq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
 789     simd_lt(a, b)
 790 }
 791
 792 /// Compare signed less than
 793 #[inline]
 794 #[target_feature(enable = "neon")]
 795 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 796 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
 797 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 798 pub unsafe fn vclt_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
 799     simd_lt(a, b)
 800 }
 801
 802 /// Compare signed less than
 803 #[inline]
 804 #[target_feature(enable = "neon")]
 805 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 806 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
 807 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 808 pub unsafe fn vcltq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
 809     simd_lt(a, b)
 810 }
 811
 812 /// Compare signed less than
 813 #[inline]
 814 #[target_feature(enable = "neon")]
 815 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 816 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
 817 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 818 pub unsafe fn vclt_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
 819     simd_lt(a, b)
 820 }
 821
 822 /// Compare signed less than
 823 #[inline]
 824 #[target_feature(enable = "neon")]
 825 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 826 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
 827 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))]
 828 pub unsafe fn vcltq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
 829     simd_lt(a, b)
 830 }
 831
 832 /// Compare unsigned less than
 833 #[inline]
 834 #[target_feature(enable = "neon")]
 835 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 836 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
 837 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 838 pub unsafe fn vclt_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 839     simd_lt(a, b)
 840 }
 841
 842 /// Compare unsigned less than
 843 #[inline]
 844 #[target_feature(enable = "neon")]
 845 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 846 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
 847 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 848 pub unsafe fn vcltq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 849     simd_lt(a, b)
 850 }
 851
 852 /// Compare unsigned less than
 853 #[inline]
 854 #[target_feature(enable = "neon")]
 855 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 856 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
 857 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 858 pub unsafe fn vclt_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 859     simd_lt(a, b)
 860 }
 861
 862 /// Compare unsigned less than
 863 #[inline]
 864 #[target_feature(enable = "neon")]
 865 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 866 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
 867 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 868 pub unsafe fn vcltq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
 869     simd_lt(a, b)
 870 }
 871
 872 /// Compare unsigned less than
 873 #[inline]
 874 #[target_feature(enable = "neon")]
 875 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 876 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
 877 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 878 pub unsafe fn vclt_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
 879     simd_lt(a, b)
 880 }
 881
 882 /// Compare unsigned less than
 883 #[inline]
 884 #[target_feature(enable = "neon")]
 885 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 886 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
 887 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))]
 888 pub unsafe fn vcltq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
 889     simd_lt(a, b)
 890 }
 891
 892 /// Floating-point compare less than
 893 #[inline]
 894 #[target_feature(enable = "neon")]
 895 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 896 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
 897 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))]
 898 pub unsafe fn vclt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
 899     simd_lt(a, b)
 900 }
 901
 902 /// Floating-point compare less than
 903 #[inline]
 904 #[target_feature(enable = "neon")]
 905 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 906 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
 907 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))]
 908 pub unsafe fn vcltq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
 909     simd_lt(a, b)
 910 }
 911
 912 /// Compare signed less than or equal
 913 #[inline]
 914 #[target_feature(enable = "neon")]
 915 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 916 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
 917 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 918 pub unsafe fn vcle_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
 919     simd_le(a, b)
 920 }
 921
 922 /// Compare signed less than or equal
 923 #[inline]
 924 #[target_feature(enable = "neon")]
 925 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 926 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
 927 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 928 pub unsafe fn vcleq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
 929     simd_le(a, b)
 930 }
 931
 932 /// Compare signed less than or equal
 933 #[inline]
 934 #[target_feature(enable = "neon")]
 935 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 936 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
 937 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 938 pub unsafe fn vcle_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
 939     simd_le(a, b)
 940 }
 941
 942 /// Compare signed less than or equal
 943 #[inline]
 944 #[target_feature(enable = "neon")]
 945 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 946 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
 947 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 948 pub unsafe fn vcleq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
 949     simd_le(a, b)
 950 }
 951
 952 /// Compare signed less than or equal
 953 #[inline]
 954 #[target_feature(enable = "neon")]
 955 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 956 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
 957 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 958 pub unsafe fn vcle_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
 959     simd_le(a, b)
 960 }
 961
 962 /// Compare signed less than or equal
 963 #[inline]
 964 #[target_feature(enable = "neon")]
 965 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 966 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
 967 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
 968 pub unsafe fn vcleq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
 969     simd_le(a, b)
 970 }
 971
 972 /// Compare unsigned less than or equal
 973 #[inline]
 974 #[target_feature(enable = "neon")]
 975 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 976 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
 977 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
 978 pub unsafe fn vcle_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
 979     simd_le(a, b)
 980 }
 981
 982 /// Compare unsigned less than or equal
 983 #[inline]
 984 #[target_feature(enable = "neon")]
 985 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 986 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
 987 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
 988 pub unsafe fn vcleq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
 989     simd_le(a, b)
 990 }
 991
 992 /// Compare unsigned less than or equal
 993 #[inline]
 994 #[target_feature(enable = "neon")]
 995 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 996 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
 997 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
 998 pub unsafe fn vcle_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
 999     simd_le(a, b)
1000 }
1001
1002 /// Compare unsigned less than or equal
1003 #[inline]
1004 #[target_feature(enable = "neon")]
1005 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1006 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
1007 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1008 pub unsafe fn vcleq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1009     simd_le(a, b)
1010 }
1011
1012 /// Compare unsigned less than or equal
1013 #[inline]
1014 #[target_feature(enable = "neon")]
1015 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1016 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
1017 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1018 pub unsafe fn vcle_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1019     simd_le(a, b)
1020 }
1021
1022 /// Compare unsigned less than or equal
1023 #[inline]
1024 #[target_feature(enable = "neon")]
1025 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1026 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
1027 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1028 pub unsafe fn vcleq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1029     simd_le(a, b)
1030 }
1031
1032 /// Floating-point compare less than or equal
1033 #[inline]
1034 #[target_feature(enable = "neon")]
1035 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1036 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
1037 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))]
1038 pub unsafe fn vcle_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
1039     simd_le(a, b)
1040 }
1041
1042 /// Floating-point compare less than or equal
1043 #[inline]
1044 #[target_feature(enable = "neon")]
1045 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1046 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
1047 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))]
1048 pub unsafe fn vcleq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
1049     simd_le(a, b)
1050 }
1051
1052 /// Compare signed greater than or equal
1053 #[inline]
1054 #[target_feature(enable = "neon")]
1055 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1056 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
1057 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1058 pub unsafe fn vcge_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
1059     simd_ge(a, b)
1060 }
1061
1062 /// Compare signed greater than or equal
1063 #[inline]
1064 #[target_feature(enable = "neon")]
1065 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1066 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
1067 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1068 pub unsafe fn vcgeq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
1069     simd_ge(a, b)
1070 }
1071
1072 /// Compare signed greater than or equal
1073 #[inline]
1074 #[target_feature(enable = "neon")]
1075 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1076 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
1077 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1078 pub unsafe fn vcge_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
1079     simd_ge(a, b)
1080 }
1081
1082 /// Compare signed greater than or equal
1083 #[inline]
1084 #[target_feature(enable = "neon")]
1085 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1086 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
1087 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1088 pub unsafe fn vcgeq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
1089     simd_ge(a, b)
1090 }
1091
1092 /// Compare signed greater than or equal
1093 #[inline]
1094 #[target_feature(enable = "neon")]
1095 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1096 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
1097 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1098 pub unsafe fn vcge_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
1099     simd_ge(a, b)
1100 }
1101
1102 /// Compare signed greater than or equal
1103 #[inline]
1104 #[target_feature(enable = "neon")]
1105 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1106 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
1107 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))]
1108 pub unsafe fn vcgeq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
1109     simd_ge(a, b)
1110 }
1111
1112 /// Compare unsigned greater than or equal
1113 #[inline]
1114 #[target_feature(enable = "neon")]
1115 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1116 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
1117 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1118 pub unsafe fn vcge_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1119     simd_ge(a, b)
1120 }
1121
1122 /// Compare unsigned greater than or equal
1123 #[inline]
1124 #[target_feature(enable = "neon")]
1125 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1126 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
1127 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1128 pub unsafe fn vcgeq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1129     simd_ge(a, b)
1130 }
1131
1132 /// Compare unsigned greater than or equal
1133 #[inline]
1134 #[target_feature(enable = "neon")]
1135 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1136 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
1137 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1138 pub unsafe fn vcge_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1139     simd_ge(a, b)
1140 }
1141
1142 /// Compare unsigned greater than or equal
1143 #[inline]
1144 #[target_feature(enable = "neon")]
1145 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1146 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
1147 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1148 pub unsafe fn vcgeq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1149     simd_ge(a, b)
1150 }
1151
1152 /// Compare unsigned greater than or equal
1153 #[inline]
1154 #[target_feature(enable = "neon")]
1155 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1156 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
1157 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1158 pub unsafe fn vcge_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1159     simd_ge(a, b)
1160 }
1161
1162 /// Compare unsigned greater than or equal
1163 #[inline]
1164 #[target_feature(enable = "neon")]
1165 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1166 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
1167 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))]
1168 pub unsafe fn vcgeq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1169     simd_ge(a, b)
1170 }
1171
1172 /// Floating-point compare greater than or equal
1173 #[inline]
1174 #[target_feature(enable = "neon")]
1175 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1176 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
1177 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))]
1178 pub unsafe fn vcge_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
1179     simd_ge(a, b)
1180 }
1181
1182 /// Floating-point compare greater than or equal
1183 #[inline]
1184 #[target_feature(enable = "neon")]
1185 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1186 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
1187 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))]
1188 pub unsafe fn vcgeq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
1189     simd_ge(a, b)
1190 }
1191
1192 /// Saturating subtract
1193 #[inline]
1194 #[target_feature(enable = "neon")]
1195 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1196 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u8"))]
1197 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1198 pub unsafe fn vqsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1199     #[allow(improper_ctypes)]
1200     extern "C" {
1201         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v8i8")]
1202         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v8i8")]
1203         fn vqsub_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1204     }
1205 vqsub_u8_(a, b)
1206 }
1207
1208 /// Saturating subtract
1209 #[inline]
1210 #[target_feature(enable = "neon")]
1211 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1212 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u8"))]
1213 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1214 pub unsafe fn vqsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1215     #[allow(improper_ctypes)]
1216     extern "C" {
1217         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v16i8")]
1218         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v16i8")]
1219         fn vqsubq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
1220     }
1221 vqsubq_u8_(a, b)
1222 }
1223
1224 /// Saturating subtract
1225 #[inline]
1226 #[target_feature(enable = "neon")]
1227 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1228 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u16"))]
1229 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1230 pub unsafe fn vqsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1231     #[allow(improper_ctypes)]
1232     extern "C" {
1233         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v4i16")]
1234         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v4i16")]
1235         fn vqsub_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1236     }
1237 vqsub_u16_(a, b)
1238 }
1239
1240 /// Saturating subtract
1241 #[inline]
1242 #[target_feature(enable = "neon")]
1243 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1244 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u16"))]
1245 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1246 pub unsafe fn vqsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1247     #[allow(improper_ctypes)]
1248     extern "C" {
1249         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v8i16")]
1250         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v8i16")]
1251         fn vqsubq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
1252     }
1253 vqsubq_u16_(a, b)
1254 }
1255
1256 /// Saturating subtract
1257 #[inline]
1258 #[target_feature(enable = "neon")]
1259 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1260 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u32"))]
1261 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1262 pub unsafe fn vqsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1263     #[allow(improper_ctypes)]
1264     extern "C" {
1265         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v2i32")]
1266         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v2i32")]
1267         fn vqsub_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1268     }
1269 vqsub_u32_(a, b)
1270 }
1271
1272 /// Saturating subtract
1273 #[inline]
1274 #[target_feature(enable = "neon")]
1275 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1276 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u32"))]
1277 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))]
1278 pub unsafe fn vqsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1279     #[allow(improper_ctypes)]
1280     extern "C" {
1281         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v4i32")]
1282         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v4i32")]
1283         fn vqsubq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
1284     }
1285 vqsubq_u32_(a, b)
1286 }
1287
1288 /// Saturating subtract
1289 #[inline]
1290 #[target_feature(enable = "neon")]
1291 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1292 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s8"))]
1293 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1294 pub unsafe fn vqsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1295     #[allow(improper_ctypes)]
1296     extern "C" {
1297         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v8i8")]
1298         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v8i8")]
1299         fn vqsub_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1300     }
1301 vqsub_s8_(a, b)
1302 }
1303
1304 /// Saturating subtract
1305 #[inline]
1306 #[target_feature(enable = "neon")]
1307 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1308 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s8"))]
1309 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1310 pub unsafe fn vqsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1311     #[allow(improper_ctypes)]
1312     extern "C" {
1313         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v16i8")]
1314         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v16i8")]
1315         fn vqsubq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t;
1316     }
1317 vqsubq_s8_(a, b)
1318 }
1319
1320 /// Saturating subtract
1321 #[inline]
1322 #[target_feature(enable = "neon")]
1323 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1324 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s16"))]
1325 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1326 pub unsafe fn vqsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1327     #[allow(improper_ctypes)]
1328     extern "C" {
1329         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v4i16")]
1330         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v4i16")]
1331         fn vqsub_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1332     }
1333 vqsub_s16_(a, b)
1334 }
1335
1336 /// Saturating subtract
1337 #[inline]
1338 #[target_feature(enable = "neon")]
1339 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1340 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s16"))]
1341 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1342 pub unsafe fn vqsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1343     #[allow(improper_ctypes)]
1344     extern "C" {
1345         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v8i16")]
1346         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v8i16")]
1347         fn vqsubq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t;
1348     }
1349 vqsubq_s16_(a, b)
1350 }
1351
1352 /// Saturating subtract
1353 #[inline]
1354 #[target_feature(enable = "neon")]
1355 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1356 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s32"))]
1357 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1358 pub unsafe fn vqsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1359     #[allow(improper_ctypes)]
1360     extern "C" {
1361         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v2i32")]
1362         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v2i32")]
1363         fn vqsub_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1364     }
1365 vqsub_s32_(a, b)
1366 }
1367
1368 /// Saturating subtract
1369 #[inline]
1370 #[target_feature(enable = "neon")]
1371 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1372 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s32"))]
1373 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))]
1374 pub unsafe fn vqsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1375     #[allow(improper_ctypes)]
1376     extern "C" {
1377         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v4i32")]
1378         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v4i32")]
1379         fn vqsubq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t;
1380     }
1381 vqsubq_s32_(a, b)
1382 }
1383
1384 /// Halving add
1385 #[inline]
1386 #[target_feature(enable = "neon")]
1387 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1388 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u8"))]
1389 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1390 pub unsafe fn vhadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1391     #[allow(improper_ctypes)]
1392     extern "C" {
1393         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v8i8")]
1394         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v8i8")]
1395         fn vhadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1396     }
1397 vhadd_u8_(a, b)
1398 }
1399
1400 /// Halving add
1401 #[inline]
1402 #[target_feature(enable = "neon")]
1403 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1404 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u8"))]
1405 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1406 pub unsafe fn vhaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1407     #[allow(improper_ctypes)]
1408     extern "C" {
1409         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v16i8")]
1410         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v16i8")]
1411         fn vhaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
1412     }
1413 vhaddq_u8_(a, b)
1414 }
1415
1416 /// Halving add
1417 #[inline]
1418 #[target_feature(enable = "neon")]
1419 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1420 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u16"))]
1421 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1422 pub unsafe fn vhadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1423     #[allow(improper_ctypes)]
1424     extern "C" {
1425         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v4i16")]
1426         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v4i16")]
1427         fn vhadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1428     }
1429 vhadd_u16_(a, b)
1430 }
1431
1432 /// Halving add
1433 #[inline]
1434 #[target_feature(enable = "neon")]
1435 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1436 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u16"))]
1437 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1438 pub unsafe fn vhaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1439     #[allow(improper_ctypes)]
1440     extern "C" {
1441         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v8i16")]
1442         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v8i16")]
1443         fn vhaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
1444     }
1445 vhaddq_u16_(a, b)
1446 }
1447
1448 /// Halving add
1449 #[inline]
1450 #[target_feature(enable = "neon")]
1451 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1452 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u32"))]
1453 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1454 pub unsafe fn vhadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1455     #[allow(improper_ctypes)]
1456     extern "C" {
1457         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v2i32")]
1458         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v2i32")]
1459         fn vhadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1460     }
1461 vhadd_u32_(a, b)
1462 }
1463
1464 /// Halving add
1465 #[inline]
1466 #[target_feature(enable = "neon")]
1467 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1468 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u32"))]
1469 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))]
1470 pub unsafe fn vhaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1471     #[allow(improper_ctypes)]
1472     extern "C" {
1473         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v4i32")]
1474         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v4i32")]
1475         fn vhaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
1476     }
1477 vhaddq_u32_(a, b)
1478 }
1479
1480 /// Halving add
1481 #[inline]
1482 #[target_feature(enable = "neon")]
1483 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1484 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s8"))]
1485 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1486 pub unsafe fn vhadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1487     #[allow(improper_ctypes)]
1488     extern "C" {
1489         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v8i8")]
1490         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v8i8")]
1491         fn vhadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1492     }
1493 vhadd_s8_(a, b)
1494 }
1495
1496 /// Halving add
1497 #[inline]
1498 #[target_feature(enable = "neon")]
1499 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1500 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s8"))]
1501 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1502 pub unsafe fn vhaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1503     #[allow(improper_ctypes)]
1504     extern "C" {
1505         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v16i8")]
1506         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v16i8")]
1507         fn vhaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t;
1508     }
1509 vhaddq_s8_(a, b)
1510 }
1511
1512 /// Halving add
1513 #[inline]
1514 #[target_feature(enable = "neon")]
1515 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1516 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s16"))]
1517 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1518 pub unsafe fn vhadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1519     #[allow(improper_ctypes)]
1520     extern "C" {
1521         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v4i16")]
1522         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v4i16")]
1523         fn vhadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1524     }
1525 vhadd_s16_(a, b)
1526 }
1527
1528 /// Halving add
1529 #[inline]
1530 #[target_feature(enable = "neon")]
1531 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1532 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s16"))]
1533 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1534 pub unsafe fn vhaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1535     #[allow(improper_ctypes)]
1536     extern "C" {
1537         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v8i16")]
1538         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v8i16")]
1539         fn vhaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t;
1540     }
1541 vhaddq_s16_(a, b)
1542 }
1543
1544 /// Halving add
1545 #[inline]
1546 #[target_feature(enable = "neon")]
1547 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1548 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s32"))]
1549 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1550 pub unsafe fn vhadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1551     #[allow(improper_ctypes)]
1552     extern "C" {
1553         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v2i32")]
1554         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v2i32")]
1555         fn vhadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1556     }
1557 vhadd_s32_(a, b)
1558 }
1559
1560 /// Halving add
1561 #[inline]
1562 #[target_feature(enable = "neon")]
1563 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1564 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s32"))]
1565 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))]
1566 pub unsafe fn vhaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1567     #[allow(improper_ctypes)]
1568     extern "C" {
1569         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v4i32")]
1570         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v4i32")]
1571         fn vhaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t;
1572     }
1573 vhaddq_s32_(a, b)
1574 }
1575
1576 /// Rounding halving add
1577 #[inline]
1578 #[target_feature(enable = "neon")]
1579 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1580 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u8"))]
1581 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1582 pub unsafe fn vrhadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1583     #[allow(improper_ctypes)]
1584     extern "C" {
1585         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v8i8")]
1586         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v8i8")]
1587         fn vrhadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1588     }
1589 vrhadd_u8_(a, b)
1590 }
1591
1592 /// Rounding halving add
1593 #[inline]
1594 #[target_feature(enable = "neon")]
1595 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1596 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u8"))]
1597 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1598 pub unsafe fn vrhaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1599     #[allow(improper_ctypes)]
1600     extern "C" {
1601         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v16i8")]
1602         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v16i8")]
1603         fn vrhaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
1604     }
1605 vrhaddq_u8_(a, b)
1606 }
1607
1608 /// Rounding halving add
1609 #[inline]
1610 #[target_feature(enable = "neon")]
1611 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1612 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u16"))]
1613 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1614 pub unsafe fn vrhadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1615     #[allow(improper_ctypes)]
1616     extern "C" {
1617         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v4i16")]
1618         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v4i16")]
1619         fn vrhadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1620     }
1621 vrhadd_u16_(a, b)
1622 }
1623
1624 /// Rounding halving add
1625 #[inline]
1626 #[target_feature(enable = "neon")]
1627 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1628 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u16"))]
1629 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1630 pub unsafe fn vrhaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1631     #[allow(improper_ctypes)]
1632     extern "C" {
1633         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v8i16")]
1634         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v8i16")]
1635         fn vrhaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
1636     }
1637 vrhaddq_u16_(a, b)
1638 }
1639
1640 /// Rounding halving add
1641 #[inline]
1642 #[target_feature(enable = "neon")]
1643 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1644 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u32"))]
1645 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1646 pub unsafe fn vrhadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1647     #[allow(improper_ctypes)]
1648     extern "C" {
1649         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v2i32")]
1650         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v2i32")]
1651         fn vrhadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1652     }
1653 vrhadd_u32_(a, b)
1654 }
1655
1656 /// Rounding halving add
1657 #[inline]
1658 #[target_feature(enable = "neon")]
1659 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1660 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u32"))]
1661 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))]
1662 pub unsafe fn vrhaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1663     #[allow(improper_ctypes)]
1664     extern "C" {
1665         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v4i32")]
1666         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v4i32")]
1667         fn vrhaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
1668     }
1669 vrhaddq_u32_(a, b)
1670 }
1671
1672 /// Rounding halving add
1673 #[inline]
1674 #[target_feature(enable = "neon")]
1675 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1676 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s8"))]
1677 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1678 pub unsafe fn vrhadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1679     #[allow(improper_ctypes)]
1680     extern "C" {
1681         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v8i8")]
1682         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v8i8")]
1683         fn vrhadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1684     }
1685 vrhadd_s8_(a, b)
1686 }
1687
1688 /// Rounding halving add
1689 #[inline]
1690 #[target_feature(enable = "neon")]
1691 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1692 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s8"))]
1693 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1694 pub unsafe fn vrhaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1695     #[allow(improper_ctypes)]
1696     extern "C" {
1697         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v16i8")]
1698         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v16i8")]
1699         fn vrhaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t;
1700     }
1701 vrhaddq_s8_(a, b)
1702 }
1703
1704 /// Rounding halving add
1705 #[inline]
1706 #[target_feature(enable = "neon")]
1707 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1708 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s16"))]
1709 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1710 pub unsafe fn vrhadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1711     #[allow(improper_ctypes)]
1712     extern "C" {
1713         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v4i16")]
1714         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v4i16")]
1715         fn vrhadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1716     }
1717 vrhadd_s16_(a, b)
1718 }
1719
1720 /// Rounding halving add
1721 #[inline]
1722 #[target_feature(enable = "neon")]
1723 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1724 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s16"))]
1725 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1726 pub unsafe fn vrhaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1727     #[allow(improper_ctypes)]
1728     extern "C" {
1729         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v8i16")]
1730         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v8i16")]
1731         fn vrhaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t;
1732     }
1733 vrhaddq_s16_(a, b)
1734 }
1735
1736 /// Rounding halving add
1737 #[inline]
1738 #[target_feature(enable = "neon")]
1739 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1740 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s32"))]
1741 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1742 pub unsafe fn vrhadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1743     #[allow(improper_ctypes)]
1744     extern "C" {
1745         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v2i32")]
1746         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v2i32")]
1747         fn vrhadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1748     }
1749 vrhadd_s32_(a, b)
1750 }
1751
1752 /// Rounding halving add
1753 #[inline]
1754 #[target_feature(enable = "neon")]
1755 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1756 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s32"))]
1757 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))]
1758 pub unsafe fn vrhaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1759     #[allow(improper_ctypes)]
1760     extern "C" {
1761         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v4i32")]
1762         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v4i32")]
1763         fn vrhaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t;
1764     }
1765 vrhaddq_s32_(a, b)
1766 }
1767
1768 /// Saturating add
1769 #[inline]
1770 #[target_feature(enable = "neon")]
1771 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1772 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u8"))]
1773 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1774 pub unsafe fn vqadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1775     #[allow(improper_ctypes)]
1776     extern "C" {
1777         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v8i8")]
1778         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v8i8")]
1779         fn vqadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1780     }
1781 vqadd_u8_(a, b)
1782 }
1783
1784 /// Saturating add
1785 #[inline]
1786 #[target_feature(enable = "neon")]
1787 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1788 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u8"))]
1789 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1790 pub unsafe fn vqaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1791     #[allow(improper_ctypes)]
1792     extern "C" {
1793         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v16i8")]
1794         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v16i8")]
1795         fn vqaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
1796     }
1797 vqaddq_u8_(a, b)
1798 }
1799
1800 /// Saturating add
1801 #[inline]
1802 #[target_feature(enable = "neon")]
1803 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1804 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u16"))]
1805 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1806 pub unsafe fn vqadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1807     #[allow(improper_ctypes)]
1808     extern "C" {
1809         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v4i16")]
1810         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v4i16")]
1811         fn vqadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1812     }
1813 vqadd_u16_(a, b)
1814 }
1815
1816 /// Saturating add
1817 #[inline]
1818 #[target_feature(enable = "neon")]
1819 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1820 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u16"))]
1821 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1822 pub unsafe fn vqaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1823     #[allow(improper_ctypes)]
1824     extern "C" {
1825         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v8i16")]
1826         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v8i16")]
1827         fn vqaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
1828     }
1829 vqaddq_u16_(a, b)
1830 }
1831
1832 /// Saturating add
1833 #[inline]
1834 #[target_feature(enable = "neon")]
1835 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1836 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u32"))]
1837 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1838 pub unsafe fn vqadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1839     #[allow(improper_ctypes)]
1840     extern "C" {
1841         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v2i32")]
1842         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v2i32")]
1843         fn vqadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1844     }
1845 vqadd_u32_(a, b)
1846 }
1847
1848 /// Saturating add
1849 #[inline]
1850 #[target_feature(enable = "neon")]
1851 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1852 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u32"))]
1853 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))]
1854 pub unsafe fn vqaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1855     #[allow(improper_ctypes)]
1856     extern "C" {
1857         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v4i32")]
1858         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v4i32")]
1859         fn vqaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
1860     }
1861 vqaddq_u32_(a, b)
1862 }
1863
1864 /// Saturating add
1865 #[inline]
1866 #[target_feature(enable = "neon")]
1867 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1868 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s8"))]
1869 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1870 pub unsafe fn vqadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1871     #[allow(improper_ctypes)]
1872     extern "C" {
1873         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v8i8")]
1874         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v8i8")]
1875         fn vqadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
1876     }
1877 vqadd_s8_(a, b)
1878 }
1879
1880 /// Saturating add
1881 #[inline]
1882 #[target_feature(enable = "neon")]
1883 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1884 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s8"))]
1885 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1886 pub unsafe fn vqaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1887     #[allow(improper_ctypes)]
1888     extern "C" {
1889         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v16i8")]
1890         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v16i8")]
1891         fn vqaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t;
1892     }
1893 vqaddq_s8_(a, b)
1894 }
1895
1896 /// Saturating add
1897 #[inline]
1898 #[target_feature(enable = "neon")]
1899 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1900 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s16"))]
1901 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1902 pub unsafe fn vqadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1903     #[allow(improper_ctypes)]
1904     extern "C" {
1905         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v4i16")]
1906         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v4i16")]
1907         fn vqadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1908     }
1909 vqadd_s16_(a, b)
1910 }
1911
1912 /// Saturating add
1913 #[inline]
1914 #[target_feature(enable = "neon")]
1915 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1916 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s16"))]
1917 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1918 pub unsafe fn vqaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1919     #[allow(improper_ctypes)]
1920     extern "C" {
1921         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v8i16")]
1922         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v8i16")]
1923         fn vqaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t;
1924     }
1925 vqaddq_s16_(a, b)
1926 }
1927
1928 /// Saturating add
1929 #[inline]
1930 #[target_feature(enable = "neon")]
1931 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1932 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s32"))]
1933 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1934 pub unsafe fn vqadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1935     #[allow(improper_ctypes)]
1936     extern "C" {
1937         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v2i32")]
1938         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v2i32")]
1939         fn vqadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1940     }
1941 vqadd_s32_(a, b)
1942 }
1943
1944 /// Saturating add
1945 #[inline]
1946 #[target_feature(enable = "neon")]
1947 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1948 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s32"))]
1949 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))]
1950 pub unsafe fn vqaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1951     #[allow(improper_ctypes)]
1952     extern "C" {
1953         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v4i32")]
1954         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v4i32")]
1955         fn vqaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t;
1956     }
1957 vqaddq_s32_(a, b)
1958 }
1959
1960 /// Multiply
1961 #[inline]
1962 #[target_feature(enable = "neon")]
1963 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1964 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))]
1965 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
1966 pub unsafe fn vmul_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1967     simd_mul(a, b)
1968 }
1969
1970 /// Multiply
1971 #[inline]
1972 #[target_feature(enable = "neon")]
1973 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1974 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))]
1975 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
1976 pub unsafe fn vmulq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1977     simd_mul(a, b)
1978 }
1979
1980 /// Multiply
1981 #[inline]
1982 #[target_feature(enable = "neon")]
1983 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1984 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))]
1985 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
1986 pub unsafe fn vmul_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1987     simd_mul(a, b)
1988 }
1989
1990 /// Multiply
1991 #[inline]
1992 #[target_feature(enable = "neon")]
1993 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1994 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))]
1995 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
1996 pub unsafe fn vmulq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1997     simd_mul(a, b)
1998 }
1999
2000 /// Multiply
2001 #[inline]
2002 #[target_feature(enable = "neon")]
2003 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2004 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))]
2005 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2006 pub unsafe fn vmul_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
2007     simd_mul(a, b)
2008 }
2009
2010 /// Multiply
2011 #[inline]
2012 #[target_feature(enable = "neon")]
2013 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2014 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))]
2015 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2016 pub unsafe fn vmulq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
2017     simd_mul(a, b)
2018 }
2019
2020 /// Multiply
2021 #[inline]
2022 #[target_feature(enable = "neon")]
2023 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2024 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))]
2025 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2026 pub unsafe fn vmul_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
2027     simd_mul(a, b)
2028 }
2029
2030 /// Multiply
2031 #[inline]
2032 #[target_feature(enable = "neon")]
2033 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2034 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))]
2035 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2036 pub unsafe fn vmulq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
2037     simd_mul(a, b)
2038 }
2039
2040 /// Multiply
2041 #[inline]
2042 #[target_feature(enable = "neon")]
2043 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2044 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))]
2045 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2046 pub unsafe fn vmul_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
2047     simd_mul(a, b)
2048 }
2049
2050 /// Multiply
2051 #[inline]
2052 #[target_feature(enable = "neon")]
2053 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2054 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))]
2055 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2056 pub unsafe fn vmulq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
2057     simd_mul(a, b)
2058 }
2059
2060 /// Multiply
2061 #[inline]
2062 #[target_feature(enable = "neon")]
2063 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2064 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))]
2065 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2066 pub unsafe fn vmul_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
2067     simd_mul(a, b)
2068 }
2069
2070 /// Multiply
2071 #[inline]
2072 #[target_feature(enable = "neon")]
2073 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2074 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))]
2075 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
2076 pub unsafe fn vmulq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
2077     simd_mul(a, b)
2078 }
2079
2080 /// Multiply
2081 #[inline]
2082 #[target_feature(enable = "neon")]
2083 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2084 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.f32"))]
2085 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmul))]
2086 pub unsafe fn vmul_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
2087     simd_mul(a, b)
2088 }
2089
2090 /// Multiply
2091 #[inline]
2092 #[target_feature(enable = "neon")]
2093 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2094 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.f32"))]
2095 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmul))]
2096 pub unsafe fn vmulq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
2097     simd_mul(a, b)
2098 }
2099
2100 /// Subtract
2101 #[inline]
2102 #[target_feature(enable = "neon")]
2103 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2104 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))]
2105 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2106 pub unsafe fn vsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
2107     simd_sub(a, b)
2108 }
2109
2110 /// Subtract
2111 #[inline]
2112 #[target_feature(enable = "neon")]
2113 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2114 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))]
2115 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2116 pub unsafe fn vsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
2117     simd_sub(a, b)
2118 }
2119
2120 /// Subtract
2121 #[inline]
2122 #[target_feature(enable = "neon")]
2123 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2124 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))]
2125 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2126 pub unsafe fn vsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
2127     simd_sub(a, b)
2128 }
2129
2130 /// Subtract
2131 #[inline]
2132 #[target_feature(enable = "neon")]
2133 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2134 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))]
2135 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2136 pub unsafe fn vsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
2137     simd_sub(a, b)
2138 }
2139
2140 /// Subtract
2141 #[inline]
2142 #[target_feature(enable = "neon")]
2143 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2144 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))]
2145 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2146 pub unsafe fn vsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
2147     simd_sub(a, b)
2148 }
2149
2150 /// Subtract
2151 #[inline]
2152 #[target_feature(enable = "neon")]
2153 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2154 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))]
2155 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2156 pub unsafe fn vsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
2157     simd_sub(a, b)
2158 }
2159
2160 /// Subtract
2161 #[inline]
2162 #[target_feature(enable = "neon")]
2163 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2164 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))]
2165 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2166 pub unsafe fn vsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
2167     simd_sub(a, b)
2168 }
2169
2170 /// Subtract
2171 #[inline]
2172 #[target_feature(enable = "neon")]
2173 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2174 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))]
2175 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2176 pub unsafe fn vsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
2177     simd_sub(a, b)
2178 }
2179
2180 /// Subtract
2181 #[inline]
2182 #[target_feature(enable = "neon")]
2183 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2184 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))]
2185 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2186 pub unsafe fn vsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
2187     simd_sub(a, b)
2188 }
2189
2190 /// Subtract
2191 #[inline]
2192 #[target_feature(enable = "neon")]
2193 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2194 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))]
2195 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2196 pub unsafe fn vsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
2197     simd_sub(a, b)
2198 }
2199
2200 /// Subtract
2201 #[inline]
2202 #[target_feature(enable = "neon")]
2203 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2204 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))]
2205 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2206 pub unsafe fn vsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
2207     simd_sub(a, b)
2208 }
2209
2210 /// Subtract
2211 #[inline]
2212 #[target_feature(enable = "neon")]
2213 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2214 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))]
2215 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2216 pub unsafe fn vsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
2217     simd_sub(a, b)
2218 }
2219
2220 /// Subtract
2221 #[inline]
2222 #[target_feature(enable = "neon")]
2223 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2224 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))]
2225 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2226 pub unsafe fn vsub_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
2227     simd_sub(a, b)
2228 }
2229
2230 /// Subtract
2231 #[inline]
2232 #[target_feature(enable = "neon")]
2233 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2234 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))]
2235 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2236 pub unsafe fn vsubq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
2237     simd_sub(a, b)
2238 }
2239
2240 /// Subtract
2241 #[inline]
2242 #[target_feature(enable = "neon")]
2243 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2244 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))]
2245 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2246 pub unsafe fn vsub_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
2247     simd_sub(a, b)
2248 }
2249
2250 /// Subtract
2251 #[inline]
2252 #[target_feature(enable = "neon")]
2253 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2254 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))]
2255 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))]
2256 pub unsafe fn vsubq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
2257     simd_sub(a, b)
2258 }
2259
2260 /// Subtract
2261 #[inline]
2262 #[target_feature(enable = "neon")]
2263 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2264 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.f32"))]
2265 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fsub))]
2266 pub unsafe fn vsub_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
2267     simd_sub(a, b)
2268 }
2269
2270 /// Subtract
2271 #[inline]
2272 #[target_feature(enable = "neon")]
2273 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2274 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.f32"))]
2275 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fsub))]
2276 pub unsafe fn vsubq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
2277     simd_sub(a, b)
2278 }
2279
2280 /// Signed halving subtract
2281 #[inline]
2282 #[target_feature(enable = "neon")]
2283 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2284 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u8"))]
2285 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2286 pub unsafe fn vhsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
2287     #[allow(improper_ctypes)]
2288     extern "C" {
2289         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v8i8")]
2290         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v8i8")]
2291         fn vhsub_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
2292     }
2293 vhsub_u8_(a, b)
2294 }
2295
2296 /// Signed halving subtract
2297 #[inline]
2298 #[target_feature(enable = "neon")]
2299 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2300 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u8"))]
2301 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2302 pub unsafe fn vhsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
2303     #[allow(improper_ctypes)]
2304     extern "C" {
2305         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v16i8")]
2306         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v16i8")]
2307         fn vhsubq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
2308     }
2309 vhsubq_u8_(a, b)
2310 }
2311
2312 /// Signed halving subtract
2313 #[inline]
2314 #[target_feature(enable = "neon")]
2315 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2316 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u16"))]
2317 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2318 pub unsafe fn vhsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
2319     #[allow(improper_ctypes)]
2320     extern "C" {
2321         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v4i16")]
2322         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v4i16")]
2323         fn vhsub_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
2324     }
2325 vhsub_u16_(a, b)
2326 }
2327
2328 /// Signed halving subtract
2329 #[inline]
2330 #[target_feature(enable = "neon")]
2331 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2332 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u16"))]
2333 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2334 pub unsafe fn vhsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
2335     #[allow(improper_ctypes)]
2336     extern "C" {
2337         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v8i16")]
2338         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v8i16")]
2339         fn vhsubq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
2340     }
2341 vhsubq_u16_(a, b)
2342 }
2343
2344 /// Signed halving subtract
2345 #[inline]
2346 #[target_feature(enable = "neon")]
2347 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2348 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u32"))]
2349 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2350 pub unsafe fn vhsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
2351     #[allow(improper_ctypes)]
2352     extern "C" {
2353         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v2i32")]
2354         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v2i32")]
2355         fn vhsub_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
2356     }
2357 vhsub_u32_(a, b)
2358 }
2359
2360 /// Signed halving subtract
2361 #[inline]
2362 #[target_feature(enable = "neon")]
2363 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2364 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u32"))]
2365 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))]
2366 pub unsafe fn vhsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
2367     #[allow(improper_ctypes)]
2368     extern "C" {
2369         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v4i32")]
2370         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v4i32")]
2371         fn vhsubq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
2372     }
2373 vhsubq_u32_(a, b)
2374 }
2375
2376 /// Signed halving subtract
2377 #[inline]
2378 #[target_feature(enable = "neon")]
2379 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2380 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s8"))]
2381 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2382 pub unsafe fn vhsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
2383     #[allow(improper_ctypes)]
2384     extern "C" {
2385         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v8i8")]
2386         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v8i8")]
2387         fn vhsub_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t;
2388     }
2389 vhsub_s8_(a, b)
2390 }
2391
2392 /// Signed halving subtract
2393 #[inline]
2394 #[target_feature(enable = "neon")]
2395 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2396 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s8"))]
2397 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2398 pub unsafe fn vhsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
2399     #[allow(improper_ctypes)]
2400     extern "C" {
2401         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v16i8")]
2402         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v16i8")]
2403         fn vhsubq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t;
2404     }
2405 vhsubq_s8_(a, b)
2406 }
2407
2408 /// Signed halving subtract
2409 #[inline]
2410 #[target_feature(enable = "neon")]
2411 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2412 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s16"))]
2413 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2414 pub unsafe fn vhsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
2415     #[allow(improper_ctypes)]
2416     extern "C" {
2417         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v4i16")]
2418         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v4i16")]
2419         fn vhsub_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t;
2420     }
2421 vhsub_s16_(a, b)
2422 }
2423
2424 /// Signed halving subtract
2425 #[inline]
2426 #[target_feature(enable = "neon")]
2427 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2428 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s16"))]
2429 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2430 pub unsafe fn vhsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
2431     #[allow(improper_ctypes)]
2432     extern "C" {
2433         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v8i16")]
2434         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v8i16")]
2435         fn vhsubq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t;
2436     }
2437 vhsubq_s16_(a, b)
2438 }
2439
2440 /// Signed halving subtract
2441 #[inline]
2442 #[target_feature(enable = "neon")]
2443 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2444 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s32"))]
2445 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2446 pub unsafe fn vhsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
2447     #[allow(improper_ctypes)]
2448     extern "C" {
2449         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v2i32")]
2450         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v2i32")]
2451         fn vhsub_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t;
2452     }
2453 vhsub_s32_(a, b)
2454 }
2455
2456 /// Signed halving subtract
2457 #[inline]
2458 #[target_feature(enable = "neon")]
2459 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2460 #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s32"))]
2461 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))]
2462 pub unsafe fn vhsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
2463     #[allow(improper_ctypes)]
2464     extern "C" {
2465         #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v4i32")]
2466         #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v4i32")]
2467         fn vhsubq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t;
2468     }
2469 vhsubq_s32_(a, b)
2470 }
2471
2472 #[cfg(test)]
2473 #[allow(overflowing_literals)]
2474 mod test {
2475     use super::*;
2476     use crate::core_arch::simd::*;
2477     use std::mem::transmute;
2478     use stdarch_test::simd_test;
2479
2480     #[simd_test(enable = "neon")]
2481     unsafe fn test_vand_s8() {
2482         let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2483         let b: i8x8 = i8x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2484         let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2485         let r: i8x8 = transmute(vand_s8(transmute(a), transmute(b)));
2486         assert_eq!(r, e);
2487
2488         let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2489         let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2490         let e: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2491         let r: i8x8 = transmute(vand_s8(transmute(a), transmute(b)));
2492         assert_eq!(r, e);
2493     }
2494
2495     #[simd_test(enable = "neon")]
2496     unsafe fn test_vandq_s8() {
2497         let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2498         let b: i8x16 = i8x16::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2499         let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2500         let r: i8x16 = transmute(vandq_s8(transmute(a), transmute(b)));
2501         assert_eq!(r, e);
2502
2503         let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2504         let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2505         let e: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2506         let r: i8x16 = transmute(vandq_s8(transmute(a), transmute(b)));
2507         assert_eq!(r, e);
2508     }
2509
2510     #[simd_test(enable = "neon")]
2511     unsafe fn test_vand_s16() {
2512         let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2513         let b: i16x4 = i16x4::new(0x0F, 0x0F, 0x0F, 0x0F);
2514         let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2515         let r: i16x4 = transmute(vand_s16(transmute(a), transmute(b)));
2516         assert_eq!(r, e);
2517
2518         let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2519         let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00);
2520         let e: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00);
2521         let r: i16x4 = transmute(vand_s16(transmute(a), transmute(b)));
2522         assert_eq!(r, e);
2523     }
2524
2525     #[simd_test(enable = "neon")]
2526     unsafe fn test_vandq_s16() {
2527         let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2528         let b: i16x8 = i16x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2529         let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2530         let r: i16x8 = transmute(vandq_s16(transmute(a), transmute(b)));
2531         assert_eq!(r, e);
2532
2533         let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2534         let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2535         let e: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2536         let r: i16x8 = transmute(vandq_s16(transmute(a), transmute(b)));
2537         assert_eq!(r, e);
2538     }
2539
2540     #[simd_test(enable = "neon")]
2541     unsafe fn test_vand_s32() {
2542         let a: i32x2 = i32x2::new(0x00, 0x01);
2543         let b: i32x2 = i32x2::new(0x0F, 0x0F);
2544         let e: i32x2 = i32x2::new(0x00, 0x01);
2545         let r: i32x2 = transmute(vand_s32(transmute(a), transmute(b)));
2546         assert_eq!(r, e);
2547
2548         let a: i32x2 = i32x2::new(0x00, 0x01);
2549         let b: i32x2 = i32x2::new(0x00, 0x00);
2550         let e: i32x2 = i32x2::new(0x00, 0x00);
2551         let r: i32x2 = transmute(vand_s32(transmute(a), transmute(b)));
2552         assert_eq!(r, e);
2553     }
2554
2555     #[simd_test(enable = "neon")]
2556     unsafe fn test_vandq_s32() {
2557         let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2558         let b: i32x4 = i32x4::new(0x0F, 0x0F, 0x0F, 0x0F);
2559         let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2560         let r: i32x4 = transmute(vandq_s32(transmute(a), transmute(b)));
2561         assert_eq!(r, e);
2562
2563         let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2564         let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00);
2565         let e: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00);
2566         let r: i32x4 = transmute(vandq_s32(transmute(a), transmute(b)));
2567         assert_eq!(r, e);
2568     }
2569
2570     #[simd_test(enable = "neon")]
2571     unsafe fn test_vand_u8() {
2572         let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2573         let b: u8x8 = u8x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2574         let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2575         let r: u8x8 = transmute(vand_u8(transmute(a), transmute(b)));
2576         assert_eq!(r, e);
2577
2578         let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2579         let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2580         let e: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2581         let r: u8x8 = transmute(vand_u8(transmute(a), transmute(b)));
2582         assert_eq!(r, e);
2583     }
2584
2585     #[simd_test(enable = "neon")]
2586     unsafe fn test_vandq_u8() {
2587         let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2588         let b: u8x16 = u8x16::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2589         let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2590         let r: u8x16 = transmute(vandq_u8(transmute(a), transmute(b)));
2591         assert_eq!(r, e);
2592
2593         let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00);
2594         let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2595         let e: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2596         let r: u8x16 = transmute(vandq_u8(transmute(a), transmute(b)));
2597         assert_eq!(r, e);
2598     }
2599
2600     #[simd_test(enable = "neon")]
2601     unsafe fn test_vand_u16() {
2602         let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2603         let b: u16x4 = u16x4::new(0x0F, 0x0F, 0x0F, 0x0F);
2604         let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2605         let r: u16x4 = transmute(vand_u16(transmute(a), transmute(b)));
2606         assert_eq!(r, e);
2607
2608         let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2609         let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00);
2610         let e: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00);
2611         let r: u16x4 = transmute(vand_u16(transmute(a), transmute(b)));
2612         assert_eq!(r, e);
2613     }
2614
2615     #[simd_test(enable = "neon")]
2616     unsafe fn test_vandq_u16() {
2617         let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2618         let b: u16x8 = u16x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F);
2619         let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2620         let r: u16x8 = transmute(vandq_u16(transmute(a), transmute(b)));
2621         assert_eq!(r, e);
2622
2623         let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2624         let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2625         let e: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2626         let r: u16x8 = transmute(vandq_u16(transmute(a), transmute(b)));
2627         assert_eq!(r, e);
2628     }
2629
2630     #[simd_test(enable = "neon")]
2631     unsafe fn test_vand_u32() {
2632         let a: u32x2 = u32x2::new(0x00, 0x01);
2633         let b: u32x2 = u32x2::new(0x0F, 0x0F);
2634         let e: u32x2 = u32x2::new(0x00, 0x01);
2635         let r: u32x2 = transmute(vand_u32(transmute(a), transmute(b)));
2636         assert_eq!(r, e);
2637
2638         let a: u32x2 = u32x2::new(0x00, 0x01);
2639         let b: u32x2 = u32x2::new(0x00, 0x00);
2640         let e: u32x2 = u32x2::new(0x00, 0x00);
2641         let r: u32x2 = transmute(vand_u32(transmute(a), transmute(b)));
2642         assert_eq!(r, e);
2643     }
2644
2645     #[simd_test(enable = "neon")]
2646     unsafe fn test_vandq_u32() {
2647         let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2648         let b: u32x4 = u32x4::new(0x0F, 0x0F, 0x0F, 0x0F);
2649         let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2650         let r: u32x4 = transmute(vandq_u32(transmute(a), transmute(b)));
2651         assert_eq!(r, e);
2652
2653         let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2654         let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00);
2655         let e: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00);
2656         let r: u32x4 = transmute(vandq_u32(transmute(a), transmute(b)));
2657         assert_eq!(r, e);
2658     }
2659
2660     #[simd_test(enable = "neon")]
2661     unsafe fn test_vand_s64() {
2662         let a: i64x1 = i64x1::new(0x00);
2663         let b: i64x1 = i64x1::new(0x0F);
2664         let e: i64x1 = i64x1::new(0x00);
2665         let r: i64x1 = transmute(vand_s64(transmute(a), transmute(b)));
2666         assert_eq!(r, e);
2667
2668         let a: i64x1 = i64x1::new(0x00);
2669         let b: i64x1 = i64x1::new(0x00);
2670         let e: i64x1 = i64x1::new(0x00);
2671         let r: i64x1 = transmute(vand_s64(transmute(a), transmute(b)));
2672         assert_eq!(r, e);
2673     }
2674
2675     #[simd_test(enable = "neon")]
2676     unsafe fn test_vandq_s64() {
2677         let a: i64x2 = i64x2::new(0x00, 0x01);
2678         let b: i64x2 = i64x2::new(0x0F, 0x0F);
2679         let e: i64x2 = i64x2::new(0x00, 0x01);
2680         let r: i64x2 = transmute(vandq_s64(transmute(a), transmute(b)));
2681         assert_eq!(r, e);
2682
2683         let a: i64x2 = i64x2::new(0x00, 0x01);
2684         let b: i64x2 = i64x2::new(0x00, 0x00);
2685         let e: i64x2 = i64x2::new(0x00, 0x00);
2686         let r: i64x2 = transmute(vandq_s64(transmute(a), transmute(b)));
2687         assert_eq!(r, e);
2688     }
2689
2690     #[simd_test(enable = "neon")]
2691     unsafe fn test_vand_u64() {
2692         let a: u64x1 = u64x1::new(0x00);
2693         let b: u64x1 = u64x1::new(0x0F);
2694         let e: u64x1 = u64x1::new(0x00);
2695         let r: u64x1 = transmute(vand_u64(transmute(a), transmute(b)));
2696         assert_eq!(r, e);
2697
2698         let a: u64x1 = u64x1::new(0x00);
2699         let b: u64x1 = u64x1::new(0x00);
2700         let e: u64x1 = u64x1::new(0x00);
2701         let r: u64x1 = transmute(vand_u64(transmute(a), transmute(b)));
2702         assert_eq!(r, e);
2703     }
2704
2705     #[simd_test(enable = "neon")]
2706     unsafe fn test_vandq_u64() {
2707         let a: u64x2 = u64x2::new(0x00, 0x01);
2708         let b: u64x2 = u64x2::new(0x0F, 0x0F);
2709         let e: u64x2 = u64x2::new(0x00, 0x01);
2710         let r: u64x2 = transmute(vandq_u64(transmute(a), transmute(b)));
2711         assert_eq!(r, e);
2712
2713         let a: u64x2 = u64x2::new(0x00, 0x01);
2714         let b: u64x2 = u64x2::new(0x00, 0x00);
2715         let e: u64x2 = u64x2::new(0x00, 0x00);
2716         let r: u64x2 = transmute(vandq_u64(transmute(a), transmute(b)));
2717         assert_eq!(r, e);
2718     }
2719
2720     #[simd_test(enable = "neon")]
2721     unsafe fn test_vorr_s8() {
2722         let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2723         let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2724         let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2725         let r: i8x8 = transmute(vorr_s8(transmute(a), transmute(b)));
2726         assert_eq!(r, e);
2727     }
2728
2729     #[simd_test(enable = "neon")]
2730     unsafe fn test_vorrq_s8() {
2731         let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2732         let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2733         let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2734         let r: i8x16 = transmute(vorrq_s8(transmute(a), transmute(b)));
2735         assert_eq!(r, e);
2736     }
2737
2738     #[simd_test(enable = "neon")]
2739     unsafe fn test_vorr_s16() {
2740         let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2741         let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00);
2742         let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2743         let r: i16x4 = transmute(vorr_s16(transmute(a), transmute(b)));
2744         assert_eq!(r, e);
2745     }
2746
2747     #[simd_test(enable = "neon")]
2748     unsafe fn test_vorrq_s16() {
2749         let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2750         let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2751         let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2752         let r: i16x8 = transmute(vorrq_s16(transmute(a), transmute(b)));
2753         assert_eq!(r, e);
2754     }
2755
2756     #[simd_test(enable = "neon")]
2757     unsafe fn test_vorr_s32() {
2758         let a: i32x2 = i32x2::new(0x00, 0x01);
2759         let b: i32x2 = i32x2::new(0x00, 0x00);
2760         let e: i32x2 = i32x2::new(0x00, 0x01);
2761         let r: i32x2 = transmute(vorr_s32(transmute(a), transmute(b)));
2762         assert_eq!(r, e);
2763     }
2764
2765     #[simd_test(enable = "neon")]
2766     unsafe fn test_vorrq_s32() {
2767         let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2768         let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00);
2769         let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2770         let r: i32x4 = transmute(vorrq_s32(transmute(a), transmute(b)));
2771         assert_eq!(r, e);
2772     }
2773
2774     #[simd_test(enable = "neon")]
2775     unsafe fn test_vorr_u8() {
2776         let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2777         let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2778         let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2779         let r: u8x8 = transmute(vorr_u8(transmute(a), transmute(b)));
2780         assert_eq!(r, e);
2781     }
2782
2783     #[simd_test(enable = "neon")]
2784     unsafe fn test_vorrq_u8() {
2785         let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2786         let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2787         let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2788         let r: u8x16 = transmute(vorrq_u8(transmute(a), transmute(b)));
2789         assert_eq!(r, e);
2790     }
2791
2792     #[simd_test(enable = "neon")]
2793     unsafe fn test_vorr_u16() {
2794         let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2795         let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00);
2796         let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2797         let r: u16x4 = transmute(vorr_u16(transmute(a), transmute(b)));
2798         assert_eq!(r, e);
2799     }
2800
2801     #[simd_test(enable = "neon")]
2802     unsafe fn test_vorrq_u16() {
2803         let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2804         let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2805         let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2806         let r: u16x8 = transmute(vorrq_u16(transmute(a), transmute(b)));
2807         assert_eq!(r, e);
2808     }
2809
2810     #[simd_test(enable = "neon")]
2811     unsafe fn test_vorr_u32() {
2812         let a: u32x2 = u32x2::new(0x00, 0x01);
2813         let b: u32x2 = u32x2::new(0x00, 0x00);
2814         let e: u32x2 = u32x2::new(0x00, 0x01);
2815         let r: u32x2 = transmute(vorr_u32(transmute(a), transmute(b)));
2816         assert_eq!(r, e);
2817     }
2818
2819     #[simd_test(enable = "neon")]
2820     unsafe fn test_vorrq_u32() {
2821         let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2822         let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00);
2823         let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2824         let r: u32x4 = transmute(vorrq_u32(transmute(a), transmute(b)));
2825         assert_eq!(r, e);
2826     }
2827
2828     #[simd_test(enable = "neon")]
2829     unsafe fn test_vorr_s64() {
2830         let a: i64x1 = i64x1::new(0x00);
2831         let b: i64x1 = i64x1::new(0x00);
2832         let e: i64x1 = i64x1::new(0x00);
2833         let r: i64x1 = transmute(vorr_s64(transmute(a), transmute(b)));
2834         assert_eq!(r, e);
2835     }
2836
2837     #[simd_test(enable = "neon")]
2838     unsafe fn test_vorrq_s64() {
2839         let a: i64x2 = i64x2::new(0x00, 0x01);
2840         let b: i64x2 = i64x2::new(0x00, 0x00);
2841         let e: i64x2 = i64x2::new(0x00, 0x01);
2842         let r: i64x2 = transmute(vorrq_s64(transmute(a), transmute(b)));
2843         assert_eq!(r, e);
2844     }
2845
2846     #[simd_test(enable = "neon")]
2847     unsafe fn test_vorr_u64() {
2848         let a: u64x1 = u64x1::new(0x00);
2849         let b: u64x1 = u64x1::new(0x00);
2850         let e: u64x1 = u64x1::new(0x00);
2851         let r: u64x1 = transmute(vorr_u64(transmute(a), transmute(b)));
2852         assert_eq!(r, e);
2853     }
2854
2855     #[simd_test(enable = "neon")]
2856     unsafe fn test_vorrq_u64() {
2857         let a: u64x2 = u64x2::new(0x00, 0x01);
2858         let b: u64x2 = u64x2::new(0x00, 0x00);
2859         let e: u64x2 = u64x2::new(0x00, 0x01);
2860         let r: u64x2 = transmute(vorrq_u64(transmute(a), transmute(b)));
2861         assert_eq!(r, e);
2862     }
2863
2864     #[simd_test(enable = "neon")]
2865     unsafe fn test_veor_s8() {
2866         let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2867         let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2868         let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2869         let r: i8x8 = transmute(veor_s8(transmute(a), transmute(b)));
2870         assert_eq!(r, e);
2871     }
2872
2873     #[simd_test(enable = "neon")]
2874     unsafe fn test_veorq_s8() {
2875         let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2876         let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2877         let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2878         let r: i8x16 = transmute(veorq_s8(transmute(a), transmute(b)));
2879         assert_eq!(r, e);
2880     }
2881
2882     #[simd_test(enable = "neon")]
2883     unsafe fn test_veor_s16() {
2884         let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2885         let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00);
2886         let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03);
2887         let r: i16x4 = transmute(veor_s16(transmute(a), transmute(b)));
2888         assert_eq!(r, e);
2889     }
2890
2891     #[simd_test(enable = "neon")]
2892     unsafe fn test_veorq_s16() {
2893         let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2894         let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2895         let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2896         let r: i16x8 = transmute(veorq_s16(transmute(a), transmute(b)));
2897         assert_eq!(r, e);
2898     }
2899
2900     #[simd_test(enable = "neon")]
2901     unsafe fn test_veor_s32() {
2902         let a: i32x2 = i32x2::new(0x00, 0x01);
2903         let b: i32x2 = i32x2::new(0x00, 0x00);
2904         let e: i32x2 = i32x2::new(0x00, 0x01);
2905         let r: i32x2 = transmute(veor_s32(transmute(a), transmute(b)));
2906         assert_eq!(r, e);
2907     }
2908
2909     #[simd_test(enable = "neon")]
2910     unsafe fn test_veorq_s32() {
2911         let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2912         let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00);
2913         let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03);
2914         let r: i32x4 = transmute(veorq_s32(transmute(a), transmute(b)));
2915         assert_eq!(r, e);
2916     }
2917
2918     #[simd_test(enable = "neon")]
2919     unsafe fn test_veor_u8() {
2920         let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2921         let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2922         let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2923         let r: u8x8 = transmute(veor_u8(transmute(a), transmute(b)));
2924         assert_eq!(r, e);
2925     }
2926
2927     #[simd_test(enable = "neon")]
2928     unsafe fn test_veorq_u8() {
2929         let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2930         let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2931         let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F);
2932         let r: u8x16 = transmute(veorq_u8(transmute(a), transmute(b)));
2933         assert_eq!(r, e);
2934     }
2935
2936     #[simd_test(enable = "neon")]
2937     unsafe fn test_veor_u16() {
2938         let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2939         let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00);
2940         let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03);
2941         let r: u16x4 = transmute(veor_u16(transmute(a), transmute(b)));
2942         assert_eq!(r, e);
2943     }
2944
2945     #[simd_test(enable = "neon")]
2946     unsafe fn test_veorq_u16() {
2947         let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2948         let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
2949         let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
2950         let r: u16x8 = transmute(veorq_u16(transmute(a), transmute(b)));
2951         assert_eq!(r, e);
2952     }
2953
2954     #[simd_test(enable = "neon")]
2955     unsafe fn test_veor_u32() {
2956         let a: u32x2 = u32x2::new(0x00, 0x01);
2957         let b: u32x2 = u32x2::new(0x00, 0x00);
2958         let e: u32x2 = u32x2::new(0x00, 0x01);
2959         let r: u32x2 = transmute(veor_u32(transmute(a), transmute(b)));
2960         assert_eq!(r, e);
2961     }
2962
2963     #[simd_test(enable = "neon")]
2964     unsafe fn test_veorq_u32() {
2965         let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2966         let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00);
2967         let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03);
2968         let r: u32x4 = transmute(veorq_u32(transmute(a), transmute(b)));
2969         assert_eq!(r, e);
2970     }
2971
2972     #[simd_test(enable = "neon")]
2973     unsafe fn test_veor_s64() {
2974         let a: i64x1 = i64x1::new(0x00);
2975         let b: i64x1 = i64x1::new(0x00);
2976         let e: i64x1 = i64x1::new(0x00);
2977         let r: i64x1 = transmute(veor_s64(transmute(a), transmute(b)));
2978         assert_eq!(r, e);
2979     }
2980
2981     #[simd_test(enable = "neon")]
2982     unsafe fn test_veorq_s64() {
2983         let a: i64x2 = i64x2::new(0x00, 0x01);
2984         let b: i64x2 = i64x2::new(0x00, 0x00);
2985         let e: i64x2 = i64x2::new(0x00, 0x01);
2986         let r: i64x2 = transmute(veorq_s64(transmute(a), transmute(b)));
2987         assert_eq!(r, e);
2988     }
2989
2990     #[simd_test(enable = "neon")]
2991     unsafe fn test_veor_u64() {
2992         let a: u64x1 = u64x1::new(0x00);
2993         let b: u64x1 = u64x1::new(0x00);
2994         let e: u64x1 = u64x1::new(0x00);
2995         let r: u64x1 = transmute(veor_u64(transmute(a), transmute(b)));
2996         assert_eq!(r, e);
2997     }
2998
2999     #[simd_test(enable = "neon")]
3000     unsafe fn test_veorq_u64() {
3001         let a: u64x2 = u64x2::new(0x00, 0x01);
3002         let b: u64x2 = u64x2::new(0x00, 0x00);
3003         let e: u64x2 = u64x2::new(0x00, 0x01);
3004         let r: u64x2 = transmute(veorq_u64(transmute(a), transmute(b)));
3005         assert_eq!(r, e);
3006     }
3007
3008     #[simd_test(enable = "neon")]
3009     unsafe fn test_vceq_u8() {
3010         let a: u8x8 = u8x8::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3011         let b: u8x8 = u8x8::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3012         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3013         let r: u8x8 = transmute(vceq_u8(transmute(a), transmute(b)));
3014         assert_eq!(r, e);
3015
3016         let a: u8x8 = u8x8::new(0xFF, 0xFF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3017         let b: u8x8 = u8x8::new(0xFF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08);
3018         let e: u8x8 = u8x8::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0);
3019         let r: u8x8 = transmute(vceq_u8(transmute(a), transmute(b)));
3020         assert_eq!(r, e);
3021     }
3022
3023     #[simd_test(enable = "neon")]
3024     unsafe fn test_vceqq_u8() {
3025         let a: u8x16 = u8x16::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0);
3026         let b: u8x16 = u8x16::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0);
3027         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3028         let r: u8x16 = transmute(vceqq_u8(transmute(a), transmute(b)));
3029         assert_eq!(r, e);
3030
3031         let a: u8x16 = u8x16::new(0xFF, 0xFF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0xCC, 0x0D, 0xEE, 0);
3032         let b: u8x16 = u8x16::new(0xFF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08, 0x08, 0x00, 0x0A, 0x0A, 0xCC, 0xD0, 0xEE, 0xFF);
3033         let e: u8x16 = u8x16::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0);
3034         let r: u8x16 = transmute(vceqq_u8(transmute(a), transmute(b)));
3035         assert_eq!(r, e);
3036     }
3037
3038     #[simd_test(enable = "neon")]
3039     unsafe fn test_vceq_u16() {
3040         let a: u16x4 = u16x4::new(0xFF_FF, 0x01, 0x02, 0x03);
3041         let b: u16x4 = u16x4::new(0xFF_FF, 0x01, 0x02, 0x03);
3042         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3043         let r: u16x4 = transmute(vceq_u16(transmute(a), transmute(b)));
3044         assert_eq!(r, e);
3045
3046         let a: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0x02, 0x03);
3047         let b: u16x4 = u16x4::new(0xFF_FF, 0, 0x02, 0x04);
3048         let e: u16x4 = u16x4::new(0xFF_FF, 0, 0xFF_FF, 0);
3049         let r: u16x4 = transmute(vceq_u16(transmute(a), transmute(b)));
3050         assert_eq!(r, e);
3051     }
3052
3053     #[simd_test(enable = "neon")]
3054     unsafe fn test_vceqq_u16() {
3055         let a: u16x8 = u16x8::new(0xFF_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3056         let b: u16x8 = u16x8::new(0xFF_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3057         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3058         let r: u16x8 = transmute(vceqq_u16(transmute(a), transmute(b)));
3059         assert_eq!(r, e);
3060
3061         let a: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3062         let b: u16x8 = u16x8::new(0xFF_FF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08);
3063         let e: u16x8 = u16x8::new(0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0);
3064         let r: u16x8 = transmute(vceqq_u16(transmute(a), transmute(b)));
3065         assert_eq!(r, e);
3066     }
3067
3068     #[simd_test(enable = "neon")]
3069     unsafe fn test_vceq_u32() {
3070         let a: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0x01);
3071         let b: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0x01);
3072         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3073         let r: u32x2 = transmute(vceq_u32(transmute(a), transmute(b)));
3074         assert_eq!(r, e);
3075
3076         let a: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3077         let b: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0);
3078         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0);
3079         let r: u32x2 = transmute(vceq_u32(transmute(a), transmute(b)));
3080         assert_eq!(r, e);
3081     }
3082
3083     #[simd_test(enable = "neon")]
3084     unsafe fn test_vceqq_u32() {
3085         let a: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0x01, 0x02, 0x03);
3086         let b: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0x01, 0x02, 0x03);
3087         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3088         let r: u32x4 = transmute(vceqq_u32(transmute(a), transmute(b)));
3089         assert_eq!(r, e);
3090
3091         let a: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0x02, 0x03);
3092         let b: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0x02, 0x04);
3093         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0xFF_FF_FF_FF, 0);
3094         let r: u32x4 = transmute(vceqq_u32(transmute(a), transmute(b)));
3095         assert_eq!(r, e);
3096     }
3097
3098     #[simd_test(enable = "neon")]
3099     unsafe fn test_vceq_s8() {
3100         let a: i8x8 = i8x8::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3101         let b: i8x8 = i8x8::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3102         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3103         let r: u8x8 = transmute(vceq_s8(transmute(a), transmute(b)));
3104         assert_eq!(r, e);
3105
3106         let a: i8x8 = i8x8::new(0x7F, 0x7F, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3107         let b: i8x8 = i8x8::new(0x7F, -128, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08);
3108         let e: u8x8 = u8x8::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0);
3109         let r: u8x8 = transmute(vceq_s8(transmute(a), transmute(b)));
3110         assert_eq!(r, e);
3111     }
3112
3113     #[simd_test(enable = "neon")]
3114     unsafe fn test_vceqq_s8() {
3115         let a: i8x16 = i8x16::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, -128);
3116         let b: i8x16 = i8x16::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, -128);
3117         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3118         let r: u8x16 = transmute(vceqq_s8(transmute(a), transmute(b)));
3119         assert_eq!(r, e);
3120
3121         let a: i8x16 = i8x16::new(0x7F, 0x7F, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0xCC, 0x0D, 0xEE, -128);
3122         let b: i8x16 = i8x16::new(0x7F, -128, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08, 0x08, 0x00, 0x0A, 0x0A, 0xCC, 0xD0, 0xEE, 0x7F);
3123         let e: u8x16 = u8x16::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0);
3124         let r: u8x16 = transmute(vceqq_s8(transmute(a), transmute(b)));
3125         assert_eq!(r, e);
3126     }
3127
3128     #[simd_test(enable = "neon")]
3129     unsafe fn test_vceq_s16() {
3130         let a: i16x4 = i16x4::new(0x7F_FF, 0x01, 0x02, 0x03);
3131         let b: i16x4 = i16x4::new(0x7F_FF, 0x01, 0x02, 0x03);
3132         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3133         let r: u16x4 = transmute(vceq_s16(transmute(a), transmute(b)));
3134         assert_eq!(r, e);
3135
3136         let a: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x02, 0x03);
3137         let b: i16x4 = i16x4::new(0x7F_FF, -32768, 0x02, 0x04);
3138         let e: u16x4 = u16x4::new(0xFF_FF, 0, 0xFF_FF, 0);
3139         let r: u16x4 = transmute(vceq_s16(transmute(a), transmute(b)));
3140         assert_eq!(r, e);
3141     }
3142
3143     #[simd_test(enable = "neon")]
3144     unsafe fn test_vceqq_s16() {
3145         let a: i16x8 = i16x8::new(0x7F_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3146         let b: i16x8 = i16x8::new(0x7F_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3147         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3148         let r: u16x8 = transmute(vceqq_s16(transmute(a), transmute(b)));
3149         assert_eq!(r, e);
3150
3151         let a: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07);
3152         let b: i16x8 = i16x8::new(0x7F_FF, -32768, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08);
3153         let e: u16x8 = u16x8::new(0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0);
3154         let r: u16x8 = transmute(vceqq_s16(transmute(a), transmute(b)));
3155         assert_eq!(r, e);
3156     }
3157
3158     #[simd_test(enable = "neon")]
3159     unsafe fn test_vceq_s32() {
3160         let a: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x01);
3161         let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x01);
3162         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3163         let r: u32x2 = transmute(vceq_s32(transmute(a), transmute(b)));
3164         assert_eq!(r, e);
3165
3166         let a: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
3167         let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, -2147483648);
3168         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0);
3169         let r: u32x2 = transmute(vceq_s32(transmute(a), transmute(b)));
3170         assert_eq!(r, e);
3171     }
3172
3173     #[simd_test(enable = "neon")]
3174     unsafe fn test_vceqq_s32() {
3175         let a: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x01, 0x02, 0x03);
3176         let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x01, 0x02, 0x03);
3177         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3178         let r: u32x4 = transmute(vceqq_s32(transmute(a), transmute(b)));
3179         assert_eq!(r, e);
3180
3181         let a: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x02, 0x03);
3182         let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, -2147483648, 0x02, 0x04);
3183         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0xFF_FF_FF_FF, 0);
3184         let r: u32x4 = transmute(vceqq_s32(transmute(a), transmute(b)));
3185         assert_eq!(r, e);
3186     }
3187
3188     #[simd_test(enable = "neon")]
3189     unsafe fn test_vceq_f32() {
3190         let a: f32x2 = f32x2::new(1.2, 3.4);
3191         let b: f32x2 = f32x2::new(1.2, 3.4);
3192         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3193         let r: u32x2 = transmute(vceq_f32(transmute(a), transmute(b)));
3194         assert_eq!(r, e);
3195     }
3196
3197     #[simd_test(enable = "neon")]
3198     unsafe fn test_vceqq_f32() {
3199         let a: f32x4 = f32x4::new(1.2, 3.4, 5.6, 7.8);
3200         let b: f32x4 = f32x4::new(1.2, 3.4, 5.6, 7.8);
3201         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3202         let r: u32x4 = transmute(vceqq_f32(transmute(a), transmute(b)));
3203         assert_eq!(r, e);
3204     }
3205
3206     #[simd_test(enable = "neon")]
3207     unsafe fn test_vcgt_s8() {
3208         let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3209         let b: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3210         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3211         let r: u8x8 = transmute(vcgt_s8(transmute(a), transmute(b)));
3212         assert_eq!(r, e);
3213     }
3214
3215     #[simd_test(enable = "neon")]
3216     unsafe fn test_vcgtq_s8() {
3217         let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3218         let b: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3219         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3220         let r: u8x16 = transmute(vcgtq_s8(transmute(a), transmute(b)));
3221         assert_eq!(r, e);
3222     }
3223
3224     #[simd_test(enable = "neon")]
3225     unsafe fn test_vcgt_s16() {
3226         let a: i16x4 = i16x4::new(1, 2, 3, 4);
3227         let b: i16x4 = i16x4::new(0, 1, 2, 3);
3228         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3229         let r: u16x4 = transmute(vcgt_s16(transmute(a), transmute(b)));
3230         assert_eq!(r, e);
3231     }
3232
3233     #[simd_test(enable = "neon")]
3234     unsafe fn test_vcgtq_s16() {
3235         let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3236         let b: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3237         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3238         let r: u16x8 = transmute(vcgtq_s16(transmute(a), transmute(b)));
3239         assert_eq!(r, e);
3240     }
3241
3242     #[simd_test(enable = "neon")]
3243     unsafe fn test_vcgt_s32() {
3244         let a: i32x2 = i32x2::new(1, 2);
3245         let b: i32x2 = i32x2::new(0, 1);
3246         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3247         let r: u32x2 = transmute(vcgt_s32(transmute(a), transmute(b)));
3248         assert_eq!(r, e);
3249     }
3250
3251     #[simd_test(enable = "neon")]
3252     unsafe fn test_vcgtq_s32() {
3253         let a: i32x4 = i32x4::new(1, 2, 3, 4);
3254         let b: i32x4 = i32x4::new(0, 1, 2, 3);
3255         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3256         let r: u32x4 = transmute(vcgtq_s32(transmute(a), transmute(b)));
3257         assert_eq!(r, e);
3258     }
3259
3260     #[simd_test(enable = "neon")]
3261     unsafe fn test_vcgt_u8() {
3262         let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3263         let b: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3264         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3265         let r: u8x8 = transmute(vcgt_u8(transmute(a), transmute(b)));
3266         assert_eq!(r, e);
3267     }
3268
3269     #[simd_test(enable = "neon")]
3270     unsafe fn test_vcgtq_u8() {
3271         let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3272         let b: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3273         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3274         let r: u8x16 = transmute(vcgtq_u8(transmute(a), transmute(b)));
3275         assert_eq!(r, e);
3276     }
3277
3278     #[simd_test(enable = "neon")]
3279     unsafe fn test_vcgt_u16() {
3280         let a: u16x4 = u16x4::new(1, 2, 3, 4);
3281         let b: u16x4 = u16x4::new(0, 1, 2, 3);
3282         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3283         let r: u16x4 = transmute(vcgt_u16(transmute(a), transmute(b)));
3284         assert_eq!(r, e);
3285     }
3286
3287     #[simd_test(enable = "neon")]
3288     unsafe fn test_vcgtq_u16() {
3289         let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3290         let b: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3291         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3292         let r: u16x8 = transmute(vcgtq_u16(transmute(a), transmute(b)));
3293         assert_eq!(r, e);
3294     }
3295
3296     #[simd_test(enable = "neon")]
3297     unsafe fn test_vcgt_u32() {
3298         let a: u32x2 = u32x2::new(1, 2);
3299         let b: u32x2 = u32x2::new(0, 1);
3300         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3301         let r: u32x2 = transmute(vcgt_u32(transmute(a), transmute(b)));
3302         assert_eq!(r, e);
3303     }
3304
3305     #[simd_test(enable = "neon")]
3306     unsafe fn test_vcgtq_u32() {
3307         let a: u32x4 = u32x4::new(1, 2, 3, 4);
3308         let b: u32x4 = u32x4::new(0, 1, 2, 3);
3309         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3310         let r: u32x4 = transmute(vcgtq_u32(transmute(a), transmute(b)));
3311         assert_eq!(r, e);
3312     }
3313
3314     #[simd_test(enable = "neon")]
3315     unsafe fn test_vcgt_f32() {
3316         let a: f32x2 = f32x2::new(1.2, 2.3);
3317         let b: f32x2 = f32x2::new(0.1, 1.2);
3318         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3319         let r: u32x2 = transmute(vcgt_f32(transmute(a), transmute(b)));
3320         assert_eq!(r, e);
3321     }
3322
3323     #[simd_test(enable = "neon")]
3324     unsafe fn test_vcgtq_f32() {
3325         let a: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5);
3326         let b: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4);
3327         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3328         let r: u32x4 = transmute(vcgtq_f32(transmute(a), transmute(b)));
3329         assert_eq!(r, e);
3330     }
3331
3332     #[simd_test(enable = "neon")]
3333     unsafe fn test_vclt_s8() {
3334         let a: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3335         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3336         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3337         let r: u8x8 = transmute(vclt_s8(transmute(a), transmute(b)));
3338         assert_eq!(r, e);
3339     }
3340
3341     #[simd_test(enable = "neon")]
3342     unsafe fn test_vcltq_s8() {
3343         let a: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3344         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3345         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3346         let r: u8x16 = transmute(vcltq_s8(transmute(a), transmute(b)));
3347         assert_eq!(r, e);
3348     }
3349
3350     #[simd_test(enable = "neon")]
3351     unsafe fn test_vclt_s16() {
3352         let a: i16x4 = i16x4::new(0, 1, 2, 3);
3353         let b: i16x4 = i16x4::new(1, 2, 3, 4);
3354         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3355         let r: u16x4 = transmute(vclt_s16(transmute(a), transmute(b)));
3356         assert_eq!(r, e);
3357     }
3358
3359     #[simd_test(enable = "neon")]
3360     unsafe fn test_vcltq_s16() {
3361         let a: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3362         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3363         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3364         let r: u16x8 = transmute(vcltq_s16(transmute(a), transmute(b)));
3365         assert_eq!(r, e);
3366     }
3367
3368     #[simd_test(enable = "neon")]
3369     unsafe fn test_vclt_s32() {
3370         let a: i32x2 = i32x2::new(0, 1);
3371         let b: i32x2 = i32x2::new(1, 2);
3372         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3373         let r: u32x2 = transmute(vclt_s32(transmute(a), transmute(b)));
3374         assert_eq!(r, e);
3375     }
3376
3377     #[simd_test(enable = "neon")]
3378     unsafe fn test_vcltq_s32() {
3379         let a: i32x4 = i32x4::new(0, 1, 2, 3);
3380         let b: i32x4 = i32x4::new(1, 2, 3, 4);
3381         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3382         let r: u32x4 = transmute(vcltq_s32(transmute(a), transmute(b)));
3383         assert_eq!(r, e);
3384     }
3385
3386     #[simd_test(enable = "neon")]
3387     unsafe fn test_vclt_u8() {
3388         let a: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3389         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3390         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3391         let r: u8x8 = transmute(vclt_u8(transmute(a), transmute(b)));
3392         assert_eq!(r, e);
3393     }
3394
3395     #[simd_test(enable = "neon")]
3396     unsafe fn test_vcltq_u8() {
3397         let a: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3398         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3399         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3400         let r: u8x16 = transmute(vcltq_u8(transmute(a), transmute(b)));
3401         assert_eq!(r, e);
3402     }
3403
3404     #[simd_test(enable = "neon")]
3405     unsafe fn test_vclt_u16() {
3406         let a: u16x4 = u16x4::new(0, 1, 2, 3);
3407         let b: u16x4 = u16x4::new(1, 2, 3, 4);
3408         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3409         let r: u16x4 = transmute(vclt_u16(transmute(a), transmute(b)));
3410         assert_eq!(r, e);
3411     }
3412
3413     #[simd_test(enable = "neon")]
3414     unsafe fn test_vcltq_u16() {
3415         let a: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3416         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3417         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3418         let r: u16x8 = transmute(vcltq_u16(transmute(a), transmute(b)));
3419         assert_eq!(r, e);
3420     }
3421
3422     #[simd_test(enable = "neon")]
3423     unsafe fn test_vclt_u32() {
3424         let a: u32x2 = u32x2::new(0, 1);
3425         let b: u32x2 = u32x2::new(1, 2);
3426         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3427         let r: u32x2 = transmute(vclt_u32(transmute(a), transmute(b)));
3428         assert_eq!(r, e);
3429     }
3430
3431     #[simd_test(enable = "neon")]
3432     unsafe fn test_vcltq_u32() {
3433         let a: u32x4 = u32x4::new(0, 1, 2, 3);
3434         let b: u32x4 = u32x4::new(1, 2, 3, 4);
3435         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3436         let r: u32x4 = transmute(vcltq_u32(transmute(a), transmute(b)));
3437         assert_eq!(r, e);
3438     }
3439
3440     #[simd_test(enable = "neon")]
3441     unsafe fn test_vclt_f32() {
3442         let a: f32x2 = f32x2::new(0.1, 1.2);
3443         let b: f32x2 = f32x2::new(1.2, 2.3);
3444         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3445         let r: u32x2 = transmute(vclt_f32(transmute(a), transmute(b)));
3446         assert_eq!(r, e);
3447     }
3448
3449     #[simd_test(enable = "neon")]
3450     unsafe fn test_vcltq_f32() {
3451         let a: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4);
3452         let b: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5);
3453         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3454         let r: u32x4 = transmute(vcltq_f32(transmute(a), transmute(b)));
3455         assert_eq!(r, e);
3456     }
3457
3458     #[simd_test(enable = "neon")]
3459     unsafe fn test_vcle_s8() {
3460         let a: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3461         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3462         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3463         let r: u8x8 = transmute(vcle_s8(transmute(a), transmute(b)));
3464         assert_eq!(r, e);
3465     }
3466
3467     #[simd_test(enable = "neon")]
3468     unsafe fn test_vcleq_s8() {
3469         let a: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3470         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3471         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3472         let r: u8x16 = transmute(vcleq_s8(transmute(a), transmute(b)));
3473         assert_eq!(r, e);
3474     }
3475
3476     #[simd_test(enable = "neon")]
3477     unsafe fn test_vcle_s16() {
3478         let a: i16x4 = i16x4::new(0, 1, 2, 3);
3479         let b: i16x4 = i16x4::new(1, 2, 3, 4);
3480         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3481         let r: u16x4 = transmute(vcle_s16(transmute(a), transmute(b)));
3482         assert_eq!(r, e);
3483     }
3484
3485     #[simd_test(enable = "neon")]
3486     unsafe fn test_vcleq_s16() {
3487         let a: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3488         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3489         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3490         let r: u16x8 = transmute(vcleq_s16(transmute(a), transmute(b)));
3491         assert_eq!(r, e);
3492     }
3493
3494     #[simd_test(enable = "neon")]
3495     unsafe fn test_vcle_s32() {
3496         let a: i32x2 = i32x2::new(0, 1);
3497         let b: i32x2 = i32x2::new(1, 2);
3498         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3499         let r: u32x2 = transmute(vcle_s32(transmute(a), transmute(b)));
3500         assert_eq!(r, e);
3501     }
3502
3503     #[simd_test(enable = "neon")]
3504     unsafe fn test_vcleq_s32() {
3505         let a: i32x4 = i32x4::new(0, 1, 2, 3);
3506         let b: i32x4 = i32x4::new(1, 2, 3, 4);
3507         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3508         let r: u32x4 = transmute(vcleq_s32(transmute(a), transmute(b)));
3509         assert_eq!(r, e);
3510     }
3511
3512     #[simd_test(enable = "neon")]
3513     unsafe fn test_vcle_u8() {
3514         let a: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3515         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3516         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3517         let r: u8x8 = transmute(vcle_u8(transmute(a), transmute(b)));
3518         assert_eq!(r, e);
3519     }
3520
3521     #[simd_test(enable = "neon")]
3522     unsafe fn test_vcleq_u8() {
3523         let a: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3524         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3525         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3526         let r: u8x16 = transmute(vcleq_u8(transmute(a), transmute(b)));
3527         assert_eq!(r, e);
3528     }
3529
3530     #[simd_test(enable = "neon")]
3531     unsafe fn test_vcle_u16() {
3532         let a: u16x4 = u16x4::new(0, 1, 2, 3);
3533         let b: u16x4 = u16x4::new(1, 2, 3, 4);
3534         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3535         let r: u16x4 = transmute(vcle_u16(transmute(a), transmute(b)));
3536         assert_eq!(r, e);
3537     }
3538
3539     #[simd_test(enable = "neon")]
3540     unsafe fn test_vcleq_u16() {
3541         let a: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3542         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3543         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3544         let r: u16x8 = transmute(vcleq_u16(transmute(a), transmute(b)));
3545         assert_eq!(r, e);
3546     }
3547
3548     #[simd_test(enable = "neon")]
3549     unsafe fn test_vcle_u32() {
3550         let a: u32x2 = u32x2::new(0, 1);
3551         let b: u32x2 = u32x2::new(1, 2);
3552         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3553         let r: u32x2 = transmute(vcle_u32(transmute(a), transmute(b)));
3554         assert_eq!(r, e);
3555     }
3556
3557     #[simd_test(enable = "neon")]
3558     unsafe fn test_vcleq_u32() {
3559         let a: u32x4 = u32x4::new(0, 1, 2, 3);
3560         let b: u32x4 = u32x4::new(1, 2, 3, 4);
3561         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3562         let r: u32x4 = transmute(vcleq_u32(transmute(a), transmute(b)));
3563         assert_eq!(r, e);
3564     }
3565
3566     #[simd_test(enable = "neon")]
3567     unsafe fn test_vcle_f32() {
3568         let a: f32x2 = f32x2::new(0.1, 1.2);
3569         let b: f32x2 = f32x2::new(1.2, 2.3);
3570         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3571         let r: u32x2 = transmute(vcle_f32(transmute(a), transmute(b)));
3572         assert_eq!(r, e);
3573     }
3574
3575     #[simd_test(enable = "neon")]
3576     unsafe fn test_vcleq_f32() {
3577         let a: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4);
3578         let b: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5);
3579         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3580         let r: u32x4 = transmute(vcleq_f32(transmute(a), transmute(b)));
3581         assert_eq!(r, e);
3582     }
3583
3584     #[simd_test(enable = "neon")]
3585     unsafe fn test_vcge_s8() {
3586         let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3587         let b: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3588         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3589         let r: u8x8 = transmute(vcge_s8(transmute(a), transmute(b)));
3590         assert_eq!(r, e);
3591     }
3592
3593     #[simd_test(enable = "neon")]
3594     unsafe fn test_vcgeq_s8() {
3595         let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3596         let b: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3597         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3598         let r: u8x16 = transmute(vcgeq_s8(transmute(a), transmute(b)));
3599         assert_eq!(r, e);
3600     }
3601
3602     #[simd_test(enable = "neon")]
3603     unsafe fn test_vcge_s16() {
3604         let a: i16x4 = i16x4::new(1, 2, 3, 4);
3605         let b: i16x4 = i16x4::new(0, 1, 2, 3);
3606         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3607         let r: u16x4 = transmute(vcge_s16(transmute(a), transmute(b)));
3608         assert_eq!(r, e);
3609     }
3610
3611     #[simd_test(enable = "neon")]
3612     unsafe fn test_vcgeq_s16() {
3613         let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3614         let b: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3615         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3616         let r: u16x8 = transmute(vcgeq_s16(transmute(a), transmute(b)));
3617         assert_eq!(r, e);
3618     }
3619
3620     #[simd_test(enable = "neon")]
3621     unsafe fn test_vcge_s32() {
3622         let a: i32x2 = i32x2::new(1, 2);
3623         let b: i32x2 = i32x2::new(0, 1);
3624         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3625         let r: u32x2 = transmute(vcge_s32(transmute(a), transmute(b)));
3626         assert_eq!(r, e);
3627     }
3628
3629     #[simd_test(enable = "neon")]
3630     unsafe fn test_vcgeq_s32() {
3631         let a: i32x4 = i32x4::new(1, 2, 3, 4);
3632         let b: i32x4 = i32x4::new(0, 1, 2, 3);
3633         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3634         let r: u32x4 = transmute(vcgeq_s32(transmute(a), transmute(b)));
3635         assert_eq!(r, e);
3636     }
3637
3638     #[simd_test(enable = "neon")]
3639     unsafe fn test_vcge_u8() {
3640         let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3641         let b: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3642         let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3643         let r: u8x8 = transmute(vcge_u8(transmute(a), transmute(b)));
3644         assert_eq!(r, e);
3645     }
3646
3647     #[simd_test(enable = "neon")]
3648     unsafe fn test_vcgeq_u8() {
3649         let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3650         let b: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3651         let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
3652         let r: u8x16 = transmute(vcgeq_u8(transmute(a), transmute(b)));
3653         assert_eq!(r, e);
3654     }
3655
3656     #[simd_test(enable = "neon")]
3657     unsafe fn test_vcge_u16() {
3658         let a: u16x4 = u16x4::new(1, 2, 3, 4);
3659         let b: u16x4 = u16x4::new(0, 1, 2, 3);
3660         let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3661         let r: u16x4 = transmute(vcge_u16(transmute(a), transmute(b)));
3662         assert_eq!(r, e);
3663     }
3664
3665     #[simd_test(enable = "neon")]
3666     unsafe fn test_vcgeq_u16() {
3667         let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3668         let b: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7);
3669         let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
3670         let r: u16x8 = transmute(vcgeq_u16(transmute(a), transmute(b)));
3671         assert_eq!(r, e);
3672     }
3673
3674     #[simd_test(enable = "neon")]
3675     unsafe fn test_vcge_u32() {
3676         let a: u32x2 = u32x2::new(1, 2);
3677         let b: u32x2 = u32x2::new(0, 1);
3678         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3679         let r: u32x2 = transmute(vcge_u32(transmute(a), transmute(b)));
3680         assert_eq!(r, e);
3681     }
3682
3683     #[simd_test(enable = "neon")]
3684     unsafe fn test_vcgeq_u32() {
3685         let a: u32x4 = u32x4::new(1, 2, 3, 4);
3686         let b: u32x4 = u32x4::new(0, 1, 2, 3);
3687         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3688         let r: u32x4 = transmute(vcgeq_u32(transmute(a), transmute(b)));
3689         assert_eq!(r, e);
3690     }
3691
3692     #[simd_test(enable = "neon")]
3693     unsafe fn test_vcge_f32() {
3694         let a: f32x2 = f32x2::new(1.2, 2.3);
3695         let b: f32x2 = f32x2::new(0.1, 1.2);
3696         let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3697         let r: u32x2 = transmute(vcge_f32(transmute(a), transmute(b)));
3698         assert_eq!(r, e);
3699     }
3700
3701     #[simd_test(enable = "neon")]
3702     unsafe fn test_vcgeq_f32() {
3703         let a: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5);
3704         let b: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4);
3705         let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
3706         let r: u32x4 = transmute(vcgeq_f32(transmute(a), transmute(b)));
3707         assert_eq!(r, e);
3708     }
3709
3710     #[simd_test(enable = "neon")]
3711     unsafe fn test_vqsub_u8() {
3712         let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3713         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3714         let e: u8x8 = u8x8::new(41, 40, 39, 38, 37, 36, 35, 34);
3715         let r: u8x8 = transmute(vqsub_u8(transmute(a), transmute(b)));
3716         assert_eq!(r, e);
3717     }
3718
3719     #[simd_test(enable = "neon")]
3720     unsafe fn test_vqsubq_u8() {
3721         let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3722         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3723         let e: u8x16 = u8x16::new(41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26);
3724         let r: u8x16 = transmute(vqsubq_u8(transmute(a), transmute(b)));
3725         assert_eq!(r, e);
3726     }
3727
3728     #[simd_test(enable = "neon")]
3729     unsafe fn test_vqsub_u16() {
3730         let a: u16x4 = u16x4::new(42, 42, 42, 42);
3731         let b: u16x4 = u16x4::new(1, 2, 3, 4);
3732         let e: u16x4 = u16x4::new(41, 40, 39, 38);
3733         let r: u16x4 = transmute(vqsub_u16(transmute(a), transmute(b)));
3734         assert_eq!(r, e);
3735     }
3736
3737     #[simd_test(enable = "neon")]
3738     unsafe fn test_vqsubq_u16() {
3739         let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3740         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3741         let e: u16x8 = u16x8::new(41, 40, 39, 38, 37, 36, 35, 34);
3742         let r: u16x8 = transmute(vqsubq_u16(transmute(a), transmute(b)));
3743         assert_eq!(r, e);
3744     }
3745
3746     #[simd_test(enable = "neon")]
3747     unsafe fn test_vqsub_u32() {
3748         let a: u32x2 = u32x2::new(42, 42);
3749         let b: u32x2 = u32x2::new(1, 2);
3750         let e: u32x2 = u32x2::new(41, 40);
3751         let r: u32x2 = transmute(vqsub_u32(transmute(a), transmute(b)));
3752         assert_eq!(r, e);
3753     }
3754
3755     #[simd_test(enable = "neon")]
3756     unsafe fn test_vqsubq_u32() {
3757         let a: u32x4 = u32x4::new(42, 42, 42, 42);
3758         let b: u32x4 = u32x4::new(1, 2, 3, 4);
3759         let e: u32x4 = u32x4::new(41, 40, 39, 38);
3760         let r: u32x4 = transmute(vqsubq_u32(transmute(a), transmute(b)));
3761         assert_eq!(r, e);
3762     }
3763
3764     #[simd_test(enable = "neon")]
3765     unsafe fn test_vqsub_s8() {
3766         let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3767         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3768         let e: i8x8 = i8x8::new(41, 40, 39, 38, 37, 36, 35, 34);
3769         let r: i8x8 = transmute(vqsub_s8(transmute(a), transmute(b)));
3770         assert_eq!(r, e);
3771     }
3772
3773     #[simd_test(enable = "neon")]
3774     unsafe fn test_vqsubq_s8() {
3775         let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3776         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3777         let e: i8x16 = i8x16::new(41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26);
3778         let r: i8x16 = transmute(vqsubq_s8(transmute(a), transmute(b)));
3779         assert_eq!(r, e);
3780     }
3781
3782     #[simd_test(enable = "neon")]
3783     unsafe fn test_vqsub_s16() {
3784         let a: i16x4 = i16x4::new(42, 42, 42, 42);
3785         let b: i16x4 = i16x4::new(1, 2, 3, 4);
3786         let e: i16x4 = i16x4::new(41, 40, 39, 38);
3787         let r: i16x4 = transmute(vqsub_s16(transmute(a), transmute(b)));
3788         assert_eq!(r, e);
3789     }
3790
3791     #[simd_test(enable = "neon")]
3792     unsafe fn test_vqsubq_s16() {
3793         let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3794         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3795         let e: i16x8 = i16x8::new(41, 40, 39, 38, 37, 36, 35, 34);
3796         let r: i16x8 = transmute(vqsubq_s16(transmute(a), transmute(b)));
3797         assert_eq!(r, e);
3798     }
3799
3800     #[simd_test(enable = "neon")]
3801     unsafe fn test_vqsub_s32() {
3802         let a: i32x2 = i32x2::new(42, 42);
3803         let b: i32x2 = i32x2::new(1, 2);
3804         let e: i32x2 = i32x2::new(41, 40);
3805         let r: i32x2 = transmute(vqsub_s32(transmute(a), transmute(b)));
3806         assert_eq!(r, e);
3807     }
3808
3809     #[simd_test(enable = "neon")]
3810     unsafe fn test_vqsubq_s32() {
3811         let a: i32x4 = i32x4::new(42, 42, 42, 42);
3812         let b: i32x4 = i32x4::new(1, 2, 3, 4);
3813         let e: i32x4 = i32x4::new(41, 40, 39, 38);
3814         let r: i32x4 = transmute(vqsubq_s32(transmute(a), transmute(b)));
3815         assert_eq!(r, e);
3816     }
3817
3818     #[simd_test(enable = "neon")]
3819     unsafe fn test_vhadd_u8() {
3820         let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3821         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3822         let e: u8x8 = u8x8::new(21, 22, 22, 23, 23, 24, 24, 25);
3823         let r: u8x8 = transmute(vhadd_u8(transmute(a), transmute(b)));
3824         assert_eq!(r, e);
3825     }
3826
3827     #[simd_test(enable = "neon")]
3828     unsafe fn test_vhaddq_u8() {
3829         let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3830         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3831         let e: u8x16 = u8x16::new(21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29);
3832         let r: u8x16 = transmute(vhaddq_u8(transmute(a), transmute(b)));
3833         assert_eq!(r, e);
3834     }
3835
3836     #[simd_test(enable = "neon")]
3837     unsafe fn test_vhadd_u16() {
3838         let a: u16x4 = u16x4::new(42, 42, 42, 42);
3839         let b: u16x4 = u16x4::new(1, 2, 3, 4);
3840         let e: u16x4 = u16x4::new(21, 22, 22, 23);
3841         let r: u16x4 = transmute(vhadd_u16(transmute(a), transmute(b)));
3842         assert_eq!(r, e);
3843     }
3844
3845     #[simd_test(enable = "neon")]
3846     unsafe fn test_vhaddq_u16() {
3847         let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3848         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3849         let e: u16x8 = u16x8::new(21, 22, 22, 23, 23, 24, 24, 25);
3850         let r: u16x8 = transmute(vhaddq_u16(transmute(a), transmute(b)));
3851         assert_eq!(r, e);
3852     }
3853
3854     #[simd_test(enable = "neon")]
3855     unsafe fn test_vhadd_u32() {
3856         let a: u32x2 = u32x2::new(42, 42);
3857         let b: u32x2 = u32x2::new(1, 2);
3858         let e: u32x2 = u32x2::new(21, 22);
3859         let r: u32x2 = transmute(vhadd_u32(transmute(a), transmute(b)));
3860         assert_eq!(r, e);
3861     }
3862
3863     #[simd_test(enable = "neon")]
3864     unsafe fn test_vhaddq_u32() {
3865         let a: u32x4 = u32x4::new(42, 42, 42, 42);
3866         let b: u32x4 = u32x4::new(1, 2, 3, 4);
3867         let e: u32x4 = u32x4::new(21, 22, 22, 23);
3868         let r: u32x4 = transmute(vhaddq_u32(transmute(a), transmute(b)));
3869         assert_eq!(r, e);
3870     }
3871
3872     #[simd_test(enable = "neon")]
3873     unsafe fn test_vhadd_s8() {
3874         let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3875         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3876         let e: i8x8 = i8x8::new(21, 22, 22, 23, 23, 24, 24, 25);
3877         let r: i8x8 = transmute(vhadd_s8(transmute(a), transmute(b)));
3878         assert_eq!(r, e);
3879     }
3880
3881     #[simd_test(enable = "neon")]
3882     unsafe fn test_vhaddq_s8() {
3883         let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3884         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3885         let e: i8x16 = i8x16::new(21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29);
3886         let r: i8x16 = transmute(vhaddq_s8(transmute(a), transmute(b)));
3887         assert_eq!(r, e);
3888     }
3889
3890     #[simd_test(enable = "neon")]
3891     unsafe fn test_vhadd_s16() {
3892         let a: i16x4 = i16x4::new(42, 42, 42, 42);
3893         let b: i16x4 = i16x4::new(1, 2, 3, 4);
3894         let e: i16x4 = i16x4::new(21, 22, 22, 23);
3895         let r: i16x4 = transmute(vhadd_s16(transmute(a), transmute(b)));
3896         assert_eq!(r, e);
3897     }
3898
3899     #[simd_test(enable = "neon")]
3900     unsafe fn test_vhaddq_s16() {
3901         let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3902         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3903         let e: i16x8 = i16x8::new(21, 22, 22, 23, 23, 24, 24, 25);
3904         let r: i16x8 = transmute(vhaddq_s16(transmute(a), transmute(b)));
3905         assert_eq!(r, e);
3906     }
3907
3908     #[simd_test(enable = "neon")]
3909     unsafe fn test_vhadd_s32() {
3910         let a: i32x2 = i32x2::new(42, 42);
3911         let b: i32x2 = i32x2::new(1, 2);
3912         let e: i32x2 = i32x2::new(21, 22);
3913         let r: i32x2 = transmute(vhadd_s32(transmute(a), transmute(b)));
3914         assert_eq!(r, e);
3915     }
3916
3917     #[simd_test(enable = "neon")]
3918     unsafe fn test_vhaddq_s32() {
3919         let a: i32x4 = i32x4::new(42, 42, 42, 42);
3920         let b: i32x4 = i32x4::new(1, 2, 3, 4);
3921         let e: i32x4 = i32x4::new(21, 22, 22, 23);
3922         let r: i32x4 = transmute(vhaddq_s32(transmute(a), transmute(b)));
3923         assert_eq!(r, e);
3924     }
3925
3926     #[simd_test(enable = "neon")]
3927     unsafe fn test_vrhadd_u8() {
3928         let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3929         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3930         let e: u8x8 = u8x8::new(22, 22, 23, 23, 24, 24, 25, 25);
3931         let r: u8x8 = transmute(vrhadd_u8(transmute(a), transmute(b)));
3932         assert_eq!(r, e);
3933     }
3934
3935     #[simd_test(enable = "neon")]
3936     unsafe fn test_vrhaddq_u8() {
3937         let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3938         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3939         let e: u8x16 = u8x16::new(22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29);
3940         let r: u8x16 = transmute(vrhaddq_u8(transmute(a), transmute(b)));
3941         assert_eq!(r, e);
3942     }
3943
3944     #[simd_test(enable = "neon")]
3945     unsafe fn test_vrhadd_u16() {
3946         let a: u16x4 = u16x4::new(42, 42, 42, 42);
3947         let b: u16x4 = u16x4::new(1, 2, 3, 4);
3948         let e: u16x4 = u16x4::new(22, 22, 23, 23);
3949         let r: u16x4 = transmute(vrhadd_u16(transmute(a), transmute(b)));
3950         assert_eq!(r, e);
3951     }
3952
3953     #[simd_test(enable = "neon")]
3954     unsafe fn test_vrhaddq_u16() {
3955         let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3956         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3957         let e: u16x8 = u16x8::new(22, 22, 23, 23, 24, 24, 25, 25);
3958         let r: u16x8 = transmute(vrhaddq_u16(transmute(a), transmute(b)));
3959         assert_eq!(r, e);
3960     }
3961
3962     #[simd_test(enable = "neon")]
3963     unsafe fn test_vrhadd_u32() {
3964         let a: u32x2 = u32x2::new(42, 42);
3965         let b: u32x2 = u32x2::new(1, 2);
3966         let e: u32x2 = u32x2::new(22, 22);
3967         let r: u32x2 = transmute(vrhadd_u32(transmute(a), transmute(b)));
3968         assert_eq!(r, e);
3969     }
3970
3971     #[simd_test(enable = "neon")]
3972     unsafe fn test_vrhaddq_u32() {
3973         let a: u32x4 = u32x4::new(42, 42, 42, 42);
3974         let b: u32x4 = u32x4::new(1, 2, 3, 4);
3975         let e: u32x4 = u32x4::new(22, 22, 23, 23);
3976         let r: u32x4 = transmute(vrhaddq_u32(transmute(a), transmute(b)));
3977         assert_eq!(r, e);
3978     }
3979
3980     #[simd_test(enable = "neon")]
3981     unsafe fn test_vrhadd_s8() {
3982         let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
3983         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
3984         let e: i8x8 = i8x8::new(22, 22, 23, 23, 24, 24, 25, 25);
3985         let r: i8x8 = transmute(vrhadd_s8(transmute(a), transmute(b)));
3986         assert_eq!(r, e);
3987     }
3988
3989     #[simd_test(enable = "neon")]
3990     unsafe fn test_vrhaddq_s8() {
3991         let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
3992         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
3993         let e: i8x16 = i8x16::new(22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29);
3994         let r: i8x16 = transmute(vrhaddq_s8(transmute(a), transmute(b)));
3995         assert_eq!(r, e);
3996     }
3997
3998     #[simd_test(enable = "neon")]
3999     unsafe fn test_vrhadd_s16() {
4000         let a: i16x4 = i16x4::new(42, 42, 42, 42);
4001         let b: i16x4 = i16x4::new(1, 2, 3, 4);
4002         let e: i16x4 = i16x4::new(22, 22, 23, 23);
4003         let r: i16x4 = transmute(vrhadd_s16(transmute(a), transmute(b)));
4004         assert_eq!(r, e);
4005     }
4006
4007     #[simd_test(enable = "neon")]
4008     unsafe fn test_vrhaddq_s16() {
4009         let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
4010         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4011         let e: i16x8 = i16x8::new(22, 22, 23, 23, 24, 24, 25, 25);
4012         let r: i16x8 = transmute(vrhaddq_s16(transmute(a), transmute(b)));
4013         assert_eq!(r, e);
4014     }
4015
4016     #[simd_test(enable = "neon")]
4017     unsafe fn test_vrhadd_s32() {
4018         let a: i32x2 = i32x2::new(42, 42);
4019         let b: i32x2 = i32x2::new(1, 2);
4020         let e: i32x2 = i32x2::new(22, 22);
4021         let r: i32x2 = transmute(vrhadd_s32(transmute(a), transmute(b)));
4022         assert_eq!(r, e);
4023     }
4024
4025     #[simd_test(enable = "neon")]
4026     unsafe fn test_vrhaddq_s32() {
4027         let a: i32x4 = i32x4::new(42, 42, 42, 42);
4028         let b: i32x4 = i32x4::new(1, 2, 3, 4);
4029         let e: i32x4 = i32x4::new(22, 22, 23, 23);
4030         let r: i32x4 = transmute(vrhaddq_s32(transmute(a), transmute(b)));
4031         assert_eq!(r, e);
4032     }
4033
4034     #[simd_test(enable = "neon")]
4035     unsafe fn test_vqadd_u8() {
4036         let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
4037         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4038         let e: u8x8 = u8x8::new(43, 44, 45, 46, 47, 48, 49, 50);
4039         let r: u8x8 = transmute(vqadd_u8(transmute(a), transmute(b)));
4040         assert_eq!(r, e);
4041     }
4042
4043     #[simd_test(enable = "neon")]
4044     unsafe fn test_vqaddq_u8() {
4045         let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
4046         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4047         let e: u8x16 = u8x16::new(43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58);
4048         let r: u8x16 = transmute(vqaddq_u8(transmute(a), transmute(b)));
4049         assert_eq!(r, e);
4050     }
4051
4052     #[simd_test(enable = "neon")]
4053     unsafe fn test_vqadd_u16() {
4054         let a: u16x4 = u16x4::new(42, 42, 42, 42);
4055         let b: u16x4 = u16x4::new(1, 2, 3, 4);
4056         let e: u16x4 = u16x4::new(43, 44, 45, 46);
4057         let r: u16x4 = transmute(vqadd_u16(transmute(a), transmute(b)));
4058         assert_eq!(r, e);
4059     }
4060
4061     #[simd_test(enable = "neon")]
4062     unsafe fn test_vqaddq_u16() {
4063         let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
4064         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4065         let e: u16x8 = u16x8::new(43, 44, 45, 46, 47, 48, 49, 50);
4066         let r: u16x8 = transmute(vqaddq_u16(transmute(a), transmute(b)));
4067         assert_eq!(r, e);
4068     }
4069
4070     #[simd_test(enable = "neon")]
4071     unsafe fn test_vqadd_u32() {
4072         let a: u32x2 = u32x2::new(42, 42);
4073         let b: u32x2 = u32x2::new(1, 2);
4074         let e: u32x2 = u32x2::new(43, 44);
4075         let r: u32x2 = transmute(vqadd_u32(transmute(a), transmute(b)));
4076         assert_eq!(r, e);
4077     }
4078
4079     #[simd_test(enable = "neon")]
4080     unsafe fn test_vqaddq_u32() {
4081         let a: u32x4 = u32x4::new(42, 42, 42, 42);
4082         let b: u32x4 = u32x4::new(1, 2, 3, 4);
4083         let e: u32x4 = u32x4::new(43, 44, 45, 46);
4084         let r: u32x4 = transmute(vqaddq_u32(transmute(a), transmute(b)));
4085         assert_eq!(r, e);
4086     }
4087
4088     #[simd_test(enable = "neon")]
4089     unsafe fn test_vqadd_s8() {
4090         let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42);
4091         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4092         let e: i8x8 = i8x8::new(43, 44, 45, 46, 47, 48, 49, 50);
4093         let r: i8x8 = transmute(vqadd_s8(transmute(a), transmute(b)));
4094         assert_eq!(r, e);
4095     }
4096
4097     #[simd_test(enable = "neon")]
4098     unsafe fn test_vqaddq_s8() {
4099         let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42);
4100         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4101         let e: i8x16 = i8x16::new(43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58);
4102         let r: i8x16 = transmute(vqaddq_s8(transmute(a), transmute(b)));
4103         assert_eq!(r, e);
4104     }
4105
4106     #[simd_test(enable = "neon")]
4107     unsafe fn test_vqadd_s16() {
4108         let a: i16x4 = i16x4::new(42, 42, 42, 42);
4109         let b: i16x4 = i16x4::new(1, 2, 3, 4);
4110         let e: i16x4 = i16x4::new(43, 44, 45, 46);
4111         let r: i16x4 = transmute(vqadd_s16(transmute(a), transmute(b)));
4112         assert_eq!(r, e);
4113     }
4114
4115     #[simd_test(enable = "neon")]
4116     unsafe fn test_vqaddq_s16() {
4117         let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42);
4118         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4119         let e: i16x8 = i16x8::new(43, 44, 45, 46, 47, 48, 49, 50);
4120         let r: i16x8 = transmute(vqaddq_s16(transmute(a), transmute(b)));
4121         assert_eq!(r, e);
4122     }
4123
4124     #[simd_test(enable = "neon")]
4125     unsafe fn test_vqadd_s32() {
4126         let a: i32x2 = i32x2::new(42, 42);
4127         let b: i32x2 = i32x2::new(1, 2);
4128         let e: i32x2 = i32x2::new(43, 44);
4129         let r: i32x2 = transmute(vqadd_s32(transmute(a), transmute(b)));
4130         assert_eq!(r, e);
4131     }
4132
4133     #[simd_test(enable = "neon")]
4134     unsafe fn test_vqaddq_s32() {
4135         let a: i32x4 = i32x4::new(42, 42, 42, 42);
4136         let b: i32x4 = i32x4::new(1, 2, 3, 4);
4137         let e: i32x4 = i32x4::new(43, 44, 45, 46);
4138         let r: i32x4 = transmute(vqaddq_s32(transmute(a), transmute(b)));
4139         assert_eq!(r, e);
4140     }
4141
4142     #[simd_test(enable = "neon")]
4143     unsafe fn test_vmul_s8() {
4144         let a: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4145         let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4146         let e: i8x8 = i8x8::new(1, 4, 3, 8, 5, 12, 7, 16);
4147         let r: i8x8 = transmute(vmul_s8(transmute(a), transmute(b)));
4148         assert_eq!(r, e);
4149     }
4150
4151     #[simd_test(enable = "neon")]
4152     unsafe fn test_vmulq_s8() {
4153         let a: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4154         let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4155         let e: i8x16 = i8x16::new(1, 4, 3, 8, 5, 12, 7, 16, 9, 20, 11, 24, 13, 28, 15, 32);
4156         let r: i8x16 = transmute(vmulq_s8(transmute(a), transmute(b)));
4157         assert_eq!(r, e);
4158     }
4159
4160     #[simd_test(enable = "neon")]
4161     unsafe fn test_vmul_s16() {
4162         let a: i16x4 = i16x4::new(1, 2, 1, 2);
4163         let b: i16x4 = i16x4::new(1, 2, 3, 4);
4164         let e: i16x4 = i16x4::new(1, 4, 3, 8);
4165         let r: i16x4 = transmute(vmul_s16(transmute(a), transmute(b)));
4166         assert_eq!(r, e);
4167     }
4168
4169     #[simd_test(enable = "neon")]
4170     unsafe fn test_vmulq_s16() {
4171         let a: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4172         let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4173         let e: i16x8 = i16x8::new(1, 4, 3, 8, 5, 12, 7, 16);
4174         let r: i16x8 = transmute(vmulq_s16(transmute(a), transmute(b)));
4175         assert_eq!(r, e);
4176     }
4177
4178     #[simd_test(enable = "neon")]
4179     unsafe fn test_vmul_s32() {
4180         let a: i32x2 = i32x2::new(1, 2);
4181         let b: i32x2 = i32x2::new(1, 2);
4182         let e: i32x2 = i32x2::new(1, 4);
4183         let r: i32x2 = transmute(vmul_s32(transmute(a), transmute(b)));
4184         assert_eq!(r, e);
4185     }
4186
4187     #[simd_test(enable = "neon")]
4188     unsafe fn test_vmulq_s32() {
4189         let a: i32x4 = i32x4::new(1, 2, 1, 2);
4190         let b: i32x4 = i32x4::new(1, 2, 3, 4);
4191         let e: i32x4 = i32x4::new(1, 4, 3, 8);
4192         let r: i32x4 = transmute(vmulq_s32(transmute(a), transmute(b)));
4193         assert_eq!(r, e);
4194     }
4195
4196     #[simd_test(enable = "neon")]
4197     unsafe fn test_vmul_u8() {
4198         let a: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4199         let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4200         let e: u8x8 = u8x8::new(1, 4, 3, 8, 5, 12, 7, 16);
4201         let r: u8x8 = transmute(vmul_u8(transmute(a), transmute(b)));
4202         assert_eq!(r, e);
4203     }
4204
4205     #[simd_test(enable = "neon")]
4206     unsafe fn test_vmulq_u8() {
4207         let a: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4208         let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4209         let e: u8x16 = u8x16::new(1, 4, 3, 8, 5, 12, 7, 16, 9, 20, 11, 24, 13, 28, 15, 32);
4210         let r: u8x16 = transmute(vmulq_u8(transmute(a), transmute(b)));
4211         assert_eq!(r, e);
4212     }
4213
4214     #[simd_test(enable = "neon")]
4215     unsafe fn test_vmul_u16() {
4216         let a: u16x4 = u16x4::new(1, 2, 1, 2);
4217         let b: u16x4 = u16x4::new(1, 2, 3, 4);
4218         let e: u16x4 = u16x4::new(1, 4, 3, 8);
4219         let r: u16x4 = transmute(vmul_u16(transmute(a), transmute(b)));
4220         assert_eq!(r, e);
4221     }
4222
4223     #[simd_test(enable = "neon")]
4224     unsafe fn test_vmulq_u16() {
4225         let a: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4226         let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4227         let e: u16x8 = u16x8::new(1, 4, 3, 8, 5, 12, 7, 16);
4228         let r: u16x8 = transmute(vmulq_u16(transmute(a), transmute(b)));
4229         assert_eq!(r, e);
4230     }
4231
4232     #[simd_test(enable = "neon")]
4233     unsafe fn test_vmul_u32() {
4234         let a: u32x2 = u32x2::new(1, 2);
4235         let b: u32x2 = u32x2::new(1, 2);
4236         let e: u32x2 = u32x2::new(1, 4);
4237         let r: u32x2 = transmute(vmul_u32(transmute(a), transmute(b)));
4238         assert_eq!(r, e);
4239     }
4240
4241     #[simd_test(enable = "neon")]
4242     unsafe fn test_vmulq_u32() {
4243         let a: u32x4 = u32x4::new(1, 2, 1, 2);
4244         let b: u32x4 = u32x4::new(1, 2, 3, 4);
4245         let e: u32x4 = u32x4::new(1, 4, 3, 8);
4246         let r: u32x4 = transmute(vmulq_u32(transmute(a), transmute(b)));
4247         assert_eq!(r, e);
4248     }
4249
4250     #[simd_test(enable = "neon")]
4251     unsafe fn test_vmul_f32() {
4252         let a: f32x2 = f32x2::new(1.0, 2.0);
4253         let b: f32x2 = f32x2::new(2.0, 3.0);
4254         let e: f32x2 = f32x2::new(2.0, 6.0);
4255         let r: f32x2 = transmute(vmul_f32(transmute(a), transmute(b)));
4256         assert_eq!(r, e);
4257     }
4258
4259     #[simd_test(enable = "neon")]
4260     unsafe fn test_vmulq_f32() {
4261         let a: f32x4 = f32x4::new(1.0, 2.0, 1.0, 2.0);
4262         let b: f32x4 = f32x4::new(2.0, 3.0, 4.0, 5.0);
4263         let e: f32x4 = f32x4::new(2.0, 6.0, 4.0, 10.0);
4264         let r: f32x4 = transmute(vmulq_f32(transmute(a), transmute(b)));
4265         assert_eq!(r, e);
4266     }
4267
4268     #[simd_test(enable = "neon")]
4269     unsafe fn test_vsub_s8() {
4270         let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4271         let b: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4272         let e: i8x8 = i8x8::new(0, 0, 2, 2, 4, 4, 6, 6);
4273         let r: i8x8 = transmute(vsub_s8(transmute(a), transmute(b)));
4274         assert_eq!(r, e);
4275     }
4276
4277     #[simd_test(enable = "neon")]
4278     unsafe fn test_vsubq_s8() {
4279         let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4280         let b: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4281         let e: i8x16 = i8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);
4282         let r: i8x16 = transmute(vsubq_s8(transmute(a), transmute(b)));
4283         assert_eq!(r, e);
4284     }
4285
4286     #[simd_test(enable = "neon")]
4287     unsafe fn test_vsub_s16() {
4288         let a: i16x4 = i16x4::new(1, 2, 3, 4);
4289         let b: i16x4 = i16x4::new(1, 2, 1, 2);
4290         let e: i16x4 = i16x4::new(0, 0, 2, 2);
4291         let r: i16x4 = transmute(vsub_s16(transmute(a), transmute(b)));
4292         assert_eq!(r, e);
4293     }
4294
4295     #[simd_test(enable = "neon")]
4296     unsafe fn test_vsubq_s16() {
4297         let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4298         let b: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4299         let e: i16x8 = i16x8::new(0, 0, 2, 2, 4, 4, 6, 6);
4300         let r: i16x8 = transmute(vsubq_s16(transmute(a), transmute(b)));
4301         assert_eq!(r, e);
4302     }
4303
4304     #[simd_test(enable = "neon")]
4305     unsafe fn test_vsub_s32() {
4306         let a: i32x2 = i32x2::new(1, 2);
4307         let b: i32x2 = i32x2::new(1, 2);
4308         let e: i32x2 = i32x2::new(0, 0);
4309         let r: i32x2 = transmute(vsub_s32(transmute(a), transmute(b)));
4310         assert_eq!(r, e);
4311     }
4312
4313     #[simd_test(enable = "neon")]
4314     unsafe fn test_vsubq_s32() {
4315         let a: i32x4 = i32x4::new(1, 2, 3, 4);
4316         let b: i32x4 = i32x4::new(1, 2, 1, 2);
4317         let e: i32x4 = i32x4::new(0, 0, 2, 2);
4318         let r: i32x4 = transmute(vsubq_s32(transmute(a), transmute(b)));
4319         assert_eq!(r, e);
4320     }
4321
4322     #[simd_test(enable = "neon")]
4323     unsafe fn test_vsub_u8() {
4324         let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4325         let b: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4326         let e: u8x8 = u8x8::new(0, 0, 2, 2, 4, 4, 6, 6);
4327         let r: u8x8 = transmute(vsub_u8(transmute(a), transmute(b)));
4328         assert_eq!(r, e);
4329     }
4330
4331     #[simd_test(enable = "neon")]
4332     unsafe fn test_vsubq_u8() {
4333         let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4334         let b: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4335         let e: u8x16 = u8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);
4336         let r: u8x16 = transmute(vsubq_u8(transmute(a), transmute(b)));
4337         assert_eq!(r, e);
4338     }
4339
4340     #[simd_test(enable = "neon")]
4341     unsafe fn test_vsub_u16() {
4342         let a: u16x4 = u16x4::new(1, 2, 3, 4);
4343         let b: u16x4 = u16x4::new(1, 2, 1, 2);
4344         let e: u16x4 = u16x4::new(0, 0, 2, 2);
4345         let r: u16x4 = transmute(vsub_u16(transmute(a), transmute(b)));
4346         assert_eq!(r, e);
4347     }
4348
4349     #[simd_test(enable = "neon")]
4350     unsafe fn test_vsubq_u16() {
4351         let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4352         let b: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4353         let e: u16x8 = u16x8::new(0, 0, 2, 2, 4, 4, 6, 6);
4354         let r: u16x8 = transmute(vsubq_u16(transmute(a), transmute(b)));
4355         assert_eq!(r, e);
4356     }
4357
4358     #[simd_test(enable = "neon")]
4359     unsafe fn test_vsub_u32() {
4360         let a: u32x2 = u32x2::new(1, 2);
4361         let b: u32x2 = u32x2::new(1, 2);
4362         let e: u32x2 = u32x2::new(0, 0);
4363         let r: u32x2 = transmute(vsub_u32(transmute(a), transmute(b)));
4364         assert_eq!(r, e);
4365     }
4366
4367     #[simd_test(enable = "neon")]
4368     unsafe fn test_vsubq_u32() {
4369         let a: u32x4 = u32x4::new(1, 2, 3, 4);
4370         let b: u32x4 = u32x4::new(1, 2, 1, 2);
4371         let e: u32x4 = u32x4::new(0, 0, 2, 2);
4372         let r: u32x4 = transmute(vsubq_u32(transmute(a), transmute(b)));
4373         assert_eq!(r, e);
4374     }
4375
4376     #[simd_test(enable = "neon")]
4377     unsafe fn test_vsub_s64() {
4378         let a: i64x1 = i64x1::new(1);
4379         let b: i64x1 = i64x1::new(1);
4380         let e: i64x1 = i64x1::new(0);
4381         let r: i64x1 = transmute(vsub_s64(transmute(a), transmute(b)));
4382         assert_eq!(r, e);
4383     }
4384
4385     #[simd_test(enable = "neon")]
4386     unsafe fn test_vsubq_s64() {
4387         let a: i64x2 = i64x2::new(1, 2);
4388         let b: i64x2 = i64x2::new(1, 2);
4389         let e: i64x2 = i64x2::new(0, 0);
4390         let r: i64x2 = transmute(vsubq_s64(transmute(a), transmute(b)));
4391         assert_eq!(r, e);
4392     }
4393
4394     #[simd_test(enable = "neon")]
4395     unsafe fn test_vsub_u64() {
4396         let a: u64x1 = u64x1::new(1);
4397         let b: u64x1 = u64x1::new(1);
4398         let e: u64x1 = u64x1::new(0);
4399         let r: u64x1 = transmute(vsub_u64(transmute(a), transmute(b)));
4400         assert_eq!(r, e);
4401     }
4402
4403     #[simd_test(enable = "neon")]
4404     unsafe fn test_vsubq_u64() {
4405         let a: u64x2 = u64x2::new(1, 2);
4406         let b: u64x2 = u64x2::new(1, 2);
4407         let e: u64x2 = u64x2::new(0, 0);
4408         let r: u64x2 = transmute(vsubq_u64(transmute(a), transmute(b)));
4409         assert_eq!(r, e);
4410     }
4411
4412     #[simd_test(enable = "neon")]
4413     unsafe fn test_vsub_f32() {
4414         let a: f32x2 = f32x2::new(1.0, 4.0);
4415         let b: f32x2 = f32x2::new(1.0, 2.0);
4416         let e: f32x2 = f32x2::new(0.0, 2.0);
4417         let r: f32x2 = transmute(vsub_f32(transmute(a), transmute(b)));
4418         assert_eq!(r, e);
4419     }
4420
4421     #[simd_test(enable = "neon")]
4422     unsafe fn test_vsubq_f32() {
4423         let a: f32x4 = f32x4::new(1.0, 4.0, 3.0, 8.0);
4424         let b: f32x4 = f32x4::new(1.0, 2.0, 3.0, 4.0);
4425         let e: f32x4 = f32x4::new(0.0, 2.0, 0.0, 4.0);
4426         let r: f32x4 = transmute(vsubq_f32(transmute(a), transmute(b)));
4427         assert_eq!(r, e);
4428     }
4429
4430     #[simd_test(enable = "neon")]
4431     unsafe fn test_vhsub_u8() {
4432         let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4433         let b: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4434         let e: u8x8 = u8x8::new(0, 0, 1, 1, 2, 2, 3, 3);
4435         let r: u8x8 = transmute(vhsub_u8(transmute(a), transmute(b)));
4436         assert_eq!(r, e);
4437     }
4438
4439     #[simd_test(enable = "neon")]
4440     unsafe fn test_vhsubq_u8() {
4441         let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4442         let b: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4443         let e: u8x16 = u8x16::new(0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7);
4444         let r: u8x16 = transmute(vhsubq_u8(transmute(a), transmute(b)));
4445         assert_eq!(r, e);
4446     }
4447
4448     #[simd_test(enable = "neon")]
4449     unsafe fn test_vhsub_u16() {
4450         let a: u16x4 = u16x4::new(1, 2, 3, 4);
4451         let b: u16x4 = u16x4::new(1, 2, 1, 2);
4452         let e: u16x4 = u16x4::new(0, 0, 1, 1);
4453         let r: u16x4 = transmute(vhsub_u16(transmute(a), transmute(b)));
4454         assert_eq!(r, e);
4455     }
4456
4457     #[simd_test(enable = "neon")]
4458     unsafe fn test_vhsubq_u16() {
4459         let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4460         let b: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4461         let e: u16x8 = u16x8::new(0, 0, 1, 1, 2, 2, 3, 3);
4462         let r: u16x8 = transmute(vhsubq_u16(transmute(a), transmute(b)));
4463         assert_eq!(r, e);
4464     }
4465
4466     #[simd_test(enable = "neon")]
4467     unsafe fn test_vhsub_u32() {
4468         let a: u32x2 = u32x2::new(1, 2);
4469         let b: u32x2 = u32x2::new(1, 2);
4470         let e: u32x2 = u32x2::new(0, 0);
4471         let r: u32x2 = transmute(vhsub_u32(transmute(a), transmute(b)));
4472         assert_eq!(r, e);
4473     }
4474
4475     #[simd_test(enable = "neon")]
4476     unsafe fn test_vhsubq_u32() {
4477         let a: u32x4 = u32x4::new(1, 2, 3, 4);
4478         let b: u32x4 = u32x4::new(1, 2, 1, 2);
4479         let e: u32x4 = u32x4::new(0, 0, 1, 1);
4480         let r: u32x4 = transmute(vhsubq_u32(transmute(a), transmute(b)));
4481         assert_eq!(r, e);
4482     }
4483
4484     #[simd_test(enable = "neon")]
4485     unsafe fn test_vhsub_s8() {
4486         let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4487         let b: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4488         let e: i8x8 = i8x8::new(0, 0, 1, 1, 2, 2, 3, 3);
4489         let r: i8x8 = transmute(vhsub_s8(transmute(a), transmute(b)));
4490         assert_eq!(r, e);
4491     }
4492
4493     #[simd_test(enable = "neon")]
4494     unsafe fn test_vhsubq_s8() {
4495         let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
4496         let b: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2);
4497         let e: i8x16 = i8x16::new(0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7);
4498         let r: i8x16 = transmute(vhsubq_s8(transmute(a), transmute(b)));
4499         assert_eq!(r, e);
4500     }
4501
4502     #[simd_test(enable = "neon")]
4503     unsafe fn test_vhsub_s16() {
4504         let a: i16x4 = i16x4::new(1, 2, 3, 4);
4505         let b: i16x4 = i16x4::new(1, 2, 1, 2);
4506         let e: i16x4 = i16x4::new(0, 0, 1, 1);
4507         let r: i16x4 = transmute(vhsub_s16(transmute(a), transmute(b)));
4508         assert_eq!(r, e);
4509     }
4510
4511     #[simd_test(enable = "neon")]
4512     unsafe fn test_vhsubq_s16() {
4513         let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8);
4514         let b: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2);
4515         let e: i16x8 = i16x8::new(0, 0, 1, 1, 2, 2, 3, 3);
4516         let r: i16x8 = transmute(vhsubq_s16(transmute(a), transmute(b)));
4517         assert_eq!(r, e);
4518     }
4519
4520     #[simd_test(enable = "neon")]
4521     unsafe fn test_vhsub_s32() {
4522         let a: i32x2 = i32x2::new(1, 2);
4523         let b: i32x2 = i32x2::new(1, 2);
4524         let e: i32x2 = i32x2::new(0, 0);
4525         let r: i32x2 = transmute(vhsub_s32(transmute(a), transmute(b)));
4526         assert_eq!(r, e);
4527     }
4528
4529     #[simd_test(enable = "neon")]
4530     unsafe fn test_vhsubq_s32() {
4531         let a: i32x4 = i32x4::new(1, 2, 3, 4);
4532         let b: i32x4 = i32x4::new(1, 2, 1, 2);
4533         let e: i32x4 = i32x4::new(0, 0, 1, 1);
4534         let r: i32x4 = transmute(vhsubq_s32(transmute(a), transmute(b)));
4535         assert_eq!(r, e);
4536     }
4537 }