src/stdsimd/coresimd/x86_64/avx.rs

   1 //! Advanced Vector Extensions (AVX)
   2 //!
   3 //! The references are:
   4 //!
   5 //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
   6 //! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture
   7 //! Programmer's Manual, Volume 3: General-Purpose and System
   8 //! Instructions][amd64_ref].
   9 //!
  10 //! [Wikipedia][wiki] provides a quick overview of the instructions available.
  11 //!
  12 //! [intel64_ref]: http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
  13 //! [amd64_ref]: http://support.amd.com/TechDocs/24594.pdf
  14 //! [wiki]: https://en.wikipedia.org/wiki/Advanced_Vector_Extensions
  15
  16 use coresimd::simd_llvm::*;
  17 use coresimd::x86::*;
  18 use mem;
  19
  20 /// Copy `a` to result, and insert the 64-bit integer `i` into result
  21 /// at the location specified by `index`.
  22 #[inline]
  23 #[rustc_args_required_const(2)]
  24 #[target_feature(enable = "avx")]
  25 // This intrinsic has no corresponding instruction.
  26 pub unsafe fn _mm256_insert_epi64(a: __m256i, i: i64, index: i32) -> __m256i {
  27     mem::transmute(simd_insert(a.as_i64x4(), (index as u32) & 3, i))
  28 }
  29
  30 #[cfg(test)]
  31 mod tests {
  32     use stdsimd_test::simd_test;
  33
  34     use coresimd::x86::*;
  35
  36     #[simd_test = "avx"]
  37     unsafe fn test_mm256_insert_epi64() {
  38         let a = _mm256_setr_epi64x(1, 2, 3, 4);
  39         let r = _mm256_insert_epi64(a, 0, 3);
  40         let e = _mm256_setr_epi64x(1, 2, 3, 0);
  41         assert_eq_m256i(r, e);
  42     }
  43 }