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Merge tag 'pull-vfio-20231106' of https://github.com/legoater/qemu into staging
[mirror_qemu.git] / system / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36 #include "exec/address-spaces.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 unsigned int global_dirty_tracking;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
216 }
217
218 /* Range of memory in the global map. Addresses are absolute. */
219 struct FlatRange {
220 MemoryRegion *mr;
221 hwaddr offset_in_region;
222 AddrRange addr;
223 uint8_t dirty_log_mask;
224 bool romd_mode;
225 bool readonly;
226 bool nonvolatile;
227 bool unmergeable;
228 };
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static inline MemoryRegionSection
234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
238 .fv = fv,
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
243 .nonvolatile = fr->nonvolatile,
244 .unmergeable = fr->unmergeable,
245 };
246 }
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly
255 && a->nonvolatile == b->nonvolatile
256 && a->unmergeable == b->unmergeable;
257 }
258
259 static FlatView *flatview_new(MemoryRegion *mr_root)
260 {
261 FlatView *view;
262
263 view = g_new0(FlatView, 1);
264 view->ref = 1;
265 view->root = mr_root;
266 memory_region_ref(mr_root);
267 trace_flatview_new(view, mr_root);
268
269 return view;
270 }
271
272 /* Insert a range into a given position. Caller is responsible for maintaining
273 * sorting order.
274 */
275 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276 {
277 if (view->nr == view->nr_allocated) {
278 view->nr_allocated = MAX(2 * view->nr, 10);
279 view->ranges = g_realloc(view->ranges,
280 view->nr_allocated * sizeof(*view->ranges));
281 }
282 memmove(view->ranges + pos + 1, view->ranges + pos,
283 (view->nr - pos) * sizeof(FlatRange));
284 view->ranges[pos] = *range;
285 memory_region_ref(range->mr);
286 ++view->nr;
287 }
288
289 static void flatview_destroy(FlatView *view)
290 {
291 int i;
292
293 trace_flatview_destroy(view, view->root);
294 if (view->dispatch) {
295 address_space_dispatch_free(view->dispatch);
296 }
297 for (i = 0; i < view->nr; i++) {
298 memory_region_unref(view->ranges[i].mr);
299 }
300 g_free(view->ranges);
301 memory_region_unref(view->root);
302 g_free(view);
303 }
304
305 static bool flatview_ref(FlatView *view)
306 {
307 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
308 }
309
310 void flatview_unref(FlatView *view)
311 {
312 if (qatomic_fetch_dec(&view->ref) == 1) {
313 trace_flatview_destroy_rcu(view, view->root);
314 assert(view->root);
315 call_rcu(view, flatview_destroy, rcu);
316 }
317 }
318
319 static bool can_merge(FlatRange *r1, FlatRange *r2)
320 {
321 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
322 && r1->mr == r2->mr
323 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324 r1->addr.size),
325 int128_make64(r2->offset_in_region))
326 && r1->dirty_log_mask == r2->dirty_log_mask
327 && r1->romd_mode == r2->romd_mode
328 && r1->readonly == r2->readonly
329 && r1->nonvolatile == r2->nonvolatile
330 && !r1->unmergeable && !r2->unmergeable;
331 }
332
333 /* Attempt to simplify a view by merging adjacent ranges */
334 static void flatview_simplify(FlatView *view)
335 {
336 unsigned i, j, k;
337
338 i = 0;
339 while (i < view->nr) {
340 j = i + 1;
341 while (j < view->nr
342 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
343 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
344 ++j;
345 }
346 ++i;
347 for (k = i; k < j; k++) {
348 memory_region_unref(view->ranges[k].mr);
349 }
350 memmove(&view->ranges[i], &view->ranges[j],
351 (view->nr - j) * sizeof(view->ranges[j]));
352 view->nr -= j - i;
353 }
354 }
355
356 static bool memory_region_big_endian(MemoryRegion *mr)
357 {
358 #if TARGET_BIG_ENDIAN
359 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
360 #else
361 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362 #endif
363 }
364
365 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
366 {
367 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
368 switch (op & MO_SIZE) {
369 case MO_8:
370 break;
371 case MO_16:
372 *data = bswap16(*data);
373 break;
374 case MO_32:
375 *data = bswap32(*data);
376 break;
377 case MO_64:
378 *data = bswap64(*data);
379 break;
380 default:
381 g_assert_not_reached();
382 }
383 }
384 }
385
386 static inline void memory_region_shift_read_access(uint64_t *value,
387 signed shift,
388 uint64_t mask,
389 uint64_t tmp)
390 {
391 if (shift >= 0) {
392 *value |= (tmp & mask) << shift;
393 } else {
394 *value |= (tmp & mask) >> -shift;
395 }
396 }
397
398 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
399 signed shift,
400 uint64_t mask)
401 {
402 uint64_t tmp;
403
404 if (shift >= 0) {
405 tmp = (*value >> shift) & mask;
406 } else {
407 tmp = (*value << -shift) & mask;
408 }
409
410 return tmp;
411 }
412
413 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
414 {
415 MemoryRegion *root;
416 hwaddr abs_addr = offset;
417
418 abs_addr += mr->addr;
419 for (root = mr; root->container; ) {
420 root = root->container;
421 abs_addr += root->addr;
422 }
423
424 return abs_addr;
425 }
426
427 static int get_cpu_index(void)
428 {
429 if (current_cpu) {
430 return current_cpu->cpu_index;
431 }
432 return -1;
433 }
434
435 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
436 hwaddr addr,
437 uint64_t *value,
438 unsigned size,
439 signed shift,
440 uint64_t mask,
441 MemTxAttrs attrs)
442 {
443 uint64_t tmp;
444
445 tmp = mr->ops->read(mr->opaque, addr, size);
446 if (mr->subpage) {
447 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
448 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
449 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
450 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
451 memory_region_name(mr));
452 }
453 memory_region_shift_read_access(value, shift, mask, tmp);
454 return MEMTX_OK;
455 }
456
457 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
458 hwaddr addr,
459 uint64_t *value,
460 unsigned size,
461 signed shift,
462 uint64_t mask,
463 MemTxAttrs attrs)
464 {
465 uint64_t tmp = 0;
466 MemTxResult r;
467
468 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
469 if (mr->subpage) {
470 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
471 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
474 memory_region_name(mr));
475 }
476 memory_region_shift_read_access(value, shift, mask, tmp);
477 return r;
478 }
479
480 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
481 hwaddr addr,
482 uint64_t *value,
483 unsigned size,
484 signed shift,
485 uint64_t mask,
486 MemTxAttrs attrs)
487 {
488 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
489
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
493 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
494 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
495 memory_region_name(mr));
496 }
497 mr->ops->write(mr->opaque, addr, tmp, size);
498 return MEMTX_OK;
499 }
500
501 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
502 hwaddr addr,
503 uint64_t *value,
504 unsigned size,
505 signed shift,
506 uint64_t mask,
507 MemTxAttrs attrs)
508 {
509 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
510
511 if (mr->subpage) {
512 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
513 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
514 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
515 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
516 memory_region_name(mr));
517 }
518 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
519 }
520
521 static MemTxResult access_with_adjusted_size(hwaddr addr,
522 uint64_t *value,
523 unsigned size,
524 unsigned access_size_min,
525 unsigned access_size_max,
526 MemTxResult (*access_fn)
527 (MemoryRegion *mr,
528 hwaddr addr,
529 uint64_t *value,
530 unsigned size,
531 signed shift,
532 uint64_t mask,
533 MemTxAttrs attrs),
534 MemoryRegion *mr,
535 MemTxAttrs attrs)
536 {
537 uint64_t access_mask;
538 unsigned access_size;
539 unsigned i;
540 MemTxResult r = MEMTX_OK;
541 bool reentrancy_guard_applied = false;
542
543 if (!access_size_min) {
544 access_size_min = 1;
545 }
546 if (!access_size_max) {
547 access_size_max = 4;
548 }
549
550 /* Do not allow more than one simultaneous access to a device's IO Regions */
551 if (mr->dev && !mr->disable_reentrancy_guard &&
552 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
553 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
554 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
555 "%s at addr: 0x%" HWADDR_PRIX,
556 memory_region_name(mr), addr);
557 return MEMTX_ACCESS_ERROR;
558 }
559 mr->dev->mem_reentrancy_guard.engaged_in_io = true;
560 reentrancy_guard_applied = true;
561 }
562
563 /* FIXME: support unaligned access? */
564 access_size = MAX(MIN(size, access_size_max), access_size_min);
565 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
566 if (memory_region_big_endian(mr)) {
567 for (i = 0; i < size; i += access_size) {
568 r |= access_fn(mr, addr + i, value, access_size,
569 (size - access_size - i) * 8, access_mask, attrs);
570 }
571 } else {
572 for (i = 0; i < size; i += access_size) {
573 r |= access_fn(mr, addr + i, value, access_size, i * 8,
574 access_mask, attrs);
575 }
576 }
577 if (mr->dev && reentrancy_guard_applied) {
578 mr->dev->mem_reentrancy_guard.engaged_in_io = false;
579 }
580 return r;
581 }
582
583 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
584 {
585 AddressSpace *as;
586
587 while (mr->container) {
588 mr = mr->container;
589 }
590 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
591 if (mr == as->root) {
592 return as;
593 }
594 }
595 return NULL;
596 }
597
598 /* Render a memory region into the global view. Ranges in @view obscure
599 * ranges in @mr.
600 */
601 static void render_memory_region(FlatView *view,
602 MemoryRegion *mr,
603 Int128 base,
604 AddrRange clip,
605 bool readonly,
606 bool nonvolatile,
607 bool unmergeable)
608 {
609 MemoryRegion *subregion;
610 unsigned i;
611 hwaddr offset_in_region;
612 Int128 remain;
613 Int128 now;
614 FlatRange fr;
615 AddrRange tmp;
616
617 if (!mr->enabled) {
618 return;
619 }
620
621 int128_addto(&base, int128_make64(mr->addr));
622 readonly |= mr->readonly;
623 nonvolatile |= mr->nonvolatile;
624 unmergeable |= mr->unmergeable;
625
626 tmp = addrrange_make(base, mr->size);
627
628 if (!addrrange_intersects(tmp, clip)) {
629 return;
630 }
631
632 clip = addrrange_intersection(tmp, clip);
633
634 if (mr->alias) {
635 int128_subfrom(&base, int128_make64(mr->alias->addr));
636 int128_subfrom(&base, int128_make64(mr->alias_offset));
637 render_memory_region(view, mr->alias, base, clip,
638 readonly, nonvolatile, unmergeable);
639 return;
640 }
641
642 /* Render subregions in priority order. */
643 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
644 render_memory_region(view, subregion, base, clip,
645 readonly, nonvolatile, unmergeable);
646 }
647
648 if (!mr->terminates) {
649 return;
650 }
651
652 offset_in_region = int128_get64(int128_sub(clip.start, base));
653 base = clip.start;
654 remain = clip.size;
655
656 fr.mr = mr;
657 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
658 fr.romd_mode = mr->romd_mode;
659 fr.readonly = readonly;
660 fr.nonvolatile = nonvolatile;
661 fr.unmergeable = unmergeable;
662
663 /* Render the region itself into any gaps left by the current view. */
664 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
665 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
666 continue;
667 }
668 if (int128_lt(base, view->ranges[i].addr.start)) {
669 now = int128_min(remain,
670 int128_sub(view->ranges[i].addr.start, base));
671 fr.offset_in_region = offset_in_region;
672 fr.addr = addrrange_make(base, now);
673 flatview_insert(view, i, &fr);
674 ++i;
675 int128_addto(&base, now);
676 offset_in_region += int128_get64(now);
677 int128_subfrom(&remain, now);
678 }
679 now = int128_sub(int128_min(int128_add(base, remain),
680 addrrange_end(view->ranges[i].addr)),
681 base);
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
685 }
686 if (int128_nz(remain)) {
687 fr.offset_in_region = offset_in_region;
688 fr.addr = addrrange_make(base, remain);
689 flatview_insert(view, i, &fr);
690 }
691 }
692
693 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
694 {
695 FlatRange *fr;
696
697 assert(fv);
698 assert(cb);
699
700 FOR_EACH_FLAT_RANGE(fr, fv) {
701 if (cb(fr->addr.start, fr->addr.size, fr->mr,
702 fr->offset_in_region, opaque)) {
703 break;
704 }
705 }
706 }
707
708 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
709 {
710 while (mr->enabled) {
711 if (mr->alias) {
712 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
713 /* The alias is included in its entirety. Use it as
714 * the "real" root, so that we can share more FlatViews.
715 */
716 mr = mr->alias;
717 continue;
718 }
719 } else if (!mr->terminates) {
720 unsigned int found = 0;
721 MemoryRegion *child, *next = NULL;
722 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
723 if (child->enabled) {
724 if (++found > 1) {
725 next = NULL;
726 break;
727 }
728 if (!child->addr && int128_ge(mr->size, child->size)) {
729 /* A child is included in its entirety. If it's the only
730 * enabled one, use it in the hope of finding an alias down the
731 * way. This will also let us share FlatViews.
732 */
733 next = child;
734 }
735 }
736 }
737 if (found == 0) {
738 return NULL;
739 }
740 if (next) {
741 mr = next;
742 continue;
743 }
744 }
745
746 return mr;
747 }
748
749 return NULL;
750 }
751
752 /* Render a memory topology into a list of disjoint absolute ranges. */
753 static FlatView *generate_memory_topology(MemoryRegion *mr)
754 {
755 int i;
756 FlatView *view;
757
758 view = flatview_new(mr);
759
760 if (mr) {
761 render_memory_region(view, mr, int128_zero(),
762 addrrange_make(int128_zero(), int128_2_64()),
763 false, false, false);
764 }
765 flatview_simplify(view);
766
767 view->dispatch = address_space_dispatch_new(view);
768 for (i = 0; i < view->nr; i++) {
769 MemoryRegionSection mrs =
770 section_from_flat_range(&view->ranges[i], view);
771 flatview_add_to_dispatch(view, &mrs);
772 }
773 address_space_dispatch_compact(view->dispatch);
774 g_hash_table_replace(flat_views, mr, view);
775
776 return view;
777 }
778
779 static void address_space_add_del_ioeventfds(AddressSpace *as,
780 MemoryRegionIoeventfd *fds_new,
781 unsigned fds_new_nb,
782 MemoryRegionIoeventfd *fds_old,
783 unsigned fds_old_nb)
784 {
785 unsigned iold, inew;
786 MemoryRegionIoeventfd *fd;
787 MemoryRegionSection section;
788
789 /* Generate a symmetric difference of the old and new fd sets, adding
790 * and deleting as necessary.
791 */
792
793 iold = inew = 0;
794 while (iold < fds_old_nb || inew < fds_new_nb) {
795 if (iold < fds_old_nb
796 && (inew == fds_new_nb
797 || memory_region_ioeventfd_before(&fds_old[iold],
798 &fds_new[inew]))) {
799 fd = &fds_old[iold];
800 section = (MemoryRegionSection) {
801 .fv = address_space_to_flatview(as),
802 .offset_within_address_space = int128_get64(fd->addr.start),
803 .size = fd->addr.size,
804 };
805 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
806 fd->match_data, fd->data, fd->e);
807 ++iold;
808 } else if (inew < fds_new_nb
809 && (iold == fds_old_nb
810 || memory_region_ioeventfd_before(&fds_new[inew],
811 &fds_old[iold]))) {
812 fd = &fds_new[inew];
813 section = (MemoryRegionSection) {
814 .fv = address_space_to_flatview(as),
815 .offset_within_address_space = int128_get64(fd->addr.start),
816 .size = fd->addr.size,
817 };
818 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
819 fd->match_data, fd->data, fd->e);
820 ++inew;
821 } else {
822 ++iold;
823 ++inew;
824 }
825 }
826 }
827
828 FlatView *address_space_get_flatview(AddressSpace *as)
829 {
830 FlatView *view;
831
832 RCU_READ_LOCK_GUARD();
833 do {
834 view = address_space_to_flatview(as);
835 /* If somebody has replaced as->current_map concurrently,
836 * flatview_ref returns false.
837 */
838 } while (!flatview_ref(view));
839 return view;
840 }
841
842 static void address_space_update_ioeventfds(AddressSpace *as)
843 {
844 FlatView *view;
845 FlatRange *fr;
846 unsigned ioeventfd_nb = 0;
847 unsigned ioeventfd_max;
848 MemoryRegionIoeventfd *ioeventfds;
849 AddrRange tmp;
850 unsigned i;
851
852 if (!as->ioeventfd_notifiers) {
853 return;
854 }
855
856 /*
857 * It is likely that the number of ioeventfds hasn't changed much, so use
858 * the previous size as the starting value, with some headroom to avoid
859 * gratuitous reallocations.
860 */
861 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
862 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
863
864 view = address_space_get_flatview(as);
865 FOR_EACH_FLAT_RANGE(fr, view) {
866 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
867 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
868 int128_sub(fr->addr.start,
869 int128_make64(fr->offset_in_region)));
870 if (addrrange_intersects(fr->addr, tmp)) {
871 ++ioeventfd_nb;
872 if (ioeventfd_nb > ioeventfd_max) {
873 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
874 ioeventfds = g_realloc(ioeventfds,
875 ioeventfd_max * sizeof(*ioeventfds));
876 }
877 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
878 ioeventfds[ioeventfd_nb-1].addr = tmp;
879 }
880 }
881 }
882
883 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
884 as->ioeventfds, as->ioeventfd_nb);
885
886 g_free(as->ioeventfds);
887 as->ioeventfds = ioeventfds;
888 as->ioeventfd_nb = ioeventfd_nb;
889 flatview_unref(view);
890 }
891
892 /*
893 * Notify the memory listeners about the coalesced IO change events of
894 * range `cmr'. Only the part that has intersection of the specified
895 * FlatRange will be sent.
896 */
897 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
898 CoalescedMemoryRange *cmr, bool add)
899 {
900 AddrRange tmp;
901
902 tmp = addrrange_shift(cmr->addr,
903 int128_sub(fr->addr.start,
904 int128_make64(fr->offset_in_region)));
905 if (!addrrange_intersects(tmp, fr->addr)) {
906 return;
907 }
908 tmp = addrrange_intersection(tmp, fr->addr);
909
910 if (add) {
911 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
912 int128_get64(tmp.start),
913 int128_get64(tmp.size));
914 } else {
915 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
916 int128_get64(tmp.start),
917 int128_get64(tmp.size));
918 }
919 }
920
921 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
922 {
923 CoalescedMemoryRange *cmr;
924
925 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
926 flat_range_coalesced_io_notify(fr, as, cmr, false);
927 }
928 }
929
930 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
931 {
932 MemoryRegion *mr = fr->mr;
933 CoalescedMemoryRange *cmr;
934
935 if (QTAILQ_EMPTY(&mr->coalesced)) {
936 return;
937 }
938
939 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
940 flat_range_coalesced_io_notify(fr, as, cmr, true);
941 }
942 }
943
944 static void address_space_update_topology_pass(AddressSpace *as,
945 const FlatView *old_view,
946 const FlatView *new_view,
947 bool adding)
948 {
949 unsigned iold, inew;
950 FlatRange *frold, *frnew;
951
952 /* Generate a symmetric difference of the old and new memory maps.
953 * Kill ranges in the old map, and instantiate ranges in the new map.
954 */
955 iold = inew = 0;
956 while (iold < old_view->nr || inew < new_view->nr) {
957 if (iold < old_view->nr) {
958 frold = &old_view->ranges[iold];
959 } else {
960 frold = NULL;
961 }
962 if (inew < new_view->nr) {
963 frnew = &new_view->ranges[inew];
964 } else {
965 frnew = NULL;
966 }
967
968 if (frold
969 && (!frnew
970 || int128_lt(frold->addr.start, frnew->addr.start)
971 || (int128_eq(frold->addr.start, frnew->addr.start)
972 && !flatrange_equal(frold, frnew)))) {
973 /* In old but not in new, or in both but attributes changed. */
974
975 if (!adding) {
976 flat_range_coalesced_io_del(frold, as);
977 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
978 }
979
980 ++iold;
981 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
982 /* In both and unchanged (except logging may have changed) */
983
984 if (adding) {
985 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
986 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
987 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
988 frold->dirty_log_mask,
989 frnew->dirty_log_mask);
990 }
991 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
992 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
993 frold->dirty_log_mask,
994 frnew->dirty_log_mask);
995 }
996 }
997
998 ++iold;
999 ++inew;
1000 } else {
1001 /* In new */
1002
1003 if (adding) {
1004 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
1005 flat_range_coalesced_io_add(frnew, as);
1006 }
1007
1008 ++inew;
1009 }
1010 }
1011 }
1012
1013 static void flatviews_init(void)
1014 {
1015 static FlatView *empty_view;
1016
1017 if (flat_views) {
1018 return;
1019 }
1020
1021 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1022 (GDestroyNotify) flatview_unref);
1023 if (!empty_view) {
1024 empty_view = generate_memory_topology(NULL);
1025 /* We keep it alive forever in the global variable. */
1026 flatview_ref(empty_view);
1027 } else {
1028 g_hash_table_replace(flat_views, NULL, empty_view);
1029 flatview_ref(empty_view);
1030 }
1031 }
1032
1033 static void flatviews_reset(void)
1034 {
1035 AddressSpace *as;
1036
1037 if (flat_views) {
1038 g_hash_table_unref(flat_views);
1039 flat_views = NULL;
1040 }
1041 flatviews_init();
1042
1043 /* Render unique FVs */
1044 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1045 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1046
1047 if (g_hash_table_lookup(flat_views, physmr)) {
1048 continue;
1049 }
1050
1051 generate_memory_topology(physmr);
1052 }
1053 }
1054
1055 static void address_space_set_flatview(AddressSpace *as)
1056 {
1057 FlatView *old_view = address_space_to_flatview(as);
1058 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1059 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1060
1061 assert(new_view);
1062
1063 if (old_view == new_view) {
1064 return;
1065 }
1066
1067 if (old_view) {
1068 flatview_ref(old_view);
1069 }
1070
1071 flatview_ref(new_view);
1072
1073 if (!QTAILQ_EMPTY(&as->listeners)) {
1074 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1075
1076 if (!old_view2) {
1077 old_view2 = &tmpview;
1078 }
1079 address_space_update_topology_pass(as, old_view2, new_view, false);
1080 address_space_update_topology_pass(as, old_view2, new_view, true);
1081 }
1082
1083 /* Writes are protected by the BQL. */
1084 qatomic_rcu_set(&as->current_map, new_view);
1085 if (old_view) {
1086 flatview_unref(old_view);
1087 }
1088
1089 /* Note that all the old MemoryRegions are still alive up to this
1090 * point. This relieves most MemoryListeners from the need to
1091 * ref/unref the MemoryRegions they get---unless they use them
1092 * outside the iothread mutex, in which case precise reference
1093 * counting is necessary.
1094 */
1095 if (old_view) {
1096 flatview_unref(old_view);
1097 }
1098 }
1099
1100 static void address_space_update_topology(AddressSpace *as)
1101 {
1102 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1103
1104 flatviews_init();
1105 if (!g_hash_table_lookup(flat_views, physmr)) {
1106 generate_memory_topology(physmr);
1107 }
1108 address_space_set_flatview(as);
1109 }
1110
1111 void memory_region_transaction_begin(void)
1112 {
1113 qemu_flush_coalesced_mmio_buffer();
1114 ++memory_region_transaction_depth;
1115 }
1116
1117 void memory_region_transaction_commit(void)
1118 {
1119 AddressSpace *as;
1120
1121 assert(memory_region_transaction_depth);
1122 assert(qemu_mutex_iothread_locked());
1123
1124 --memory_region_transaction_depth;
1125 if (!memory_region_transaction_depth) {
1126 if (memory_region_update_pending) {
1127 flatviews_reset();
1128
1129 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1130
1131 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1132 address_space_set_flatview(as);
1133 address_space_update_ioeventfds(as);
1134 }
1135 memory_region_update_pending = false;
1136 ioeventfd_update_pending = false;
1137 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1138 } else if (ioeventfd_update_pending) {
1139 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1140 address_space_update_ioeventfds(as);
1141 }
1142 ioeventfd_update_pending = false;
1143 }
1144 }
1145 }
1146
1147 static void memory_region_destructor_none(MemoryRegion *mr)
1148 {
1149 }
1150
1151 static void memory_region_destructor_ram(MemoryRegion *mr)
1152 {
1153 qemu_ram_free(mr->ram_block);
1154 }
1155
1156 static bool memory_region_need_escape(char c)
1157 {
1158 return c == '/' || c == '[' || c == '\\' || c == ']';
1159 }
1160
1161 static char *memory_region_escape_name(const char *name)
1162 {
1163 const char *p;
1164 char *escaped, *q;
1165 uint8_t c;
1166 size_t bytes = 0;
1167
1168 for (p = name; *p; p++) {
1169 bytes += memory_region_need_escape(*p) ? 4 : 1;
1170 }
1171 if (bytes == p - name) {
1172 return g_memdup(name, bytes + 1);
1173 }
1174
1175 escaped = g_malloc(bytes + 1);
1176 for (p = name, q = escaped; *p; p++) {
1177 c = *p;
1178 if (unlikely(memory_region_need_escape(c))) {
1179 *q++ = '\\';
1180 *q++ = 'x';
1181 *q++ = "0123456789abcdef"[c >> 4];
1182 c = "0123456789abcdef"[c & 15];
1183 }
1184 *q++ = c;
1185 }
1186 *q = 0;
1187 return escaped;
1188 }
1189
1190 static void memory_region_do_init(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size)
1194 {
1195 mr->size = int128_make64(size);
1196 if (size == UINT64_MAX) {
1197 mr->size = int128_2_64();
1198 }
1199 mr->name = g_strdup(name);
1200 mr->owner = owner;
1201 mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
1202 mr->ram_block = NULL;
1203
1204 if (name) {
1205 char *escaped_name = memory_region_escape_name(name);
1206 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1207
1208 if (!owner) {
1209 owner = container_get(qdev_get_machine(), "/unattached");
1210 }
1211
1212 object_property_add_child(owner, name_array, OBJECT(mr));
1213 object_unref(OBJECT(mr));
1214 g_free(name_array);
1215 g_free(escaped_name);
1216 }
1217 }
1218
1219 void memory_region_init(MemoryRegion *mr,
1220 Object *owner,
1221 const char *name,
1222 uint64_t size)
1223 {
1224 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1225 memory_region_do_init(mr, owner, name, size);
1226 }
1227
1228 static void memory_region_get_container(Object *obj, Visitor *v,
1229 const char *name, void *opaque,
1230 Error **errp)
1231 {
1232 MemoryRegion *mr = MEMORY_REGION(obj);
1233 char *path = (char *)"";
1234
1235 if (mr->container) {
1236 path = object_get_canonical_path(OBJECT(mr->container));
1237 }
1238 visit_type_str(v, name, &path, errp);
1239 if (mr->container) {
1240 g_free(path);
1241 }
1242 }
1243
1244 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1245 const char *part)
1246 {
1247 MemoryRegion *mr = MEMORY_REGION(obj);
1248
1249 return OBJECT(mr->container);
1250 }
1251
1252 static void memory_region_get_priority(Object *obj, Visitor *v,
1253 const char *name, void *opaque,
1254 Error **errp)
1255 {
1256 MemoryRegion *mr = MEMORY_REGION(obj);
1257 int32_t value = mr->priority;
1258
1259 visit_type_int32(v, name, &value, errp);
1260 }
1261
1262 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1263 void *opaque, Error **errp)
1264 {
1265 MemoryRegion *mr = MEMORY_REGION(obj);
1266 uint64_t value = memory_region_size(mr);
1267
1268 visit_type_uint64(v, name, &value, errp);
1269 }
1270
1271 static void memory_region_initfn(Object *obj)
1272 {
1273 MemoryRegion *mr = MEMORY_REGION(obj);
1274 ObjectProperty *op;
1275
1276 mr->ops = &unassigned_mem_ops;
1277 mr->enabled = true;
1278 mr->romd_mode = true;
1279 mr->destructor = memory_region_destructor_none;
1280 QTAILQ_INIT(&mr->subregions);
1281 QTAILQ_INIT(&mr->coalesced);
1282
1283 op = object_property_add(OBJECT(mr), "container",
1284 "link<" TYPE_MEMORY_REGION ">",
1285 memory_region_get_container,
1286 NULL, /* memory_region_set_container */
1287 NULL, NULL);
1288 op->resolve = memory_region_resolve_container;
1289
1290 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1291 &mr->addr, OBJ_PROP_FLAG_READ);
1292 object_property_add(OBJECT(mr), "priority", "uint32",
1293 memory_region_get_priority,
1294 NULL, /* memory_region_set_priority */
1295 NULL, NULL);
1296 object_property_add(OBJECT(mr), "size", "uint64",
1297 memory_region_get_size,
1298 NULL, /* memory_region_set_size, */
1299 NULL, NULL);
1300 }
1301
1302 static void iommu_memory_region_initfn(Object *obj)
1303 {
1304 MemoryRegion *mr = MEMORY_REGION(obj);
1305
1306 mr->is_iommu = true;
1307 }
1308
1309 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1310 unsigned size)
1311 {
1312 #ifdef DEBUG_UNASSIGNED
1313 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
1314 #endif
1315 return 0;
1316 }
1317
1318 static void unassigned_mem_write(void *opaque, hwaddr addr,
1319 uint64_t val, unsigned size)
1320 {
1321 #ifdef DEBUG_UNASSIGNED
1322 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1323 #endif
1324 }
1325
1326 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1327 unsigned size, bool is_write,
1328 MemTxAttrs attrs)
1329 {
1330 return false;
1331 }
1332
1333 const MemoryRegionOps unassigned_mem_ops = {
1334 .valid.accepts = unassigned_mem_accepts,
1335 .endianness = DEVICE_NATIVE_ENDIAN,
1336 };
1337
1338 static uint64_t memory_region_ram_device_read(void *opaque,
1339 hwaddr addr, unsigned size)
1340 {
1341 MemoryRegion *mr = opaque;
1342 uint64_t data = (uint64_t)~0;
1343
1344 switch (size) {
1345 case 1:
1346 data = *(uint8_t *)(mr->ram_block->host + addr);
1347 break;
1348 case 2:
1349 data = *(uint16_t *)(mr->ram_block->host + addr);
1350 break;
1351 case 4:
1352 data = *(uint32_t *)(mr->ram_block->host + addr);
1353 break;
1354 case 8:
1355 data = *(uint64_t *)(mr->ram_block->host + addr);
1356 break;
1357 }
1358
1359 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1360
1361 return data;
1362 }
1363
1364 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1365 uint64_t data, unsigned size)
1366 {
1367 MemoryRegion *mr = opaque;
1368
1369 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1370
1371 switch (size) {
1372 case 1:
1373 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1374 break;
1375 case 2:
1376 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1377 break;
1378 case 4:
1379 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1380 break;
1381 case 8:
1382 *(uint64_t *)(mr->ram_block->host + addr) = data;
1383 break;
1384 }
1385 }
1386
1387 static const MemoryRegionOps ram_device_mem_ops = {
1388 .read = memory_region_ram_device_read,
1389 .write = memory_region_ram_device_write,
1390 .endianness = DEVICE_HOST_ENDIAN,
1391 .valid = {
1392 .min_access_size = 1,
1393 .max_access_size = 8,
1394 .unaligned = true,
1395 },
1396 .impl = {
1397 .min_access_size = 1,
1398 .max_access_size = 8,
1399 .unaligned = true,
1400 },
1401 };
1402
1403 bool memory_region_access_valid(MemoryRegion *mr,
1404 hwaddr addr,
1405 unsigned size,
1406 bool is_write,
1407 MemTxAttrs attrs)
1408 {
1409 if (mr->ops->valid.accepts
1410 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1411 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1412 ", size %u, region '%s', reason: rejected\n",
1413 is_write ? "write" : "read",
1414 addr, size, memory_region_name(mr));
1415 return false;
1416 }
1417
1418 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1419 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1420 ", size %u, region '%s', reason: unaligned\n",
1421 is_write ? "write" : "read",
1422 addr, size, memory_region_name(mr));
1423 return false;
1424 }
1425
1426 /* Treat zero as compatibility all valid */
1427 if (!mr->ops->valid.max_access_size) {
1428 return true;
1429 }
1430
1431 if (size > mr->ops->valid.max_access_size
1432 || size < mr->ops->valid.min_access_size) {
1433 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1434 ", size %u, region '%s', reason: invalid size "
1435 "(min:%u max:%u)\n",
1436 is_write ? "write" : "read",
1437 addr, size, memory_region_name(mr),
1438 mr->ops->valid.min_access_size,
1439 mr->ops->valid.max_access_size);
1440 return false;
1441 }
1442 return true;
1443 }
1444
1445 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1446 hwaddr addr,
1447 uint64_t *pval,
1448 unsigned size,
1449 MemTxAttrs attrs)
1450 {
1451 *pval = 0;
1452
1453 if (mr->ops->read) {
1454 return access_with_adjusted_size(addr, pval, size,
1455 mr->ops->impl.min_access_size,
1456 mr->ops->impl.max_access_size,
1457 memory_region_read_accessor,
1458 mr, attrs);
1459 } else {
1460 return access_with_adjusted_size(addr, pval, size,
1461 mr->ops->impl.min_access_size,
1462 mr->ops->impl.max_access_size,
1463 memory_region_read_with_attrs_accessor,
1464 mr, attrs);
1465 }
1466 }
1467
1468 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1469 hwaddr addr,
1470 uint64_t *pval,
1471 MemOp op,
1472 MemTxAttrs attrs)
1473 {
1474 unsigned size = memop_size(op);
1475 MemTxResult r;
1476
1477 if (mr->alias) {
1478 return memory_region_dispatch_read(mr->alias,
1479 mr->alias_offset + addr,
1480 pval, op, attrs);
1481 }
1482 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1483 *pval = unassigned_mem_read(mr, addr, size);
1484 return MEMTX_DECODE_ERROR;
1485 }
1486
1487 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1488 adjust_endianness(mr, pval, op);
1489 return r;
1490 }
1491
1492 /* Return true if an eventfd was signalled */
1493 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1494 hwaddr addr,
1495 uint64_t data,
1496 unsigned size,
1497 MemTxAttrs attrs)
1498 {
1499 MemoryRegionIoeventfd ioeventfd = {
1500 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1501 .data = data,
1502 };
1503 unsigned i;
1504
1505 for (i = 0; i < mr->ioeventfd_nb; i++) {
1506 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1507 ioeventfd.e = mr->ioeventfds[i].e;
1508
1509 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1510 event_notifier_set(ioeventfd.e);
1511 return true;
1512 }
1513 }
1514
1515 return false;
1516 }
1517
1518 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1519 hwaddr addr,
1520 uint64_t data,
1521 MemOp op,
1522 MemTxAttrs attrs)
1523 {
1524 unsigned size = memop_size(op);
1525
1526 if (mr->alias) {
1527 return memory_region_dispatch_write(mr->alias,
1528 mr->alias_offset + addr,
1529 data, op, attrs);
1530 }
1531 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1532 unassigned_mem_write(mr, addr, data, size);
1533 return MEMTX_DECODE_ERROR;
1534 }
1535
1536 adjust_endianness(mr, &data, op);
1537
1538 /*
1539 * FIXME: it's not clear why under KVM the write would be processed
1540 * directly, instead of going through eventfd. This probably should
1541 * test "tcg_enabled() || qtest_enabled()", or should just go away.
1542 */
1543 if (!kvm_enabled() &&
1544 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1545 return MEMTX_OK;
1546 }
1547
1548 if (mr->ops->write) {
1549 return access_with_adjusted_size(addr, &data, size,
1550 mr->ops->impl.min_access_size,
1551 mr->ops->impl.max_access_size,
1552 memory_region_write_accessor, mr,
1553 attrs);
1554 } else {
1555 return
1556 access_with_adjusted_size(addr, &data, size,
1557 mr->ops->impl.min_access_size,
1558 mr->ops->impl.max_access_size,
1559 memory_region_write_with_attrs_accessor,
1560 mr, attrs);
1561 }
1562 }
1563
1564 void memory_region_init_io(MemoryRegion *mr,
1565 Object *owner,
1566 const MemoryRegionOps *ops,
1567 void *opaque,
1568 const char *name,
1569 uint64_t size)
1570 {
1571 memory_region_init(mr, owner, name, size);
1572 mr->ops = ops ? ops : &unassigned_mem_ops;
1573 mr->opaque = opaque;
1574 mr->terminates = true;
1575 }
1576
1577 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1578 Object *owner,
1579 const char *name,
1580 uint64_t size,
1581 Error **errp)
1582 {
1583 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1584 }
1585
1586 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 uint32_t ram_flags,
1591 Error **errp)
1592 {
1593 Error *err = NULL;
1594 memory_region_init(mr, owner, name, size);
1595 mr->ram = true;
1596 mr->terminates = true;
1597 mr->destructor = memory_region_destructor_ram;
1598 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1599 if (err) {
1600 mr->size = int128_zero();
1601 object_unparent(OBJECT(mr));
1602 error_propagate(errp, err);
1603 }
1604 }
1605
1606 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1607 Object *owner,
1608 const char *name,
1609 uint64_t size,
1610 uint64_t max_size,
1611 void (*resized)(const char*,
1612 uint64_t length,
1613 void *host),
1614 Error **errp)
1615 {
1616 Error *err = NULL;
1617 memory_region_init(mr, owner, name, size);
1618 mr->ram = true;
1619 mr->terminates = true;
1620 mr->destructor = memory_region_destructor_ram;
1621 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1622 mr, &err);
1623 if (err) {
1624 mr->size = int128_zero();
1625 object_unparent(OBJECT(mr));
1626 error_propagate(errp, err);
1627 }
1628 }
1629
1630 #ifdef CONFIG_POSIX
1631 void memory_region_init_ram_from_file(MemoryRegion *mr,
1632 Object *owner,
1633 const char *name,
1634 uint64_t size,
1635 uint64_t align,
1636 uint32_t ram_flags,
1637 const char *path,
1638 ram_addr_t offset,
1639 Error **errp)
1640 {
1641 Error *err = NULL;
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
1644 mr->readonly = !!(ram_flags & RAM_READONLY);
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
1647 mr->align = align;
1648 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1649 offset, &err);
1650 if (err) {
1651 mr->size = int128_zero();
1652 object_unparent(OBJECT(mr));
1653 error_propagate(errp, err);
1654 }
1655 }
1656
1657 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1658 Object *owner,
1659 const char *name,
1660 uint64_t size,
1661 uint32_t ram_flags,
1662 int fd,
1663 ram_addr_t offset,
1664 Error **errp)
1665 {
1666 Error *err = NULL;
1667 memory_region_init(mr, owner, name, size);
1668 mr->ram = true;
1669 mr->readonly = !!(ram_flags & RAM_READONLY);
1670 mr->terminates = true;
1671 mr->destructor = memory_region_destructor_ram;
1672 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1673 &err);
1674 if (err) {
1675 mr->size = int128_zero();
1676 object_unparent(OBJECT(mr));
1677 error_propagate(errp, err);
1678 }
1679 }
1680 #endif
1681
1682 void memory_region_init_ram_ptr(MemoryRegion *mr,
1683 Object *owner,
1684 const char *name,
1685 uint64_t size,
1686 void *ptr)
1687 {
1688 memory_region_init(mr, owner, name, size);
1689 mr->ram = true;
1690 mr->terminates = true;
1691 mr->destructor = memory_region_destructor_ram;
1692
1693 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1694 assert(ptr != NULL);
1695 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1696 }
1697
1698 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1699 Object *owner,
1700 const char *name,
1701 uint64_t size,
1702 void *ptr)
1703 {
1704 memory_region_init(mr, owner, name, size);
1705 mr->ram = true;
1706 mr->terminates = true;
1707 mr->ram_device = true;
1708 mr->ops = &ram_device_mem_ops;
1709 mr->opaque = mr;
1710 mr->destructor = memory_region_destructor_ram;
1711
1712 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1713 assert(ptr != NULL);
1714 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1715 }
1716
1717 void memory_region_init_alias(MemoryRegion *mr,
1718 Object *owner,
1719 const char *name,
1720 MemoryRegion *orig,
1721 hwaddr offset,
1722 uint64_t size)
1723 {
1724 memory_region_init(mr, owner, name, size);
1725 mr->alias = orig;
1726 mr->alias_offset = offset;
1727 }
1728
1729 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1730 Object *owner,
1731 const char *name,
1732 uint64_t size,
1733 Error **errp)
1734 {
1735 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1736 mr->readonly = true;
1737 }
1738
1739 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1740 Object *owner,
1741 const MemoryRegionOps *ops,
1742 void *opaque,
1743 const char *name,
1744 uint64_t size,
1745 Error **errp)
1746 {
1747 Error *err = NULL;
1748 assert(ops);
1749 memory_region_init(mr, owner, name, size);
1750 mr->ops = ops;
1751 mr->opaque = opaque;
1752 mr->terminates = true;
1753 mr->rom_device = true;
1754 mr->destructor = memory_region_destructor_ram;
1755 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1756 if (err) {
1757 mr->size = int128_zero();
1758 object_unparent(OBJECT(mr));
1759 error_propagate(errp, err);
1760 }
1761 }
1762
1763 void memory_region_init_iommu(void *_iommu_mr,
1764 size_t instance_size,
1765 const char *mrtypename,
1766 Object *owner,
1767 const char *name,
1768 uint64_t size)
1769 {
1770 struct IOMMUMemoryRegion *iommu_mr;
1771 struct MemoryRegion *mr;
1772
1773 object_initialize(_iommu_mr, instance_size, mrtypename);
1774 mr = MEMORY_REGION(_iommu_mr);
1775 memory_region_do_init(mr, owner, name, size);
1776 iommu_mr = IOMMU_MEMORY_REGION(mr);
1777 mr->terminates = true; /* then re-forwards */
1778 QLIST_INIT(&iommu_mr->iommu_notify);
1779 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1780 }
1781
1782 static void memory_region_finalize(Object *obj)
1783 {
1784 MemoryRegion *mr = MEMORY_REGION(obj);
1785
1786 assert(!mr->container);
1787
1788 /* We know the region is not visible in any address space (it
1789 * does not have a container and cannot be a root either because
1790 * it has no references, so we can blindly clear mr->enabled.
1791 * memory_region_set_enabled instead could trigger a transaction
1792 * and cause an infinite loop.
1793 */
1794 mr->enabled = false;
1795 memory_region_transaction_begin();
1796 while (!QTAILQ_EMPTY(&mr->subregions)) {
1797 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1798 memory_region_del_subregion(mr, subregion);
1799 }
1800 memory_region_transaction_commit();
1801
1802 mr->destructor(mr);
1803 memory_region_clear_coalescing(mr);
1804 g_free((char *)mr->name);
1805 g_free(mr->ioeventfds);
1806 }
1807
1808 Object *memory_region_owner(MemoryRegion *mr)
1809 {
1810 Object *obj = OBJECT(mr);
1811 return obj->parent;
1812 }
1813
1814 void memory_region_ref(MemoryRegion *mr)
1815 {
1816 /* MMIO callbacks most likely will access data that belongs
1817 * to the owner, hence the need to ref/unref the owner whenever
1818 * the memory region is in use.
1819 *
1820 * The memory region is a child of its owner. As long as the
1821 * owner doesn't call unparent itself on the memory region,
1822 * ref-ing the owner will also keep the memory region alive.
1823 * Memory regions without an owner are supposed to never go away;
1824 * we do not ref/unref them because it slows down DMA sensibly.
1825 */
1826 if (mr && mr->owner) {
1827 object_ref(mr->owner);
1828 }
1829 }
1830
1831 void memory_region_unref(MemoryRegion *mr)
1832 {
1833 if (mr && mr->owner) {
1834 object_unref(mr->owner);
1835 }
1836 }
1837
1838 uint64_t memory_region_size(MemoryRegion *mr)
1839 {
1840 if (int128_eq(mr->size, int128_2_64())) {
1841 return UINT64_MAX;
1842 }
1843 return int128_get64(mr->size);
1844 }
1845
1846 const char *memory_region_name(const MemoryRegion *mr)
1847 {
1848 if (!mr->name) {
1849 ((MemoryRegion *)mr)->name =
1850 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1851 }
1852 return mr->name;
1853 }
1854
1855 bool memory_region_is_ram_device(MemoryRegion *mr)
1856 {
1857 return mr->ram_device;
1858 }
1859
1860 bool memory_region_is_protected(MemoryRegion *mr)
1861 {
1862 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1863 }
1864
1865 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1866 {
1867 uint8_t mask = mr->dirty_log_mask;
1868 RAMBlock *rb = mr->ram_block;
1869
1870 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1871 memory_region_is_iommu(mr))) {
1872 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1873 }
1874
1875 if (tcg_enabled() && rb) {
1876 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1877 mask |= (1 << DIRTY_MEMORY_CODE);
1878 }
1879 return mask;
1880 }
1881
1882 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1883 {
1884 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1885 }
1886
1887 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1888 Error **errp)
1889 {
1890 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1891 IOMMUNotifier *iommu_notifier;
1892 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1893 int ret = 0;
1894
1895 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1896 flags |= iommu_notifier->notifier_flags;
1897 }
1898
1899 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1900 ret = imrc->notify_flag_changed(iommu_mr,
1901 iommu_mr->iommu_notify_flags,
1902 flags, errp);
1903 }
1904
1905 if (!ret) {
1906 iommu_mr->iommu_notify_flags = flags;
1907 }
1908 return ret;
1909 }
1910
1911 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1912 uint64_t page_size_mask,
1913 Error **errp)
1914 {
1915 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1916 int ret = 0;
1917
1918 if (imrc->iommu_set_page_size_mask) {
1919 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1920 }
1921 return ret;
1922 }
1923
1924 int memory_region_iommu_set_iova_ranges(IOMMUMemoryRegion *iommu_mr,
1925 GList *iova_ranges,
1926 Error **errp)
1927 {
1928 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1929 int ret = 0;
1930
1931 if (imrc->iommu_set_iova_ranges) {
1932 ret = imrc->iommu_set_iova_ranges(iommu_mr, iova_ranges, errp);
1933 }
1934 return ret;
1935 }
1936
1937 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1938 IOMMUNotifier *n, Error **errp)
1939 {
1940 IOMMUMemoryRegion *iommu_mr;
1941 int ret;
1942
1943 if (mr->alias) {
1944 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1945 }
1946
1947 /* We need to register for at least one bitfield */
1948 iommu_mr = IOMMU_MEMORY_REGION(mr);
1949 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1950 assert(n->start <= n->end);
1951 assert(n->iommu_idx >= 0 &&
1952 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1953
1954 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1955 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1956 if (ret) {
1957 QLIST_REMOVE(n, node);
1958 }
1959 return ret;
1960 }
1961
1962 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1963 {
1964 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1965
1966 if (imrc->get_min_page_size) {
1967 return imrc->get_min_page_size(iommu_mr);
1968 }
1969 return TARGET_PAGE_SIZE;
1970 }
1971
1972 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1973 {
1974 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1975 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1976 hwaddr addr, granularity;
1977 IOMMUTLBEntry iotlb;
1978
1979 /* If the IOMMU has its own replay callback, override */
1980 if (imrc->replay) {
1981 imrc->replay(iommu_mr, n);
1982 return;
1983 }
1984
1985 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1986
1987 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1988 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1989 if (iotlb.perm != IOMMU_NONE) {
1990 n->notify(n, &iotlb);
1991 }
1992
1993 /* if (2^64 - MR size) < granularity, it's possible to get an
1994 * infinite loop here. This should catch such a wraparound */
1995 if ((addr + granularity) < addr) {
1996 break;
1997 }
1998 }
1999 }
2000
2001 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
2002 IOMMUNotifier *n)
2003 {
2004 IOMMUMemoryRegion *iommu_mr;
2005
2006 if (mr->alias) {
2007 memory_region_unregister_iommu_notifier(mr->alias, n);
2008 return;
2009 }
2010 QLIST_REMOVE(n, node);
2011 iommu_mr = IOMMU_MEMORY_REGION(mr);
2012 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2013 }
2014
2015 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2016 IOMMUTLBEvent *event)
2017 {
2018 IOMMUTLBEntry *entry = &event->entry;
2019 hwaddr entry_end = entry->iova + entry->addr_mask;
2020 IOMMUTLBEntry tmp = *entry;
2021
2022 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2023 assert(entry->perm == IOMMU_NONE);
2024 }
2025
2026 /*
2027 * Skip the notification if the notification does not overlap
2028 * with registered range.
2029 */
2030 if (notifier->start > entry_end || notifier->end < entry->iova) {
2031 return;
2032 }
2033
2034 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2035 /* Crop (iova, addr_mask) to range */
2036 tmp.iova = MAX(tmp.iova, notifier->start);
2037 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2038 } else {
2039 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2040 }
2041
2042 if (event->type & notifier->notifier_flags) {
2043 notifier->notify(notifier, &tmp);
2044 }
2045 }
2046
2047 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2048 {
2049 IOMMUTLBEvent event;
2050
2051 event.type = IOMMU_NOTIFIER_UNMAP;
2052 event.entry.target_as = &address_space_memory;
2053 event.entry.iova = notifier->start;
2054 event.entry.perm = IOMMU_NONE;
2055 event.entry.addr_mask = notifier->end - notifier->start;
2056
2057 memory_region_notify_iommu_one(notifier, &event);
2058 }
2059
2060 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2061 int iommu_idx,
2062 IOMMUTLBEvent event)
2063 {
2064 IOMMUNotifier *iommu_notifier;
2065
2066 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2067
2068 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2069 if (iommu_notifier->iommu_idx == iommu_idx) {
2070 memory_region_notify_iommu_one(iommu_notifier, &event);
2071 }
2072 }
2073 }
2074
2075 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2076 enum IOMMUMemoryRegionAttr attr,
2077 void *data)
2078 {
2079 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2080
2081 if (!imrc->get_attr) {
2082 return -EINVAL;
2083 }
2084
2085 return imrc->get_attr(iommu_mr, attr, data);
2086 }
2087
2088 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2089 MemTxAttrs attrs)
2090 {
2091 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2092
2093 if (!imrc->attrs_to_index) {
2094 return 0;
2095 }
2096
2097 return imrc->attrs_to_index(iommu_mr, attrs);
2098 }
2099
2100 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2101 {
2102 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2103
2104 if (!imrc->num_indexes) {
2105 return 1;
2106 }
2107
2108 return imrc->num_indexes(iommu_mr);
2109 }
2110
2111 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2112 {
2113 if (!memory_region_is_ram(mr)) {
2114 return NULL;
2115 }
2116 return mr->rdm;
2117 }
2118
2119 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2120 RamDiscardManager *rdm)
2121 {
2122 g_assert(memory_region_is_ram(mr));
2123 g_assert(!rdm || !mr->rdm);
2124 mr->rdm = rdm;
2125 }
2126
2127 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2128 const MemoryRegion *mr)
2129 {
2130 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2131
2132 g_assert(rdmc->get_min_granularity);
2133 return rdmc->get_min_granularity(rdm, mr);
2134 }
2135
2136 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2137 const MemoryRegionSection *section)
2138 {
2139 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2140
2141 g_assert(rdmc->is_populated);
2142 return rdmc->is_populated(rdm, section);
2143 }
2144
2145 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2146 MemoryRegionSection *section,
2147 ReplayRamPopulate replay_fn,
2148 void *opaque)
2149 {
2150 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2151
2152 g_assert(rdmc->replay_populated);
2153 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2154 }
2155
2156 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2157 MemoryRegionSection *section,
2158 ReplayRamDiscard replay_fn,
2159 void *opaque)
2160 {
2161 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2162
2163 g_assert(rdmc->replay_discarded);
2164 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2165 }
2166
2167 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2168 RamDiscardListener *rdl,
2169 MemoryRegionSection *section)
2170 {
2171 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2172
2173 g_assert(rdmc->register_listener);
2174 rdmc->register_listener(rdm, rdl, section);
2175 }
2176
2177 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2178 RamDiscardListener *rdl)
2179 {
2180 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2181
2182 g_assert(rdmc->unregister_listener);
2183 rdmc->unregister_listener(rdm, rdl);
2184 }
2185
2186 /* Called with rcu_read_lock held. */
2187 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2188 ram_addr_t *ram_addr, bool *read_only,
2189 bool *mr_has_discard_manager)
2190 {
2191 MemoryRegion *mr;
2192 hwaddr xlat;
2193 hwaddr len = iotlb->addr_mask + 1;
2194 bool writable = iotlb->perm & IOMMU_WO;
2195
2196 if (mr_has_discard_manager) {
2197 *mr_has_discard_manager = false;
2198 }
2199 /*
2200 * The IOMMU TLB entry we have just covers translation through
2201 * this IOMMU to its immediate target. We need to translate
2202 * it the rest of the way through to memory.
2203 */
2204 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2205 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2206 if (!memory_region_is_ram(mr)) {
2207 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2208 return false;
2209 } else if (memory_region_has_ram_discard_manager(mr)) {
2210 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2211 MemoryRegionSection tmp = {
2212 .mr = mr,
2213 .offset_within_region = xlat,
2214 .size = int128_make64(len),
2215 };
2216 if (mr_has_discard_manager) {
2217 *mr_has_discard_manager = true;
2218 }
2219 /*
2220 * Malicious VMs can map memory into the IOMMU, which is expected
2221 * to remain discarded. vfio will pin all pages, populating memory.
2222 * Disallow that. vmstate priorities make sure any RamDiscardManager
2223 * were already restored before IOMMUs are restored.
2224 */
2225 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2226 error_report("iommu map to discarded memory (e.g., unplugged via"
2227 " virtio-mem): %" HWADDR_PRIx "",
2228 iotlb->translated_addr);
2229 return false;
2230 }
2231 }
2232
2233 /*
2234 * Translation truncates length to the IOMMU page size,
2235 * check that it did not truncate too much.
2236 */
2237 if (len & iotlb->addr_mask) {
2238 error_report("iommu has granularity incompatible with target AS");
2239 return false;
2240 }
2241
2242 if (vaddr) {
2243 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2244 }
2245
2246 if (ram_addr) {
2247 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2248 }
2249
2250 if (read_only) {
2251 *read_only = !writable || mr->readonly;
2252 }
2253
2254 return true;
2255 }
2256
2257 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2258 {
2259 uint8_t mask = 1 << client;
2260 uint8_t old_logging;
2261
2262 assert(client == DIRTY_MEMORY_VGA);
2263 old_logging = mr->vga_logging_count;
2264 mr->vga_logging_count += log ? 1 : -1;
2265 if (!!old_logging == !!mr->vga_logging_count) {
2266 return;
2267 }
2268
2269 memory_region_transaction_begin();
2270 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2271 memory_region_update_pending |= mr->enabled;
2272 memory_region_transaction_commit();
2273 }
2274
2275 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2276 hwaddr size)
2277 {
2278 assert(mr->ram_block);
2279 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2280 size,
2281 memory_region_get_dirty_log_mask(mr));
2282 }
2283
2284 /*
2285 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2286 * dirty bitmap for the specified memory region.
2287 */
2288 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
2289 {
2290 MemoryListener *listener;
2291 AddressSpace *as;
2292 FlatView *view;
2293 FlatRange *fr;
2294
2295 /* If the same address space has multiple log_sync listeners, we
2296 * visit that address space's FlatView multiple times. But because
2297 * log_sync listeners are rare, it's still cheaper than walking each
2298 * address space once.
2299 */
2300 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2301 if (listener->log_sync) {
2302 as = listener->address_space;
2303 view = address_space_get_flatview(as);
2304 FOR_EACH_FLAT_RANGE(fr, view) {
2305 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2306 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2307 listener->log_sync(listener, &mrs);
2308 }
2309 }
2310 flatview_unref(view);
2311 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2312 } else if (listener->log_sync_global) {
2313 /*
2314 * No matter whether MR is specified, what we can do here
2315 * is to do a global sync, because we are not capable to
2316 * sync in a finer granularity.
2317 */
2318 listener->log_sync_global(listener, last_stage);
2319 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2320 }
2321 }
2322 }
2323
2324 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2325 hwaddr len)
2326 {
2327 MemoryRegionSection mrs;
2328 MemoryListener *listener;
2329 AddressSpace *as;
2330 FlatView *view;
2331 FlatRange *fr;
2332 hwaddr sec_start, sec_end, sec_size;
2333
2334 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2335 if (!listener->log_clear) {
2336 continue;
2337 }
2338 as = listener->address_space;
2339 view = address_space_get_flatview(as);
2340 FOR_EACH_FLAT_RANGE(fr, view) {
2341 if (!fr->dirty_log_mask || fr->mr != mr) {
2342 /*
2343 * Clear dirty bitmap operation only applies to those
2344 * regions whose dirty logging is at least enabled
2345 */
2346 continue;
2347 }
2348
2349 mrs = section_from_flat_range(fr, view);
2350
2351 sec_start = MAX(mrs.offset_within_region, start);
2352 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2353 sec_end = MIN(sec_end, start + len);
2354
2355 if (sec_start >= sec_end) {
2356 /*
2357 * If this memory region section has no intersection
2358 * with the requested range, skip.
2359 */
2360 continue;
2361 }
2362
2363 /* Valid case; shrink the section if needed */
2364 mrs.offset_within_address_space +=
2365 sec_start - mrs.offset_within_region;
2366 mrs.offset_within_region = sec_start;
2367 sec_size = sec_end - sec_start;
2368 mrs.size = int128_make64(sec_size);
2369 listener->log_clear(listener, &mrs);
2370 }
2371 flatview_unref(view);
2372 }
2373 }
2374
2375 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2376 hwaddr addr,
2377 hwaddr size,
2378 unsigned client)
2379 {
2380 DirtyBitmapSnapshot *snapshot;
2381 assert(mr->ram_block);
2382 memory_region_sync_dirty_bitmap(mr, false);
2383 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2384 memory_global_after_dirty_log_sync();
2385 return snapshot;
2386 }
2387
2388 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2389 hwaddr addr, hwaddr size)
2390 {
2391 assert(mr->ram_block);
2392 return cpu_physical_memory_snapshot_get_dirty(snap,
2393 memory_region_get_ram_addr(mr) + addr, size);
2394 }
2395
2396 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2397 {
2398 if (mr->readonly != readonly) {
2399 memory_region_transaction_begin();
2400 mr->readonly = readonly;
2401 memory_region_update_pending |= mr->enabled;
2402 memory_region_transaction_commit();
2403 }
2404 }
2405
2406 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2407 {
2408 if (mr->nonvolatile != nonvolatile) {
2409 memory_region_transaction_begin();
2410 mr->nonvolatile = nonvolatile;
2411 memory_region_update_pending |= mr->enabled;
2412 memory_region_transaction_commit();
2413 }
2414 }
2415
2416 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2417 {
2418 if (mr->romd_mode != romd_mode) {
2419 memory_region_transaction_begin();
2420 mr->romd_mode = romd_mode;
2421 memory_region_update_pending |= mr->enabled;
2422 memory_region_transaction_commit();
2423 }
2424 }
2425
2426 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2427 hwaddr size, unsigned client)
2428 {
2429 assert(mr->ram_block);
2430 cpu_physical_memory_test_and_clear_dirty(
2431 memory_region_get_ram_addr(mr) + addr, size, client);
2432 }
2433
2434 int memory_region_get_fd(MemoryRegion *mr)
2435 {
2436 RCU_READ_LOCK_GUARD();
2437 while (mr->alias) {
2438 mr = mr->alias;
2439 }
2440 return mr->ram_block->fd;
2441 }
2442
2443 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2444 {
2445 uint64_t offset = 0;
2446
2447 RCU_READ_LOCK_GUARD();
2448 while (mr->alias) {
2449 offset += mr->alias_offset;
2450 mr = mr->alias;
2451 }
2452 assert(mr->ram_block);
2453 return qemu_map_ram_ptr(mr->ram_block, offset);
2454 }
2455
2456 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2457 {
2458 RAMBlock *block;
2459
2460 block = qemu_ram_block_from_host(ptr, false, offset);
2461 if (!block) {
2462 return NULL;
2463 }
2464
2465 return block->mr;
2466 }
2467
2468 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2469 {
2470 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2471 }
2472
2473 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2474 {
2475 assert(mr->ram_block);
2476
2477 qemu_ram_resize(mr->ram_block, newsize, errp);
2478 }
2479
2480 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2481 {
2482 if (mr->ram_block) {
2483 qemu_ram_msync(mr->ram_block, addr, size);
2484 }
2485 }
2486
2487 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2488 {
2489 /*
2490 * Might be extended case needed to cover
2491 * different types of memory regions
2492 */
2493 if (mr->dirty_log_mask) {
2494 memory_region_msync(mr, addr, size);
2495 }
2496 }
2497
2498 /*
2499 * Call proper memory listeners about the change on the newly
2500 * added/removed CoalescedMemoryRange.
2501 */
2502 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2503 CoalescedMemoryRange *cmr,
2504 bool add)
2505 {
2506 AddressSpace *as;
2507 FlatView *view;
2508 FlatRange *fr;
2509
2510 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2511 view = address_space_get_flatview(as);
2512 FOR_EACH_FLAT_RANGE(fr, view) {
2513 if (fr->mr == mr) {
2514 flat_range_coalesced_io_notify(fr, as, cmr, add);
2515 }
2516 }
2517 flatview_unref(view);
2518 }
2519 }
2520
2521 void memory_region_set_coalescing(MemoryRegion *mr)
2522 {
2523 memory_region_clear_coalescing(mr);
2524 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2525 }
2526
2527 void memory_region_add_coalescing(MemoryRegion *mr,
2528 hwaddr offset,
2529 uint64_t size)
2530 {
2531 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2532
2533 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2534 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2535 memory_region_update_coalesced_range(mr, cmr, true);
2536 memory_region_set_flush_coalesced(mr);
2537 }
2538
2539 void memory_region_clear_coalescing(MemoryRegion *mr)
2540 {
2541 CoalescedMemoryRange *cmr;
2542
2543 if (QTAILQ_EMPTY(&mr->coalesced)) {
2544 return;
2545 }
2546
2547 qemu_flush_coalesced_mmio_buffer();
2548 mr->flush_coalesced_mmio = false;
2549
2550 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2551 cmr = QTAILQ_FIRST(&mr->coalesced);
2552 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2553 memory_region_update_coalesced_range(mr, cmr, false);
2554 g_free(cmr);
2555 }
2556 }
2557
2558 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2559 {
2560 mr->flush_coalesced_mmio = true;
2561 }
2562
2563 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2564 {
2565 qemu_flush_coalesced_mmio_buffer();
2566 if (QTAILQ_EMPTY(&mr->coalesced)) {
2567 mr->flush_coalesced_mmio = false;
2568 }
2569 }
2570
2571 void memory_region_add_eventfd(MemoryRegion *mr,
2572 hwaddr addr,
2573 unsigned size,
2574 bool match_data,
2575 uint64_t data,
2576 EventNotifier *e)
2577 {
2578 MemoryRegionIoeventfd mrfd = {
2579 .addr.start = int128_make64(addr),
2580 .addr.size = int128_make64(size),
2581 .match_data = match_data,
2582 .data = data,
2583 .e = e,
2584 };
2585 unsigned i;
2586
2587 if (size) {
2588 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2589 }
2590 memory_region_transaction_begin();
2591 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2592 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2593 break;
2594 }
2595 }
2596 ++mr->ioeventfd_nb;
2597 mr->ioeventfds = g_realloc(mr->ioeventfds,
2598 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2599 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2600 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2601 mr->ioeventfds[i] = mrfd;
2602 ioeventfd_update_pending |= mr->enabled;
2603 memory_region_transaction_commit();
2604 }
2605
2606 void memory_region_del_eventfd(MemoryRegion *mr,
2607 hwaddr addr,
2608 unsigned size,
2609 bool match_data,
2610 uint64_t data,
2611 EventNotifier *e)
2612 {
2613 MemoryRegionIoeventfd mrfd = {
2614 .addr.start = int128_make64(addr),
2615 .addr.size = int128_make64(size),
2616 .match_data = match_data,
2617 .data = data,
2618 .e = e,
2619 };
2620 unsigned i;
2621
2622 if (size) {
2623 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2624 }
2625 memory_region_transaction_begin();
2626 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2627 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2628 break;
2629 }
2630 }
2631 assert(i != mr->ioeventfd_nb);
2632 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2633 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2634 --mr->ioeventfd_nb;
2635 mr->ioeventfds = g_realloc(mr->ioeventfds,
2636 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2637 ioeventfd_update_pending |= mr->enabled;
2638 memory_region_transaction_commit();
2639 }
2640
2641 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2642 {
2643 MemoryRegion *mr = subregion->container;
2644 MemoryRegion *other;
2645
2646 memory_region_transaction_begin();
2647
2648 memory_region_ref(subregion);
2649 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2650 if (subregion->priority >= other->priority) {
2651 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2652 goto done;
2653 }
2654 }
2655 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2656 done:
2657 memory_region_update_pending |= mr->enabled && subregion->enabled;
2658 memory_region_transaction_commit();
2659 }
2660
2661 static void memory_region_add_subregion_common(MemoryRegion *mr,
2662 hwaddr offset,
2663 MemoryRegion *subregion)
2664 {
2665 MemoryRegion *alias;
2666
2667 assert(!subregion->container);
2668 subregion->container = mr;
2669 for (alias = subregion->alias; alias; alias = alias->alias) {
2670 alias->mapped_via_alias++;
2671 }
2672 subregion->addr = offset;
2673 memory_region_update_container_subregions(subregion);
2674 }
2675
2676 void memory_region_add_subregion(MemoryRegion *mr,
2677 hwaddr offset,
2678 MemoryRegion *subregion)
2679 {
2680 subregion->priority = 0;
2681 memory_region_add_subregion_common(mr, offset, subregion);
2682 }
2683
2684 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2685 hwaddr offset,
2686 MemoryRegion *subregion,
2687 int priority)
2688 {
2689 subregion->priority = priority;
2690 memory_region_add_subregion_common(mr, offset, subregion);
2691 }
2692
2693 void memory_region_del_subregion(MemoryRegion *mr,
2694 MemoryRegion *subregion)
2695 {
2696 MemoryRegion *alias;
2697
2698 memory_region_transaction_begin();
2699 assert(subregion->container == mr);
2700 subregion->container = NULL;
2701 for (alias = subregion->alias; alias; alias = alias->alias) {
2702 alias->mapped_via_alias--;
2703 assert(alias->mapped_via_alias >= 0);
2704 }
2705 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2706 memory_region_unref(subregion);
2707 memory_region_update_pending |= mr->enabled && subregion->enabled;
2708 memory_region_transaction_commit();
2709 }
2710
2711 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2712 {
2713 if (enabled == mr->enabled) {
2714 return;
2715 }
2716 memory_region_transaction_begin();
2717 mr->enabled = enabled;
2718 memory_region_update_pending = true;
2719 memory_region_transaction_commit();
2720 }
2721
2722 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2723 {
2724 Int128 s = int128_make64(size);
2725
2726 if (size == UINT64_MAX) {
2727 s = int128_2_64();
2728 }
2729 if (int128_eq(s, mr->size)) {
2730 return;
2731 }
2732 memory_region_transaction_begin();
2733 mr->size = s;
2734 memory_region_update_pending = true;
2735 memory_region_transaction_commit();
2736 }
2737
2738 static void memory_region_readd_subregion(MemoryRegion *mr)
2739 {
2740 MemoryRegion *container = mr->container;
2741
2742 if (container) {
2743 memory_region_transaction_begin();
2744 memory_region_ref(mr);
2745 memory_region_del_subregion(container, mr);
2746 memory_region_add_subregion_common(container, mr->addr, mr);
2747 memory_region_unref(mr);
2748 memory_region_transaction_commit();
2749 }
2750 }
2751
2752 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2753 {
2754 if (addr != mr->addr) {
2755 mr->addr = addr;
2756 memory_region_readd_subregion(mr);
2757 }
2758 }
2759
2760 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2761 {
2762 assert(mr->alias);
2763
2764 if (offset == mr->alias_offset) {
2765 return;
2766 }
2767
2768 memory_region_transaction_begin();
2769 mr->alias_offset = offset;
2770 memory_region_update_pending |= mr->enabled;
2771 memory_region_transaction_commit();
2772 }
2773
2774 void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2775 {
2776 if (unmergeable == mr->unmergeable) {
2777 return;
2778 }
2779
2780 memory_region_transaction_begin();
2781 mr->unmergeable = unmergeable;
2782 memory_region_update_pending |= mr->enabled;
2783 memory_region_transaction_commit();
2784 }
2785
2786 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2787 {
2788 return mr->align;
2789 }
2790
2791 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2792 {
2793 const AddrRange *addr = addr_;
2794 const FlatRange *fr = fr_;
2795
2796 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2797 return -1;
2798 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2799 return 1;
2800 }
2801 return 0;
2802 }
2803
2804 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2805 {
2806 return bsearch(&addr, view->ranges, view->nr,
2807 sizeof(FlatRange), cmp_flatrange_addr);
2808 }
2809
2810 bool memory_region_is_mapped(MemoryRegion *mr)
2811 {
2812 return !!mr->container || mr->mapped_via_alias;
2813 }
2814
2815 /* Same as memory_region_find, but it does not add a reference to the
2816 * returned region. It must be called from an RCU critical section.
2817 */
2818 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2819 hwaddr addr, uint64_t size)
2820 {
2821 MemoryRegionSection ret = { .mr = NULL };
2822 MemoryRegion *root;
2823 AddressSpace *as;
2824 AddrRange range;
2825 FlatView *view;
2826 FlatRange *fr;
2827
2828 addr += mr->addr;
2829 for (root = mr; root->container; ) {
2830 root = root->container;
2831 addr += root->addr;
2832 }
2833
2834 as = memory_region_to_address_space(root);
2835 if (!as) {
2836 return ret;
2837 }
2838 range = addrrange_make(int128_make64(addr), int128_make64(size));
2839
2840 view = address_space_to_flatview(as);
2841 fr = flatview_lookup(view, range);
2842 if (!fr) {
2843 return ret;
2844 }
2845
2846 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2847 --fr;
2848 }
2849
2850 ret.mr = fr->mr;
2851 ret.fv = view;
2852 range = addrrange_intersection(range, fr->addr);
2853 ret.offset_within_region = fr->offset_in_region;
2854 ret.offset_within_region += int128_get64(int128_sub(range.start,
2855 fr->addr.start));
2856 ret.size = range.size;
2857 ret.offset_within_address_space = int128_get64(range.start);
2858 ret.readonly = fr->readonly;
2859 ret.nonvolatile = fr->nonvolatile;
2860 return ret;
2861 }
2862
2863 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2864 hwaddr addr, uint64_t size)
2865 {
2866 MemoryRegionSection ret;
2867 RCU_READ_LOCK_GUARD();
2868 ret = memory_region_find_rcu(mr, addr, size);
2869 if (ret.mr) {
2870 memory_region_ref(ret.mr);
2871 }
2872 return ret;
2873 }
2874
2875 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2876 {
2877 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2878
2879 *tmp = *s;
2880 if (tmp->mr) {
2881 memory_region_ref(tmp->mr);
2882 }
2883 if (tmp->fv) {
2884 bool ret = flatview_ref(tmp->fv);
2885
2886 g_assert(ret);
2887 }
2888 return tmp;
2889 }
2890
2891 void memory_region_section_free_copy(MemoryRegionSection *s)
2892 {
2893 if (s->fv) {
2894 flatview_unref(s->fv);
2895 }
2896 if (s->mr) {
2897 memory_region_unref(s->mr);
2898 }
2899 g_free(s);
2900 }
2901
2902 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2903 {
2904 MemoryRegion *mr;
2905
2906 RCU_READ_LOCK_GUARD();
2907 mr = memory_region_find_rcu(container, addr, 1).mr;
2908 return mr && mr != container;
2909 }
2910
2911 void memory_global_dirty_log_sync(bool last_stage)
2912 {
2913 memory_region_sync_dirty_bitmap(NULL, last_stage);
2914 }
2915
2916 void memory_global_after_dirty_log_sync(void)
2917 {
2918 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2919 }
2920
2921 /*
2922 * Dirty track stop flags that are postponed due to VM being stopped. Should
2923 * only be used within vmstate_change hook.
2924 */
2925 static unsigned int postponed_stop_flags;
2926 static VMChangeStateEntry *vmstate_change;
2927 static void memory_global_dirty_log_stop_postponed_run(void);
2928
2929 void memory_global_dirty_log_start(unsigned int flags)
2930 {
2931 unsigned int old_flags;
2932
2933 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2934
2935 if (vmstate_change) {
2936 /* If there is postponed stop(), operate on it first */
2937 postponed_stop_flags &= ~flags;
2938 memory_global_dirty_log_stop_postponed_run();
2939 }
2940
2941 flags &= ~global_dirty_tracking;
2942 if (!flags) {
2943 return;
2944 }
2945
2946 old_flags = global_dirty_tracking;
2947 global_dirty_tracking |= flags;
2948 trace_global_dirty_changed(global_dirty_tracking);
2949
2950 if (!old_flags) {
2951 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2952 memory_region_transaction_begin();
2953 memory_region_update_pending = true;
2954 memory_region_transaction_commit();
2955 }
2956 }
2957
2958 static void memory_global_dirty_log_do_stop(unsigned int flags)
2959 {
2960 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2961 assert((global_dirty_tracking & flags) == flags);
2962 global_dirty_tracking &= ~flags;
2963
2964 trace_global_dirty_changed(global_dirty_tracking);
2965
2966 if (!global_dirty_tracking) {
2967 memory_region_transaction_begin();
2968 memory_region_update_pending = true;
2969 memory_region_transaction_commit();
2970 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2971 }
2972 }
2973
2974 /*
2975 * Execute the postponed dirty log stop operations if there is, then reset
2976 * everything (including the flags and the vmstate change hook).
2977 */
2978 static void memory_global_dirty_log_stop_postponed_run(void)
2979 {
2980 /* This must be called with the vmstate handler registered */
2981 assert(vmstate_change);
2982
2983 /* Note: postponed_stop_flags can be cleared in log start routine */
2984 if (postponed_stop_flags) {
2985 memory_global_dirty_log_do_stop(postponed_stop_flags);
2986 postponed_stop_flags = 0;
2987 }
2988
2989 qemu_del_vm_change_state_handler(vmstate_change);
2990 vmstate_change = NULL;
2991 }
2992
2993 static void memory_vm_change_state_handler(void *opaque, bool running,
2994 RunState state)
2995 {
2996 if (running) {
2997 memory_global_dirty_log_stop_postponed_run();
2998 }
2999 }
3000
3001 void memory_global_dirty_log_stop(unsigned int flags)
3002 {
3003 if (!runstate_is_running()) {
3004 /* Postpone the dirty log stop, e.g., to when VM starts again */
3005 if (vmstate_change) {
3006 /* Batch with previous postponed flags */
3007 postponed_stop_flags |= flags;
3008 } else {
3009 postponed_stop_flags = flags;
3010 vmstate_change = qemu_add_vm_change_state_handler(
3011 memory_vm_change_state_handler, NULL);
3012 }
3013 return;
3014 }
3015
3016 memory_global_dirty_log_do_stop(flags);
3017 }
3018
3019 static void listener_add_address_space(MemoryListener *listener,
3020 AddressSpace *as)
3021 {
3022 FlatView *view;
3023 FlatRange *fr;
3024
3025 if (listener->begin) {
3026 listener->begin(listener);
3027 }
3028 if (global_dirty_tracking) {
3029 if (listener->log_global_start) {
3030 listener->log_global_start(listener);
3031 }
3032 }
3033
3034 view = address_space_get_flatview(as);
3035 FOR_EACH_FLAT_RANGE(fr, view) {
3036 MemoryRegionSection section = section_from_flat_range(fr, view);
3037
3038 if (listener->region_add) {
3039 listener->region_add(listener, &section);
3040 }
3041 if (fr->dirty_log_mask && listener->log_start) {
3042 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3043 }
3044 }
3045 if (listener->commit) {
3046 listener->commit(listener);
3047 }
3048 flatview_unref(view);
3049 }
3050
3051 static void listener_del_address_space(MemoryListener *listener,
3052 AddressSpace *as)
3053 {
3054 FlatView *view;
3055 FlatRange *fr;
3056
3057 if (listener->begin) {
3058 listener->begin(listener);
3059 }
3060 view = address_space_get_flatview(as);
3061 FOR_EACH_FLAT_RANGE(fr, view) {
3062 MemoryRegionSection section = section_from_flat_range(fr, view);
3063
3064 if (fr->dirty_log_mask && listener->log_stop) {
3065 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3066 }
3067 if (listener->region_del) {
3068 listener->region_del(listener, &section);
3069 }
3070 }
3071 if (listener->commit) {
3072 listener->commit(listener);
3073 }
3074 flatview_unref(view);
3075 }
3076
3077 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3078 {
3079 MemoryListener *other = NULL;
3080
3081 /* Only one of them can be defined for a listener */
3082 assert(!(listener->log_sync && listener->log_sync_global));
3083
3084 listener->address_space = as;
3085 if (QTAILQ_EMPTY(&memory_listeners)
3086 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3087 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3088 } else {
3089 QTAILQ_FOREACH(other, &memory_listeners, link) {
3090 if (listener->priority < other->priority) {
3091 break;
3092 }
3093 }
3094 QTAILQ_INSERT_BEFORE(other, listener, link);
3095 }
3096
3097 if (QTAILQ_EMPTY(&as->listeners)
3098 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3099 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3100 } else {
3101 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3102 if (listener->priority < other->priority) {
3103 break;
3104 }
3105 }
3106 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3107 }
3108
3109 listener_add_address_space(listener, as);
3110
3111 if (listener->eventfd_add || listener->eventfd_del) {
3112 as->ioeventfd_notifiers++;
3113 }
3114 }
3115
3116 void memory_listener_unregister(MemoryListener *listener)
3117 {
3118 if (!listener->address_space) {
3119 return;
3120 }
3121
3122 if (listener->eventfd_add || listener->eventfd_del) {
3123 listener->address_space->ioeventfd_notifiers--;
3124 }
3125
3126 listener_del_address_space(listener, listener->address_space);
3127 QTAILQ_REMOVE(&memory_listeners, listener, link);
3128 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3129 listener->address_space = NULL;
3130 }
3131
3132 void address_space_remove_listeners(AddressSpace *as)
3133 {
3134 while (!QTAILQ_EMPTY(&as->listeners)) {
3135 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3136 }
3137 }
3138
3139 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3140 {
3141 memory_region_ref(root);
3142 as->root = root;
3143 as->current_map = NULL;
3144 as->ioeventfd_nb = 0;
3145 as->ioeventfds = NULL;
3146 QTAILQ_INIT(&as->listeners);
3147 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3148 as->name = g_strdup(name ? name : "anonymous");
3149 address_space_update_topology(as);
3150 address_space_update_ioeventfds(as);
3151 }
3152
3153 static void do_address_space_destroy(AddressSpace *as)
3154 {
3155 assert(QTAILQ_EMPTY(&as->listeners));
3156
3157 flatview_unref(as->current_map);
3158 g_free(as->name);
3159 g_free(as->ioeventfds);
3160 memory_region_unref(as->root);
3161 }
3162
3163 void address_space_destroy(AddressSpace *as)
3164 {
3165 MemoryRegion *root = as->root;
3166
3167 /* Flush out anything from MemoryListeners listening in on this */
3168 memory_region_transaction_begin();
3169 as->root = NULL;
3170 memory_region_transaction_commit();
3171 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3172
3173 /* At this point, as->dispatch and as->current_map are dummy
3174 * entries that the guest should never use. Wait for the old
3175 * values to expire before freeing the data.
3176 */
3177 as->root = root;
3178 call_rcu(as, do_address_space_destroy, rcu);
3179 }
3180
3181 static const char *memory_region_type(MemoryRegion *mr)
3182 {
3183 if (mr->alias) {
3184 return memory_region_type(mr->alias);
3185 }
3186 if (memory_region_is_ram_device(mr)) {
3187 return "ramd";
3188 } else if (memory_region_is_romd(mr)) {
3189 return "romd";
3190 } else if (memory_region_is_rom(mr)) {
3191 return "rom";
3192 } else if (memory_region_is_ram(mr)) {
3193 return "ram";
3194 } else {
3195 return "i/o";
3196 }
3197 }
3198
3199 typedef struct MemoryRegionList MemoryRegionList;
3200
3201 struct MemoryRegionList {
3202 const MemoryRegion *mr;
3203 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3204 };
3205
3206 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3207
3208 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3209 int128_sub((size), int128_one())) : 0)
3210 #define MTREE_INDENT " "
3211
3212 static void mtree_expand_owner(const char *label, Object *obj)
3213 {
3214 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3215
3216 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3217 if (dev && dev->id) {
3218 qemu_printf(" id=%s", dev->id);
3219 } else {
3220 char *canonical_path = object_get_canonical_path(obj);
3221 if (canonical_path) {
3222 qemu_printf(" path=%s", canonical_path);
3223 g_free(canonical_path);
3224 } else {
3225 qemu_printf(" type=%s", object_get_typename(obj));
3226 }
3227 }
3228 qemu_printf("}");
3229 }
3230
3231 static void mtree_print_mr_owner(const MemoryRegion *mr)
3232 {
3233 Object *owner = mr->owner;
3234 Object *parent = memory_region_owner((MemoryRegion *)mr);
3235
3236 if (!owner && !parent) {
3237 qemu_printf(" orphan");
3238 return;
3239 }
3240 if (owner) {
3241 mtree_expand_owner("owner", owner);
3242 }
3243 if (parent && parent != owner) {
3244 mtree_expand_owner("parent", parent);
3245 }
3246 }
3247
3248 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3249 hwaddr base,
3250 MemoryRegionListHead *alias_print_queue,
3251 bool owner, bool display_disabled)
3252 {
3253 MemoryRegionList *new_ml, *ml, *next_ml;
3254 MemoryRegionListHead submr_print_queue;
3255 const MemoryRegion *submr;
3256 unsigned int i;
3257 hwaddr cur_start, cur_end;
3258
3259 if (!mr) {
3260 return;
3261 }
3262
3263 cur_start = base + mr->addr;
3264 cur_end = cur_start + MR_SIZE(mr->size);
3265
3266 /*
3267 * Try to detect overflow of memory region. This should never
3268 * happen normally. When it happens, we dump something to warn the
3269 * user who is observing this.
3270 */
3271 if (cur_start < base || cur_end < cur_start) {
3272 qemu_printf("[DETECTED OVERFLOW!] ");
3273 }
3274
3275 if (mr->alias) {
3276 bool found = false;
3277
3278 /* check if the alias is already in the queue */
3279 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3280 if (ml->mr == mr->alias) {
3281 found = true;
3282 }
3283 }
3284
3285 if (!found) {
3286 ml = g_new(MemoryRegionList, 1);
3287 ml->mr = mr->alias;
3288 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3289 }
3290 if (mr->enabled || display_disabled) {
3291 for (i = 0; i < level; i++) {
3292 qemu_printf(MTREE_INDENT);
3293 }
3294 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3295 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3296 "-" HWADDR_FMT_plx "%s",
3297 cur_start, cur_end,
3298 mr->priority,
3299 mr->nonvolatile ? "nv-" : "",
3300 memory_region_type((MemoryRegion *)mr),
3301 memory_region_name(mr),
3302 memory_region_name(mr->alias),
3303 mr->alias_offset,
3304 mr->alias_offset + MR_SIZE(mr->size),
3305 mr->enabled ? "" : " [disabled]");
3306 if (owner) {
3307 mtree_print_mr_owner(mr);
3308 }
3309 qemu_printf("\n");
3310 }
3311 } else {
3312 if (mr->enabled || display_disabled) {
3313 for (i = 0; i < level; i++) {
3314 qemu_printf(MTREE_INDENT);
3315 }
3316 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3317 " (prio %d, %s%s): %s%s",
3318 cur_start, cur_end,
3319 mr->priority,
3320 mr->nonvolatile ? "nv-" : "",
3321 memory_region_type((MemoryRegion *)mr),
3322 memory_region_name(mr),
3323 mr->enabled ? "" : " [disabled]");
3324 if (owner) {
3325 mtree_print_mr_owner(mr);
3326 }
3327 qemu_printf("\n");
3328 }
3329 }
3330
3331 QTAILQ_INIT(&submr_print_queue);
3332
3333 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3334 new_ml = g_new(MemoryRegionList, 1);
3335 new_ml->mr = submr;
3336 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3337 if (new_ml->mr->addr < ml->mr->addr ||
3338 (new_ml->mr->addr == ml->mr->addr &&
3339 new_ml->mr->priority > ml->mr->priority)) {
3340 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3341 new_ml = NULL;
3342 break;
3343 }
3344 }
3345 if (new_ml) {
3346 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3347 }
3348 }
3349
3350 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3351 mtree_print_mr(ml->mr, level + 1, cur_start,
3352 alias_print_queue, owner, display_disabled);
3353 }
3354
3355 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3356 g_free(ml);
3357 }
3358 }
3359
3360 struct FlatViewInfo {
3361 int counter;
3362 bool dispatch_tree;
3363 bool owner;
3364 AccelClass *ac;
3365 };
3366
3367 static void mtree_print_flatview(gpointer key, gpointer value,
3368 gpointer user_data)
3369 {
3370 FlatView *view = key;
3371 GArray *fv_address_spaces = value;
3372 struct FlatViewInfo *fvi = user_data;
3373 FlatRange *range = &view->ranges[0];
3374 MemoryRegion *mr;
3375 int n = view->nr;
3376 int i;
3377 AddressSpace *as;
3378
3379 qemu_printf("FlatView #%d\n", fvi->counter);
3380 ++fvi->counter;
3381
3382 for (i = 0; i < fv_address_spaces->len; ++i) {
3383 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3384 qemu_printf(" AS \"%s\", root: %s",
3385 as->name, memory_region_name(as->root));
3386 if (as->root->alias) {
3387 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3388 }
3389 qemu_printf("\n");
3390 }
3391
3392 qemu_printf(" Root memory region: %s\n",
3393 view->root ? memory_region_name(view->root) : "(none)");
3394
3395 if (n <= 0) {
3396 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3397 return;
3398 }
3399
3400 while (n--) {
3401 mr = range->mr;
3402 if (range->offset_in_region) {
3403 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3404 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3405 int128_get64(range->addr.start),
3406 int128_get64(range->addr.start)
3407 + MR_SIZE(range->addr.size),
3408 mr->priority,
3409 range->nonvolatile ? "nv-" : "",
3410 range->readonly ? "rom" : memory_region_type(mr),
3411 memory_region_name(mr),
3412 range->offset_in_region);
3413 } else {
3414 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3415 " (prio %d, %s%s): %s",
3416 int128_get64(range->addr.start),
3417 int128_get64(range->addr.start)
3418 + MR_SIZE(range->addr.size),
3419 mr->priority,
3420 range->nonvolatile ? "nv-" : "",
3421 range->readonly ? "rom" : memory_region_type(mr),
3422 memory_region_name(mr));
3423 }
3424 if (fvi->owner) {
3425 mtree_print_mr_owner(mr);
3426 }
3427
3428 if (fvi->ac) {
3429 for (i = 0; i < fv_address_spaces->len; ++i) {
3430 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3431 if (fvi->ac->has_memory(current_machine, as,
3432 int128_get64(range->addr.start),
3433 MR_SIZE(range->addr.size) + 1)) {
3434 qemu_printf(" %s", fvi->ac->name);
3435 }
3436 }
3437 }
3438 qemu_printf("\n");
3439 range++;
3440 }
3441
3442 #if !defined(CONFIG_USER_ONLY)
3443 if (fvi->dispatch_tree && view->root) {
3444 mtree_print_dispatch(view->dispatch, view->root);
3445 }
3446 #endif
3447
3448 qemu_printf("\n");
3449 }
3450
3451 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3452 gpointer user_data)
3453 {
3454 FlatView *view = key;
3455 GArray *fv_address_spaces = value;
3456
3457 g_array_unref(fv_address_spaces);
3458 flatview_unref(view);
3459
3460 return true;
3461 }
3462
3463 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3464 {
3465 struct FlatViewInfo fvi = {
3466 .counter = 0,
3467 .dispatch_tree = dispatch_tree,
3468 .owner = owner,
3469 };
3470 AddressSpace *as;
3471 FlatView *view;
3472 GArray *fv_address_spaces;
3473 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3474 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3475
3476 if (ac->has_memory) {
3477 fvi.ac = ac;
3478 }
3479
3480 /* Gather all FVs in one table */
3481 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3482 view = address_space_get_flatview(as);
3483
3484 fv_address_spaces = g_hash_table_lookup(views, view);
3485 if (!fv_address_spaces) {
3486 fv_address_spaces = g_array_new(false, false, sizeof(as));
3487 g_hash_table_insert(views, view, fv_address_spaces);
3488 }
3489
3490 g_array_append_val(fv_address_spaces, as);
3491 }
3492
3493 /* Print */
3494 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3495
3496 /* Free */
3497 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3498 g_hash_table_unref(views);
3499 }
3500
3501 struct AddressSpaceInfo {
3502 MemoryRegionListHead *ml_head;
3503 bool owner;
3504 bool disabled;
3505 };
3506
3507 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3508 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3509 {
3510 const AddressSpace *as_a = a;
3511 const AddressSpace *as_b = b;
3512
3513 return g_strcmp0(as_a->name, as_b->name);
3514 }
3515
3516 static void mtree_print_as_name(gpointer data, gpointer user_data)
3517 {
3518 AddressSpace *as = data;
3519
3520 qemu_printf("address-space: %s\n", as->name);
3521 }
3522
3523 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3524 {
3525 MemoryRegion *mr = key;
3526 GSList *as_same_root_mr_list = value;
3527 struct AddressSpaceInfo *asi = user_data;
3528
3529 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3530 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3531 qemu_printf("\n");
3532 }
3533
3534 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3535 gpointer user_data)
3536 {
3537 GSList *as_same_root_mr_list = value;
3538
3539 g_slist_free(as_same_root_mr_list);
3540
3541 return true;
3542 }
3543
3544 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3545 {
3546 MemoryRegionListHead ml_head;
3547 MemoryRegionList *ml, *ml2;
3548 AddressSpace *as;
3549 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3550 GSList *as_same_root_mr_list;
3551 struct AddressSpaceInfo asi = {
3552 .ml_head = &ml_head,
3553 .owner = owner,
3554 .disabled = disabled,
3555 };
3556
3557 QTAILQ_INIT(&ml_head);
3558
3559 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3560 /* Create hashtable, key=AS root MR, value = list of AS */
3561 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3562 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3563 address_space_compare_name);
3564 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3565 }
3566
3567 /* print address spaces */
3568 g_hash_table_foreach(views, mtree_print_as, &asi);
3569 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3570 g_hash_table_unref(views);
3571
3572 /* print aliased regions */
3573 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3574 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3575 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3576 qemu_printf("\n");
3577 }
3578
3579 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3580 g_free(ml);
3581 }
3582 }
3583
3584 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3585 {
3586 if (flatview) {
3587 mtree_info_flatview(dispatch_tree, owner);
3588 } else {
3589 mtree_info_as(dispatch_tree, owner, disabled);
3590 }
3591 }
3592
3593 void memory_region_init_ram(MemoryRegion *mr,
3594 Object *owner,
3595 const char *name,
3596 uint64_t size,
3597 Error **errp)
3598 {
3599 DeviceState *owner_dev;
3600 Error *err = NULL;
3601
3602 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3603 if (err) {
3604 error_propagate(errp, err);
3605 return;
3606 }
3607 /* This will assert if owner is neither NULL nor a DeviceState.
3608 * We only want the owner here for the purposes of defining a
3609 * unique name for migration. TODO: Ideally we should implement
3610 * a naming scheme for Objects which are not DeviceStates, in
3611 * which case we can relax this restriction.
3612 */
3613 owner_dev = DEVICE(owner);
3614 vmstate_register_ram(mr, owner_dev);
3615 }
3616
3617 void memory_region_init_rom(MemoryRegion *mr,
3618 Object *owner,
3619 const char *name,
3620 uint64_t size,
3621 Error **errp)
3622 {
3623 DeviceState *owner_dev;
3624 Error *err = NULL;
3625
3626 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3627 if (err) {
3628 error_propagate(errp, err);
3629 return;
3630 }
3631 /* This will assert if owner is neither NULL nor a DeviceState.
3632 * We only want the owner here for the purposes of defining a
3633 * unique name for migration. TODO: Ideally we should implement
3634 * a naming scheme for Objects which are not DeviceStates, in
3635 * which case we can relax this restriction.
3636 */
3637 owner_dev = DEVICE(owner);
3638 vmstate_register_ram(mr, owner_dev);
3639 }
3640
3641 void memory_region_init_rom_device(MemoryRegion *mr,
3642 Object *owner,
3643 const MemoryRegionOps *ops,
3644 void *opaque,
3645 const char *name,
3646 uint64_t size,
3647 Error **errp)
3648 {
3649 DeviceState *owner_dev;
3650 Error *err = NULL;
3651
3652 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3653 name, size, &err);
3654 if (err) {
3655 error_propagate(errp, err);
3656 return;
3657 }
3658 /* This will assert if owner is neither NULL nor a DeviceState.
3659 * We only want the owner here for the purposes of defining a
3660 * unique name for migration. TODO: Ideally we should implement
3661 * a naming scheme for Objects which are not DeviceStates, in
3662 * which case we can relax this restriction.
3663 */
3664 owner_dev = DEVICE(owner);
3665 vmstate_register_ram(mr, owner_dev);
3666 }
3667
3668 /*
3669 * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
3670 * the fuzz_dma_read_cb callback
3671 */
3672 #ifdef CONFIG_FUZZ
3673 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3674 size_t len,
3675 MemoryRegion *mr)
3676 {
3677 }
3678 #endif
3679
3680 static const TypeInfo memory_region_info = {
3681 .parent = TYPE_OBJECT,
3682 .name = TYPE_MEMORY_REGION,
3683 .class_size = sizeof(MemoryRegionClass),
3684 .instance_size = sizeof(MemoryRegion),
3685 .instance_init = memory_region_initfn,
3686 .instance_finalize = memory_region_finalize,
3687 };
3688
3689 static const TypeInfo iommu_memory_region_info = {
3690 .parent = TYPE_MEMORY_REGION,
3691 .name = TYPE_IOMMU_MEMORY_REGION,
3692 .class_size = sizeof(IOMMUMemoryRegionClass),
3693 .instance_size = sizeof(IOMMUMemoryRegion),
3694 .instance_init = iommu_memory_region_initfn,
3695 .abstract = true,
3696 };
3697
3698 static const TypeInfo ram_discard_manager_info = {
3699 .parent = TYPE_INTERFACE,
3700 .name = TYPE_RAM_DISCARD_MANAGER,
3701 .class_size = sizeof(RamDiscardManagerClass),
3702 };
3703
3704 static void memory_register_types(void)
3705 {
3706 type_register_static(&memory_region_info);
3707 type_register_static(&iommu_memory_region_info);
3708 type_register_static(&ram_discard_manager_info);
3709 }
3710
3711 type_init(memory_register_types)
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