target/arm/cpu-qom.h

   1 /*
   2  * QEMU ARM CPU QOM header (target agnostic)
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_ARM_CPU_QOM_H
  21 #define QEMU_ARM_CPU_QOM_H
  22
  23 #include "hw/core/cpu.h"
  24 #include "qom/object.h"
  25
  26 #define TYPE_ARM_CPU "arm-cpu"
  27
  28 OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
  29
  30 #define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
  31
  32 typedef struct ARMCPUInfo {
  33     const char *name;
  34     void (*initfn)(Object *obj);
  35     void (*class_init)(ObjectClass *oc, void *data);
  36 } ARMCPUInfo;
  37
  38 /**
  39  * ARMCPUClass:
  40  * @parent_realize: The parent class' realize handler.
  41  * @parent_phases: The parent class' reset phase handlers.
  42  *
  43  * An ARM CPU model.
  44  */
  45 struct ARMCPUClass {
  46     CPUClass parent_class;
  47
  48     const ARMCPUInfo *info;
  49     DeviceRealize parent_realize;
  50     ResettablePhases parent_phases;
  51 };
  52
  53
  54 #define TYPE_AARCH64_CPU "aarch64-cpu"
  55 typedef struct AArch64CPUClass AArch64CPUClass;
  56 DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU,
  57                        TYPE_AARCH64_CPU)
  58
  59 struct AArch64CPUClass {
  60     ARMCPUClass parent_class;
  61 };
  62
  63 #endif