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1 /*
2 * ARM implementation of KVM hooks
3 *
4 * Copyright Christoffer Dall 2009-2010
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 */
10
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
13
14 #include <linux/kvm.h>
15
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "sysemu/sysemu.h"
20 #include "sysemu/kvm.h"
21 #include "kvm_arm.h"
22 #include "cpu.h"
23 #include "trace.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
26 #include "hw/pci/pci.h"
27 #include "exec/memattrs.h"
28 #include "exec/address-spaces.h"
29 #include "hw/boards.h"
30 #include "qemu/log.h"
31
32 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
33 KVM_CAP_LAST_INFO
34 };
35
36 static bool cap_has_mp_state;
37
38 static ARMHostCPUFeatures arm_host_cpu_features;
39
40 int kvm_arm_vcpu_init(CPUState *cs)
41 {
42 ARMCPU *cpu = ARM_CPU(cs);
43 struct kvm_vcpu_init init;
44
45 init.target = cpu->kvm_target;
46 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
47
48 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
49 }
50
51 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
52 int *fdarray,
53 struct kvm_vcpu_init *init)
54 {
55 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
56
57 kvmfd = qemu_open("/dev/kvm", O_RDWR);
58 if (kvmfd < 0) {
59 goto err;
60 }
61 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
62 if (vmfd < 0) {
63 goto err;
64 }
65 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
66 if (cpufd < 0) {
67 goto err;
68 }
69
70 if (!init) {
71 /* Caller doesn't want the VCPU to be initialized, so skip it */
72 goto finish;
73 }
74
75 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
76 if (ret >= 0) {
77 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
78 if (ret < 0) {
79 goto err;
80 }
81 } else if (cpus_to_try) {
82 /* Old kernel which doesn't know about the
83 * PREFERRED_TARGET ioctl: we know it will only support
84 * creating one kind of guest CPU which is its preferred
85 * CPU type.
86 */
87 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
88 init->target = *cpus_to_try++;
89 memset(init->features, 0, sizeof(init->features));
90 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
91 if (ret >= 0) {
92 break;
93 }
94 }
95 if (ret < 0) {
96 goto err;
97 }
98 } else {
99 /* Treat a NULL cpus_to_try argument the same as an empty
100 * list, which means we will fail the call since this must
101 * be an old kernel which doesn't support PREFERRED_TARGET.
102 */
103 goto err;
104 }
105
106 finish:
107 fdarray[0] = kvmfd;
108 fdarray[1] = vmfd;
109 fdarray[2] = cpufd;
110
111 return true;
112
113 err:
114 if (cpufd >= 0) {
115 close(cpufd);
116 }
117 if (vmfd >= 0) {
118 close(vmfd);
119 }
120 if (kvmfd >= 0) {
121 close(kvmfd);
122 }
123
124 return false;
125 }
126
127 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
128 {
129 int i;
130
131 for (i = 2; i >= 0; i--) {
132 close(fdarray[i]);
133 }
134 }
135
136 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
137 {
138 CPUARMState *env = &cpu->env;
139
140 if (!arm_host_cpu_features.dtb_compatible) {
141 if (!kvm_enabled() ||
142 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
143 /* We can't report this error yet, so flag that we need to
144 * in arm_cpu_realizefn().
145 */
146 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
147 cpu->host_cpu_probe_failed = true;
148 return;
149 }
150 }
151
152 cpu->kvm_target = arm_host_cpu_features.target;
153 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
154 env->features = arm_host_cpu_features.features;
155 }
156
157 int kvm_arch_init(MachineState *ms, KVMState *s)
158 {
159 /* For ARM interrupt delivery is always asynchronous,
160 * whether we are using an in-kernel VGIC or not.
161 */
162 kvm_async_interrupts_allowed = true;
163
164 /*
165 * PSCI wakes up secondary cores, so we always need to
166 * have vCPUs waiting in kernel space
167 */
168 kvm_halt_in_kernel_allowed = true;
169
170 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
171
172 return 0;
173 }
174
175 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
176 {
177 return cpu->cpu_index;
178 }
179
180 /* We track all the KVM devices which need their memory addresses
181 * passing to the kernel in a list of these structures.
182 * When board init is complete we run through the list and
183 * tell the kernel the base addresses of the memory regions.
184 * We use a MemoryListener to track mapping and unmapping of
185 * the regions during board creation, so the board models don't
186 * need to do anything special for the KVM case.
187 *
188 * Sometimes the address must be OR'ed with some other fields
189 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
190 * @kda_addr_ormask aims at storing the value of those fields.
191 */
192 typedef struct KVMDevice {
193 struct kvm_arm_device_addr kda;
194 struct kvm_device_attr kdattr;
195 uint64_t kda_addr_ormask;
196 MemoryRegion *mr;
197 QSLIST_ENTRY(KVMDevice) entries;
198 int dev_fd;
199 } KVMDevice;
200
201 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
202
203 static void kvm_arm_devlistener_add(MemoryListener *listener,
204 MemoryRegionSection *section)
205 {
206 KVMDevice *kd;
207
208 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
209 if (section->mr == kd->mr) {
210 kd->kda.addr = section->offset_within_address_space;
211 }
212 }
213 }
214
215 static void kvm_arm_devlistener_del(MemoryListener *listener,
216 MemoryRegionSection *section)
217 {
218 KVMDevice *kd;
219
220 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
221 if (section->mr == kd->mr) {
222 kd->kda.addr = -1;
223 }
224 }
225 }
226
227 static MemoryListener devlistener = {
228 .region_add = kvm_arm_devlistener_add,
229 .region_del = kvm_arm_devlistener_del,
230 };
231
232 static void kvm_arm_set_device_addr(KVMDevice *kd)
233 {
234 struct kvm_device_attr *attr = &kd->kdattr;
235 int ret;
236
237 /* If the device control API is available and we have a device fd on the
238 * KVMDevice struct, let's use the newer API
239 */
240 if (kd->dev_fd >= 0) {
241 uint64_t addr = kd->kda.addr;
242
243 addr |= kd->kda_addr_ormask;
244 attr->addr = (uintptr_t)&addr;
245 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
246 } else {
247 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
248 }
249
250 if (ret < 0) {
251 fprintf(stderr, "Failed to set device address: %s\n",
252 strerror(-ret));
253 abort();
254 }
255 }
256
257 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
258 {
259 KVMDevice *kd, *tkd;
260
261 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
262 if (kd->kda.addr != -1) {
263 kvm_arm_set_device_addr(kd);
264 }
265 memory_region_unref(kd->mr);
266 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
267 g_free(kd);
268 }
269 memory_listener_unregister(&devlistener);
270 }
271
272 static Notifier notify = {
273 .notify = kvm_arm_machine_init_done,
274 };
275
276 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
277 uint64_t attr, int dev_fd, uint64_t addr_ormask)
278 {
279 KVMDevice *kd;
280
281 if (!kvm_irqchip_in_kernel()) {
282 return;
283 }
284
285 if (QSLIST_EMPTY(&kvm_devices_head)) {
286 memory_listener_register(&devlistener, &address_space_memory);
287 qemu_add_machine_init_done_notifier(&notify);
288 }
289 kd = g_new0(KVMDevice, 1);
290 kd->mr = mr;
291 kd->kda.id = devid;
292 kd->kda.addr = -1;
293 kd->kdattr.flags = 0;
294 kd->kdattr.group = group;
295 kd->kdattr.attr = attr;
296 kd->dev_fd = dev_fd;
297 kd->kda_addr_ormask = addr_ormask;
298 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
299 memory_region_ref(kd->mr);
300 }
301
302 static int compare_u64(const void *a, const void *b)
303 {
304 if (*(uint64_t *)a > *(uint64_t *)b) {
305 return 1;
306 }
307 if (*(uint64_t *)a < *(uint64_t *)b) {
308 return -1;
309 }
310 return 0;
311 }
312
313 /* Initialize the CPUState's cpreg list according to the kernel's
314 * definition of what CPU registers it knows about (and throw away
315 * the previous TCG-created cpreg list).
316 */
317 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
318 {
319 struct kvm_reg_list rl;
320 struct kvm_reg_list *rlp;
321 int i, ret, arraylen;
322 CPUState *cs = CPU(cpu);
323
324 rl.n = 0;
325 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
326 if (ret != -E2BIG) {
327 return ret;
328 }
329 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
330 rlp->n = rl.n;
331 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
332 if (ret) {
333 goto out;
334 }
335 /* Sort the list we get back from the kernel, since cpreg_tuples
336 * must be in strictly ascending order.
337 */
338 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
339
340 for (i = 0, arraylen = 0; i < rlp->n; i++) {
341 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
342 continue;
343 }
344 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
345 case KVM_REG_SIZE_U32:
346 case KVM_REG_SIZE_U64:
347 break;
348 default:
349 fprintf(stderr, "Can't handle size of register in kernel list\n");
350 ret = -EINVAL;
351 goto out;
352 }
353
354 arraylen++;
355 }
356
357 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
358 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
359 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
360 arraylen);
361 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
362 arraylen);
363 cpu->cpreg_array_len = arraylen;
364 cpu->cpreg_vmstate_array_len = arraylen;
365
366 for (i = 0, arraylen = 0; i < rlp->n; i++) {
367 uint64_t regidx = rlp->reg[i];
368 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
369 continue;
370 }
371 cpu->cpreg_indexes[arraylen] = regidx;
372 arraylen++;
373 }
374 assert(cpu->cpreg_array_len == arraylen);
375
376 if (!write_kvmstate_to_list(cpu)) {
377 /* Shouldn't happen unless kernel is inconsistent about
378 * what registers exist.
379 */
380 fprintf(stderr, "Initial read of kernel register state failed\n");
381 ret = -EINVAL;
382 goto out;
383 }
384
385 out:
386 g_free(rlp);
387 return ret;
388 }
389
390 bool write_kvmstate_to_list(ARMCPU *cpu)
391 {
392 CPUState *cs = CPU(cpu);
393 int i;
394 bool ok = true;
395
396 for (i = 0; i < cpu->cpreg_array_len; i++) {
397 struct kvm_one_reg r;
398 uint64_t regidx = cpu->cpreg_indexes[i];
399 uint32_t v32;
400 int ret;
401
402 r.id = regidx;
403
404 switch (regidx & KVM_REG_SIZE_MASK) {
405 case KVM_REG_SIZE_U32:
406 r.addr = (uintptr_t)&v32;
407 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
408 if (!ret) {
409 cpu->cpreg_values[i] = v32;
410 }
411 break;
412 case KVM_REG_SIZE_U64:
413 r.addr = (uintptr_t)(cpu->cpreg_values + i);
414 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
415 break;
416 default:
417 abort();
418 }
419 if (ret) {
420 ok = false;
421 }
422 }
423 return ok;
424 }
425
426 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
427 {
428 CPUState *cs = CPU(cpu);
429 int i;
430 bool ok = true;
431
432 for (i = 0; i < cpu->cpreg_array_len; i++) {
433 struct kvm_one_reg r;
434 uint64_t regidx = cpu->cpreg_indexes[i];
435 uint32_t v32;
436 int ret;
437
438 if (kvm_arm_cpreg_level(regidx) > level) {
439 continue;
440 }
441
442 r.id = regidx;
443 switch (regidx & KVM_REG_SIZE_MASK) {
444 case KVM_REG_SIZE_U32:
445 v32 = cpu->cpreg_values[i];
446 r.addr = (uintptr_t)&v32;
447 break;
448 case KVM_REG_SIZE_U64:
449 r.addr = (uintptr_t)(cpu->cpreg_values + i);
450 break;
451 default:
452 abort();
453 }
454 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
455 if (ret) {
456 /* We might fail for "unknown register" and also for
457 * "you tried to set a register which is constant with
458 * a different value from what it actually contains".
459 */
460 ok = false;
461 }
462 }
463 return ok;
464 }
465
466 void kvm_arm_reset_vcpu(ARMCPU *cpu)
467 {
468 int ret;
469
470 /* Re-init VCPU so that all registers are set to
471 * their respective reset values.
472 */
473 ret = kvm_arm_vcpu_init(CPU(cpu));
474 if (ret < 0) {
475 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
476 abort();
477 }
478 if (!write_kvmstate_to_list(cpu)) {
479 fprintf(stderr, "write_kvmstate_to_list failed\n");
480 abort();
481 }
482 }
483
484 /*
485 * Update KVM's MP_STATE based on what QEMU thinks it is
486 */
487 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
488 {
489 if (cap_has_mp_state) {
490 struct kvm_mp_state mp_state = {
491 .mp_state = (cpu->power_state == PSCI_OFF) ?
492 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
493 };
494 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
495 if (ret) {
496 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
497 __func__, ret, strerror(-ret));
498 return -1;
499 }
500 }
501
502 return 0;
503 }
504
505 /*
506 * Sync the KVM MP_STATE into QEMU
507 */
508 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
509 {
510 if (cap_has_mp_state) {
511 struct kvm_mp_state mp_state;
512 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
513 if (ret) {
514 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
515 __func__, ret, strerror(-ret));
516 abort();
517 }
518 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
519 PSCI_OFF : PSCI_ON;
520 }
521
522 return 0;
523 }
524
525 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
526 {
527 }
528
529 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
530 {
531 ARMCPU *cpu;
532 uint32_t switched_level;
533
534 if (kvm_irqchip_in_kernel()) {
535 /*
536 * We only need to sync timer states with user-space interrupt
537 * controllers, so return early and save cycles if we don't.
538 */
539 return MEMTXATTRS_UNSPECIFIED;
540 }
541
542 cpu = ARM_CPU(cs);
543
544 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
545 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
546 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
547
548 qemu_mutex_lock_iothread();
549
550 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
551 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
552 !!(run->s.regs.device_irq_level &
553 KVM_ARM_DEV_EL1_VTIMER));
554 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
555 }
556
557 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
558 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
559 !!(run->s.regs.device_irq_level &
560 KVM_ARM_DEV_EL1_PTIMER));
561 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
562 }
563
564 if (switched_level & KVM_ARM_DEV_PMU) {
565 qemu_set_irq(cpu->pmu_interrupt,
566 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
567 switched_level &= ~KVM_ARM_DEV_PMU;
568 }
569
570 if (switched_level) {
571 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
572 __func__, switched_level);
573 }
574
575 /* We also mark unknown levels as processed to not waste cycles */
576 cpu->device_irq_level = run->s.regs.device_irq_level;
577 qemu_mutex_unlock_iothread();
578 }
579
580 return MEMTXATTRS_UNSPECIFIED;
581 }
582
583
584 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
585 {
586 int ret = 0;
587
588 switch (run->exit_reason) {
589 case KVM_EXIT_DEBUG:
590 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
591 ret = EXCP_DEBUG;
592 } /* otherwise return to guest */
593 break;
594 default:
595 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
596 __func__, run->exit_reason);
597 break;
598 }
599 return ret;
600 }
601
602 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
603 {
604 return true;
605 }
606
607 int kvm_arch_process_async_events(CPUState *cs)
608 {
609 return 0;
610 }
611
612 /* The #ifdef protections are until 32bit headers are imported and can
613 * be removed once both 32 and 64 bit reach feature parity.
614 */
615 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
616 {
617 #ifdef KVM_GUESTDBG_USE_SW_BP
618 if (kvm_sw_breakpoints_active(cs)) {
619 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
620 }
621 #endif
622 #ifdef KVM_GUESTDBG_USE_HW
623 if (kvm_arm_hw_debug_active(cs)) {
624 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
625 kvm_arm_copy_hw_debug_data(&dbg->arch);
626 }
627 #endif
628 }
629
630 void kvm_arch_init_irq_routing(KVMState *s)
631 {
632 }
633
634 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
635 {
636 if (machine_kernel_irqchip_split(ms)) {
637 perror("-machine kernel_irqchip=split is not supported on ARM.");
638 exit(1);
639 }
640
641 /* If we can create the VGIC using the newer device control API, we
642 * let the device do this when it initializes itself, otherwise we
643 * fall back to the old API */
644 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
645 }
646
647 int kvm_arm_vgic_probe(void)
648 {
649 if (kvm_create_device(kvm_state,
650 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
651 return 3;
652 } else if (kvm_create_device(kvm_state,
653 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
654 return 2;
655 } else {
656 return 0;
657 }
658 }
659
660 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
661 uint64_t address, uint32_t data, PCIDevice *dev)
662 {
663 AddressSpace *as = pci_device_iommu_address_space(dev);
664 hwaddr xlat, len, doorbell_gpa;
665 MemoryRegionSection mrs;
666 MemoryRegion *mr;
667 int ret = 1;
668
669 if (as == &address_space_memory) {
670 return 0;
671 }
672
673 /* MSI doorbell address is translated by an IOMMU */
674
675 rcu_read_lock();
676 mr = address_space_translate(as, address, &xlat, &len, true,
677 MEMTXATTRS_UNSPECIFIED);
678 if (!mr) {
679 goto unlock;
680 }
681 mrs = memory_region_find(mr, xlat, 1);
682 if (!mrs.mr) {
683 goto unlock;
684 }
685
686 doorbell_gpa = mrs.offset_within_address_space;
687 memory_region_unref(mrs.mr);
688
689 route->u.msi.address_lo = doorbell_gpa;
690 route->u.msi.address_hi = doorbell_gpa >> 32;
691
692 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
693
694 ret = 0;
695
696 unlock:
697 rcu_read_unlock();
698 return ret;
699 }
700
701 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
702 int vector, PCIDevice *dev)
703 {
704 return 0;
705 }
706
707 int kvm_arch_release_virq_post(int virq)
708 {
709 return 0;
710 }
711
712 int kvm_arch_msi_data_to_gsi(uint32_t data)
713 {
714 return (data - 32) & 0xffff;
715 }