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Merge tag 'pull-block-2023-09-01' of https://gitlab.com/hreitz/qemu into staging
[mirror_qemu.git] / target / arm / kvm.c
1 /*
2 * ARM implementation of KVM hooks
3 *
4 * Copyright Christoffer Dall 2009-2010
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 */
10
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
13
14 #include <linux/kvm.h>
15
16 #include "qemu/timer.h"
17 #include "qemu/error-report.h"
18 #include "qemu/main-loop.h"
19 #include "qom/object.h"
20 #include "qapi/error.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/kvm.h"
23 #include "sysemu/kvm_int.h"
24 #include "kvm_arm.h"
25 #include "cpu.h"
26 #include "trace.h"
27 #include "internals.h"
28 #include "hw/pci/pci.h"
29 #include "exec/memattrs.h"
30 #include "exec/address-spaces.h"
31 #include "hw/boards.h"
32 #include "hw/irq.h"
33 #include "qapi/visitor.h"
34 #include "qemu/log.h"
35
36 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
37 KVM_CAP_LAST_INFO
38 };
39
40 static bool cap_has_mp_state;
41 static bool cap_has_inject_serror_esr;
42 static bool cap_has_inject_ext_dabt;
43
44 static ARMHostCPUFeatures arm_host_cpu_features;
45
46 int kvm_arm_vcpu_init(CPUState *cs)
47 {
48 ARMCPU *cpu = ARM_CPU(cs);
49 struct kvm_vcpu_init init;
50
51 init.target = cpu->kvm_target;
52 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
53
54 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
55 }
56
57 int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
58 {
59 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
60 }
61
62 void kvm_arm_init_serror_injection(CPUState *cs)
63 {
64 cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
65 KVM_CAP_ARM_INJECT_SERROR_ESR);
66 }
67
68 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
69 int *fdarray,
70 struct kvm_vcpu_init *init)
71 {
72 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
73 int max_vm_pa_size;
74
75 kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
76 if (kvmfd < 0) {
77 goto err;
78 }
79 max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE);
80 if (max_vm_pa_size < 0) {
81 max_vm_pa_size = 0;
82 }
83 do {
84 vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size);
85 } while (vmfd == -1 && errno == EINTR);
86 if (vmfd < 0) {
87 goto err;
88 }
89 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
90 if (cpufd < 0) {
91 goto err;
92 }
93
94 if (!init) {
95 /* Caller doesn't want the VCPU to be initialized, so skip it */
96 goto finish;
97 }
98
99 if (init->target == -1) {
100 struct kvm_vcpu_init preferred;
101
102 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
103 if (!ret) {
104 init->target = preferred.target;
105 }
106 }
107 if (ret >= 0) {
108 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
109 if (ret < 0) {
110 goto err;
111 }
112 } else if (cpus_to_try) {
113 /* Old kernel which doesn't know about the
114 * PREFERRED_TARGET ioctl: we know it will only support
115 * creating one kind of guest CPU which is its preferred
116 * CPU type.
117 */
118 struct kvm_vcpu_init try;
119
120 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
121 try.target = *cpus_to_try++;
122 memcpy(try.features, init->features, sizeof(init->features));
123 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
124 if (ret >= 0) {
125 break;
126 }
127 }
128 if (ret < 0) {
129 goto err;
130 }
131 init->target = try.target;
132 } else {
133 /* Treat a NULL cpus_to_try argument the same as an empty
134 * list, which means we will fail the call since this must
135 * be an old kernel which doesn't support PREFERRED_TARGET.
136 */
137 goto err;
138 }
139
140 finish:
141 fdarray[0] = kvmfd;
142 fdarray[1] = vmfd;
143 fdarray[2] = cpufd;
144
145 return true;
146
147 err:
148 if (cpufd >= 0) {
149 close(cpufd);
150 }
151 if (vmfd >= 0) {
152 close(vmfd);
153 }
154 if (kvmfd >= 0) {
155 close(kvmfd);
156 }
157
158 return false;
159 }
160
161 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
162 {
163 int i;
164
165 for (i = 2; i >= 0; i--) {
166 close(fdarray[i]);
167 }
168 }
169
170 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
171 {
172 CPUARMState *env = &cpu->env;
173
174 if (!arm_host_cpu_features.dtb_compatible) {
175 if (!kvm_enabled() ||
176 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
177 /* We can't report this error yet, so flag that we need to
178 * in arm_cpu_realizefn().
179 */
180 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
181 cpu->host_cpu_probe_failed = true;
182 return;
183 }
184 }
185
186 cpu->kvm_target = arm_host_cpu_features.target;
187 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
188 cpu->isar = arm_host_cpu_features.isar;
189 env->features = arm_host_cpu_features.features;
190 }
191
192 static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
193 {
194 return !ARM_CPU(obj)->kvm_adjvtime;
195 }
196
197 static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
198 {
199 ARM_CPU(obj)->kvm_adjvtime = !value;
200 }
201
202 static bool kvm_steal_time_get(Object *obj, Error **errp)
203 {
204 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
205 }
206
207 static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
208 {
209 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
210 }
211
212 /* KVM VCPU properties should be prefixed with "kvm-". */
213 void kvm_arm_add_vcpu_properties(Object *obj)
214 {
215 ARMCPU *cpu = ARM_CPU(obj);
216 CPUARMState *env = &cpu->env;
217
218 if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
219 cpu->kvm_adjvtime = true;
220 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
221 kvm_no_adjvtime_set);
222 object_property_set_description(obj, "kvm-no-adjvtime",
223 "Set on to disable the adjustment of "
224 "the virtual counter. VM stopped time "
225 "will be counted.");
226 }
227
228 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
229 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
230 kvm_steal_time_set);
231 object_property_set_description(obj, "kvm-steal-time",
232 "Set off to disable KVM steal time.");
233 }
234
235 bool kvm_arm_pmu_supported(void)
236 {
237 return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
238 }
239
240 int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
241 {
242 KVMState *s = KVM_STATE(ms->accelerator);
243 int ret;
244
245 ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
246 *fixed_ipa = ret <= 0;
247
248 return ret > 0 ? ret : 40;
249 }
250
251 int kvm_arch_get_default_type(MachineState *ms)
252 {
253 bool fixed_ipa;
254 int size = kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa);
255 return fixed_ipa ? 0 : size;
256 }
257
258 int kvm_arch_init(MachineState *ms, KVMState *s)
259 {
260 int ret = 0;
261 /* For ARM interrupt delivery is always asynchronous,
262 * whether we are using an in-kernel VGIC or not.
263 */
264 kvm_async_interrupts_allowed = true;
265
266 /*
267 * PSCI wakes up secondary cores, so we always need to
268 * have vCPUs waiting in kernel space
269 */
270 kvm_halt_in_kernel_allowed = true;
271
272 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
273
274 if (ms->smp.cpus > 256 &&
275 !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
276 error_report("Using more than 256 vcpus requires a host kernel "
277 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
278 ret = -EINVAL;
279 }
280
281 if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
282 if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
283 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
284 } else {
285 /* Set status for supporting the external dabt injection */
286 cap_has_inject_ext_dabt = kvm_check_extension(s,
287 KVM_CAP_ARM_INJECT_EXT_DABT);
288 }
289 }
290
291 if (s->kvm_eager_split_size) {
292 uint32_t sizes;
293
294 sizes = kvm_vm_check_extension(s, KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES);
295 if (!sizes) {
296 s->kvm_eager_split_size = 0;
297 warn_report("Eager Page Split support not available");
298 } else if (!(s->kvm_eager_split_size & sizes)) {
299 error_report("Eager Page Split requested chunk size not valid");
300 ret = -EINVAL;
301 } else {
302 ret = kvm_vm_enable_cap(s, KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE, 0,
303 s->kvm_eager_split_size);
304 if (ret < 0) {
305 error_report("Enabling of Eager Page Split failed: %s",
306 strerror(-ret));
307 }
308 }
309 }
310
311 kvm_arm_init_debug(s);
312
313 return ret;
314 }
315
316 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
317 {
318 return cpu->cpu_index;
319 }
320
321 /* We track all the KVM devices which need their memory addresses
322 * passing to the kernel in a list of these structures.
323 * When board init is complete we run through the list and
324 * tell the kernel the base addresses of the memory regions.
325 * We use a MemoryListener to track mapping and unmapping of
326 * the regions during board creation, so the board models don't
327 * need to do anything special for the KVM case.
328 *
329 * Sometimes the address must be OR'ed with some other fields
330 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
331 * @kda_addr_ormask aims at storing the value of those fields.
332 */
333 typedef struct KVMDevice {
334 struct kvm_arm_device_addr kda;
335 struct kvm_device_attr kdattr;
336 uint64_t kda_addr_ormask;
337 MemoryRegion *mr;
338 QSLIST_ENTRY(KVMDevice) entries;
339 int dev_fd;
340 } KVMDevice;
341
342 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
343
344 static void kvm_arm_devlistener_add(MemoryListener *listener,
345 MemoryRegionSection *section)
346 {
347 KVMDevice *kd;
348
349 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
350 if (section->mr == kd->mr) {
351 kd->kda.addr = section->offset_within_address_space;
352 }
353 }
354 }
355
356 static void kvm_arm_devlistener_del(MemoryListener *listener,
357 MemoryRegionSection *section)
358 {
359 KVMDevice *kd;
360
361 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
362 if (section->mr == kd->mr) {
363 kd->kda.addr = -1;
364 }
365 }
366 }
367
368 static MemoryListener devlistener = {
369 .name = "kvm-arm",
370 .region_add = kvm_arm_devlistener_add,
371 .region_del = kvm_arm_devlistener_del,
372 .priority = MEMORY_LISTENER_PRIORITY_MIN,
373 };
374
375 static void kvm_arm_set_device_addr(KVMDevice *kd)
376 {
377 struct kvm_device_attr *attr = &kd->kdattr;
378 int ret;
379
380 /* If the device control API is available and we have a device fd on the
381 * KVMDevice struct, let's use the newer API
382 */
383 if (kd->dev_fd >= 0) {
384 uint64_t addr = kd->kda.addr;
385
386 addr |= kd->kda_addr_ormask;
387 attr->addr = (uintptr_t)&addr;
388 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
389 } else {
390 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
391 }
392
393 if (ret < 0) {
394 fprintf(stderr, "Failed to set device address: %s\n",
395 strerror(-ret));
396 abort();
397 }
398 }
399
400 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
401 {
402 KVMDevice *kd, *tkd;
403
404 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
405 if (kd->kda.addr != -1) {
406 kvm_arm_set_device_addr(kd);
407 }
408 memory_region_unref(kd->mr);
409 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
410 g_free(kd);
411 }
412 memory_listener_unregister(&devlistener);
413 }
414
415 static Notifier notify = {
416 .notify = kvm_arm_machine_init_done,
417 };
418
419 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
420 uint64_t attr, int dev_fd, uint64_t addr_ormask)
421 {
422 KVMDevice *kd;
423
424 if (!kvm_irqchip_in_kernel()) {
425 return;
426 }
427
428 if (QSLIST_EMPTY(&kvm_devices_head)) {
429 memory_listener_register(&devlistener, &address_space_memory);
430 qemu_add_machine_init_done_notifier(&notify);
431 }
432 kd = g_new0(KVMDevice, 1);
433 kd->mr = mr;
434 kd->kda.id = devid;
435 kd->kda.addr = -1;
436 kd->kdattr.flags = 0;
437 kd->kdattr.group = group;
438 kd->kdattr.attr = attr;
439 kd->dev_fd = dev_fd;
440 kd->kda_addr_ormask = addr_ormask;
441 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
442 memory_region_ref(kd->mr);
443 }
444
445 static int compare_u64(const void *a, const void *b)
446 {
447 if (*(uint64_t *)a > *(uint64_t *)b) {
448 return 1;
449 }
450 if (*(uint64_t *)a < *(uint64_t *)b) {
451 return -1;
452 }
453 return 0;
454 }
455
456 /*
457 * cpreg_values are sorted in ascending order by KVM register ID
458 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
459 * the storage for a KVM register by ID with a binary search.
460 */
461 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
462 {
463 uint64_t *res;
464
465 res = bsearch(&regidx, cpu->cpreg_indexes, cpu->cpreg_array_len,
466 sizeof(uint64_t), compare_u64);
467 assert(res);
468
469 return &cpu->cpreg_values[res - cpu->cpreg_indexes];
470 }
471
472 /* Initialize the ARMCPU cpreg list according to the kernel's
473 * definition of what CPU registers it knows about (and throw away
474 * the previous TCG-created cpreg list).
475 */
476 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
477 {
478 struct kvm_reg_list rl;
479 struct kvm_reg_list *rlp;
480 int i, ret, arraylen;
481 CPUState *cs = CPU(cpu);
482
483 rl.n = 0;
484 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
485 if (ret != -E2BIG) {
486 return ret;
487 }
488 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
489 rlp->n = rl.n;
490 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
491 if (ret) {
492 goto out;
493 }
494 /* Sort the list we get back from the kernel, since cpreg_tuples
495 * must be in strictly ascending order.
496 */
497 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
498
499 for (i = 0, arraylen = 0; i < rlp->n; i++) {
500 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
501 continue;
502 }
503 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
504 case KVM_REG_SIZE_U32:
505 case KVM_REG_SIZE_U64:
506 break;
507 default:
508 fprintf(stderr, "Can't handle size of register in kernel list\n");
509 ret = -EINVAL;
510 goto out;
511 }
512
513 arraylen++;
514 }
515
516 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
517 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
518 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
519 arraylen);
520 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
521 arraylen);
522 cpu->cpreg_array_len = arraylen;
523 cpu->cpreg_vmstate_array_len = arraylen;
524
525 for (i = 0, arraylen = 0; i < rlp->n; i++) {
526 uint64_t regidx = rlp->reg[i];
527 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
528 continue;
529 }
530 cpu->cpreg_indexes[arraylen] = regidx;
531 arraylen++;
532 }
533 assert(cpu->cpreg_array_len == arraylen);
534
535 if (!write_kvmstate_to_list(cpu)) {
536 /* Shouldn't happen unless kernel is inconsistent about
537 * what registers exist.
538 */
539 fprintf(stderr, "Initial read of kernel register state failed\n");
540 ret = -EINVAL;
541 goto out;
542 }
543
544 out:
545 g_free(rlp);
546 return ret;
547 }
548
549 bool write_kvmstate_to_list(ARMCPU *cpu)
550 {
551 CPUState *cs = CPU(cpu);
552 int i;
553 bool ok = true;
554
555 for (i = 0; i < cpu->cpreg_array_len; i++) {
556 struct kvm_one_reg r;
557 uint64_t regidx = cpu->cpreg_indexes[i];
558 uint32_t v32;
559 int ret;
560
561 r.id = regidx;
562
563 switch (regidx & KVM_REG_SIZE_MASK) {
564 case KVM_REG_SIZE_U32:
565 r.addr = (uintptr_t)&v32;
566 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
567 if (!ret) {
568 cpu->cpreg_values[i] = v32;
569 }
570 break;
571 case KVM_REG_SIZE_U64:
572 r.addr = (uintptr_t)(cpu->cpreg_values + i);
573 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
574 break;
575 default:
576 g_assert_not_reached();
577 }
578 if (ret) {
579 ok = false;
580 }
581 }
582 return ok;
583 }
584
585 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
586 {
587 CPUState *cs = CPU(cpu);
588 int i;
589 bool ok = true;
590
591 for (i = 0; i < cpu->cpreg_array_len; i++) {
592 struct kvm_one_reg r;
593 uint64_t regidx = cpu->cpreg_indexes[i];
594 uint32_t v32;
595 int ret;
596
597 if (kvm_arm_cpreg_level(regidx) > level) {
598 continue;
599 }
600
601 r.id = regidx;
602 switch (regidx & KVM_REG_SIZE_MASK) {
603 case KVM_REG_SIZE_U32:
604 v32 = cpu->cpreg_values[i];
605 r.addr = (uintptr_t)&v32;
606 break;
607 case KVM_REG_SIZE_U64:
608 r.addr = (uintptr_t)(cpu->cpreg_values + i);
609 break;
610 default:
611 g_assert_not_reached();
612 }
613 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
614 if (ret) {
615 /* We might fail for "unknown register" and also for
616 * "you tried to set a register which is constant with
617 * a different value from what it actually contains".
618 */
619 ok = false;
620 }
621 }
622 return ok;
623 }
624
625 void kvm_arm_cpu_pre_save(ARMCPU *cpu)
626 {
627 /* KVM virtual time adjustment */
628 if (cpu->kvm_vtime_dirty) {
629 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
630 }
631 }
632
633 void kvm_arm_cpu_post_load(ARMCPU *cpu)
634 {
635 /* KVM virtual time adjustment */
636 if (cpu->kvm_adjvtime) {
637 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
638 cpu->kvm_vtime_dirty = true;
639 }
640 }
641
642 void kvm_arm_reset_vcpu(ARMCPU *cpu)
643 {
644 int ret;
645
646 /* Re-init VCPU so that all registers are set to
647 * their respective reset values.
648 */
649 ret = kvm_arm_vcpu_init(CPU(cpu));
650 if (ret < 0) {
651 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
652 abort();
653 }
654 if (!write_kvmstate_to_list(cpu)) {
655 fprintf(stderr, "write_kvmstate_to_list failed\n");
656 abort();
657 }
658 /*
659 * Sync the reset values also into the CPUState. This is necessary
660 * because the next thing we do will be a kvm_arch_put_registers()
661 * which will update the list values from the CPUState before copying
662 * the list values back to KVM. It's OK to ignore failure returns here
663 * for the same reason we do so in kvm_arch_get_registers().
664 */
665 write_list_to_cpustate(cpu);
666 }
667
668 /*
669 * Update KVM's MP_STATE based on what QEMU thinks it is
670 */
671 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
672 {
673 if (cap_has_mp_state) {
674 struct kvm_mp_state mp_state = {
675 .mp_state = (cpu->power_state == PSCI_OFF) ?
676 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
677 };
678 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
679 if (ret) {
680 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
681 __func__, ret, strerror(-ret));
682 return -1;
683 }
684 }
685
686 return 0;
687 }
688
689 /*
690 * Sync the KVM MP_STATE into QEMU
691 */
692 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
693 {
694 if (cap_has_mp_state) {
695 struct kvm_mp_state mp_state;
696 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
697 if (ret) {
698 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
699 __func__, ret, strerror(-ret));
700 abort();
701 }
702 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
703 PSCI_OFF : PSCI_ON;
704 }
705
706 return 0;
707 }
708
709 void kvm_arm_get_virtual_time(CPUState *cs)
710 {
711 ARMCPU *cpu = ARM_CPU(cs);
712 struct kvm_one_reg reg = {
713 .id = KVM_REG_ARM_TIMER_CNT,
714 .addr = (uintptr_t)&cpu->kvm_vtime,
715 };
716 int ret;
717
718 if (cpu->kvm_vtime_dirty) {
719 return;
720 }
721
722 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
723 if (ret) {
724 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
725 abort();
726 }
727
728 cpu->kvm_vtime_dirty = true;
729 }
730
731 void kvm_arm_put_virtual_time(CPUState *cs)
732 {
733 ARMCPU *cpu = ARM_CPU(cs);
734 struct kvm_one_reg reg = {
735 .id = KVM_REG_ARM_TIMER_CNT,
736 .addr = (uintptr_t)&cpu->kvm_vtime,
737 };
738 int ret;
739
740 if (!cpu->kvm_vtime_dirty) {
741 return;
742 }
743
744 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
745 if (ret) {
746 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
747 abort();
748 }
749
750 cpu->kvm_vtime_dirty = false;
751 }
752
753 int kvm_put_vcpu_events(ARMCPU *cpu)
754 {
755 CPUARMState *env = &cpu->env;
756 struct kvm_vcpu_events events;
757 int ret;
758
759 if (!kvm_has_vcpu_events()) {
760 return 0;
761 }
762
763 memset(&events, 0, sizeof(events));
764 events.exception.serror_pending = env->serror.pending;
765
766 /* Inject SError to guest with specified syndrome if host kernel
767 * supports it, otherwise inject SError without syndrome.
768 */
769 if (cap_has_inject_serror_esr) {
770 events.exception.serror_has_esr = env->serror.has_esr;
771 events.exception.serror_esr = env->serror.esr;
772 }
773
774 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
775 if (ret) {
776 error_report("failed to put vcpu events");
777 }
778
779 return ret;
780 }
781
782 int kvm_get_vcpu_events(ARMCPU *cpu)
783 {
784 CPUARMState *env = &cpu->env;
785 struct kvm_vcpu_events events;
786 int ret;
787
788 if (!kvm_has_vcpu_events()) {
789 return 0;
790 }
791
792 memset(&events, 0, sizeof(events));
793 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
794 if (ret) {
795 error_report("failed to get vcpu events");
796 return ret;
797 }
798
799 env->serror.pending = events.exception.serror_pending;
800 env->serror.has_esr = events.exception.serror_has_esr;
801 env->serror.esr = events.exception.serror_esr;
802
803 return 0;
804 }
805
806 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
807 {
808 ARMCPU *cpu = ARM_CPU(cs);
809 CPUARMState *env = &cpu->env;
810
811 if (unlikely(env->ext_dabt_raised)) {
812 /*
813 * Verifying that the ext DABT has been properly injected,
814 * otherwise risking indefinitely re-running the faulting instruction
815 * Covering a very narrow case for kernels 5.5..5.5.4
816 * when injected abort was misconfigured to be
817 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
818 */
819 if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
820 unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
821
822 error_report("Data abort exception with no valid ISS generated by "
823 "guest memory access. KVM unable to emulate faulting "
824 "instruction. Failed to inject an external data abort "
825 "into the guest.");
826 abort();
827 }
828 /* Clear the status */
829 env->ext_dabt_raised = 0;
830 }
831 }
832
833 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
834 {
835 ARMCPU *cpu;
836 uint32_t switched_level;
837
838 if (kvm_irqchip_in_kernel()) {
839 /*
840 * We only need to sync timer states with user-space interrupt
841 * controllers, so return early and save cycles if we don't.
842 */
843 return MEMTXATTRS_UNSPECIFIED;
844 }
845
846 cpu = ARM_CPU(cs);
847
848 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
849 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
850 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
851
852 qemu_mutex_lock_iothread();
853
854 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
855 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
856 !!(run->s.regs.device_irq_level &
857 KVM_ARM_DEV_EL1_VTIMER));
858 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
859 }
860
861 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
862 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
863 !!(run->s.regs.device_irq_level &
864 KVM_ARM_DEV_EL1_PTIMER));
865 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
866 }
867
868 if (switched_level & KVM_ARM_DEV_PMU) {
869 qemu_set_irq(cpu->pmu_interrupt,
870 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
871 switched_level &= ~KVM_ARM_DEV_PMU;
872 }
873
874 if (switched_level) {
875 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
876 __func__, switched_level);
877 }
878
879 /* We also mark unknown levels as processed to not waste cycles */
880 cpu->device_irq_level = run->s.regs.device_irq_level;
881 qemu_mutex_unlock_iothread();
882 }
883
884 return MEMTXATTRS_UNSPECIFIED;
885 }
886
887 void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
888 {
889 CPUState *cs = opaque;
890 ARMCPU *cpu = ARM_CPU(cs);
891
892 if (running) {
893 if (cpu->kvm_adjvtime) {
894 kvm_arm_put_virtual_time(cs);
895 }
896 } else {
897 if (cpu->kvm_adjvtime) {
898 kvm_arm_get_virtual_time(cs);
899 }
900 }
901 }
902
903 /**
904 * kvm_arm_handle_dabt_nisv:
905 * @cs: CPUState
906 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
907 * ISV bit set to '0b0' -> no valid instruction syndrome
908 * @fault_ipa: faulting address for the synchronous data abort
909 *
910 * Returns: 0 if the exception has been handled, < 0 otherwise
911 */
912 static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
913 uint64_t fault_ipa)
914 {
915 ARMCPU *cpu = ARM_CPU(cs);
916 CPUARMState *env = &cpu->env;
917 /*
918 * Request KVM to inject the external data abort into the guest
919 */
920 if (cap_has_inject_ext_dabt) {
921 struct kvm_vcpu_events events = { };
922 /*
923 * The external data abort event will be handled immediately by KVM
924 * using the address fault that triggered the exit on given VCPU.
925 * Requesting injection of the external data abort does not rely
926 * on any other VCPU state. Therefore, in this particular case, the VCPU
927 * synchronization can be exceptionally skipped.
928 */
929 events.exception.ext_dabt_pending = 1;
930 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
931 if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
932 env->ext_dabt_raised = 1;
933 return 0;
934 }
935 } else {
936 error_report("Data abort exception triggered by guest memory access "
937 "at physical address: 0x" TARGET_FMT_lx,
938 (target_ulong)fault_ipa);
939 error_printf("KVM unable to emulate faulting instruction.\n");
940 }
941 return -1;
942 }
943
944 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
945 {
946 int ret = 0;
947
948 switch (run->exit_reason) {
949 case KVM_EXIT_DEBUG:
950 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
951 ret = EXCP_DEBUG;
952 } /* otherwise return to guest */
953 break;
954 case KVM_EXIT_ARM_NISV:
955 /* External DABT with no valid iss to decode */
956 ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
957 run->arm_nisv.fault_ipa);
958 break;
959 default:
960 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
961 __func__, run->exit_reason);
962 break;
963 }
964 return ret;
965 }
966
967 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
968 {
969 return true;
970 }
971
972 int kvm_arch_process_async_events(CPUState *cs)
973 {
974 return 0;
975 }
976
977 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
978 {
979 if (kvm_sw_breakpoints_active(cs)) {
980 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
981 }
982 if (kvm_arm_hw_debug_active(cs)) {
983 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
984 kvm_arm_copy_hw_debug_data(&dbg->arch);
985 }
986 }
987
988 void kvm_arch_init_irq_routing(KVMState *s)
989 {
990 }
991
992 int kvm_arch_irqchip_create(KVMState *s)
993 {
994 if (kvm_kernel_irqchip_split()) {
995 error_report("-machine kernel_irqchip=split is not supported on ARM.");
996 exit(1);
997 }
998
999 /* If we can create the VGIC using the newer device control API, we
1000 * let the device do this when it initializes itself, otherwise we
1001 * fall back to the old API */
1002 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
1003 }
1004
1005 int kvm_arm_vgic_probe(void)
1006 {
1007 int val = 0;
1008
1009 if (kvm_create_device(kvm_state,
1010 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
1011 val |= KVM_ARM_VGIC_V3;
1012 }
1013 if (kvm_create_device(kvm_state,
1014 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
1015 val |= KVM_ARM_VGIC_V2;
1016 }
1017 return val;
1018 }
1019
1020 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
1021 {
1022 int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
1023 int cpu_idx1 = cpu % 256;
1024 int cpu_idx2 = cpu / 256;
1025
1026 kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
1027 (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
1028
1029 return kvm_set_irq(kvm_state, kvm_irq, !!level);
1030 }
1031
1032 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
1033 uint64_t address, uint32_t data, PCIDevice *dev)
1034 {
1035 AddressSpace *as = pci_device_iommu_address_space(dev);
1036 hwaddr xlat, len, doorbell_gpa;
1037 MemoryRegionSection mrs;
1038 MemoryRegion *mr;
1039
1040 if (as == &address_space_memory) {
1041 return 0;
1042 }
1043
1044 /* MSI doorbell address is translated by an IOMMU */
1045
1046 RCU_READ_LOCK_GUARD();
1047
1048 mr = address_space_translate(as, address, &xlat, &len, true,
1049 MEMTXATTRS_UNSPECIFIED);
1050
1051 if (!mr) {
1052 return 1;
1053 }
1054
1055 mrs = memory_region_find(mr, xlat, 1);
1056
1057 if (!mrs.mr) {
1058 return 1;
1059 }
1060
1061 doorbell_gpa = mrs.offset_within_address_space;
1062 memory_region_unref(mrs.mr);
1063
1064 route->u.msi.address_lo = doorbell_gpa;
1065 route->u.msi.address_hi = doorbell_gpa >> 32;
1066
1067 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1068
1069 return 0;
1070 }
1071
1072 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1073 int vector, PCIDevice *dev)
1074 {
1075 return 0;
1076 }
1077
1078 int kvm_arch_release_virq_post(int virq)
1079 {
1080 return 0;
1081 }
1082
1083 int kvm_arch_msi_data_to_gsi(uint32_t data)
1084 {
1085 return (data - 32) & 0xffff;
1086 }
1087
1088 bool kvm_arch_cpu_check_are_resettable(void)
1089 {
1090 return true;
1091 }
1092
1093 static void kvm_arch_get_eager_split_size(Object *obj, Visitor *v,
1094 const char *name, void *opaque,
1095 Error **errp)
1096 {
1097 KVMState *s = KVM_STATE(obj);
1098 uint64_t value = s->kvm_eager_split_size;
1099
1100 visit_type_size(v, name, &value, errp);
1101 }
1102
1103 static void kvm_arch_set_eager_split_size(Object *obj, Visitor *v,
1104 const char *name, void *opaque,
1105 Error **errp)
1106 {
1107 KVMState *s = KVM_STATE(obj);
1108 uint64_t value;
1109
1110 if (s->fd != -1) {
1111 error_setg(errp, "Unable to set early-split-size after KVM has been initialized");
1112 return;
1113 }
1114
1115 if (!visit_type_size(v, name, &value, errp)) {
1116 return;
1117 }
1118
1119 if (value && !is_power_of_2(value)) {
1120 error_setg(errp, "early-split-size must be a power of two");
1121 return;
1122 }
1123
1124 s->kvm_eager_split_size = value;
1125 }
1126
1127 void kvm_arch_accel_class_init(ObjectClass *oc)
1128 {
1129 object_class_property_add(oc, "eager-split-size", "size",
1130 kvm_arch_get_eager_split_size,
1131 kvm_arch_set_eager_split_size, NULL, NULL);
1132
1133 object_class_property_set_description(oc, "eager-split-size",
1134 "Eager Page Split chunk size for hugepages. (default: 0, disabled)");
1135 }