target/arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include <sys/ioctl.h>
  13
  14 #include <linux/kvm.h>
  15
  16 #include "qemu-common.h"
  17 #include "qemu/timer.h"
  18 #include "qemu/error-report.h"
  19 #include "qemu/main-loop.h"
  20 #include "sysemu/sysemu.h"
  21 #include "sysemu/kvm.h"
  22 #include "sysemu/kvm_int.h"
  23 #include "kvm_arm.h"
  24 #include "cpu.h"
  25 #include "trace.h"
  26 #include "internals.h"
  27 #include "hw/pci/pci.h"
  28 #include "exec/memattrs.h"
  29 #include "exec/address-spaces.h"
  30 #include "hw/boards.h"
  31 #include "hw/irq.h"
  32 #include "qemu/log.h"
  33
  34 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  35     KVM_CAP_LAST_INFO
  36 };
  37
  38 static bool cap_has_mp_state;
  39 static bool cap_has_inject_serror_esr;
  40
  41 static ARMHostCPUFeatures arm_host_cpu_features;
  42
  43 int kvm_arm_vcpu_init(CPUState *cs)
  44 {
  45     ARMCPU *cpu = ARM_CPU(cs);
  46     struct kvm_vcpu_init init;
  47
  48     init.target = cpu->kvm_target;
  49     memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
  50
  51     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  52 }
  53
  54 void kvm_arm_init_serror_injection(CPUState *cs)
  55 {
  56     cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
  57                                     KVM_CAP_ARM_INJECT_SERROR_ESR);
  58 }
  59
  60 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
  61                                       int *fdarray,
  62                                       struct kvm_vcpu_init *init)
  63 {
  64     int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
  65
  66     kvmfd = qemu_open("/dev/kvm", O_RDWR);
  67     if (kvmfd < 0) {
  68         goto err;
  69     }
  70     vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
  71     if (vmfd < 0) {
  72         goto err;
  73     }
  74     cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
  75     if (cpufd < 0) {
  76         goto err;
  77     }
  78
  79     if (!init) {
  80         /* Caller doesn't want the VCPU to be initialized, so skip it */
  81         goto finish;
  82     }
  83
  84     ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
  85     if (ret >= 0) {
  86         ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
  87         if (ret < 0) {
  88             goto err;
  89         }
  90     } else if (cpus_to_try) {
  91         /* Old kernel which doesn't know about the
  92          * PREFERRED_TARGET ioctl: we know it will only support
  93          * creating one kind of guest CPU which is its preferred
  94          * CPU type.
  95          */
  96         while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
  97             init->target = *cpus_to_try++;
  98             memset(init->features, 0, sizeof(init->features));
  99             ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
 100             if (ret >= 0) {
 101                 break;
 102             }
 103         }
 104         if (ret < 0) {
 105             goto err;
 106         }
 107     } else {
 108         /* Treat a NULL cpus_to_try argument the same as an empty
 109          * list, which means we will fail the call since this must
 110          * be an old kernel which doesn't support PREFERRED_TARGET.
 111          */
 112         goto err;
 113     }
 114
 115 finish:
 116     fdarray[0] = kvmfd;
 117     fdarray[1] = vmfd;
 118     fdarray[2] = cpufd;
 119
 120     return true;
 121
 122 err:
 123     if (cpufd >= 0) {
 124         close(cpufd);
 125     }
 126     if (vmfd >= 0) {
 127         close(vmfd);
 128     }
 129     if (kvmfd >= 0) {
 130         close(kvmfd);
 131     }
 132
 133     return false;
 134 }
 135
 136 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
 137 {
 138     int i;
 139
 140     for (i = 2; i >= 0; i--) {
 141         close(fdarray[i]);
 142     }
 143 }
 144
 145 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
 146 {
 147     CPUARMState *env = &cpu->env;
 148
 149     if (!arm_host_cpu_features.dtb_compatible) {
 150         if (!kvm_enabled() ||
 151             !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
 152             /* We can't report this error yet, so flag that we need to
 153              * in arm_cpu_realizefn().
 154              */
 155             cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
 156             cpu->host_cpu_probe_failed = true;
 157             return;
 158         }
 159     }
 160
 161     cpu->kvm_target = arm_host_cpu_features.target;
 162     cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
 163     cpu->isar = arm_host_cpu_features.isar;
 164     env->features = arm_host_cpu_features.features;
 165 }
 166
 167 bool kvm_arm_pmu_supported(CPUState *cpu)
 168 {
 169     KVMState *s = KVM_STATE(current_machine->accelerator);
 170
 171     return kvm_check_extension(s, KVM_CAP_ARM_PMU_V3);
 172 }
 173
 174 int kvm_arm_get_max_vm_ipa_size(MachineState *ms)
 175 {
 176     KVMState *s = KVM_STATE(ms->accelerator);
 177     int ret;
 178
 179     ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
 180     return ret > 0 ? ret : 40;
 181 }
 182
 183 int kvm_arch_init(MachineState *ms, KVMState *s)
 184 {
 185     int ret = 0;
 186     /* For ARM interrupt delivery is always asynchronous,
 187      * whether we are using an in-kernel VGIC or not.
 188      */
 189     kvm_async_interrupts_allowed = true;
 190
 191     /*
 192      * PSCI wakes up secondary cores, so we always need to
 193      * have vCPUs waiting in kernel space
 194      */
 195     kvm_halt_in_kernel_allowed = true;
 196
 197     cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
 198
 199     if (ms->smp.cpus > 256 &&
 200         !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
 201         error_report("Using more than 256 vcpus requires a host kernel "
 202                      "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
 203         ret = -EINVAL;
 204     }
 205
 206     return ret;
 207 }
 208
 209 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
 210 {
 211     return cpu->cpu_index;
 212 }
 213
 214 /* We track all the KVM devices which need their memory addresses
 215  * passing to the kernel in a list of these structures.
 216  * When board init is complete we run through the list and
 217  * tell the kernel the base addresses of the memory regions.
 218  * We use a MemoryListener to track mapping and unmapping of
 219  * the regions during board creation, so the board models don't
 220  * need to do anything special for the KVM case.
 221  *
 222  * Sometimes the address must be OR'ed with some other fields
 223  * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
 224  * @kda_addr_ormask aims at storing the value of those fields.
 225  */
 226 typedef struct KVMDevice {
 227     struct kvm_arm_device_addr kda;
 228     struct kvm_device_attr kdattr;
 229     uint64_t kda_addr_ormask;
 230     MemoryRegion *mr;
 231     QSLIST_ENTRY(KVMDevice) entries;
 232     int dev_fd;
 233 } KVMDevice;
 234
 235 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
 236
 237 static void kvm_arm_devlistener_add(MemoryListener *listener,
 238                                     MemoryRegionSection *section)
 239 {
 240     KVMDevice *kd;
 241
 242     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 243         if (section->mr == kd->mr) {
 244             kd->kda.addr = section->offset_within_address_space;
 245         }
 246     }
 247 }
 248
 249 static void kvm_arm_devlistener_del(MemoryListener *listener,
 250                                     MemoryRegionSection *section)
 251 {
 252     KVMDevice *kd;
 253
 254     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 255         if (section->mr == kd->mr) {
 256             kd->kda.addr = -1;
 257         }
 258     }
 259 }
 260
 261 static MemoryListener devlistener = {
 262     .region_add = kvm_arm_devlistener_add,
 263     .region_del = kvm_arm_devlistener_del,
 264 };
 265
 266 static void kvm_arm_set_device_addr(KVMDevice *kd)
 267 {
 268     struct kvm_device_attr *attr = &kd->kdattr;
 269     int ret;
 270
 271     /* If the device control API is available and we have a device fd on the
 272      * KVMDevice struct, let's use the newer API
 273      */
 274     if (kd->dev_fd >= 0) {
 275         uint64_t addr = kd->kda.addr;
 276
 277         addr |= kd->kda_addr_ormask;
 278         attr->addr = (uintptr_t)&addr;
 279         ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
 280     } else {
 281         ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
 282     }
 283
 284     if (ret < 0) {
 285         fprintf(stderr, "Failed to set device address: %s\n",
 286                 strerror(-ret));
 287         abort();
 288     }
 289 }
 290
 291 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 292 {
 293     KVMDevice *kd, *tkd;
 294
 295     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 296         if (kd->kda.addr != -1) {
 297             kvm_arm_set_device_addr(kd);
 298         }
 299         memory_region_unref(kd->mr);
 300         QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
 301         g_free(kd);
 302     }
 303     memory_listener_unregister(&devlistener);
 304 }
 305
 306 static Notifier notify = {
 307     .notify = kvm_arm_machine_init_done,
 308 };
 309
 310 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
 311                              uint64_t attr, int dev_fd, uint64_t addr_ormask)
 312 {
 313     KVMDevice *kd;
 314
 315     if (!kvm_irqchip_in_kernel()) {
 316         return;
 317     }
 318
 319     if (QSLIST_EMPTY(&kvm_devices_head)) {
 320         memory_listener_register(&devlistener, &address_space_memory);
 321         qemu_add_machine_init_done_notifier(&notify);
 322     }
 323     kd = g_new0(KVMDevice, 1);
 324     kd->mr = mr;
 325     kd->kda.id = devid;
 326     kd->kda.addr = -1;
 327     kd->kdattr.flags = 0;
 328     kd->kdattr.group = group;
 329     kd->kdattr.attr = attr;
 330     kd->dev_fd = dev_fd;
 331     kd->kda_addr_ormask = addr_ormask;
 332     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 333     memory_region_ref(kd->mr);
 334 }
 335
 336 static int compare_u64(const void *a, const void *b)
 337 {
 338     if (*(uint64_t *)a > *(uint64_t *)b) {
 339         return 1;
 340     }
 341     if (*(uint64_t *)a < *(uint64_t *)b) {
 342         return -1;
 343     }
 344     return 0;
 345 }
 346
 347 /* Initialize the ARMCPU cpreg list according to the kernel's
 348  * definition of what CPU registers it knows about (and throw away
 349  * the previous TCG-created cpreg list).
 350  */
 351 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
 352 {
 353     struct kvm_reg_list rl;
 354     struct kvm_reg_list *rlp;
 355     int i, ret, arraylen;
 356     CPUState *cs = CPU(cpu);
 357
 358     rl.n = 0;
 359     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 360     if (ret != -E2BIG) {
 361         return ret;
 362     }
 363     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 364     rlp->n = rl.n;
 365     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 366     if (ret) {
 367         goto out;
 368     }
 369     /* Sort the list we get back from the kernel, since cpreg_tuples
 370      * must be in strictly ascending order.
 371      */
 372     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 373
 374     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 375         if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
 376             continue;
 377         }
 378         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 379         case KVM_REG_SIZE_U32:
 380         case KVM_REG_SIZE_U64:
 381             break;
 382         default:
 383             fprintf(stderr, "Can't handle size of register in kernel list\n");
 384             ret = -EINVAL;
 385             goto out;
 386         }
 387
 388         arraylen++;
 389     }
 390
 391     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 392     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 393     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 394                                          arraylen);
 395     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 396                                         arraylen);
 397     cpu->cpreg_array_len = arraylen;
 398     cpu->cpreg_vmstate_array_len = arraylen;
 399
 400     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 401         uint64_t regidx = rlp->reg[i];
 402         if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
 403             continue;
 404         }
 405         cpu->cpreg_indexes[arraylen] = regidx;
 406         arraylen++;
 407     }
 408     assert(cpu->cpreg_array_len == arraylen);
 409
 410     if (!write_kvmstate_to_list(cpu)) {
 411         /* Shouldn't happen unless kernel is inconsistent about
 412          * what registers exist.
 413          */
 414         fprintf(stderr, "Initial read of kernel register state failed\n");
 415         ret = -EINVAL;
 416         goto out;
 417     }
 418
 419 out:
 420     g_free(rlp);
 421     return ret;
 422 }
 423
 424 bool write_kvmstate_to_list(ARMCPU *cpu)
 425 {
 426     CPUState *cs = CPU(cpu);
 427     int i;
 428     bool ok = true;
 429
 430     for (i = 0; i < cpu->cpreg_array_len; i++) {
 431         struct kvm_one_reg r;
 432         uint64_t regidx = cpu->cpreg_indexes[i];
 433         uint32_t v32;
 434         int ret;
 435
 436         r.id = regidx;
 437
 438         switch (regidx & KVM_REG_SIZE_MASK) {
 439         case KVM_REG_SIZE_U32:
 440             r.addr = (uintptr_t)&v32;
 441             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 442             if (!ret) {
 443                 cpu->cpreg_values[i] = v32;
 444             }
 445             break;
 446         case KVM_REG_SIZE_U64:
 447             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 448             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 449             break;
 450         default:
 451             abort();
 452         }
 453         if (ret) {
 454             ok = false;
 455         }
 456     }
 457     return ok;
 458 }
 459
 460 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
 461 {
 462     CPUState *cs = CPU(cpu);
 463     int i;
 464     bool ok = true;
 465
 466     for (i = 0; i < cpu->cpreg_array_len; i++) {
 467         struct kvm_one_reg r;
 468         uint64_t regidx = cpu->cpreg_indexes[i];
 469         uint32_t v32;
 470         int ret;
 471
 472         if (kvm_arm_cpreg_level(regidx) > level) {
 473             continue;
 474         }
 475
 476         r.id = regidx;
 477         switch (regidx & KVM_REG_SIZE_MASK) {
 478         case KVM_REG_SIZE_U32:
 479             v32 = cpu->cpreg_values[i];
 480             r.addr = (uintptr_t)&v32;
 481             break;
 482         case KVM_REG_SIZE_U64:
 483             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 484             break;
 485         default:
 486             abort();
 487         }
 488         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 489         if (ret) {
 490             /* We might fail for "unknown register" and also for
 491              * "you tried to set a register which is constant with
 492              * a different value from what it actually contains".
 493              */
 494             ok = false;
 495         }
 496     }
 497     return ok;
 498 }
 499
 500 void kvm_arm_reset_vcpu(ARMCPU *cpu)
 501 {
 502     int ret;
 503
 504     /* Re-init VCPU so that all registers are set to
 505      * their respective reset values.
 506      */
 507     ret = kvm_arm_vcpu_init(CPU(cpu));
 508     if (ret < 0) {
 509         fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
 510         abort();
 511     }
 512     if (!write_kvmstate_to_list(cpu)) {
 513         fprintf(stderr, "write_kvmstate_to_list failed\n");
 514         abort();
 515     }
 516     /*
 517      * Sync the reset values also into the CPUState. This is necessary
 518      * because the next thing we do will be a kvm_arch_put_registers()
 519      * which will update the list values from the CPUState before copying
 520      * the list values back to KVM. It's OK to ignore failure returns here
 521      * for the same reason we do so in kvm_arch_get_registers().
 522      */
 523     write_list_to_cpustate(cpu);
 524 }
 525
 526 /*
 527  * Update KVM's MP_STATE based on what QEMU thinks it is
 528  */
 529 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
 530 {
 531     if (cap_has_mp_state) {
 532         struct kvm_mp_state mp_state = {
 533             .mp_state = (cpu->power_state == PSCI_OFF) ?
 534             KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
 535         };
 536         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
 537         if (ret) {
 538             fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
 539                     __func__, ret, strerror(-ret));
 540             return -1;
 541         }
 542     }
 543
 544     return 0;
 545 }
 546
 547 /*
 548  * Sync the KVM MP_STATE into QEMU
 549  */
 550 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
 551 {
 552     if (cap_has_mp_state) {
 553         struct kvm_mp_state mp_state;
 554         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
 555         if (ret) {
 556             fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
 557                     __func__, ret, strerror(-ret));
 558             abort();
 559         }
 560         cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
 561             PSCI_OFF : PSCI_ON;
 562     }
 563
 564     return 0;
 565 }
 566
 567 int kvm_put_vcpu_events(ARMCPU *cpu)
 568 {
 569     CPUARMState *env = &cpu->env;
 570     struct kvm_vcpu_events events;
 571     int ret;
 572
 573     if (!kvm_has_vcpu_events()) {
 574         return 0;
 575     }
 576
 577     memset(&events, 0, sizeof(events));
 578     events.exception.serror_pending = env->serror.pending;
 579
 580     /* Inject SError to guest with specified syndrome if host kernel
 581      * supports it, otherwise inject SError without syndrome.
 582      */
 583     if (cap_has_inject_serror_esr) {
 584         events.exception.serror_has_esr = env->serror.has_esr;
 585         events.exception.serror_esr = env->serror.esr;
 586     }
 587
 588     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
 589     if (ret) {
 590         error_report("failed to put vcpu events");
 591     }
 592
 593     return ret;
 594 }
 595
 596 int kvm_get_vcpu_events(ARMCPU *cpu)
 597 {
 598     CPUARMState *env = &cpu->env;
 599     struct kvm_vcpu_events events;
 600     int ret;
 601
 602     if (!kvm_has_vcpu_events()) {
 603         return 0;
 604     }
 605
 606     memset(&events, 0, sizeof(events));
 607     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
 608     if (ret) {
 609         error_report("failed to get vcpu events");
 610         return ret;
 611     }
 612
 613     env->serror.pending = events.exception.serror_pending;
 614     env->serror.has_esr = events.exception.serror_has_esr;
 615     env->serror.esr = events.exception.serror_esr;
 616
 617     return 0;
 618 }
 619
 620 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 621 {
 622 }
 623
 624 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 625 {
 626     ARMCPU *cpu;
 627     uint32_t switched_level;
 628
 629     if (kvm_irqchip_in_kernel()) {
 630         /*
 631          * We only need to sync timer states with user-space interrupt
 632          * controllers, so return early and save cycles if we don't.
 633          */
 634         return MEMTXATTRS_UNSPECIFIED;
 635     }
 636
 637     cpu = ARM_CPU(cs);
 638
 639     /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
 640     if (run->s.regs.device_irq_level != cpu->device_irq_level) {
 641         switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
 642
 643         qemu_mutex_lock_iothread();
 644
 645         if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
 646             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
 647                          !!(run->s.regs.device_irq_level &
 648                             KVM_ARM_DEV_EL1_VTIMER));
 649             switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
 650         }
 651
 652         if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
 653             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
 654                          !!(run->s.regs.device_irq_level &
 655                             KVM_ARM_DEV_EL1_PTIMER));
 656             switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
 657         }
 658
 659         if (switched_level & KVM_ARM_DEV_PMU) {
 660             qemu_set_irq(cpu->pmu_interrupt,
 661                          !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
 662             switched_level &= ~KVM_ARM_DEV_PMU;
 663         }
 664
 665         if (switched_level) {
 666             qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
 667                           __func__, switched_level);
 668         }
 669
 670         /* We also mark unknown levels as processed to not waste cycles */
 671         cpu->device_irq_level = run->s.regs.device_irq_level;
 672         qemu_mutex_unlock_iothread();
 673     }
 674
 675     return MEMTXATTRS_UNSPECIFIED;
 676 }
 677
 678
 679 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 680 {
 681     int ret = 0;
 682
 683     switch (run->exit_reason) {
 684     case KVM_EXIT_DEBUG:
 685         if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
 686             ret = EXCP_DEBUG;
 687         } /* otherwise return to guest */
 688         break;
 689     default:
 690         qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
 691                       __func__, run->exit_reason);
 692         break;
 693     }
 694     return ret;
 695 }
 696
 697 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 698 {
 699     return true;
 700 }
 701
 702 int kvm_arch_process_async_events(CPUState *cs)
 703 {
 704     return 0;
 705 }
 706
 707 /* The #ifdef protections are until 32bit headers are imported and can
 708  * be removed once both 32 and 64 bit reach feature parity.
 709  */
 710 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 711 {
 712 #ifdef KVM_GUESTDBG_USE_SW_BP
 713     if (kvm_sw_breakpoints_active(cs)) {
 714         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
 715     }
 716 #endif
 717 #ifdef KVM_GUESTDBG_USE_HW
 718     if (kvm_arm_hw_debug_active(cs)) {
 719         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
 720         kvm_arm_copy_hw_debug_data(&dbg->arch);
 721     }
 722 #endif
 723 }
 724
 725 void kvm_arch_init_irq_routing(KVMState *s)
 726 {
 727 }
 728
 729 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
 730 {
 731      if (machine_kernel_irqchip_split(ms)) {
 732          perror("-machine kernel_irqchip=split is not supported on ARM.");
 733          exit(1);
 734     }
 735
 736     /* If we can create the VGIC using the newer device control API, we
 737      * let the device do this when it initializes itself, otherwise we
 738      * fall back to the old API */
 739     return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
 740 }
 741
 742 int kvm_arm_vgic_probe(void)
 743 {
 744     if (kvm_create_device(kvm_state,
 745                           KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
 746         return 3;
 747     } else if (kvm_create_device(kvm_state,
 748                                  KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
 749         return 2;
 750     } else {
 751         return 0;
 752     }
 753 }
 754
 755 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
 756 {
 757     int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
 758     int cpu_idx1 = cpu % 256;
 759     int cpu_idx2 = cpu / 256;
 760
 761     kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
 762                (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
 763
 764     return kvm_set_irq(kvm_state, kvm_irq, !!level);
 765 }
 766
 767 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
 768                              uint64_t address, uint32_t data, PCIDevice *dev)
 769 {
 770     AddressSpace *as = pci_device_iommu_address_space(dev);
 771     hwaddr xlat, len, doorbell_gpa;
 772     MemoryRegionSection mrs;
 773     MemoryRegion *mr;
 774     int ret = 1;
 775
 776     if (as == &address_space_memory) {
 777         return 0;
 778     }
 779
 780     /* MSI doorbell address is translated by an IOMMU */
 781
 782     rcu_read_lock();
 783     mr = address_space_translate(as, address, &xlat, &len, true,
 784                                  MEMTXATTRS_UNSPECIFIED);
 785     if (!mr) {
 786         goto unlock;
 787     }
 788     mrs = memory_region_find(mr, xlat, 1);
 789     if (!mrs.mr) {
 790         goto unlock;
 791     }
 792
 793     doorbell_gpa = mrs.offset_within_address_space;
 794     memory_region_unref(mrs.mr);
 795
 796     route->u.msi.address_lo = doorbell_gpa;
 797     route->u.msi.address_hi = doorbell_gpa >> 32;
 798
 799     trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
 800
 801     ret = 0;
 802
 803 unlock:
 804     rcu_read_unlock();
 805     return ret;
 806 }
 807
 808 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
 809                                 int vector, PCIDevice *dev)
 810 {
 811     return 0;
 812 }
 813
 814 int kvm_arch_release_virq_post(int virq)
 815 {
 816     return 0;
 817 }
 818
 819 int kvm_arch_msi_data_to_gsi(uint32_t data)
 820 {
 821     return (data - 32) & 0xffff;
 822 }