2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "sysemu/sysemu.h"
20 #include "sysemu/kvm.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
26 #include "hw/pci/pci.h"
27 #include "exec/memattrs.h"
28 #include "exec/address-spaces.h"
29 #include "hw/boards.h"
32 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
36 static bool cap_has_mp_state
;
37 static bool cap_has_inject_serror_esr
;
39 static ARMHostCPUFeatures arm_host_cpu_features
;
41 int kvm_arm_vcpu_init(CPUState
*cs
)
43 ARMCPU
*cpu
= ARM_CPU(cs
);
44 struct kvm_vcpu_init init
;
46 init
.target
= cpu
->kvm_target
;
47 memcpy(init
.features
, cpu
->kvm_init_features
, sizeof(init
.features
));
49 return kvm_vcpu_ioctl(cs
, KVM_ARM_VCPU_INIT
, &init
);
52 void kvm_arm_init_serror_injection(CPUState
*cs
)
54 cap_has_inject_serror_esr
= kvm_check_extension(cs
->kvm_state
,
55 KVM_CAP_ARM_INJECT_SERROR_ESR
);
58 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try
,
60 struct kvm_vcpu_init
*init
)
62 int ret
, kvmfd
= -1, vmfd
= -1, cpufd
= -1;
64 kvmfd
= qemu_open("/dev/kvm", O_RDWR
);
68 vmfd
= ioctl(kvmfd
, KVM_CREATE_VM
, 0);
72 cpufd
= ioctl(vmfd
, KVM_CREATE_VCPU
, 0);
78 /* Caller doesn't want the VCPU to be initialized, so skip it */
82 ret
= ioctl(vmfd
, KVM_ARM_PREFERRED_TARGET
, init
);
84 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
88 } else if (cpus_to_try
) {
89 /* Old kernel which doesn't know about the
90 * PREFERRED_TARGET ioctl: we know it will only support
91 * creating one kind of guest CPU which is its preferred
94 while (*cpus_to_try
!= QEMU_KVM_ARM_TARGET_NONE
) {
95 init
->target
= *cpus_to_try
++;
96 memset(init
->features
, 0, sizeof(init
->features
));
97 ret
= ioctl(cpufd
, KVM_ARM_VCPU_INIT
, init
);
106 /* Treat a NULL cpus_to_try argument the same as an empty
107 * list, which means we will fail the call since this must
108 * be an old kernel which doesn't support PREFERRED_TARGET.
134 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray
)
138 for (i
= 2; i
>= 0; i
--) {
143 void kvm_arm_set_cpu_features_from_host(ARMCPU
*cpu
)
145 CPUARMState
*env
= &cpu
->env
;
147 if (!arm_host_cpu_features
.dtb_compatible
) {
148 if (!kvm_enabled() ||
149 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features
)) {
150 /* We can't report this error yet, so flag that we need to
151 * in arm_cpu_realizefn().
153 cpu
->kvm_target
= QEMU_KVM_ARM_TARGET_NONE
;
154 cpu
->host_cpu_probe_failed
= true;
159 cpu
->kvm_target
= arm_host_cpu_features
.target
;
160 cpu
->dtb_compatible
= arm_host_cpu_features
.dtb_compatible
;
161 env
->features
= arm_host_cpu_features
.features
;
164 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
166 /* For ARM interrupt delivery is always asynchronous,
167 * whether we are using an in-kernel VGIC or not.
169 kvm_async_interrupts_allowed
= true;
172 * PSCI wakes up secondary cores, so we always need to
173 * have vCPUs waiting in kernel space
175 kvm_halt_in_kernel_allowed
= true;
177 cap_has_mp_state
= kvm_check_extension(s
, KVM_CAP_MP_STATE
);
182 unsigned long kvm_arch_vcpu_id(CPUState
*cpu
)
184 return cpu
->cpu_index
;
187 /* We track all the KVM devices which need their memory addresses
188 * passing to the kernel in a list of these structures.
189 * When board init is complete we run through the list and
190 * tell the kernel the base addresses of the memory regions.
191 * We use a MemoryListener to track mapping and unmapping of
192 * the regions during board creation, so the board models don't
193 * need to do anything special for the KVM case.
195 * Sometimes the address must be OR'ed with some other fields
196 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
197 * @kda_addr_ormask aims at storing the value of those fields.
199 typedef struct KVMDevice
{
200 struct kvm_arm_device_addr kda
;
201 struct kvm_device_attr kdattr
;
202 uint64_t kda_addr_ormask
;
204 QSLIST_ENTRY(KVMDevice
) entries
;
208 static QSLIST_HEAD(kvm_devices_head
, KVMDevice
) kvm_devices_head
;
210 static void kvm_arm_devlistener_add(MemoryListener
*listener
,
211 MemoryRegionSection
*section
)
215 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
216 if (section
->mr
== kd
->mr
) {
217 kd
->kda
.addr
= section
->offset_within_address_space
;
222 static void kvm_arm_devlistener_del(MemoryListener
*listener
,
223 MemoryRegionSection
*section
)
227 QSLIST_FOREACH(kd
, &kvm_devices_head
, entries
) {
228 if (section
->mr
== kd
->mr
) {
234 static MemoryListener devlistener
= {
235 .region_add
= kvm_arm_devlistener_add
,
236 .region_del
= kvm_arm_devlistener_del
,
239 static void kvm_arm_set_device_addr(KVMDevice
*kd
)
241 struct kvm_device_attr
*attr
= &kd
->kdattr
;
244 /* If the device control API is available and we have a device fd on the
245 * KVMDevice struct, let's use the newer API
247 if (kd
->dev_fd
>= 0) {
248 uint64_t addr
= kd
->kda
.addr
;
250 addr
|= kd
->kda_addr_ormask
;
251 attr
->addr
= (uintptr_t)&addr
;
252 ret
= kvm_device_ioctl(kd
->dev_fd
, KVM_SET_DEVICE_ATTR
, attr
);
254 ret
= kvm_vm_ioctl(kvm_state
, KVM_ARM_SET_DEVICE_ADDR
, &kd
->kda
);
258 fprintf(stderr
, "Failed to set device address: %s\n",
264 static void kvm_arm_machine_init_done(Notifier
*notifier
, void *data
)
268 QSLIST_FOREACH_SAFE(kd
, &kvm_devices_head
, entries
, tkd
) {
269 if (kd
->kda
.addr
!= -1) {
270 kvm_arm_set_device_addr(kd
);
272 memory_region_unref(kd
->mr
);
273 QSLIST_REMOVE_HEAD(&kvm_devices_head
, entries
);
276 memory_listener_unregister(&devlistener
);
279 static Notifier notify
= {
280 .notify
= kvm_arm_machine_init_done
,
283 void kvm_arm_register_device(MemoryRegion
*mr
, uint64_t devid
, uint64_t group
,
284 uint64_t attr
, int dev_fd
, uint64_t addr_ormask
)
288 if (!kvm_irqchip_in_kernel()) {
292 if (QSLIST_EMPTY(&kvm_devices_head
)) {
293 memory_listener_register(&devlistener
, &address_space_memory
);
294 qemu_add_machine_init_done_notifier(¬ify
);
296 kd
= g_new0(KVMDevice
, 1);
300 kd
->kdattr
.flags
= 0;
301 kd
->kdattr
.group
= group
;
302 kd
->kdattr
.attr
= attr
;
304 kd
->kda_addr_ormask
= addr_ormask
;
305 QSLIST_INSERT_HEAD(&kvm_devices_head
, kd
, entries
);
306 memory_region_ref(kd
->mr
);
309 static int compare_u64(const void *a
, const void *b
)
311 if (*(uint64_t *)a
> *(uint64_t *)b
) {
314 if (*(uint64_t *)a
< *(uint64_t *)b
) {
320 /* Initialize the ARMCPU cpreg list according to the kernel's
321 * definition of what CPU registers it knows about (and throw away
322 * the previous TCG-created cpreg list).
324 int kvm_arm_init_cpreg_list(ARMCPU
*cpu
)
326 struct kvm_reg_list rl
;
327 struct kvm_reg_list
*rlp
;
328 int i
, ret
, arraylen
;
329 CPUState
*cs
= CPU(cpu
);
332 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, &rl
);
336 rlp
= g_malloc(sizeof(struct kvm_reg_list
) + rl
.n
* sizeof(uint64_t));
338 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REG_LIST
, rlp
);
342 /* Sort the list we get back from the kernel, since cpreg_tuples
343 * must be in strictly ascending order.
345 qsort(&rlp
->reg
, rlp
->n
, sizeof(rlp
->reg
[0]), compare_u64
);
347 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
348 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp
->reg
[i
])) {
351 switch (rlp
->reg
[i
] & KVM_REG_SIZE_MASK
) {
352 case KVM_REG_SIZE_U32
:
353 case KVM_REG_SIZE_U64
:
356 fprintf(stderr
, "Can't handle size of register in kernel list\n");
364 cpu
->cpreg_indexes
= g_renew(uint64_t, cpu
->cpreg_indexes
, arraylen
);
365 cpu
->cpreg_values
= g_renew(uint64_t, cpu
->cpreg_values
, arraylen
);
366 cpu
->cpreg_vmstate_indexes
= g_renew(uint64_t, cpu
->cpreg_vmstate_indexes
,
368 cpu
->cpreg_vmstate_values
= g_renew(uint64_t, cpu
->cpreg_vmstate_values
,
370 cpu
->cpreg_array_len
= arraylen
;
371 cpu
->cpreg_vmstate_array_len
= arraylen
;
373 for (i
= 0, arraylen
= 0; i
< rlp
->n
; i
++) {
374 uint64_t regidx
= rlp
->reg
[i
];
375 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx
)) {
378 cpu
->cpreg_indexes
[arraylen
] = regidx
;
381 assert(cpu
->cpreg_array_len
== arraylen
);
383 if (!write_kvmstate_to_list(cpu
)) {
384 /* Shouldn't happen unless kernel is inconsistent about
385 * what registers exist.
387 fprintf(stderr
, "Initial read of kernel register state failed\n");
397 bool write_kvmstate_to_list(ARMCPU
*cpu
)
399 CPUState
*cs
= CPU(cpu
);
403 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
404 struct kvm_one_reg r
;
405 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
411 switch (regidx
& KVM_REG_SIZE_MASK
) {
412 case KVM_REG_SIZE_U32
:
413 r
.addr
= (uintptr_t)&v32
;
414 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
416 cpu
->cpreg_values
[i
] = v32
;
419 case KVM_REG_SIZE_U64
:
420 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
421 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &r
);
433 bool write_list_to_kvmstate(ARMCPU
*cpu
, int level
)
435 CPUState
*cs
= CPU(cpu
);
439 for (i
= 0; i
< cpu
->cpreg_array_len
; i
++) {
440 struct kvm_one_reg r
;
441 uint64_t regidx
= cpu
->cpreg_indexes
[i
];
445 if (kvm_arm_cpreg_level(regidx
) > level
) {
450 switch (regidx
& KVM_REG_SIZE_MASK
) {
451 case KVM_REG_SIZE_U32
:
452 v32
= cpu
->cpreg_values
[i
];
453 r
.addr
= (uintptr_t)&v32
;
455 case KVM_REG_SIZE_U64
:
456 r
.addr
= (uintptr_t)(cpu
->cpreg_values
+ i
);
461 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &r
);
463 /* We might fail for "unknown register" and also for
464 * "you tried to set a register which is constant with
465 * a different value from what it actually contains".
473 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
477 /* Re-init VCPU so that all registers are set to
478 * their respective reset values.
480 ret
= kvm_arm_vcpu_init(CPU(cpu
));
482 fprintf(stderr
, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret
));
485 if (!write_kvmstate_to_list(cpu
)) {
486 fprintf(stderr
, "write_kvmstate_to_list failed\n");
492 * Update KVM's MP_STATE based on what QEMU thinks it is
494 int kvm_arm_sync_mpstate_to_kvm(ARMCPU
*cpu
)
496 if (cap_has_mp_state
) {
497 struct kvm_mp_state mp_state
= {
498 .mp_state
= (cpu
->power_state
== PSCI_OFF
) ?
499 KVM_MP_STATE_STOPPED
: KVM_MP_STATE_RUNNABLE
501 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_MP_STATE
, &mp_state
);
503 fprintf(stderr
, "%s: failed to set MP_STATE %d/%s\n",
504 __func__
, ret
, strerror(-ret
));
513 * Sync the KVM MP_STATE into QEMU
515 int kvm_arm_sync_mpstate_to_qemu(ARMCPU
*cpu
)
517 if (cap_has_mp_state
) {
518 struct kvm_mp_state mp_state
;
519 int ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_MP_STATE
, &mp_state
);
521 fprintf(stderr
, "%s: failed to get MP_STATE %d/%s\n",
522 __func__
, ret
, strerror(-ret
));
525 cpu
->power_state
= (mp_state
.mp_state
== KVM_MP_STATE_STOPPED
) ?
532 int kvm_put_vcpu_events(ARMCPU
*cpu
)
534 CPUARMState
*env
= &cpu
->env
;
535 struct kvm_vcpu_events events
;
538 if (!kvm_has_vcpu_events()) {
542 memset(&events
, 0, sizeof(events
));
543 events
.exception
.serror_pending
= env
->serror
.pending
;
545 /* Inject SError to guest with specified syndrome if host kernel
546 * supports it, otherwise inject SError without syndrome.
548 if (cap_has_inject_serror_esr
) {
549 events
.exception
.serror_has_esr
= env
->serror
.has_esr
;
550 events
.exception
.serror_esr
= env
->serror
.esr
;
553 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_SET_VCPU_EVENTS
, &events
);
555 error_report("failed to put vcpu events");
561 int kvm_get_vcpu_events(ARMCPU
*cpu
)
563 CPUARMState
*env
= &cpu
->env
;
564 struct kvm_vcpu_events events
;
567 if (!kvm_has_vcpu_events()) {
571 memset(&events
, 0, sizeof(events
));
572 ret
= kvm_vcpu_ioctl(CPU(cpu
), KVM_GET_VCPU_EVENTS
, &events
);
574 error_report("failed to get vcpu events");
578 env
->serror
.pending
= events
.exception
.serror_pending
;
579 env
->serror
.has_esr
= events
.exception
.serror_has_esr
;
580 env
->serror
.esr
= events
.exception
.serror_esr
;
585 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
589 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
592 uint32_t switched_level
;
594 if (kvm_irqchip_in_kernel()) {
596 * We only need to sync timer states with user-space interrupt
597 * controllers, so return early and save cycles if we don't.
599 return MEMTXATTRS_UNSPECIFIED
;
604 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
605 if (run
->s
.regs
.device_irq_level
!= cpu
->device_irq_level
) {
606 switched_level
= cpu
->device_irq_level
^ run
->s
.regs
.device_irq_level
;
608 qemu_mutex_lock_iothread();
610 if (switched_level
& KVM_ARM_DEV_EL1_VTIMER
) {
611 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_VIRT
],
612 !!(run
->s
.regs
.device_irq_level
&
613 KVM_ARM_DEV_EL1_VTIMER
));
614 switched_level
&= ~KVM_ARM_DEV_EL1_VTIMER
;
617 if (switched_level
& KVM_ARM_DEV_EL1_PTIMER
) {
618 qemu_set_irq(cpu
->gt_timer_outputs
[GTIMER_PHYS
],
619 !!(run
->s
.regs
.device_irq_level
&
620 KVM_ARM_DEV_EL1_PTIMER
));
621 switched_level
&= ~KVM_ARM_DEV_EL1_PTIMER
;
624 if (switched_level
& KVM_ARM_DEV_PMU
) {
625 qemu_set_irq(cpu
->pmu_interrupt
,
626 !!(run
->s
.regs
.device_irq_level
& KVM_ARM_DEV_PMU
));
627 switched_level
&= ~KVM_ARM_DEV_PMU
;
630 if (switched_level
) {
631 qemu_log_mask(LOG_UNIMP
, "%s: unhandled in-kernel device IRQ %x\n",
632 __func__
, switched_level
);
635 /* We also mark unknown levels as processed to not waste cycles */
636 cpu
->device_irq_level
= run
->s
.regs
.device_irq_level
;
637 qemu_mutex_unlock_iothread();
640 return MEMTXATTRS_UNSPECIFIED
;
644 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
648 switch (run
->exit_reason
) {
650 if (kvm_arm_handle_debug(cs
, &run
->debug
.arch
)) {
652 } /* otherwise return to guest */
655 qemu_log_mask(LOG_UNIMP
, "%s: un-handled exit reason %d\n",
656 __func__
, run
->exit_reason
);
662 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
667 int kvm_arch_process_async_events(CPUState
*cs
)
672 /* The #ifdef protections are until 32bit headers are imported and can
673 * be removed once both 32 and 64 bit reach feature parity.
675 void kvm_arch_update_guest_debug(CPUState
*cs
, struct kvm_guest_debug
*dbg
)
677 #ifdef KVM_GUESTDBG_USE_SW_BP
678 if (kvm_sw_breakpoints_active(cs
)) {
679 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_SW_BP
;
682 #ifdef KVM_GUESTDBG_USE_HW
683 if (kvm_arm_hw_debug_active(cs
)) {
684 dbg
->control
|= KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW
;
685 kvm_arm_copy_hw_debug_data(&dbg
->arch
);
690 void kvm_arch_init_irq_routing(KVMState
*s
)
694 int kvm_arch_irqchip_create(MachineState
*ms
, KVMState
*s
)
696 if (machine_kernel_irqchip_split(ms
)) {
697 perror("-machine kernel_irqchip=split is not supported on ARM.");
701 /* If we can create the VGIC using the newer device control API, we
702 * let the device do this when it initializes itself, otherwise we
703 * fall back to the old API */
704 return kvm_check_extension(s
, KVM_CAP_DEVICE_CTRL
);
707 int kvm_arm_vgic_probe(void)
709 if (kvm_create_device(kvm_state
,
710 KVM_DEV_TYPE_ARM_VGIC_V3
, true) == 0) {
712 } else if (kvm_create_device(kvm_state
,
713 KVM_DEV_TYPE_ARM_VGIC_V2
, true) == 0) {
720 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
721 uint64_t address
, uint32_t data
, PCIDevice
*dev
)
723 AddressSpace
*as
= pci_device_iommu_address_space(dev
);
724 hwaddr xlat
, len
, doorbell_gpa
;
725 MemoryRegionSection mrs
;
729 if (as
== &address_space_memory
) {
733 /* MSI doorbell address is translated by an IOMMU */
736 mr
= address_space_translate(as
, address
, &xlat
, &len
, true,
737 MEMTXATTRS_UNSPECIFIED
);
741 mrs
= memory_region_find(mr
, xlat
, 1);
746 doorbell_gpa
= mrs
.offset_within_address_space
;
747 memory_region_unref(mrs
.mr
);
749 route
->u
.msi
.address_lo
= doorbell_gpa
;
750 route
->u
.msi
.address_hi
= doorbell_gpa
>> 32;
752 trace_kvm_arm_fixup_msi_route(address
, doorbell_gpa
);
761 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry
*route
,
762 int vector
, PCIDevice
*dev
)
767 int kvm_arch_release_virq_post(int virq
)
772 int kvm_arch_msi_data_to_gsi(uint32_t data
)
774 return (data
- 32) & 0xffff;