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1 # AArch32 Neon instruction descriptions
2 #
3 # Copyright (c) 2020 Linaro, Ltd
4 #
5 # This library is free software; you can redistribute it and/or
6 # modify it under the terms of the GNU Lesser General Public
7 # License as published by the Free Software Foundation; either
8 # version 2.1 of the License, or (at your option) any later version.
9 #
10 # This library is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 # Lesser General Public License for more details.
14 #
15 # You should have received a copy of the GNU Lesser General Public
16 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
17
18 #
19 # This file is processed by scripts/decodetree.py
20 #
21
22 # Encodings for Neon instructions whose encoding is the same for
23 # both A32 and T32.
24
25 # More specifically, this covers:
26 # 2reg scalar ext: 0b1111_1110_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx
27 # 3same ext: 0b1111_110x_xxxx_xxxx_xxxx_1x0x_xxxx_xxxx
28
29 # VFP/Neon register fields; same as vfp.decode
30 %vm_dp 5:1 0:4
31 %vm_sp 0:4 5:1
32 %vn_dp 7:1 16:4
33 %vn_sp 16:4 7:1
34 %vd_dp 22:1 12:4
35 %vd_sp 12:4 22:1
36
37 # For VCMLA/VCADD insns, convert the single-bit size field
38 # which is 0 for fp16 and 1 for fp32 into a MO_* constant.
39 # (Note that this is the reverse of the sense of the 1-bit size
40 # field in the 3same_fp Neon insns.)
41 %vcadd_size 20:1 !function=plus_1
42
43 VCMLA 1111 110 rot:2 . 1 . .... .... 1000 . q:1 . 0 .... \
44 vm=%vm_dp vn=%vn_dp vd=%vd_dp size=%vcadd_size
45
46 VCADD 1111 110 rot:1 1 . 0 . .... .... 1000 . q:1 . 0 .... \
47 vm=%vm_dp vn=%vn_dp vd=%vd_dp size=%vcadd_size
48
49 VSDOT 1111 110 00 . 10 .... .... 1101 . q:1 . 0 .... \
50 vm=%vm_dp vn=%vn_dp vd=%vd_dp
51 VUDOT 1111 110 00 . 10 .... .... 1101 . q:1 . 1 .... \
52 vm=%vm_dp vn=%vn_dp vd=%vd_dp
53 VUSDOT 1111 110 01 . 10 .... .... 1101 . q:1 . 0 .... \
54 vm=%vm_dp vn=%vn_dp vd=%vd_dp
55 VDOT_b16 1111 110 00 . 00 .... .... 1101 . q:1 . 0 .... \
56 vm=%vm_dp vn=%vn_dp vd=%vd_dp
57
58 # VFM[AS]L
59 VFML 1111 110 0 s:1 . 10 .... .... 1000 . 0 . 1 .... \
60 vm=%vm_sp vn=%vn_sp vd=%vd_dp q=0
61 VFML 1111 110 0 s:1 . 10 .... .... 1000 . 1 . 1 .... \
62 vm=%vm_dp vn=%vn_dp vd=%vd_dp q=1
63
64 VSMMLA 1111 1100 0.10 .... .... 1100 .1.0 .... \
65 vm=%vm_dp vn=%vn_dp vd=%vd_dp
66 VUMMLA 1111 1100 0.10 .... .... 1100 .1.1 .... \
67 vm=%vm_dp vn=%vn_dp vd=%vd_dp
68 VUSMMLA 1111 1100 1.10 .... .... 1100 .1.0 .... \
69 vm=%vm_dp vn=%vn_dp vd=%vd_dp
70 VMMLA_b16 1111 1100 0.00 .... .... 1100 .1.0 .... \
71 vm=%vm_dp vn=%vn_dp vd=%vd_dp
72
73 VFMA_b16 1111 110 0 0.11 .... .... 1000 . q:1 . 1 .... \
74 vm=%vm_dp vn=%vn_dp vd=%vd_dp
75
76 VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 index:1 0 vm:4 \
77 vn=%vn_dp vd=%vd_dp size=1
78 VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \
79 vm=%vm_dp vn=%vn_dp vd=%vd_dp size=2 index=0
80
81 VSDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 0 vm:4 \
82 vn=%vn_dp vd=%vd_dp
83 VUDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 1 vm:4 \
84 vn=%vn_dp vd=%vd_dp
85 VUSDOT_scalar 1111 1110 1 . 00 .... .... 1101 . q:1 index:1 0 vm:4 \
86 vn=%vn_dp vd=%vd_dp
87 VSUDOT_scalar 1111 1110 1 . 00 .... .... 1101 . q:1 index:1 1 vm:4 \
88 vn=%vn_dp vd=%vd_dp
89 VDOT_b16_scal 1111 1110 0 . 00 .... .... 1101 . q:1 index:1 0 vm:4 \
90 vn=%vn_dp vd=%vd_dp
91
92 %vfml_scalar_q0_rm 0:3 5:1
93 %vfml_scalar_q1_index 5:1 3:1
94 VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 0 . 1 index:1 ... \
95 rm=%vfml_scalar_q0_rm vn=%vn_sp vd=%vd_dp q=0
96 VFML_scalar 1111 1110 0 . 0 s:1 .... .... 1000 . 1 . 1 . rm:3 \
97 index=%vfml_scalar_q1_index vn=%vn_dp vd=%vd_dp q=1
98 VFMA_b16_scal 1111 1110 0.11 .... .... 1000 . q:1 . 1 . vm:3 \
99 index=%vfml_scalar_q1_index vn=%vn_dp vd=%vd_dp