target/hppa/op_helper.c

   1 /*
   2  * Helpers for HPPA instructions.
   3  *
   4  * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "exec/exec-all.h"
  23 #include "exec/helper-proto.h"
  24 #include "exec/cpu_ldst.h"
  25 #include "qemu/timer.h"
  26
  27
  28 void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
  29 {
  30     HPPACPU *cpu = hppa_env_get_cpu(env);
  31     CPUState *cs = CPU(cpu);
  32
  33     cs->exception_index = excp;
  34     cpu_loop_exit(cs);
  35 }
  36
  37 static void QEMU_NORETURN dynexcp(CPUHPPAState *env, int excp, uintptr_t ra)
  38 {
  39     HPPACPU *cpu = hppa_env_get_cpu(env);
  40     CPUState *cs = CPU(cpu);
  41
  42     cs->exception_index = excp;
  43     cpu_loop_exit_restore(cs, ra);
  44 }
  45
  46 void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
  47 {
  48     if (unlikely((target_sreg)cond < 0)) {
  49         dynexcp(env, EXCP_OVERFLOW, GETPC());
  50     }
  51 }
  52
  53 void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
  54 {
  55     if (unlikely(cond)) {
  56         dynexcp(env, EXCP_COND, GETPC());
  57     }
  58 }
  59
  60 static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
  61                            uint32_t mask, uintptr_t ra)
  62 {
  63 #ifdef CONFIG_USER_ONLY
  64     uint32_t old, new, cmp;
  65
  66     uint32_t *haddr = g2h(addr - 1);
  67     old = *haddr;
  68     while (1) {
  69         new = (old & ~mask) | (val & mask);
  70         cmp = atomic_cmpxchg(haddr, old, new);
  71         if (cmp == old) {
  72             return;
  73         }
  74         old = cmp;
  75     }
  76 #else
  77     /* FIXME -- we can do better.  */
  78     cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
  79 #endif
  80 }
  81
  82 static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
  83                       bool parallel)
  84 {
  85     uintptr_t ra = GETPC();
  86
  87     switch (addr & 3) {
  88     case 3:
  89         cpu_stb_data_ra(env, addr, val, ra);
  90         break;
  91     case 2:
  92         cpu_stw_data_ra(env, addr, val, ra);
  93         break;
  94     case 1:
  95         /* The 3 byte store must appear atomic.  */
  96         if (parallel) {
  97             atomic_store_3(env, addr, val, 0x00ffffffu, ra);
  98         } else {
  99             cpu_stb_data_ra(env, addr, val >> 16, ra);
 100             cpu_stw_data_ra(env, addr + 1, val, ra);
 101         }
 102         break;
 103     default:
 104         cpu_stl_data_ra(env, addr, val, ra);
 105         break;
 106     }
 107 }
 108
 109 void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
 110 {
 111     do_stby_b(env, addr, val, false);
 112 }
 113
 114 void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
 115                              target_ureg val)
 116 {
 117     do_stby_b(env, addr, val, true);
 118 }
 119
 120 static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
 121                       bool parallel)
 122 {
 123     uintptr_t ra = GETPC();
 124
 125     switch (addr & 3) {
 126     case 3:
 127         /* The 3 byte store must appear atomic.  */
 128         if (parallel) {
 129             atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
 130         } else {
 131             cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
 132             cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
 133         }
 134         break;
 135     case 2:
 136         cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
 137         break;
 138     case 1:
 139         cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
 140         break;
 141     default:
 142         /* Nothing is stored, but protection is checked and the
 143            cacheline is marked dirty.  */
 144 #ifndef CONFIG_USER_ONLY
 145         probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
 146 #endif
 147         break;
 148     }
 149 }
 150
 151 void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
 152 {
 153     do_stby_e(env, addr, val, false);
 154 }
 155
 156 void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
 157                              target_ureg val)
 158 {
 159     do_stby_e(env, addr, val, true);
 160 }
 161
 162 target_ureg HELPER(probe_r)(target_ulong addr)
 163 {
 164 #ifdef CONFIG_USER_ONLY
 165     return page_check_range(addr, 1, PAGE_READ);
 166 #else
 167     return 1; /* FIXME */
 168 #endif
 169 }
 170
 171 target_ureg HELPER(probe_w)(target_ulong addr)
 172 {
 173 #ifdef CONFIG_USER_ONLY
 174     return page_check_range(addr, 1, PAGE_WRITE);
 175 #else
 176     return 1; /* FIXME */
 177 #endif
 178 }
 179
 180 void HELPER(loaded_fr0)(CPUHPPAState *env)
 181 {
 182     uint32_t shadow = env->fr[0] >> 32;
 183     int rm, d;
 184
 185     env->fr0_shadow = shadow;
 186
 187     switch (extract32(shadow, 9, 2)) {
 188     default:
 189         rm = float_round_nearest_even;
 190         break;
 191     case 1:
 192         rm = float_round_to_zero;
 193         break;
 194     case 2:
 195         rm = float_round_up;
 196         break;
 197     case 3:
 198         rm = float_round_down;
 199         break;
 200     }
 201     set_float_rounding_mode(rm, &env->fp_status);
 202
 203     d = extract32(shadow, 5, 1);
 204     set_flush_to_zero(d, &env->fp_status);
 205     set_flush_inputs_to_zero(d, &env->fp_status);
 206 }
 207
 208 void cpu_hppa_loaded_fr0(CPUHPPAState *env)
 209 {
 210     helper_loaded_fr0(env);
 211 }
 212
 213 #define CONVERT_BIT(X, SRC, DST)        \
 214     ((SRC) > (DST)                      \
 215      ? (X) / ((SRC) / (DST)) & (DST)    \
 216      : ((X) & (SRC)) * ((DST) / (SRC)))
 217
 218 static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
 219 {
 220     uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
 221     uint32_t hard_exp = 0;
 222     uint32_t shadow = env->fr0_shadow;
 223
 224     if (likely(soft_exp == 0)) {
 225         env->fr[0] = (uint64_t)shadow << 32;
 226         return;
 227     }
 228     set_float_exception_flags(0, &env->fp_status);
 229
 230     hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact,   1u << 0);
 231     hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
 232     hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow,  1u << 2);
 233     hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
 234     hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid,   1u << 4);
 235     shadow |= hard_exp << (32 - 5);
 236     env->fr0_shadow = shadow;
 237     env->fr[0] = (uint64_t)shadow << 32;
 238
 239     if (hard_exp & shadow) {
 240         dynexcp(env, EXCP_ASSIST, ra);
 241     }
 242 }
 243
 244 float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
 245 {
 246     float32 ret = float32_sqrt(arg, &env->fp_status);
 247     update_fr0_op(env, GETPC());
 248     return ret;
 249 }
 250
 251 float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
 252 {
 253     float32 ret = float32_round_to_int(arg, &env->fp_status);
 254     update_fr0_op(env, GETPC());
 255     return ret;
 256 }
 257
 258 float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
 259 {
 260     float32 ret = float32_add(a, b, &env->fp_status);
 261     update_fr0_op(env, GETPC());
 262     return ret;
 263 }
 264
 265 float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
 266 {
 267     float32 ret = float32_sub(a, b, &env->fp_status);
 268     update_fr0_op(env, GETPC());
 269     return ret;
 270 }
 271
 272 float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
 273 {
 274     float32 ret = float32_mul(a, b, &env->fp_status);
 275     update_fr0_op(env, GETPC());
 276     return ret;
 277 }
 278
 279 float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
 280 {
 281     float32 ret = float32_div(a, b, &env->fp_status);
 282     update_fr0_op(env, GETPC());
 283     return ret;
 284 }
 285
 286 float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
 287 {
 288     float64 ret = float64_sqrt(arg, &env->fp_status);
 289     update_fr0_op(env, GETPC());
 290     return ret;
 291 }
 292
 293 float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
 294 {
 295     float64 ret = float64_round_to_int(arg, &env->fp_status);
 296     update_fr0_op(env, GETPC());
 297     return ret;
 298 }
 299
 300 float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
 301 {
 302     float64 ret = float64_add(a, b, &env->fp_status);
 303     update_fr0_op(env, GETPC());
 304     return ret;
 305 }
 306
 307 float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
 308 {
 309     float64 ret = float64_sub(a, b, &env->fp_status);
 310     update_fr0_op(env, GETPC());
 311     return ret;
 312 }
 313
 314 float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
 315 {
 316     float64 ret = float64_mul(a, b, &env->fp_status);
 317     update_fr0_op(env, GETPC());
 318     return ret;
 319 }
 320
 321 float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
 322 {
 323     float64 ret = float64_div(a, b, &env->fp_status);
 324     update_fr0_op(env, GETPC());
 325     return ret;
 326 }
 327
 328 float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
 329 {
 330     float64 ret = float32_to_float64(arg, &env->fp_status);
 331     ret = float64_maybe_silence_nan(ret, &env->fp_status);
 332     update_fr0_op(env, GETPC());
 333     return ret;
 334 }
 335
 336 float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
 337 {
 338     float32 ret = float64_to_float32(arg, &env->fp_status);
 339     ret = float32_maybe_silence_nan(ret, &env->fp_status);
 340     update_fr0_op(env, GETPC());
 341     return ret;
 342 }
 343
 344 float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
 345 {
 346     float32 ret = int32_to_float32(arg, &env->fp_status);
 347     update_fr0_op(env, GETPC());
 348     return ret;
 349 }
 350
 351 float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
 352 {
 353     float32 ret = int64_to_float32(arg, &env->fp_status);
 354     update_fr0_op(env, GETPC());
 355     return ret;
 356 }
 357
 358 float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
 359 {
 360     float64 ret = int32_to_float64(arg, &env->fp_status);
 361     update_fr0_op(env, GETPC());
 362     return ret;
 363 }
 364
 365 float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
 366 {
 367     float64 ret = int64_to_float64(arg, &env->fp_status);
 368     update_fr0_op(env, GETPC());
 369     return ret;
 370 }
 371
 372 int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
 373 {
 374     int32_t ret = float32_to_int32(arg, &env->fp_status);
 375     update_fr0_op(env, GETPC());
 376     return ret;
 377 }
 378
 379 int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
 380 {
 381     int32_t ret = float64_to_int32(arg, &env->fp_status);
 382     update_fr0_op(env, GETPC());
 383     return ret;
 384 }
 385
 386 int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
 387 {
 388     int64_t ret = float32_to_int64(arg, &env->fp_status);
 389     update_fr0_op(env, GETPC());
 390     return ret;
 391 }
 392
 393 int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
 394 {
 395     int64_t ret = float64_to_int64(arg, &env->fp_status);
 396     update_fr0_op(env, GETPC());
 397     return ret;
 398 }
 399
 400 int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
 401 {
 402     int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
 403     update_fr0_op(env, GETPC());
 404     return ret;
 405 }
 406
 407 int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
 408 {
 409     int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
 410     update_fr0_op(env, GETPC());
 411     return ret;
 412 }
 413
 414 int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
 415 {
 416     int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
 417     update_fr0_op(env, GETPC());
 418     return ret;
 419 }
 420
 421 int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
 422 {
 423     int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
 424     update_fr0_op(env, GETPC());
 425     return ret;
 426 }
 427
 428 float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
 429 {
 430     float32 ret = uint32_to_float32(arg, &env->fp_status);
 431     update_fr0_op(env, GETPC());
 432     return ret;
 433 }
 434
 435 float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
 436 {
 437     float32 ret = uint64_to_float32(arg, &env->fp_status);
 438     update_fr0_op(env, GETPC());
 439     return ret;
 440 }
 441
 442 float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
 443 {
 444     float64 ret = uint32_to_float64(arg, &env->fp_status);
 445     update_fr0_op(env, GETPC());
 446     return ret;
 447 }
 448
 449 float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
 450 {
 451     float64 ret = uint64_to_float64(arg, &env->fp_status);
 452     update_fr0_op(env, GETPC());
 453     return ret;
 454 }
 455
 456 uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
 457 {
 458     uint32_t ret = float32_to_uint32(arg, &env->fp_status);
 459     update_fr0_op(env, GETPC());
 460     return ret;
 461 }
 462
 463 uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
 464 {
 465     uint32_t ret = float64_to_uint32(arg, &env->fp_status);
 466     update_fr0_op(env, GETPC());
 467     return ret;
 468 }
 469
 470 uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
 471 {
 472     uint64_t ret = float32_to_uint64(arg, &env->fp_status);
 473     update_fr0_op(env, GETPC());
 474     return ret;
 475 }
 476
 477 uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
 478 {
 479     uint64_t ret = float64_to_uint64(arg, &env->fp_status);
 480     update_fr0_op(env, GETPC());
 481     return ret;
 482 }
 483
 484 uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
 485 {
 486     uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
 487     update_fr0_op(env, GETPC());
 488     return ret;
 489 }
 490
 491 uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
 492 {
 493     uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
 494     update_fr0_op(env, GETPC());
 495     return ret;
 496 }
 497
 498 uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
 499 {
 500     uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
 501     update_fr0_op(env, GETPC());
 502     return ret;
 503 }
 504
 505 uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
 506 {
 507     uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
 508     update_fr0_op(env, GETPC());
 509     return ret;
 510 }
 511
 512 static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
 513 {
 514     uint32_t shadow = env->fr0_shadow;
 515
 516     switch (r) {
 517     case float_relation_greater:
 518         c = extract32(c, 4, 1);
 519         break;
 520     case float_relation_less:
 521         c = extract32(c, 3, 1);
 522         break;
 523     case float_relation_equal:
 524         c = extract32(c, 2, 1);
 525         break;
 526     case float_relation_unordered:
 527         c = extract32(c, 1, 1);
 528         break;
 529     default:
 530         g_assert_not_reached();
 531     }
 532
 533     if (y) {
 534         /* targeted comparison */
 535         /* set fpsr[ca[y - 1]] to current compare */
 536         shadow = deposit32(shadow, 21 - (y - 1), 1, c);
 537     } else {
 538         /* queued comparison */
 539         /* shift cq right by one place */
 540         shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
 541         /* move fpsr[c] to fpsr[cq[0]] */
 542         shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
 543         /* set fpsr[c] to current compare */
 544         shadow = deposit32(shadow, 26, 1, c);
 545     }
 546
 547     env->fr0_shadow = shadow;
 548     env->fr[0] = (uint64_t)shadow << 32;
 549 }
 550
 551 void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
 552                     uint32_t y, uint32_t c)
 553 {
 554     int r;
 555     if (c & 1) {
 556         r = float32_compare(a, b, &env->fp_status);
 557     } else {
 558         r = float32_compare_quiet(a, b, &env->fp_status);
 559     }
 560     update_fr0_op(env, GETPC());
 561     update_fr0_cmp(env, y, c, r);
 562 }
 563
 564 void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
 565                     uint32_t y, uint32_t c)
 566 {
 567     int r;
 568     if (c & 1) {
 569         r = float64_compare(a, b, &env->fp_status);
 570     } else {
 571         r = float64_compare_quiet(a, b, &env->fp_status);
 572     }
 573     update_fr0_op(env, GETPC());
 574     update_fr0_cmp(env, y, c, r);
 575 }
 576
 577 float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
 578 {
 579     float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
 580     update_fr0_op(env, GETPC());
 581     return ret;
 582 }
 583
 584 float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
 585 {
 586     float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
 587                                  &env->fp_status);
 588     update_fr0_op(env, GETPC());
 589     return ret;
 590 }
 591
 592 float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
 593 {
 594     float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
 595     update_fr0_op(env, GETPC());
 596     return ret;
 597 }
 598
 599 float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
 600 {
 601     float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
 602                                  &env->fp_status);
 603     update_fr0_op(env, GETPC());
 604     return ret;
 605 }
 606
 607 target_ureg HELPER(read_interval_timer)(void)
 608 {
 609 #ifdef CONFIG_USER_ONLY
 610     /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
 611        Just pass through the host cpu clock ticks.  */
 612     return cpu_get_host_ticks();
 613 #else
 614     /* In system mode we have access to a decent high-resolution clock.
 615        In order to make OS-level time accounting work with the cr16,
 616        present it with a well-timed clock fixed at 250MHz.  */
 617     return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
 618 #endif
 619 }
 620
 621 #ifndef CONFIG_USER_ONLY
 622 void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
 623 {
 624     HPPACPU *cpu = hppa_env_get_cpu(env);
 625     uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 626     uint64_t timeout;
 627
 628     /* Even in 64-bit mode, the comparator is always 32-bit.  But the
 629        value we expose to the guest is 1/4 of the speed of the clock,
 630        so moosh in 34 bits.  */
 631     timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
 632
 633     /* If the mooshing puts the clock in the past, advance to next round.  */
 634     if (timeout < current + 1000) {
 635         timeout += 1ULL << 34;
 636     }
 637
 638     cpu->env.cr[CR_IT] = timeout;
 639     timer_mod(cpu->alarm_timer, timeout);
 640 }
 641
 642 target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
 643 {
 644     target_ulong psw = env->psw;
 645     /* ??? On second reading this condition simply seems
 646        to be undefined rather than a diagnosed trap.  */
 647     if (nsm & ~psw & PSW_Q) {
 648         dynexcp(env, EXCP_ILL, GETPC());
 649     }
 650     env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
 651     return psw & PSW_SM;
 652 }
 653
 654 void HELPER(rfi)(CPUHPPAState *env)
 655 {
 656     /* ??? On second reading this condition simply seems
 657        to be undefined rather than a diagnosed trap.  */
 658     if (env->psw & (PSW_I | PSW_R | PSW_Q)) {
 659         helper_excp(env, EXCP_ILL);
 660     }
 661     env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
 662     env->iasq_b = (uint64_t)env->cr_back[0] << 32;
 663     env->iaoq_f = env->cr[CR_IIAOQ];
 664     env->iaoq_b = env->cr_back[1];
 665     cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
 666 }
 667
 668 void HELPER(rfi_r)(CPUHPPAState *env)
 669 {
 670     env->gr[1] = env->shadow[0];
 671     env->gr[8] = env->shadow[1];
 672     env->gr[9] = env->shadow[2];
 673     env->gr[16] = env->shadow[3];
 674     env->gr[17] = env->shadow[4];
 675     env->gr[24] = env->shadow[5];
 676     env->gr[25] = env->shadow[6];
 677     helper_rfi(env);
 678 }
 679 #endif