target/hppa/op_helper.c

   1 /*
   2  * Helpers for HPPA instructions.
   3  *
   4  * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "exec/exec-all.h"
  23 #include "exec/helper-proto.h"
  24 #include "exec/cpu_ldst.h"
  25 #include "sysemu/sysemu.h"
  26 #include "qemu/timer.h"
  27 #include "fpu/softfloat.h"
  28 #include "trace.h"
  29
  30 void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
  31 {
  32     HPPACPU *cpu = hppa_env_get_cpu(env);
  33     CPUState *cs = CPU(cpu);
  34
  35     cs->exception_index = excp;
  36     cpu_loop_exit(cs);
  37 }
  38
  39 void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
  40 {
  41     HPPACPU *cpu = hppa_env_get_cpu(env);
  42     CPUState *cs = CPU(cpu);
  43
  44     cs->exception_index = excp;
  45     cpu_loop_exit_restore(cs, ra);
  46 }
  47
  48 void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
  49 {
  50     if (unlikely((target_sreg)cond < 0)) {
  51         hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC());
  52     }
  53 }
  54
  55 void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
  56 {
  57     if (unlikely(cond)) {
  58         hppa_dynamic_excp(env, EXCP_COND, GETPC());
  59     }
  60 }
  61
  62 static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
  63                            uint32_t mask, uintptr_t ra)
  64 {
  65 #ifdef CONFIG_USER_ONLY
  66     uint32_t old, new, cmp;
  67
  68     uint32_t *haddr = g2h(addr - 1);
  69     old = *haddr;
  70     while (1) {
  71         new = (old & ~mask) | (val & mask);
  72         cmp = atomic_cmpxchg(haddr, old, new);
  73         if (cmp == old) {
  74             return;
  75         }
  76         old = cmp;
  77     }
  78 #else
  79     /* FIXME -- we can do better.  */
  80     cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
  81 #endif
  82 }
  83
  84 static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
  85                       bool parallel, uintptr_t ra)
  86 {
  87     switch (addr & 3) {
  88     case 3:
  89         cpu_stb_data_ra(env, addr, val, ra);
  90         break;
  91     case 2:
  92         cpu_stw_data_ra(env, addr, val, ra);
  93         break;
  94     case 1:
  95         /* The 3 byte store must appear atomic.  */
  96         if (parallel) {
  97             atomic_store_3(env, addr, val, 0x00ffffffu, ra);
  98         } else {
  99             cpu_stb_data_ra(env, addr, val >> 16, ra);
 100             cpu_stw_data_ra(env, addr + 1, val, ra);
 101         }
 102         break;
 103     default:
 104         cpu_stl_data_ra(env, addr, val, ra);
 105         break;
 106     }
 107 }
 108
 109 void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
 110 {
 111     do_stby_b(env, addr, val, false, GETPC());
 112 }
 113
 114 void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
 115                              target_ureg val)
 116 {
 117     do_stby_b(env, addr, val, true, GETPC());
 118 }
 119
 120 static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
 121                       bool parallel, uintptr_t ra)
 122 {
 123     switch (addr & 3) {
 124     case 3:
 125         /* The 3 byte store must appear atomic.  */
 126         if (parallel) {
 127             atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
 128         } else {
 129             cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
 130             cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
 131         }
 132         break;
 133     case 2:
 134         cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
 135         break;
 136     case 1:
 137         cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
 138         break;
 139     default:
 140         /* Nothing is stored, but protection is checked and the
 141            cacheline is marked dirty.  */
 142 #ifndef CONFIG_USER_ONLY
 143         probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
 144 #endif
 145         break;
 146     }
 147 }
 148
 149 void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
 150 {
 151     do_stby_e(env, addr, val, false, GETPC());
 152 }
 153
 154 void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
 155                              target_ureg val)
 156 {
 157     do_stby_e(env, addr, val, true, GETPC());
 158 }
 159
 160 target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr,
 161                           uint32_t level, uint32_t want)
 162 {
 163 #ifdef CONFIG_USER_ONLY
 164     return page_check_range(addr, 1, want);
 165 #else
 166     int prot, excp;
 167     hwaddr phys;
 168
 169     trace_hppa_tlb_probe(addr, level, want);
 170     /* Fail if the requested privilege level is higher than current.  */
 171     if (level < (env->iaoq_f & 3)) {
 172         return 0;
 173     }
 174
 175     excp = hppa_get_physical_address(env, addr, level, 0, &phys, &prot);
 176     if (excp >= 0) {
 177         if (env->psw & PSW_Q) {
 178             /* ??? Needs tweaking for hppa64.  */
 179             env->cr[CR_IOR] = addr;
 180             env->cr[CR_ISR] = addr >> 32;
 181         }
 182         if (excp == EXCP_DTLB_MISS) {
 183             excp = EXCP_NA_DTLB_MISS;
 184         }
 185         hppa_dynamic_excp(env, excp, GETPC());
 186     }
 187     return (want & prot) != 0;
 188 #endif
 189 }
 190
 191 void HELPER(loaded_fr0)(CPUHPPAState *env)
 192 {
 193     uint32_t shadow = env->fr[0] >> 32;
 194     int rm, d;
 195
 196     env->fr0_shadow = shadow;
 197
 198     switch (extract32(shadow, 9, 2)) {
 199     default:
 200         rm = float_round_nearest_even;
 201         break;
 202     case 1:
 203         rm = float_round_to_zero;
 204         break;
 205     case 2:
 206         rm = float_round_up;
 207         break;
 208     case 3:
 209         rm = float_round_down;
 210         break;
 211     }
 212     set_float_rounding_mode(rm, &env->fp_status);
 213
 214     d = extract32(shadow, 5, 1);
 215     set_flush_to_zero(d, &env->fp_status);
 216     set_flush_inputs_to_zero(d, &env->fp_status);
 217 }
 218
 219 void cpu_hppa_loaded_fr0(CPUHPPAState *env)
 220 {
 221     helper_loaded_fr0(env);
 222 }
 223
 224 #define CONVERT_BIT(X, SRC, DST)        \
 225     ((SRC) > (DST)                      \
 226      ? (X) / ((SRC) / (DST)) & (DST)    \
 227      : ((X) & (SRC)) * ((DST) / (SRC)))
 228
 229 static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
 230 {
 231     uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
 232     uint32_t hard_exp = 0;
 233     uint32_t shadow = env->fr0_shadow;
 234
 235     if (likely(soft_exp == 0)) {
 236         env->fr[0] = (uint64_t)shadow << 32;
 237         return;
 238     }
 239     set_float_exception_flags(0, &env->fp_status);
 240
 241     hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact,   1u << 0);
 242     hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
 243     hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow,  1u << 2);
 244     hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
 245     hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid,   1u << 4);
 246     shadow |= hard_exp << (32 - 5);
 247     env->fr0_shadow = shadow;
 248     env->fr[0] = (uint64_t)shadow << 32;
 249
 250     if (hard_exp & shadow) {
 251         hppa_dynamic_excp(env, EXCP_ASSIST, ra);
 252     }
 253 }
 254
 255 float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
 256 {
 257     float32 ret = float32_sqrt(arg, &env->fp_status);
 258     update_fr0_op(env, GETPC());
 259     return ret;
 260 }
 261
 262 float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
 263 {
 264     float32 ret = float32_round_to_int(arg, &env->fp_status);
 265     update_fr0_op(env, GETPC());
 266     return ret;
 267 }
 268
 269 float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
 270 {
 271     float32 ret = float32_add(a, b, &env->fp_status);
 272     update_fr0_op(env, GETPC());
 273     return ret;
 274 }
 275
 276 float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
 277 {
 278     float32 ret = float32_sub(a, b, &env->fp_status);
 279     update_fr0_op(env, GETPC());
 280     return ret;
 281 }
 282
 283 float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
 284 {
 285     float32 ret = float32_mul(a, b, &env->fp_status);
 286     update_fr0_op(env, GETPC());
 287     return ret;
 288 }
 289
 290 float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
 291 {
 292     float32 ret = float32_div(a, b, &env->fp_status);
 293     update_fr0_op(env, GETPC());
 294     return ret;
 295 }
 296
 297 float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
 298 {
 299     float64 ret = float64_sqrt(arg, &env->fp_status);
 300     update_fr0_op(env, GETPC());
 301     return ret;
 302 }
 303
 304 float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
 305 {
 306     float64 ret = float64_round_to_int(arg, &env->fp_status);
 307     update_fr0_op(env, GETPC());
 308     return ret;
 309 }
 310
 311 float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
 312 {
 313     float64 ret = float64_add(a, b, &env->fp_status);
 314     update_fr0_op(env, GETPC());
 315     return ret;
 316 }
 317
 318 float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
 319 {
 320     float64 ret = float64_sub(a, b, &env->fp_status);
 321     update_fr0_op(env, GETPC());
 322     return ret;
 323 }
 324
 325 float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
 326 {
 327     float64 ret = float64_mul(a, b, &env->fp_status);
 328     update_fr0_op(env, GETPC());
 329     return ret;
 330 }
 331
 332 float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
 333 {
 334     float64 ret = float64_div(a, b, &env->fp_status);
 335     update_fr0_op(env, GETPC());
 336     return ret;
 337 }
 338
 339 float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
 340 {
 341     float64 ret = float32_to_float64(arg, &env->fp_status);
 342     update_fr0_op(env, GETPC());
 343     return ret;
 344 }
 345
 346 float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
 347 {
 348     float32 ret = float64_to_float32(arg, &env->fp_status);
 349     update_fr0_op(env, GETPC());
 350     return ret;
 351 }
 352
 353 float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
 354 {
 355     float32 ret = int32_to_float32(arg, &env->fp_status);
 356     update_fr0_op(env, GETPC());
 357     return ret;
 358 }
 359
 360 float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
 361 {
 362     float32 ret = int64_to_float32(arg, &env->fp_status);
 363     update_fr0_op(env, GETPC());
 364     return ret;
 365 }
 366
 367 float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
 368 {
 369     float64 ret = int32_to_float64(arg, &env->fp_status);
 370     update_fr0_op(env, GETPC());
 371     return ret;
 372 }
 373
 374 float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
 375 {
 376     float64 ret = int64_to_float64(arg, &env->fp_status);
 377     update_fr0_op(env, GETPC());
 378     return ret;
 379 }
 380
 381 int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
 382 {
 383     int32_t ret = float32_to_int32(arg, &env->fp_status);
 384     update_fr0_op(env, GETPC());
 385     return ret;
 386 }
 387
 388 int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
 389 {
 390     int32_t ret = float64_to_int32(arg, &env->fp_status);
 391     update_fr0_op(env, GETPC());
 392     return ret;
 393 }
 394
 395 int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
 396 {
 397     int64_t ret = float32_to_int64(arg, &env->fp_status);
 398     update_fr0_op(env, GETPC());
 399     return ret;
 400 }
 401
 402 int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
 403 {
 404     int64_t ret = float64_to_int64(arg, &env->fp_status);
 405     update_fr0_op(env, GETPC());
 406     return ret;
 407 }
 408
 409 int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
 410 {
 411     int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
 412     update_fr0_op(env, GETPC());
 413     return ret;
 414 }
 415
 416 int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
 417 {
 418     int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
 419     update_fr0_op(env, GETPC());
 420     return ret;
 421 }
 422
 423 int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
 424 {
 425     int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
 426     update_fr0_op(env, GETPC());
 427     return ret;
 428 }
 429
 430 int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
 431 {
 432     int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
 433     update_fr0_op(env, GETPC());
 434     return ret;
 435 }
 436
 437 float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
 438 {
 439     float32 ret = uint32_to_float32(arg, &env->fp_status);
 440     update_fr0_op(env, GETPC());
 441     return ret;
 442 }
 443
 444 float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
 445 {
 446     float32 ret = uint64_to_float32(arg, &env->fp_status);
 447     update_fr0_op(env, GETPC());
 448     return ret;
 449 }
 450
 451 float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
 452 {
 453     float64 ret = uint32_to_float64(arg, &env->fp_status);
 454     update_fr0_op(env, GETPC());
 455     return ret;
 456 }
 457
 458 float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
 459 {
 460     float64 ret = uint64_to_float64(arg, &env->fp_status);
 461     update_fr0_op(env, GETPC());
 462     return ret;
 463 }
 464
 465 uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
 466 {
 467     uint32_t ret = float32_to_uint32(arg, &env->fp_status);
 468     update_fr0_op(env, GETPC());
 469     return ret;
 470 }
 471
 472 uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
 473 {
 474     uint32_t ret = float64_to_uint32(arg, &env->fp_status);
 475     update_fr0_op(env, GETPC());
 476     return ret;
 477 }
 478
 479 uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
 480 {
 481     uint64_t ret = float32_to_uint64(arg, &env->fp_status);
 482     update_fr0_op(env, GETPC());
 483     return ret;
 484 }
 485
 486 uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
 487 {
 488     uint64_t ret = float64_to_uint64(arg, &env->fp_status);
 489     update_fr0_op(env, GETPC());
 490     return ret;
 491 }
 492
 493 uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
 494 {
 495     uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
 496     update_fr0_op(env, GETPC());
 497     return ret;
 498 }
 499
 500 uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
 501 {
 502     uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
 503     update_fr0_op(env, GETPC());
 504     return ret;
 505 }
 506
 507 uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
 508 {
 509     uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
 510     update_fr0_op(env, GETPC());
 511     return ret;
 512 }
 513
 514 uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
 515 {
 516     uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
 517     update_fr0_op(env, GETPC());
 518     return ret;
 519 }
 520
 521 static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
 522 {
 523     uint32_t shadow = env->fr0_shadow;
 524
 525     switch (r) {
 526     case float_relation_greater:
 527         c = extract32(c, 4, 1);
 528         break;
 529     case float_relation_less:
 530         c = extract32(c, 3, 1);
 531         break;
 532     case float_relation_equal:
 533         c = extract32(c, 2, 1);
 534         break;
 535     case float_relation_unordered:
 536         c = extract32(c, 1, 1);
 537         break;
 538     default:
 539         g_assert_not_reached();
 540     }
 541
 542     if (y) {
 543         /* targeted comparison */
 544         /* set fpsr[ca[y - 1]] to current compare */
 545         shadow = deposit32(shadow, 21 - (y - 1), 1, c);
 546     } else {
 547         /* queued comparison */
 548         /* shift cq right by one place */
 549         shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
 550         /* move fpsr[c] to fpsr[cq[0]] */
 551         shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
 552         /* set fpsr[c] to current compare */
 553         shadow = deposit32(shadow, 26, 1, c);
 554     }
 555
 556     env->fr0_shadow = shadow;
 557     env->fr[0] = (uint64_t)shadow << 32;
 558 }
 559
 560 void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
 561                     uint32_t y, uint32_t c)
 562 {
 563     int r;
 564     if (c & 1) {
 565         r = float32_compare(a, b, &env->fp_status);
 566     } else {
 567         r = float32_compare_quiet(a, b, &env->fp_status);
 568     }
 569     update_fr0_op(env, GETPC());
 570     update_fr0_cmp(env, y, c, r);
 571 }
 572
 573 void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
 574                     uint32_t y, uint32_t c)
 575 {
 576     int r;
 577     if (c & 1) {
 578         r = float64_compare(a, b, &env->fp_status);
 579     } else {
 580         r = float64_compare_quiet(a, b, &env->fp_status);
 581     }
 582     update_fr0_op(env, GETPC());
 583     update_fr0_cmp(env, y, c, r);
 584 }
 585
 586 float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
 587 {
 588     float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
 589     update_fr0_op(env, GETPC());
 590     return ret;
 591 }
 592
 593 float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
 594 {
 595     float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
 596                                  &env->fp_status);
 597     update_fr0_op(env, GETPC());
 598     return ret;
 599 }
 600
 601 float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
 602 {
 603     float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
 604     update_fr0_op(env, GETPC());
 605     return ret;
 606 }
 607
 608 float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
 609 {
 610     float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
 611                                  &env->fp_status);
 612     update_fr0_op(env, GETPC());
 613     return ret;
 614 }
 615
 616 target_ureg HELPER(read_interval_timer)(void)
 617 {
 618 #ifdef CONFIG_USER_ONLY
 619     /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
 620        Just pass through the host cpu clock ticks.  */
 621     return cpu_get_host_ticks();
 622 #else
 623     /* In system mode we have access to a decent high-resolution clock.
 624        In order to make OS-level time accounting work with the cr16,
 625        present it with a well-timed clock fixed at 250MHz.  */
 626     return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
 627 #endif
 628 }
 629
 630 #ifndef CONFIG_USER_ONLY
 631 void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
 632 {
 633     HPPACPU *cpu = hppa_env_get_cpu(env);
 634     uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 635     uint64_t timeout;
 636
 637     /* Even in 64-bit mode, the comparator is always 32-bit.  But the
 638        value we expose to the guest is 1/4 of the speed of the clock,
 639        so moosh in 34 bits.  */
 640     timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
 641
 642     /* If the mooshing puts the clock in the past, advance to next round.  */
 643     if (timeout < current + 1000) {
 644         timeout += 1ULL << 34;
 645     }
 646
 647     cpu->env.cr[CR_IT] = timeout;
 648     timer_mod(cpu->alarm_timer, timeout);
 649 }
 650
 651 void HELPER(halt)(CPUHPPAState *env)
 652 {
 653     qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
 654     helper_excp(env, EXCP_HLT);
 655 }
 656
 657 void HELPER(reset)(CPUHPPAState *env)
 658 {
 659     qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 660     helper_excp(env, EXCP_HLT);
 661 }
 662
 663 target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
 664 {
 665     target_ulong psw = env->psw;
 666     /*
 667      * Setting the PSW Q bit to 1, if it was not already 1, is an
 668      * undefined operation.
 669      *
 670      * However, HP-UX 10.20 does this with the SSM instruction.
 671      * Tested this on HP9000/712 and HP9000/785/C3750 and both
 672      * machines set the Q bit from 0 to 1 without an exception,
 673      * so let this go without comment.
 674      */
 675     env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
 676     return psw & PSW_SM;
 677 }
 678
 679 void HELPER(rfi)(CPUHPPAState *env)
 680 {
 681     env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
 682     env->iasq_b = (uint64_t)env->cr_back[0] << 32;
 683     env->iaoq_f = env->cr[CR_IIAOQ];
 684     env->iaoq_b = env->cr_back[1];
 685     cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
 686 }
 687
 688 void HELPER(rfi_r)(CPUHPPAState *env)
 689 {
 690     env->gr[1] = env->shadow[0];
 691     env->gr[8] = env->shadow[1];
 692     env->gr[9] = env->shadow[2];
 693     env->gr[16] = env->shadow[3];
 694     env->gr[17] = env->shadow[4];
 695     env->gr[24] = env->shadow[5];
 696     env->gr[25] = env->shadow[6];
 697     helper_rfi(env);
 698 }
 699 #endif