]> git.proxmox.com Git - mirror_qemu.git/blob - target/hppa/op_helper.c
target/hppa: Implement the system mask instructions
[mirror_qemu.git] / target / hppa / op_helper.c
1 /*
2 * Helpers for HPPA instructions.
3 *
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "exec/cpu_ldst.h"
25
26 void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
27 {
28 HPPACPU *cpu = hppa_env_get_cpu(env);
29 CPUState *cs = CPU(cpu);
30
31 cs->exception_index = excp;
32 cpu_loop_exit(cs);
33 }
34
35 static void QEMU_NORETURN dynexcp(CPUHPPAState *env, int excp, uintptr_t ra)
36 {
37 HPPACPU *cpu = hppa_env_get_cpu(env);
38 CPUState *cs = CPU(cpu);
39
40 cs->exception_index = excp;
41 cpu_loop_exit_restore(cs, ra);
42 }
43
44 void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
45 {
46 if (unlikely((target_sreg)cond < 0)) {
47 dynexcp(env, EXCP_OVERFLOW, GETPC());
48 }
49 }
50
51 void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
52 {
53 if (unlikely(cond)) {
54 dynexcp(env, EXCP_COND, GETPC());
55 }
56 }
57
58 static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
59 uint32_t mask, uintptr_t ra)
60 {
61 #ifdef CONFIG_USER_ONLY
62 uint32_t old, new, cmp;
63
64 uint32_t *haddr = g2h(addr - 1);
65 old = *haddr;
66 while (1) {
67 new = (old & ~mask) | (val & mask);
68 cmp = atomic_cmpxchg(haddr, old, new);
69 if (cmp == old) {
70 return;
71 }
72 old = cmp;
73 }
74 #else
75 /* FIXME -- we can do better. */
76 cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
77 #endif
78 }
79
80 static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
81 bool parallel)
82 {
83 uintptr_t ra = GETPC();
84
85 switch (addr & 3) {
86 case 3:
87 cpu_stb_data_ra(env, addr, val, ra);
88 break;
89 case 2:
90 cpu_stw_data_ra(env, addr, val, ra);
91 break;
92 case 1:
93 /* The 3 byte store must appear atomic. */
94 if (parallel) {
95 atomic_store_3(env, addr, val, 0x00ffffffu, ra);
96 } else {
97 cpu_stb_data_ra(env, addr, val >> 16, ra);
98 cpu_stw_data_ra(env, addr + 1, val, ra);
99 }
100 break;
101 default:
102 cpu_stl_data_ra(env, addr, val, ra);
103 break;
104 }
105 }
106
107 void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
108 {
109 do_stby_b(env, addr, val, false);
110 }
111
112 void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
113 target_ureg val)
114 {
115 do_stby_b(env, addr, val, true);
116 }
117
118 static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
119 bool parallel)
120 {
121 uintptr_t ra = GETPC();
122
123 switch (addr & 3) {
124 case 3:
125 /* The 3 byte store must appear atomic. */
126 if (parallel) {
127 atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
128 } else {
129 cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
130 cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
131 }
132 break;
133 case 2:
134 cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
135 break;
136 case 1:
137 cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
138 break;
139 default:
140 /* Nothing is stored, but protection is checked and the
141 cacheline is marked dirty. */
142 #ifndef CONFIG_USER_ONLY
143 probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
144 #endif
145 break;
146 }
147 }
148
149 void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
150 {
151 do_stby_e(env, addr, val, false);
152 }
153
154 void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
155 target_ureg val)
156 {
157 do_stby_e(env, addr, val, true);
158 }
159
160 target_ureg HELPER(probe_r)(target_ulong addr)
161 {
162 #ifdef CONFIG_USER_ONLY
163 return page_check_range(addr, 1, PAGE_READ);
164 #else
165 return 1; /* FIXME */
166 #endif
167 }
168
169 target_ureg HELPER(probe_w)(target_ulong addr)
170 {
171 #ifdef CONFIG_USER_ONLY
172 return page_check_range(addr, 1, PAGE_WRITE);
173 #else
174 return 1; /* FIXME */
175 #endif
176 }
177
178 void HELPER(loaded_fr0)(CPUHPPAState *env)
179 {
180 uint32_t shadow = env->fr[0] >> 32;
181 int rm, d;
182
183 env->fr0_shadow = shadow;
184
185 switch (extract32(shadow, 9, 2)) {
186 default:
187 rm = float_round_nearest_even;
188 break;
189 case 1:
190 rm = float_round_to_zero;
191 break;
192 case 2:
193 rm = float_round_up;
194 break;
195 case 3:
196 rm = float_round_down;
197 break;
198 }
199 set_float_rounding_mode(rm, &env->fp_status);
200
201 d = extract32(shadow, 5, 1);
202 set_flush_to_zero(d, &env->fp_status);
203 set_flush_inputs_to_zero(d, &env->fp_status);
204 }
205
206 void cpu_hppa_loaded_fr0(CPUHPPAState *env)
207 {
208 helper_loaded_fr0(env);
209 }
210
211 #define CONVERT_BIT(X, SRC, DST) \
212 ((SRC) > (DST) \
213 ? (X) / ((SRC) / (DST)) & (DST) \
214 : ((X) & (SRC)) * ((DST) / (SRC)))
215
216 static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
217 {
218 uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
219 uint32_t hard_exp = 0;
220 uint32_t shadow = env->fr0_shadow;
221
222 if (likely(soft_exp == 0)) {
223 env->fr[0] = (uint64_t)shadow << 32;
224 return;
225 }
226 set_float_exception_flags(0, &env->fp_status);
227
228 hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact, 1u << 0);
229 hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
230 hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow, 1u << 2);
231 hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
232 hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid, 1u << 4);
233 shadow |= hard_exp << (32 - 5);
234 env->fr0_shadow = shadow;
235 env->fr[0] = (uint64_t)shadow << 32;
236
237 if (hard_exp & shadow) {
238 dynexcp(env, EXCP_ASSIST, ra);
239 }
240 }
241
242 float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
243 {
244 float32 ret = float32_sqrt(arg, &env->fp_status);
245 update_fr0_op(env, GETPC());
246 return ret;
247 }
248
249 float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
250 {
251 float32 ret = float32_round_to_int(arg, &env->fp_status);
252 update_fr0_op(env, GETPC());
253 return ret;
254 }
255
256 float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
257 {
258 float32 ret = float32_add(a, b, &env->fp_status);
259 update_fr0_op(env, GETPC());
260 return ret;
261 }
262
263 float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
264 {
265 float32 ret = float32_sub(a, b, &env->fp_status);
266 update_fr0_op(env, GETPC());
267 return ret;
268 }
269
270 float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
271 {
272 float32 ret = float32_mul(a, b, &env->fp_status);
273 update_fr0_op(env, GETPC());
274 return ret;
275 }
276
277 float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
278 {
279 float32 ret = float32_div(a, b, &env->fp_status);
280 update_fr0_op(env, GETPC());
281 return ret;
282 }
283
284 float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
285 {
286 float64 ret = float64_sqrt(arg, &env->fp_status);
287 update_fr0_op(env, GETPC());
288 return ret;
289 }
290
291 float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
292 {
293 float64 ret = float64_round_to_int(arg, &env->fp_status);
294 update_fr0_op(env, GETPC());
295 return ret;
296 }
297
298 float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
299 {
300 float64 ret = float64_add(a, b, &env->fp_status);
301 update_fr0_op(env, GETPC());
302 return ret;
303 }
304
305 float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
306 {
307 float64 ret = float64_sub(a, b, &env->fp_status);
308 update_fr0_op(env, GETPC());
309 return ret;
310 }
311
312 float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
313 {
314 float64 ret = float64_mul(a, b, &env->fp_status);
315 update_fr0_op(env, GETPC());
316 return ret;
317 }
318
319 float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
320 {
321 float64 ret = float64_div(a, b, &env->fp_status);
322 update_fr0_op(env, GETPC());
323 return ret;
324 }
325
326 float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
327 {
328 float64 ret = float32_to_float64(arg, &env->fp_status);
329 ret = float64_maybe_silence_nan(ret, &env->fp_status);
330 update_fr0_op(env, GETPC());
331 return ret;
332 }
333
334 float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
335 {
336 float32 ret = float64_to_float32(arg, &env->fp_status);
337 ret = float32_maybe_silence_nan(ret, &env->fp_status);
338 update_fr0_op(env, GETPC());
339 return ret;
340 }
341
342 float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
343 {
344 float32 ret = int32_to_float32(arg, &env->fp_status);
345 update_fr0_op(env, GETPC());
346 return ret;
347 }
348
349 float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
350 {
351 float32 ret = int64_to_float32(arg, &env->fp_status);
352 update_fr0_op(env, GETPC());
353 return ret;
354 }
355
356 float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
357 {
358 float64 ret = int32_to_float64(arg, &env->fp_status);
359 update_fr0_op(env, GETPC());
360 return ret;
361 }
362
363 float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
364 {
365 float64 ret = int64_to_float64(arg, &env->fp_status);
366 update_fr0_op(env, GETPC());
367 return ret;
368 }
369
370 int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
371 {
372 int32_t ret = float32_to_int32(arg, &env->fp_status);
373 update_fr0_op(env, GETPC());
374 return ret;
375 }
376
377 int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
378 {
379 int32_t ret = float64_to_int32(arg, &env->fp_status);
380 update_fr0_op(env, GETPC());
381 return ret;
382 }
383
384 int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
385 {
386 int64_t ret = float32_to_int64(arg, &env->fp_status);
387 update_fr0_op(env, GETPC());
388 return ret;
389 }
390
391 int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
392 {
393 int64_t ret = float64_to_int64(arg, &env->fp_status);
394 update_fr0_op(env, GETPC());
395 return ret;
396 }
397
398 int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
399 {
400 int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
401 update_fr0_op(env, GETPC());
402 return ret;
403 }
404
405 int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
406 {
407 int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
408 update_fr0_op(env, GETPC());
409 return ret;
410 }
411
412 int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
413 {
414 int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
415 update_fr0_op(env, GETPC());
416 return ret;
417 }
418
419 int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
420 {
421 int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
422 update_fr0_op(env, GETPC());
423 return ret;
424 }
425
426 float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
427 {
428 float32 ret = uint32_to_float32(arg, &env->fp_status);
429 update_fr0_op(env, GETPC());
430 return ret;
431 }
432
433 float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
434 {
435 float32 ret = uint64_to_float32(arg, &env->fp_status);
436 update_fr0_op(env, GETPC());
437 return ret;
438 }
439
440 float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
441 {
442 float64 ret = uint32_to_float64(arg, &env->fp_status);
443 update_fr0_op(env, GETPC());
444 return ret;
445 }
446
447 float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
448 {
449 float64 ret = uint64_to_float64(arg, &env->fp_status);
450 update_fr0_op(env, GETPC());
451 return ret;
452 }
453
454 uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
455 {
456 uint32_t ret = float32_to_uint32(arg, &env->fp_status);
457 update_fr0_op(env, GETPC());
458 return ret;
459 }
460
461 uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
462 {
463 uint32_t ret = float64_to_uint32(arg, &env->fp_status);
464 update_fr0_op(env, GETPC());
465 return ret;
466 }
467
468 uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
469 {
470 uint64_t ret = float32_to_uint64(arg, &env->fp_status);
471 update_fr0_op(env, GETPC());
472 return ret;
473 }
474
475 uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
476 {
477 uint64_t ret = float64_to_uint64(arg, &env->fp_status);
478 update_fr0_op(env, GETPC());
479 return ret;
480 }
481
482 uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
483 {
484 uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
485 update_fr0_op(env, GETPC());
486 return ret;
487 }
488
489 uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
490 {
491 uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
492 update_fr0_op(env, GETPC());
493 return ret;
494 }
495
496 uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
497 {
498 uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
499 update_fr0_op(env, GETPC());
500 return ret;
501 }
502
503 uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
504 {
505 uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
506 update_fr0_op(env, GETPC());
507 return ret;
508 }
509
510 static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
511 {
512 uint32_t shadow = env->fr0_shadow;
513
514 switch (r) {
515 case float_relation_greater:
516 c = extract32(c, 4, 1);
517 break;
518 case float_relation_less:
519 c = extract32(c, 3, 1);
520 break;
521 case float_relation_equal:
522 c = extract32(c, 2, 1);
523 break;
524 case float_relation_unordered:
525 c = extract32(c, 1, 1);
526 break;
527 default:
528 g_assert_not_reached();
529 }
530
531 if (y) {
532 /* targeted comparison */
533 /* set fpsr[ca[y - 1]] to current compare */
534 shadow = deposit32(shadow, 21 - (y - 1), 1, c);
535 } else {
536 /* queued comparison */
537 /* shift cq right by one place */
538 shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
539 /* move fpsr[c] to fpsr[cq[0]] */
540 shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
541 /* set fpsr[c] to current compare */
542 shadow = deposit32(shadow, 26, 1, c);
543 }
544
545 env->fr0_shadow = shadow;
546 env->fr[0] = (uint64_t)shadow << 32;
547 }
548
549 void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
550 uint32_t y, uint32_t c)
551 {
552 int r;
553 if (c & 1) {
554 r = float32_compare(a, b, &env->fp_status);
555 } else {
556 r = float32_compare_quiet(a, b, &env->fp_status);
557 }
558 update_fr0_op(env, GETPC());
559 update_fr0_cmp(env, y, c, r);
560 }
561
562 void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
563 uint32_t y, uint32_t c)
564 {
565 int r;
566 if (c & 1) {
567 r = float64_compare(a, b, &env->fp_status);
568 } else {
569 r = float64_compare_quiet(a, b, &env->fp_status);
570 }
571 update_fr0_op(env, GETPC());
572 update_fr0_cmp(env, y, c, r);
573 }
574
575 float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
576 {
577 float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
578 update_fr0_op(env, GETPC());
579 return ret;
580 }
581
582 float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
583 {
584 float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
585 &env->fp_status);
586 update_fr0_op(env, GETPC());
587 return ret;
588 }
589
590 float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
591 {
592 float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
593 update_fr0_op(env, GETPC());
594 return ret;
595 }
596
597 float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
598 {
599 float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
600 &env->fp_status);
601 update_fr0_op(env, GETPC());
602 return ret;
603 }
604
605 #ifndef CONFIG_USER_ONLY
606 target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
607 {
608 target_ulong psw = env->psw;
609 /* ??? On second reading this condition simply seems
610 to be undefined rather than a diagnosed trap. */
611 if (nsm & ~psw & PSW_Q) {
612 dynexcp(env, EXCP_ILL, GETPC());
613 }
614 env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
615 return psw & PSW_SM;
616 }
617 #endif