2 * Helpers for emulation of FPU-related MIPS instructions.
4 * Copyright (C) 2004-2005 Jocelyn Mayer
5 * Copyright (C) 2020 Wave Computing, Inc.
6 * Copyright (C) 2020 Aleksandar Markovic <amarkovic@wavecomp.com>
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "qemu/main-loop.h"
27 #include "qemu/host-utils.h"
28 #include "exec/helper-proto.h"
29 #include "exec/exec-all.h"
30 #include "exec/cpu_ldst.h"
31 #include "exec/memop.h"
32 #include "sysemu/kvm.h"
33 #include "fpu/softfloat.h"
36 /* Complex FPU operations which may need stack space. */
38 #define FLOAT_TWO32 make_float32(1 << 30)
39 #define FLOAT_TWO64 make_float64(1ULL << 62)
41 #define FP_TO_INT32_OVERFLOW 0x7fffffff
42 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
44 /* convert MIPS rounding mode in FCR31 to IEEE library */
45 unsigned int ieee_rm
[] = {
46 float_round_nearest_even
,
52 target_ulong
helper_cfc1(CPUMIPSState
*env
, uint32_t reg
)
54 target_ulong arg1
= 0;
58 arg1
= (int32_t)env
->active_fpu
.fcr0
;
61 /* UFR Support - Read Status FR */
62 if (env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) {
63 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
65 ((env
->CP0_Status
& (1 << CP0St_FR
)) >> CP0St_FR
);
67 do_raise_exception(env
, EXCP_RI
, GETPC());
72 /* FRE Support - read Config5.FRE bit */
73 if (env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) {
74 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
75 arg1
= (env
->CP0_Config5
>> CP0C5_FRE
) & 1;
77 helper_raise_exception(env
, EXCP_RI
);
82 arg1
= ((env
->active_fpu
.fcr31
>> 24) & 0xfe) |
83 ((env
->active_fpu
.fcr31
>> 23) & 0x1);
86 arg1
= env
->active_fpu
.fcr31
& 0x0003f07c;
89 arg1
= (env
->active_fpu
.fcr31
& 0x00000f83) |
90 ((env
->active_fpu
.fcr31
>> 22) & 0x4);
93 arg1
= (int32_t)env
->active_fpu
.fcr31
;
100 void helper_ctc1(CPUMIPSState
*env
, target_ulong arg1
, uint32_t fs
, uint32_t rt
)
104 /* UFR Alias - Reset Status FR */
105 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) && (rt
== 0))) {
108 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
109 env
->CP0_Status
&= ~(1 << CP0St_FR
);
112 do_raise_exception(env
, EXCP_RI
, GETPC());
116 /* UNFR Alias - Set Status FR */
117 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) && (rt
== 0))) {
120 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
121 env
->CP0_Status
|= (1 << CP0St_FR
);
124 do_raise_exception(env
, EXCP_RI
, GETPC());
128 /* FRE Support - clear Config5.FRE bit */
129 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) && (rt
== 0))) {
132 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
133 env
->CP0_Config5
&= ~(1 << CP0C5_FRE
);
136 helper_raise_exception(env
, EXCP_RI
);
140 /* FRE Support - set Config5.FRE bit */
141 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) && (rt
== 0))) {
144 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
145 env
->CP0_Config5
|= (1 << CP0C5_FRE
);
148 helper_raise_exception(env
, EXCP_RI
);
152 if ((env
->insn_flags
& ISA_MIPS32R6
) || (arg1
& 0xffffff00)) {
155 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0x017fffff) |
156 ((arg1
& 0xfe) << 24) |
157 ((arg1
& 0x1) << 23);
160 if (arg1
& 0x007c0000) {
163 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0xfffc0f83) |
167 if (arg1
& 0x007c0000) {
170 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0xfefff07c) |
171 (arg1
& 0x00000f83) |
172 ((arg1
& 0x4) << 22);
175 env
->active_fpu
.fcr31
= (arg1
& env
->active_fpu
.fcr31_rw_bitmask
) |
176 (env
->active_fpu
.fcr31
& ~(env
->active_fpu
.fcr31_rw_bitmask
));
179 if (env
->insn_flags
& ISA_MIPS32R6
) {
180 do_raise_exception(env
, EXCP_RI
, GETPC());
184 restore_fp_status(env
);
185 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
186 if ((GET_FP_ENABLE(env
->active_fpu
.fcr31
) | 0x20) &
187 GET_FP_CAUSE(env
->active_fpu
.fcr31
)) {
188 do_raise_exception(env
, EXCP_FPE
, GETPC());
192 int ieee_ex_to_mips(int xcpt
)
196 if (xcpt
& float_flag_invalid
) {
199 if (xcpt
& float_flag_overflow
) {
202 if (xcpt
& float_flag_underflow
) {
205 if (xcpt
& float_flag_divbyzero
) {
208 if (xcpt
& float_flag_inexact
) {
215 static inline void update_fcr31(CPUMIPSState
*env
, uintptr_t pc
)
217 int tmp
= ieee_ex_to_mips(get_float_exception_flags(
218 &env
->active_fpu
.fp_status
));
220 SET_FP_CAUSE(env
->active_fpu
.fcr31
, tmp
);
223 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
225 if (GET_FP_ENABLE(env
->active_fpu
.fcr31
) & tmp
) {
226 do_raise_exception(env
, EXCP_FPE
, pc
);
228 UPDATE_FP_FLAGS(env
->active_fpu
.fcr31
, tmp
);
235 * Single precition routines have a "s" suffix, double precision a
236 * "d" suffix, 32bit integer "w", 64bit integer "l", paired single "ps",
237 * paired single lower "pl", paired single upper "pu".
240 /* unary operations, modifying fp status */
241 uint64_t helper_float_sqrt_d(CPUMIPSState
*env
, uint64_t fdt0
)
243 fdt0
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
244 update_fcr31(env
, GETPC());
248 uint32_t helper_float_sqrt_s(CPUMIPSState
*env
, uint32_t fst0
)
250 fst0
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
251 update_fcr31(env
, GETPC());
255 uint64_t helper_float_cvtd_s(CPUMIPSState
*env
, uint32_t fst0
)
259 fdt2
= float32_to_float64(fst0
, &env
->active_fpu
.fp_status
);
260 update_fcr31(env
, GETPC());
264 uint64_t helper_float_cvtd_w(CPUMIPSState
*env
, uint32_t wt0
)
268 fdt2
= int32_to_float64(wt0
, &env
->active_fpu
.fp_status
);
269 update_fcr31(env
, GETPC());
273 uint64_t helper_float_cvtd_l(CPUMIPSState
*env
, uint64_t dt0
)
277 fdt2
= int64_to_float64(dt0
, &env
->active_fpu
.fp_status
);
278 update_fcr31(env
, GETPC());
282 uint64_t helper_float_cvt_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
286 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
287 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
288 & (float_flag_invalid
| float_flag_overflow
)) {
289 dt2
= FP_TO_INT64_OVERFLOW
;
291 update_fcr31(env
, GETPC());
295 uint64_t helper_float_cvt_l_s(CPUMIPSState
*env
, uint32_t fst0
)
299 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
300 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
301 & (float_flag_invalid
| float_flag_overflow
)) {
302 dt2
= FP_TO_INT64_OVERFLOW
;
304 update_fcr31(env
, GETPC());
308 uint64_t helper_float_cvtps_pw(CPUMIPSState
*env
, uint64_t dt0
)
313 fst2
= int32_to_float32(dt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
314 fsth2
= int32_to_float32(dt0
>> 32, &env
->active_fpu
.fp_status
);
315 update_fcr31(env
, GETPC());
316 return ((uint64_t)fsth2
<< 32) | fst2
;
319 uint64_t helper_float_cvtpw_ps(CPUMIPSState
*env
, uint64_t fdt0
)
325 wt2
= float32_to_int32(fdt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
326 excp
= get_float_exception_flags(&env
->active_fpu
.fp_status
);
327 if (excp
& (float_flag_overflow
| float_flag_invalid
)) {
328 wt2
= FP_TO_INT32_OVERFLOW
;
331 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
332 wth2
= float32_to_int32(fdt0
>> 32, &env
->active_fpu
.fp_status
);
333 excph
= get_float_exception_flags(&env
->active_fpu
.fp_status
);
334 if (excph
& (float_flag_overflow
| float_flag_invalid
)) {
335 wth2
= FP_TO_INT32_OVERFLOW
;
338 set_float_exception_flags(excp
| excph
, &env
->active_fpu
.fp_status
);
339 update_fcr31(env
, GETPC());
341 return ((uint64_t)wth2
<< 32) | wt2
;
344 uint32_t helper_float_cvts_d(CPUMIPSState
*env
, uint64_t fdt0
)
348 fst2
= float64_to_float32(fdt0
, &env
->active_fpu
.fp_status
);
349 update_fcr31(env
, GETPC());
353 uint32_t helper_float_cvts_w(CPUMIPSState
*env
, uint32_t wt0
)
357 fst2
= int32_to_float32(wt0
, &env
->active_fpu
.fp_status
);
358 update_fcr31(env
, GETPC());
362 uint32_t helper_float_cvts_l(CPUMIPSState
*env
, uint64_t dt0
)
366 fst2
= int64_to_float32(dt0
, &env
->active_fpu
.fp_status
);
367 update_fcr31(env
, GETPC());
371 uint32_t helper_float_cvts_pl(CPUMIPSState
*env
, uint32_t wt0
)
376 update_fcr31(env
, GETPC());
380 uint32_t helper_float_cvts_pu(CPUMIPSState
*env
, uint32_t wth0
)
385 update_fcr31(env
, GETPC());
389 uint32_t helper_float_cvt_w_s(CPUMIPSState
*env
, uint32_t fst0
)
393 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
394 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
395 & (float_flag_invalid
| float_flag_overflow
)) {
396 wt2
= FP_TO_INT32_OVERFLOW
;
398 update_fcr31(env
, GETPC());
402 uint32_t helper_float_cvt_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
406 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
407 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
408 & (float_flag_invalid
| float_flag_overflow
)) {
409 wt2
= FP_TO_INT32_OVERFLOW
;
411 update_fcr31(env
, GETPC());
415 uint64_t helper_float_round_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
419 set_float_rounding_mode(float_round_nearest_even
,
420 &env
->active_fpu
.fp_status
);
421 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
422 restore_rounding_mode(env
);
423 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
424 & (float_flag_invalid
| float_flag_overflow
)) {
425 dt2
= FP_TO_INT64_OVERFLOW
;
427 update_fcr31(env
, GETPC());
431 uint64_t helper_float_round_l_s(CPUMIPSState
*env
, uint32_t fst0
)
435 set_float_rounding_mode(float_round_nearest_even
,
436 &env
->active_fpu
.fp_status
);
437 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
438 restore_rounding_mode(env
);
439 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
440 & (float_flag_invalid
| float_flag_overflow
)) {
441 dt2
= FP_TO_INT64_OVERFLOW
;
443 update_fcr31(env
, GETPC());
447 uint32_t helper_float_round_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
451 set_float_rounding_mode(float_round_nearest_even
,
452 &env
->active_fpu
.fp_status
);
453 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
454 restore_rounding_mode(env
);
455 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
456 & (float_flag_invalid
| float_flag_overflow
)) {
457 wt2
= FP_TO_INT32_OVERFLOW
;
459 update_fcr31(env
, GETPC());
463 uint32_t helper_float_round_w_s(CPUMIPSState
*env
, uint32_t fst0
)
467 set_float_rounding_mode(float_round_nearest_even
,
468 &env
->active_fpu
.fp_status
);
469 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
470 restore_rounding_mode(env
);
471 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
472 & (float_flag_invalid
| float_flag_overflow
)) {
473 wt2
= FP_TO_INT32_OVERFLOW
;
475 update_fcr31(env
, GETPC());
479 uint64_t helper_float_trunc_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
483 dt2
= float64_to_int64_round_to_zero(fdt0
,
484 &env
->active_fpu
.fp_status
);
485 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
486 & (float_flag_invalid
| float_flag_overflow
)) {
487 dt2
= FP_TO_INT64_OVERFLOW
;
489 update_fcr31(env
, GETPC());
493 uint64_t helper_float_trunc_l_s(CPUMIPSState
*env
, uint32_t fst0
)
497 dt2
= float32_to_int64_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
498 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
499 & (float_flag_invalid
| float_flag_overflow
)) {
500 dt2
= FP_TO_INT64_OVERFLOW
;
502 update_fcr31(env
, GETPC());
506 uint32_t helper_float_trunc_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
510 wt2
= float64_to_int32_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
511 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
512 & (float_flag_invalid
| float_flag_overflow
)) {
513 wt2
= FP_TO_INT32_OVERFLOW
;
515 update_fcr31(env
, GETPC());
519 uint32_t helper_float_trunc_w_s(CPUMIPSState
*env
, uint32_t fst0
)
523 wt2
= float32_to_int32_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
524 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
525 & (float_flag_invalid
| float_flag_overflow
)) {
526 wt2
= FP_TO_INT32_OVERFLOW
;
528 update_fcr31(env
, GETPC());
532 uint64_t helper_float_ceil_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
536 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
537 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
538 restore_rounding_mode(env
);
539 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
540 & (float_flag_invalid
| float_flag_overflow
)) {
541 dt2
= FP_TO_INT64_OVERFLOW
;
543 update_fcr31(env
, GETPC());
547 uint64_t helper_float_ceil_l_s(CPUMIPSState
*env
, uint32_t fst0
)
551 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
552 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
553 restore_rounding_mode(env
);
554 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
555 & (float_flag_invalid
| float_flag_overflow
)) {
556 dt2
= FP_TO_INT64_OVERFLOW
;
558 update_fcr31(env
, GETPC());
562 uint32_t helper_float_ceil_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
566 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
567 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
568 restore_rounding_mode(env
);
569 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
570 & (float_flag_invalid
| float_flag_overflow
)) {
571 wt2
= FP_TO_INT32_OVERFLOW
;
573 update_fcr31(env
, GETPC());
577 uint32_t helper_float_ceil_w_s(CPUMIPSState
*env
, uint32_t fst0
)
581 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
582 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
583 restore_rounding_mode(env
);
584 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
585 & (float_flag_invalid
| float_flag_overflow
)) {
586 wt2
= FP_TO_INT32_OVERFLOW
;
588 update_fcr31(env
, GETPC());
592 uint64_t helper_float_floor_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
596 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
597 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
598 restore_rounding_mode(env
);
599 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
600 & (float_flag_invalid
| float_flag_overflow
)) {
601 dt2
= FP_TO_INT64_OVERFLOW
;
603 update_fcr31(env
, GETPC());
607 uint64_t helper_float_floor_l_s(CPUMIPSState
*env
, uint32_t fst0
)
611 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
612 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
613 restore_rounding_mode(env
);
614 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
615 & (float_flag_invalid
| float_flag_overflow
)) {
616 dt2
= FP_TO_INT64_OVERFLOW
;
618 update_fcr31(env
, GETPC());
622 uint32_t helper_float_floor_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
626 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
627 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
628 restore_rounding_mode(env
);
629 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
630 & (float_flag_invalid
| float_flag_overflow
)) {
631 wt2
= FP_TO_INT32_OVERFLOW
;
633 update_fcr31(env
, GETPC());
637 uint32_t helper_float_floor_w_s(CPUMIPSState
*env
, uint32_t fst0
)
641 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
642 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
643 restore_rounding_mode(env
);
644 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
645 & (float_flag_invalid
| float_flag_overflow
)) {
646 wt2
= FP_TO_INT32_OVERFLOW
;
648 update_fcr31(env
, GETPC());
652 uint64_t helper_float_cvt_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
656 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
657 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
658 & float_flag_invalid
) {
659 if (float64_is_any_nan(fdt0
)) {
663 update_fcr31(env
, GETPC());
667 uint64_t helper_float_cvt_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
671 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
672 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
673 & float_flag_invalid
) {
674 if (float32_is_any_nan(fst0
)) {
678 update_fcr31(env
, GETPC());
682 uint32_t helper_float_cvt_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
686 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
687 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
688 & float_flag_invalid
) {
689 if (float64_is_any_nan(fdt0
)) {
693 update_fcr31(env
, GETPC());
697 uint32_t helper_float_cvt_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
701 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
702 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
703 & float_flag_invalid
) {
704 if (float32_is_any_nan(fst0
)) {
708 update_fcr31(env
, GETPC());
712 uint64_t helper_float_round_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
716 set_float_rounding_mode(float_round_nearest_even
,
717 &env
->active_fpu
.fp_status
);
718 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
719 restore_rounding_mode(env
);
720 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
721 & float_flag_invalid
) {
722 if (float64_is_any_nan(fdt0
)) {
726 update_fcr31(env
, GETPC());
730 uint64_t helper_float_round_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
734 set_float_rounding_mode(float_round_nearest_even
,
735 &env
->active_fpu
.fp_status
);
736 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
737 restore_rounding_mode(env
);
738 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
739 & float_flag_invalid
) {
740 if (float32_is_any_nan(fst0
)) {
744 update_fcr31(env
, GETPC());
748 uint32_t helper_float_round_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
752 set_float_rounding_mode(float_round_nearest_even
,
753 &env
->active_fpu
.fp_status
);
754 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
755 restore_rounding_mode(env
);
756 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
757 & float_flag_invalid
) {
758 if (float64_is_any_nan(fdt0
)) {
762 update_fcr31(env
, GETPC());
766 uint32_t helper_float_round_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
770 set_float_rounding_mode(float_round_nearest_even
,
771 &env
->active_fpu
.fp_status
);
772 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
773 restore_rounding_mode(env
);
774 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
775 & float_flag_invalid
) {
776 if (float32_is_any_nan(fst0
)) {
780 update_fcr31(env
, GETPC());
784 uint64_t helper_float_trunc_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
788 dt2
= float64_to_int64_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
789 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
790 & float_flag_invalid
) {
791 if (float64_is_any_nan(fdt0
)) {
795 update_fcr31(env
, GETPC());
799 uint64_t helper_float_trunc_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
803 dt2
= float32_to_int64_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
804 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
805 & float_flag_invalid
) {
806 if (float32_is_any_nan(fst0
)) {
810 update_fcr31(env
, GETPC());
814 uint32_t helper_float_trunc_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
818 wt2
= float64_to_int32_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
819 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
820 & float_flag_invalid
) {
821 if (float64_is_any_nan(fdt0
)) {
825 update_fcr31(env
, GETPC());
829 uint32_t helper_float_trunc_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
833 wt2
= float32_to_int32_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
834 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
835 & float_flag_invalid
) {
836 if (float32_is_any_nan(fst0
)) {
840 update_fcr31(env
, GETPC());
844 uint64_t helper_float_ceil_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
848 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
849 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
850 restore_rounding_mode(env
);
851 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
852 & float_flag_invalid
) {
853 if (float64_is_any_nan(fdt0
)) {
857 update_fcr31(env
, GETPC());
861 uint64_t helper_float_ceil_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
865 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
866 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
867 restore_rounding_mode(env
);
868 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
869 & float_flag_invalid
) {
870 if (float32_is_any_nan(fst0
)) {
874 update_fcr31(env
, GETPC());
878 uint32_t helper_float_ceil_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
882 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
883 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
884 restore_rounding_mode(env
);
885 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
886 & float_flag_invalid
) {
887 if (float64_is_any_nan(fdt0
)) {
891 update_fcr31(env
, GETPC());
895 uint32_t helper_float_ceil_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
899 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
900 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
901 restore_rounding_mode(env
);
902 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
903 & float_flag_invalid
) {
904 if (float32_is_any_nan(fst0
)) {
908 update_fcr31(env
, GETPC());
912 uint64_t helper_float_floor_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
916 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
917 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
918 restore_rounding_mode(env
);
919 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
920 & float_flag_invalid
) {
921 if (float64_is_any_nan(fdt0
)) {
925 update_fcr31(env
, GETPC());
929 uint64_t helper_float_floor_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
933 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
934 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
935 restore_rounding_mode(env
);
936 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
937 & float_flag_invalid
) {
938 if (float32_is_any_nan(fst0
)) {
942 update_fcr31(env
, GETPC());
946 uint32_t helper_float_floor_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
950 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
951 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
952 restore_rounding_mode(env
);
953 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
954 & float_flag_invalid
) {
955 if (float64_is_any_nan(fdt0
)) {
959 update_fcr31(env
, GETPC());
963 uint32_t helper_float_floor_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
967 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
968 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
969 restore_rounding_mode(env
);
970 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
971 & float_flag_invalid
) {
972 if (float32_is_any_nan(fst0
)) {
976 update_fcr31(env
, GETPC());
980 /* unary operations, not modifying fp status */
981 #define FLOAT_UNOP(name) \
982 uint64_t helper_float_ ## name ## _d(uint64_t fdt0) \
984 return float64_ ## name(fdt0); \
986 uint32_t helper_float_ ## name ## _s(uint32_t fst0) \
988 return float32_ ## name(fst0); \
990 uint64_t helper_float_ ## name ## _ps(uint64_t fdt0) \
995 wt0 = float32_ ## name(fdt0 & 0XFFFFFFFF); \
996 wth0 = float32_ ## name(fdt0 >> 32); \
997 return ((uint64_t)wth0 << 32) | wt0; \
1003 /* MIPS specific unary operations */
1004 uint64_t helper_float_recip_d(CPUMIPSState
*env
, uint64_t fdt0
)
1008 fdt2
= float64_div(float64_one
, fdt0
, &env
->active_fpu
.fp_status
);
1009 update_fcr31(env
, GETPC());
1013 uint32_t helper_float_recip_s(CPUMIPSState
*env
, uint32_t fst0
)
1017 fst2
= float32_div(float32_one
, fst0
, &env
->active_fpu
.fp_status
);
1018 update_fcr31(env
, GETPC());
1022 uint64_t helper_float_rsqrt_d(CPUMIPSState
*env
, uint64_t fdt0
)
1026 fdt2
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
1027 fdt2
= float64_div(float64_one
, fdt2
, &env
->active_fpu
.fp_status
);
1028 update_fcr31(env
, GETPC());
1032 uint32_t helper_float_rsqrt_s(CPUMIPSState
*env
, uint32_t fst0
)
1036 fst2
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
1037 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1038 update_fcr31(env
, GETPC());
1042 uint64_t helper_float_recip1_d(CPUMIPSState
*env
, uint64_t fdt0
)
1046 fdt2
= float64_div(float64_one
, fdt0
, &env
->active_fpu
.fp_status
);
1047 update_fcr31(env
, GETPC());
1051 uint32_t helper_float_recip1_s(CPUMIPSState
*env
, uint32_t fst0
)
1055 fst2
= float32_div(float32_one
, fst0
, &env
->active_fpu
.fp_status
);
1056 update_fcr31(env
, GETPC());
1060 uint64_t helper_float_recip1_ps(CPUMIPSState
*env
, uint64_t fdt0
)
1065 fst2
= float32_div(float32_one
, fdt0
& 0XFFFFFFFF,
1066 &env
->active_fpu
.fp_status
);
1067 fsth2
= float32_div(float32_one
, fdt0
>> 32, &env
->active_fpu
.fp_status
);
1068 update_fcr31(env
, GETPC());
1069 return ((uint64_t)fsth2
<< 32) | fst2
;
1072 uint64_t helper_float_rsqrt1_d(CPUMIPSState
*env
, uint64_t fdt0
)
1076 fdt2
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
1077 fdt2
= float64_div(float64_one
, fdt2
, &env
->active_fpu
.fp_status
);
1078 update_fcr31(env
, GETPC());
1082 uint32_t helper_float_rsqrt1_s(CPUMIPSState
*env
, uint32_t fst0
)
1086 fst2
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
1087 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1088 update_fcr31(env
, GETPC());
1092 uint64_t helper_float_rsqrt1_ps(CPUMIPSState
*env
, uint64_t fdt0
)
1097 fst2
= float32_sqrt(fdt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
1098 fsth2
= float32_sqrt(fdt0
>> 32, &env
->active_fpu
.fp_status
);
1099 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1100 fsth2
= float32_div(float32_one
, fsth2
, &env
->active_fpu
.fp_status
);
1101 update_fcr31(env
, GETPC());
1102 return ((uint64_t)fsth2
<< 32) | fst2
;
1105 uint64_t helper_float_rint_d(CPUMIPSState
*env
, uint64_t fs
)
1109 fdret
= float64_round_to_int(fs
, &env
->active_fpu
.fp_status
);
1110 update_fcr31(env
, GETPC());
1114 uint32_t helper_float_rint_s(CPUMIPSState
*env
, uint32_t fs
)
1118 fdret
= float32_round_to_int(fs
, &env
->active_fpu
.fp_status
);
1119 update_fcr31(env
, GETPC());
1123 #define FLOAT_CLASS_SIGNALING_NAN 0x001
1124 #define FLOAT_CLASS_QUIET_NAN 0x002
1125 #define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
1126 #define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
1127 #define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
1128 #define FLOAT_CLASS_NEGATIVE_ZERO 0x020
1129 #define FLOAT_CLASS_POSITIVE_INFINITY 0x040
1130 #define FLOAT_CLASS_POSITIVE_NORMAL 0x080
1131 #define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
1132 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
1134 uint64_t float_class_d(uint64_t arg
, float_status
*status
)
1136 if (float64_is_signaling_nan(arg
, status
)) {
1137 return FLOAT_CLASS_SIGNALING_NAN
;
1138 } else if (float64_is_quiet_nan(arg
, status
)) {
1139 return FLOAT_CLASS_QUIET_NAN
;
1140 } else if (float64_is_neg(arg
)) {
1141 if (float64_is_infinity(arg
)) {
1142 return FLOAT_CLASS_NEGATIVE_INFINITY
;
1143 } else if (float64_is_zero(arg
)) {
1144 return FLOAT_CLASS_NEGATIVE_ZERO
;
1145 } else if (float64_is_zero_or_denormal(arg
)) {
1146 return FLOAT_CLASS_NEGATIVE_SUBNORMAL
;
1148 return FLOAT_CLASS_NEGATIVE_NORMAL
;
1151 if (float64_is_infinity(arg
)) {
1152 return FLOAT_CLASS_POSITIVE_INFINITY
;
1153 } else if (float64_is_zero(arg
)) {
1154 return FLOAT_CLASS_POSITIVE_ZERO
;
1155 } else if (float64_is_zero_or_denormal(arg
)) {
1156 return FLOAT_CLASS_POSITIVE_SUBNORMAL
;
1158 return FLOAT_CLASS_POSITIVE_NORMAL
;
1163 uint64_t helper_float_class_d(CPUMIPSState
*env
, uint64_t arg
)
1165 return float_class_d(arg
, &env
->active_fpu
.fp_status
);
1168 uint32_t float_class_s(uint32_t arg
, float_status
*status
)
1170 if (float32_is_signaling_nan(arg
, status
)) {
1171 return FLOAT_CLASS_SIGNALING_NAN
;
1172 } else if (float32_is_quiet_nan(arg
, status
)) {
1173 return FLOAT_CLASS_QUIET_NAN
;
1174 } else if (float32_is_neg(arg
)) {
1175 if (float32_is_infinity(arg
)) {
1176 return FLOAT_CLASS_NEGATIVE_INFINITY
;
1177 } else if (float32_is_zero(arg
)) {
1178 return FLOAT_CLASS_NEGATIVE_ZERO
;
1179 } else if (float32_is_zero_or_denormal(arg
)) {
1180 return FLOAT_CLASS_NEGATIVE_SUBNORMAL
;
1182 return FLOAT_CLASS_NEGATIVE_NORMAL
;
1185 if (float32_is_infinity(arg
)) {
1186 return FLOAT_CLASS_POSITIVE_INFINITY
;
1187 } else if (float32_is_zero(arg
)) {
1188 return FLOAT_CLASS_POSITIVE_ZERO
;
1189 } else if (float32_is_zero_or_denormal(arg
)) {
1190 return FLOAT_CLASS_POSITIVE_SUBNORMAL
;
1192 return FLOAT_CLASS_POSITIVE_NORMAL
;
1197 uint32_t helper_float_class_s(CPUMIPSState
*env
, uint32_t arg
)
1199 return float_class_s(arg
, &env
->active_fpu
.fp_status
);
1202 /* binary operations */
1204 uint64_t helper_float_add_d(CPUMIPSState
*env
,
1205 uint64_t fdt0
, uint64_t fdt1
)
1209 dt2
= float64_add(fdt0
, fdt1
, &env
->active_fpu
.fp_status
);
1210 update_fcr31(env
, GETPC());
1214 uint32_t helper_float_add_s(CPUMIPSState
*env
,
1215 uint32_t fst0
, uint32_t fst1
)
1219 wt2
= float32_sub(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1220 update_fcr31(env
, GETPC());
1224 uint64_t helper_float_add_ps(CPUMIPSState
*env
,
1225 uint64_t fdt0
, uint64_t fdt1
)
1227 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1228 uint32_t fsth0
= fdt0
>> 32;
1229 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1230 uint32_t fsth1
= fdt1
>> 32;
1234 wtl2
= float32_add(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1235 wth2
= float32_add(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1236 update_fcr31(env
, GETPC());
1237 return ((uint64_t)wth2
<< 32) | wtl2
;
1240 uint64_t helper_float_sub_d(CPUMIPSState
*env
,
1241 uint64_t fdt0
, uint64_t fdt1
)
1245 dt2
= float64_sub(fdt0
, fdt1
, &env
->active_fpu
.fp_status
);
1246 update_fcr31(env
, GETPC());
1250 uint32_t helper_float_sub_s(CPUMIPSState
*env
,
1251 uint32_t fst0
, uint32_t fst1
)
1255 wt2
= float32_sub(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1256 update_fcr31(env
, GETPC());
1260 uint64_t helper_float_sub_ps(CPUMIPSState
*env
,
1261 uint64_t fdt0
, uint64_t fdt1
)
1263 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1264 uint32_t fsth0
= fdt0
>> 32;
1265 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1266 uint32_t fsth1
= fdt1
>> 32;
1270 wtl2
= float32_sub(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1271 wth2
= float32_sub(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1272 update_fcr31(env
, GETPC());
1273 return ((uint64_t)wth2
<< 32) | wtl2
;
1276 uint64_t helper_float_mul_d(CPUMIPSState
*env
,
1277 uint64_t fdt0
, uint64_t fdt1
)
1281 dt2
= float64_mul(fdt0
, fdt1
, &env
->active_fpu
.fp_status
);
1282 update_fcr31(env
, GETPC());
1286 uint32_t helper_float_mul_s(CPUMIPSState
*env
,
1287 uint32_t fst0
, uint32_t fst1
)
1291 wt2
= float32_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1292 update_fcr31(env
, GETPC());
1296 uint64_t helper_float_mul_ps(CPUMIPSState
*env
,
1297 uint64_t fdt0
, uint64_t fdt1
)
1299 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1300 uint32_t fsth0
= fdt0
>> 32;
1301 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1302 uint32_t fsth1
= fdt1
>> 32;
1306 wtl2
= float32_mul(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1307 wth2
= float32_mul(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1308 update_fcr31(env
, GETPC());
1309 return ((uint64_t)wth2
<< 32) | wtl2
;
1312 uint64_t helper_float_div_d(CPUMIPSState
*env
,
1313 uint64_t fdt0
, uint64_t fdt1
)
1317 dt2
= float64_div(fdt0
, fdt1
, &env
->active_fpu
.fp_status
);
1318 update_fcr31(env
, GETPC());
1322 uint32_t helper_float_div_s(CPUMIPSState
*env
,
1323 uint32_t fst0
, uint32_t fst1
)
1327 wt2
= float32_div(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1328 update_fcr31(env
, GETPC());
1332 uint64_t helper_float_div_ps(CPUMIPSState
*env
,
1333 uint64_t fdt0
, uint64_t fdt1
)
1335 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1336 uint32_t fsth0
= fdt0
>> 32;
1337 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1338 uint32_t fsth1
= fdt1
>> 32;
1342 wtl2
= float32_div(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1343 wth2
= float32_div(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1344 update_fcr31(env
, GETPC());
1345 return ((uint64_t)wth2
<< 32) | wtl2
;
1349 /* MIPS specific binary operations */
1350 uint64_t helper_float_recip2_d(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1352 fdt2
= float64_mul(fdt0
, fdt2
, &env
->active_fpu
.fp_status
);
1353 fdt2
= float64_chs(float64_sub(fdt2
, float64_one
,
1354 &env
->active_fpu
.fp_status
));
1355 update_fcr31(env
, GETPC());
1359 uint32_t helper_float_recip2_s(CPUMIPSState
*env
, uint32_t fst0
, uint32_t fst2
)
1361 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1362 fst2
= float32_chs(float32_sub(fst2
, float32_one
,
1363 &env
->active_fpu
.fp_status
));
1364 update_fcr31(env
, GETPC());
1368 uint64_t helper_float_recip2_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1370 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1371 uint32_t fsth0
= fdt0
>> 32;
1372 uint32_t fst2
= fdt2
& 0XFFFFFFFF;
1373 uint32_t fsth2
= fdt2
>> 32;
1375 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1376 fsth2
= float32_mul(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1377 fst2
= float32_chs(float32_sub(fst2
, float32_one
,
1378 &env
->active_fpu
.fp_status
));
1379 fsth2
= float32_chs(float32_sub(fsth2
, float32_one
,
1380 &env
->active_fpu
.fp_status
));
1381 update_fcr31(env
, GETPC());
1382 return ((uint64_t)fsth2
<< 32) | fst2
;
1385 uint64_t helper_float_rsqrt2_d(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1387 fdt2
= float64_mul(fdt0
, fdt2
, &env
->active_fpu
.fp_status
);
1388 fdt2
= float64_sub(fdt2
, float64_one
, &env
->active_fpu
.fp_status
);
1389 fdt2
= float64_chs(float64_div(fdt2
, FLOAT_TWO64
,
1390 &env
->active_fpu
.fp_status
));
1391 update_fcr31(env
, GETPC());
1395 uint32_t helper_float_rsqrt2_s(CPUMIPSState
*env
, uint32_t fst0
, uint32_t fst2
)
1397 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1398 fst2
= float32_sub(fst2
, float32_one
, &env
->active_fpu
.fp_status
);
1399 fst2
= float32_chs(float32_div(fst2
, FLOAT_TWO32
,
1400 &env
->active_fpu
.fp_status
));
1401 update_fcr31(env
, GETPC());
1405 uint64_t helper_float_rsqrt2_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1407 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1408 uint32_t fsth0
= fdt0
>> 32;
1409 uint32_t fst2
= fdt2
& 0XFFFFFFFF;
1410 uint32_t fsth2
= fdt2
>> 32;
1412 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1413 fsth2
= float32_mul(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1414 fst2
= float32_sub(fst2
, float32_one
, &env
->active_fpu
.fp_status
);
1415 fsth2
= float32_sub(fsth2
, float32_one
, &env
->active_fpu
.fp_status
);
1416 fst2
= float32_chs(float32_div(fst2
, FLOAT_TWO32
,
1417 &env
->active_fpu
.fp_status
));
1418 fsth2
= float32_chs(float32_div(fsth2
, FLOAT_TWO32
,
1419 &env
->active_fpu
.fp_status
));
1420 update_fcr31(env
, GETPC());
1421 return ((uint64_t)fsth2
<< 32) | fst2
;
1424 uint64_t helper_float_addr_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt1
)
1426 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1427 uint32_t fsth0
= fdt0
>> 32;
1428 uint32_t fst1
= fdt1
& 0XFFFFFFFF;
1429 uint32_t fsth1
= fdt1
>> 32;
1433 fst2
= float32_add(fst0
, fsth0
, &env
->active_fpu
.fp_status
);
1434 fsth2
= float32_add(fst1
, fsth1
, &env
->active_fpu
.fp_status
);
1435 update_fcr31(env
, GETPC());
1436 return ((uint64_t)fsth2
<< 32) | fst2
;
1439 uint64_t helper_float_mulr_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt1
)
1441 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1442 uint32_t fsth0
= fdt0
>> 32;
1443 uint32_t fst1
= fdt1
& 0XFFFFFFFF;
1444 uint32_t fsth1
= fdt1
>> 32;
1448 fst2
= float32_mul(fst0
, fsth0
, &env
->active_fpu
.fp_status
);
1449 fsth2
= float32_mul(fst1
, fsth1
, &env
->active_fpu
.fp_status
);
1450 update_fcr31(env
, GETPC());
1451 return ((uint64_t)fsth2
<< 32) | fst2
;
1454 #define FLOAT_MINMAX(name, bits, minmaxfunc) \
1455 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1456 uint ## bits ## _t fs, \
1457 uint ## bits ## _t ft) \
1459 uint ## bits ## _t fdret; \
1461 fdret = float ## bits ## _ ## minmaxfunc(fs, ft, \
1462 &env->active_fpu.fp_status); \
1463 update_fcr31(env, GETPC()); \
1467 FLOAT_MINMAX(max_s
, 32, maxnum
)
1468 FLOAT_MINMAX(max_d
, 64, maxnum
)
1469 FLOAT_MINMAX(maxa_s
, 32, maxnummag
)
1470 FLOAT_MINMAX(maxa_d
, 64, maxnummag
)
1472 FLOAT_MINMAX(min_s
, 32, minnum
)
1473 FLOAT_MINMAX(min_d
, 64, minnum
)
1474 FLOAT_MINMAX(mina_s
, 32, minnummag
)
1475 FLOAT_MINMAX(mina_d
, 64, minnummag
)
1478 /* ternary operations */
1480 uint64_t helper_float_madd_d(CPUMIPSState
*env
, uint64_t fst0
,
1481 uint64_t fst1
, uint64_t fst2
)
1483 fst0
= float64_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1484 fst0
= float64_add(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1486 update_fcr31(env
, GETPC());
1490 uint32_t helper_float_madd_s(CPUMIPSState
*env
, uint32_t fst0
,
1491 uint32_t fst1
, uint32_t fst2
)
1493 fst0
= float32_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1494 fst0
= float32_add(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1496 update_fcr31(env
, GETPC());
1500 uint64_t helper_float_madd_ps(CPUMIPSState
*env
, uint64_t fdt0
,
1501 uint64_t fdt1
, uint64_t fdt2
)
1503 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1504 uint32_t fsth0
= fdt0
>> 32;
1505 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1506 uint32_t fsth1
= fdt1
>> 32;
1507 uint32_t fstl2
= fdt2
& 0XFFFFFFFF;
1508 uint32_t fsth2
= fdt2
>> 32;
1510 fstl0
= float32_mul(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1511 fstl0
= float32_add(fstl0
, fstl2
, &env
->active_fpu
.fp_status
);
1512 fsth0
= float32_mul(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1513 fsth0
= float32_add(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1515 update_fcr31(env
, GETPC());
1516 return ((uint64_t)fsth0
<< 32) | fstl0
;
1519 uint64_t helper_float_msub_d(CPUMIPSState
*env
, uint64_t fst0
,
1520 uint64_t fst1
, uint64_t fst2
)
1522 fst0
= float64_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1523 fst0
= float64_sub(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1525 update_fcr31(env
, GETPC());
1529 uint32_t helper_float_msub_s(CPUMIPSState
*env
, uint32_t fst0
,
1530 uint32_t fst1
, uint32_t fst2
)
1532 fst0
= float32_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1533 fst0
= float32_sub(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1535 update_fcr31(env
, GETPC());
1539 uint64_t helper_float_msub_ps(CPUMIPSState
*env
, uint64_t fdt0
,
1540 uint64_t fdt1
, uint64_t fdt2
)
1542 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1543 uint32_t fsth0
= fdt0
>> 32;
1544 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1545 uint32_t fsth1
= fdt1
>> 32;
1546 uint32_t fstl2
= fdt2
& 0XFFFFFFFF;
1547 uint32_t fsth2
= fdt2
>> 32;
1549 fstl0
= float32_mul(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1550 fstl0
= float32_sub(fstl0
, fstl2
, &env
->active_fpu
.fp_status
);
1551 fsth0
= float32_mul(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1552 fsth0
= float32_sub(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1554 update_fcr31(env
, GETPC());
1555 return ((uint64_t)fsth0
<< 32) | fstl0
;
1558 uint64_t helper_float_nmadd_d(CPUMIPSState
*env
, uint64_t fst0
,
1559 uint64_t fst1
, uint64_t fst2
)
1561 fst0
= float64_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1562 fst0
= float64_add(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1563 fst0
= float64_chs(fst0
);
1565 update_fcr31(env
, GETPC());
1569 uint32_t helper_float_nmadd_s(CPUMIPSState
*env
, uint32_t fst0
,
1570 uint32_t fst1
, uint32_t fst2
)
1572 fst0
= float32_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1573 fst0
= float32_add(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1574 fst0
= float32_chs(fst0
);
1576 update_fcr31(env
, GETPC());
1580 uint64_t helper_float_nmadd_ps(CPUMIPSState
*env
, uint64_t fdt0
,
1581 uint64_t fdt1
, uint64_t fdt2
)
1583 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1584 uint32_t fsth0
= fdt0
>> 32;
1585 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1586 uint32_t fsth1
= fdt1
>> 32;
1587 uint32_t fstl2
= fdt2
& 0XFFFFFFFF;
1588 uint32_t fsth2
= fdt2
>> 32;
1590 fstl0
= float32_mul(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1591 fstl0
= float32_add(fstl0
, fstl2
, &env
->active_fpu
.fp_status
);
1592 fstl0
= float32_chs(fstl0
);
1593 fsth0
= float32_mul(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1594 fsth0
= float32_add(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1595 fsth0
= float32_chs(fsth0
);
1597 update_fcr31(env
, GETPC());
1598 return ((uint64_t)fsth0
<< 32) | fstl0
;
1601 uint64_t helper_float_nmsub_d(CPUMIPSState
*env
, uint64_t fst0
,
1602 uint64_t fst1
, uint64_t fst2
)
1604 fst0
= float64_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1605 fst0
= float64_sub(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1606 fst0
= float64_chs(fst0
);
1608 update_fcr31(env
, GETPC());
1612 uint32_t helper_float_nmsub_s(CPUMIPSState
*env
, uint32_t fst0
,
1613 uint32_t fst1
, uint32_t fst2
)
1615 fst0
= float32_mul(fst0
, fst1
, &env
->active_fpu
.fp_status
);
1616 fst0
= float32_sub(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1617 fst0
= float32_chs(fst0
);
1619 update_fcr31(env
, GETPC());
1623 uint64_t helper_float_nmsub_ps(CPUMIPSState
*env
, uint64_t fdt0
,
1624 uint64_t fdt1
, uint64_t fdt2
)
1626 uint32_t fstl0
= fdt0
& 0XFFFFFFFF;
1627 uint32_t fsth0
= fdt0
>> 32;
1628 uint32_t fstl1
= fdt1
& 0XFFFFFFFF;
1629 uint32_t fsth1
= fdt1
>> 32;
1630 uint32_t fstl2
= fdt2
& 0XFFFFFFFF;
1631 uint32_t fsth2
= fdt2
>> 32;
1633 fstl0
= float32_mul(fstl0
, fstl1
, &env
->active_fpu
.fp_status
);
1634 fstl0
= float32_sub(fstl0
, fstl2
, &env
->active_fpu
.fp_status
);
1635 fstl0
= float32_chs(fstl0
);
1636 fsth0
= float32_mul(fsth0
, fsth1
, &env
->active_fpu
.fp_status
);
1637 fsth0
= float32_sub(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1638 fsth0
= float32_chs(fsth0
);
1640 update_fcr31(env
, GETPC());
1641 return ((uint64_t)fsth0
<< 32) | fstl0
;
1645 #define FLOAT_FMADDSUB(name, bits, muladd_arg) \
1646 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1647 uint ## bits ## _t fs, \
1648 uint ## bits ## _t ft, \
1649 uint ## bits ## _t fd) \
1651 uint ## bits ## _t fdret; \
1653 fdret = float ## bits ## _muladd(fs, ft, fd, muladd_arg, \
1654 &env->active_fpu.fp_status); \
1655 update_fcr31(env, GETPC()); \
1659 FLOAT_FMADDSUB(maddf_s
, 32, 0)
1660 FLOAT_FMADDSUB(maddf_d
, 64, 0)
1661 FLOAT_FMADDSUB(msubf_s
, 32, float_muladd_negate_product
)
1662 FLOAT_FMADDSUB(msubf_d
, 64, float_muladd_negate_product
)
1663 #undef FLOAT_FMADDSUB
1665 /* compare operations */
1666 #define FOP_COND_D(op, cond) \
1667 void helper_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1668 uint64_t fdt1, int cc) \
1672 update_fcr31(env, GETPC()); \
1674 SET_FP_COND(cc, env->active_fpu); \
1676 CLEAR_FP_COND(cc, env->active_fpu); \
1678 void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1679 uint64_t fdt1, int cc) \
1682 fdt0 = float64_abs(fdt0); \
1683 fdt1 = float64_abs(fdt1); \
1685 update_fcr31(env, GETPC()); \
1687 SET_FP_COND(cc, env->active_fpu); \
1689 CLEAR_FP_COND(cc, env->active_fpu); \
1693 * NOTE: the comma operator will make "cond" to eval to false,
1694 * but float64_unordered_quiet() is still called.
1696 FOP_COND_D(f
, (float64_unordered_quiet(fdt1
, fdt0
,
1697 &env
->active_fpu
.fp_status
), 0))
1698 FOP_COND_D(un
, float64_unordered_quiet(fdt1
, fdt0
,
1699 &env
->active_fpu
.fp_status
))
1700 FOP_COND_D(eq
, float64_eq_quiet(fdt0
, fdt1
,
1701 &env
->active_fpu
.fp_status
))
1702 FOP_COND_D(ueq
, float64_unordered_quiet(fdt1
, fdt0
,
1703 &env
->active_fpu
.fp_status
)
1704 || float64_eq_quiet(fdt0
, fdt1
,
1705 &env
->active_fpu
.fp_status
))
1706 FOP_COND_D(olt
, float64_lt_quiet(fdt0
, fdt1
,
1707 &env
->active_fpu
.fp_status
))
1708 FOP_COND_D(ult
, float64_unordered_quiet(fdt1
, fdt0
,
1709 &env
->active_fpu
.fp_status
)
1710 || float64_lt_quiet(fdt0
, fdt1
,
1711 &env
->active_fpu
.fp_status
))
1712 FOP_COND_D(ole
, float64_le_quiet(fdt0
, fdt1
,
1713 &env
->active_fpu
.fp_status
))
1714 FOP_COND_D(ule
, float64_unordered_quiet(fdt1
, fdt0
,
1715 &env
->active_fpu
.fp_status
)
1716 || float64_le_quiet(fdt0
, fdt1
,
1717 &env
->active_fpu
.fp_status
))
1719 * NOTE: the comma operator will make "cond" to eval to false,
1720 * but float64_unordered() is still called.
1722 FOP_COND_D(sf
, (float64_unordered(fdt1
, fdt0
,
1723 &env
->active_fpu
.fp_status
), 0))
1724 FOP_COND_D(ngle
, float64_unordered(fdt1
, fdt0
,
1725 &env
->active_fpu
.fp_status
))
1726 FOP_COND_D(seq
, float64_eq(fdt0
, fdt1
,
1727 &env
->active_fpu
.fp_status
))
1728 FOP_COND_D(ngl
, float64_unordered(fdt1
, fdt0
,
1729 &env
->active_fpu
.fp_status
)
1730 || float64_eq(fdt0
, fdt1
,
1731 &env
->active_fpu
.fp_status
))
1732 FOP_COND_D(lt
, float64_lt(fdt0
, fdt1
,
1733 &env
->active_fpu
.fp_status
))
1734 FOP_COND_D(nge
, float64_unordered(fdt1
, fdt0
,
1735 &env
->active_fpu
.fp_status
)
1736 || float64_lt(fdt0
, fdt1
,
1737 &env
->active_fpu
.fp_status
))
1738 FOP_COND_D(le
, float64_le(fdt0
, fdt1
,
1739 &env
->active_fpu
.fp_status
))
1740 FOP_COND_D(ngt
, float64_unordered(fdt1
, fdt0
,
1741 &env
->active_fpu
.fp_status
)
1742 || float64_le(fdt0
, fdt1
,
1743 &env
->active_fpu
.fp_status
))
1745 #define FOP_COND_S(op, cond) \
1746 void helper_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1747 uint32_t fst1, int cc) \
1751 update_fcr31(env, GETPC()); \
1753 SET_FP_COND(cc, env->active_fpu); \
1755 CLEAR_FP_COND(cc, env->active_fpu); \
1757 void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1758 uint32_t fst1, int cc) \
1761 fst0 = float32_abs(fst0); \
1762 fst1 = float32_abs(fst1); \
1764 update_fcr31(env, GETPC()); \
1766 SET_FP_COND(cc, env->active_fpu); \
1768 CLEAR_FP_COND(cc, env->active_fpu); \
1772 * NOTE: the comma operator will make "cond" to eval to false,
1773 * but float32_unordered_quiet() is still called.
1775 FOP_COND_S(f
, (float32_unordered_quiet(fst1
, fst0
,
1776 &env
->active_fpu
.fp_status
), 0))
1777 FOP_COND_S(un
, float32_unordered_quiet(fst1
, fst0
,
1778 &env
->active_fpu
.fp_status
))
1779 FOP_COND_S(eq
, float32_eq_quiet(fst0
, fst1
,
1780 &env
->active_fpu
.fp_status
))
1781 FOP_COND_S(ueq
, float32_unordered_quiet(fst1
, fst0
,
1782 &env
->active_fpu
.fp_status
)
1783 || float32_eq_quiet(fst0
, fst1
,
1784 &env
->active_fpu
.fp_status
))
1785 FOP_COND_S(olt
, float32_lt_quiet(fst0
, fst1
,
1786 &env
->active_fpu
.fp_status
))
1787 FOP_COND_S(ult
, float32_unordered_quiet(fst1
, fst0
,
1788 &env
->active_fpu
.fp_status
)
1789 || float32_lt_quiet(fst0
, fst1
,
1790 &env
->active_fpu
.fp_status
))
1791 FOP_COND_S(ole
, float32_le_quiet(fst0
, fst1
,
1792 &env
->active_fpu
.fp_status
))
1793 FOP_COND_S(ule
, float32_unordered_quiet(fst1
, fst0
,
1794 &env
->active_fpu
.fp_status
)
1795 || float32_le_quiet(fst0
, fst1
,
1796 &env
->active_fpu
.fp_status
))
1798 * NOTE: the comma operator will make "cond" to eval to false,
1799 * but float32_unordered() is still called.
1801 FOP_COND_S(sf
, (float32_unordered(fst1
, fst0
,
1802 &env
->active_fpu
.fp_status
), 0))
1803 FOP_COND_S(ngle
, float32_unordered(fst1
, fst0
,
1804 &env
->active_fpu
.fp_status
))
1805 FOP_COND_S(seq
, float32_eq(fst0
, fst1
,
1806 &env
->active_fpu
.fp_status
))
1807 FOP_COND_S(ngl
, float32_unordered(fst1
, fst0
,
1808 &env
->active_fpu
.fp_status
)
1809 || float32_eq(fst0
, fst1
,
1810 &env
->active_fpu
.fp_status
))
1811 FOP_COND_S(lt
, float32_lt(fst0
, fst1
,
1812 &env
->active_fpu
.fp_status
))
1813 FOP_COND_S(nge
, float32_unordered(fst1
, fst0
,
1814 &env
->active_fpu
.fp_status
)
1815 || float32_lt(fst0
, fst1
,
1816 &env
->active_fpu
.fp_status
))
1817 FOP_COND_S(le
, float32_le(fst0
, fst1
,
1818 &env
->active_fpu
.fp_status
))
1819 FOP_COND_S(ngt
, float32_unordered(fst1
, fst0
,
1820 &env
->active_fpu
.fp_status
)
1821 || float32_le(fst0
, fst1
,
1822 &env
->active_fpu
.fp_status
))
1824 #define FOP_COND_PS(op, condl, condh) \
1825 void helper_cmp_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1826 uint64_t fdt1, int cc) \
1828 uint32_t fst0, fsth0, fst1, fsth1; \
1830 fst0 = fdt0 & 0XFFFFFFFF; \
1831 fsth0 = fdt0 >> 32; \
1832 fst1 = fdt1 & 0XFFFFFFFF; \
1833 fsth1 = fdt1 >> 32; \
1836 update_fcr31(env, GETPC()); \
1838 SET_FP_COND(cc, env->active_fpu); \
1840 CLEAR_FP_COND(cc, env->active_fpu); \
1842 SET_FP_COND(cc + 1, env->active_fpu); \
1844 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1846 void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1847 uint64_t fdt1, int cc) \
1849 uint32_t fst0, fsth0, fst1, fsth1; \
1851 fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
1852 fsth0 = float32_abs(fdt0 >> 32); \
1853 fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
1854 fsth1 = float32_abs(fdt1 >> 32); \
1857 update_fcr31(env, GETPC()); \
1859 SET_FP_COND(cc, env->active_fpu); \
1861 CLEAR_FP_COND(cc, env->active_fpu); \
1863 SET_FP_COND(cc + 1, env->active_fpu); \
1865 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1869 * NOTE: the comma operator will make "cond" to eval to false,
1870 * but float32_unordered_quiet() is still called.
1872 FOP_COND_PS(f
, (float32_unordered_quiet(fst1
, fst0
,
1873 &env
->active_fpu
.fp_status
), 0),
1874 (float32_unordered_quiet(fsth1
, fsth0
,
1875 &env
->active_fpu
.fp_status
), 0))
1876 FOP_COND_PS(un
, float32_unordered_quiet(fst1
, fst0
,
1877 &env
->active_fpu
.fp_status
),
1878 float32_unordered_quiet(fsth1
, fsth0
,
1879 &env
->active_fpu
.fp_status
))
1880 FOP_COND_PS(eq
, float32_eq_quiet(fst0
, fst1
,
1881 &env
->active_fpu
.fp_status
),
1882 float32_eq_quiet(fsth0
, fsth1
,
1883 &env
->active_fpu
.fp_status
))
1884 FOP_COND_PS(ueq
, float32_unordered_quiet(fst1
, fst0
,
1885 &env
->active_fpu
.fp_status
)
1886 || float32_eq_quiet(fst0
, fst1
,
1887 &env
->active_fpu
.fp_status
),
1888 float32_unordered_quiet(fsth1
, fsth0
,
1889 &env
->active_fpu
.fp_status
)
1890 || float32_eq_quiet(fsth0
, fsth1
,
1891 &env
->active_fpu
.fp_status
))
1892 FOP_COND_PS(olt
, float32_lt_quiet(fst0
, fst1
,
1893 &env
->active_fpu
.fp_status
),
1894 float32_lt_quiet(fsth0
, fsth1
,
1895 &env
->active_fpu
.fp_status
))
1896 FOP_COND_PS(ult
, float32_unordered_quiet(fst1
, fst0
,
1897 &env
->active_fpu
.fp_status
)
1898 || float32_lt_quiet(fst0
, fst1
,
1899 &env
->active_fpu
.fp_status
),
1900 float32_unordered_quiet(fsth1
, fsth0
,
1901 &env
->active_fpu
.fp_status
)
1902 || float32_lt_quiet(fsth0
, fsth1
,
1903 &env
->active_fpu
.fp_status
))
1904 FOP_COND_PS(ole
, float32_le_quiet(fst0
, fst1
,
1905 &env
->active_fpu
.fp_status
),
1906 float32_le_quiet(fsth0
, fsth1
,
1907 &env
->active_fpu
.fp_status
))
1908 FOP_COND_PS(ule
, float32_unordered_quiet(fst1
, fst0
,
1909 &env
->active_fpu
.fp_status
)
1910 || float32_le_quiet(fst0
, fst1
,
1911 &env
->active_fpu
.fp_status
),
1912 float32_unordered_quiet(fsth1
, fsth0
,
1913 &env
->active_fpu
.fp_status
)
1914 || float32_le_quiet(fsth0
, fsth1
,
1915 &env
->active_fpu
.fp_status
))
1917 * NOTE: the comma operator will make "cond" to eval to false,
1918 * but float32_unordered() is still called.
1920 FOP_COND_PS(sf
, (float32_unordered(fst1
, fst0
,
1921 &env
->active_fpu
.fp_status
), 0),
1922 (float32_unordered(fsth1
, fsth0
,
1923 &env
->active_fpu
.fp_status
), 0))
1924 FOP_COND_PS(ngle
, float32_unordered(fst1
, fst0
,
1925 &env
->active_fpu
.fp_status
),
1926 float32_unordered(fsth1
, fsth0
,
1927 &env
->active_fpu
.fp_status
))
1928 FOP_COND_PS(seq
, float32_eq(fst0
, fst1
,
1929 &env
->active_fpu
.fp_status
),
1930 float32_eq(fsth0
, fsth1
,
1931 &env
->active_fpu
.fp_status
))
1932 FOP_COND_PS(ngl
, float32_unordered(fst1
, fst0
,
1933 &env
->active_fpu
.fp_status
)
1934 || float32_eq(fst0
, fst1
,
1935 &env
->active_fpu
.fp_status
),
1936 float32_unordered(fsth1
, fsth0
,
1937 &env
->active_fpu
.fp_status
)
1938 || float32_eq(fsth0
, fsth1
,
1939 &env
->active_fpu
.fp_status
))
1940 FOP_COND_PS(lt
, float32_lt(fst0
, fst1
,
1941 &env
->active_fpu
.fp_status
),
1942 float32_lt(fsth0
, fsth1
,
1943 &env
->active_fpu
.fp_status
))
1944 FOP_COND_PS(nge
, float32_unordered(fst1
, fst0
,
1945 &env
->active_fpu
.fp_status
)
1946 || float32_lt(fst0
, fst1
,
1947 &env
->active_fpu
.fp_status
),
1948 float32_unordered(fsth1
, fsth0
,
1949 &env
->active_fpu
.fp_status
)
1950 || float32_lt(fsth0
, fsth1
,
1951 &env
->active_fpu
.fp_status
))
1952 FOP_COND_PS(le
, float32_le(fst0
, fst1
,
1953 &env
->active_fpu
.fp_status
),
1954 float32_le(fsth0
, fsth1
,
1955 &env
->active_fpu
.fp_status
))
1956 FOP_COND_PS(ngt
, float32_unordered(fst1
, fst0
,
1957 &env
->active_fpu
.fp_status
)
1958 || float32_le(fst0
, fst1
,
1959 &env
->active_fpu
.fp_status
),
1960 float32_unordered(fsth1
, fsth0
,
1961 &env
->active_fpu
.fp_status
)
1962 || float32_le(fsth0
, fsth1
,
1963 &env
->active_fpu
.fp_status
))
1965 /* R6 compare operations */
1966 #define FOP_CONDN_D(op, cond) \
1967 uint64_t helper_r6_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1972 update_fcr31(env, GETPC()); \
1981 * NOTE: the comma operator will make "cond" to eval to false,
1982 * but float64_unordered_quiet() is still called.
1984 FOP_CONDN_D(af
, (float64_unordered_quiet(fdt1
, fdt0
,
1985 &env
->active_fpu
.fp_status
), 0))
1986 FOP_CONDN_D(un
, (float64_unordered_quiet(fdt1
, fdt0
,
1987 &env
->active_fpu
.fp_status
)))
1988 FOP_CONDN_D(eq
, (float64_eq_quiet(fdt0
, fdt1
,
1989 &env
->active_fpu
.fp_status
)))
1990 FOP_CONDN_D(ueq
, (float64_unordered_quiet(fdt1
, fdt0
,
1991 &env
->active_fpu
.fp_status
)
1992 || float64_eq_quiet(fdt0
, fdt1
,
1993 &env
->active_fpu
.fp_status
)))
1994 FOP_CONDN_D(lt
, (float64_lt_quiet(fdt0
, fdt1
,
1995 &env
->active_fpu
.fp_status
)))
1996 FOP_CONDN_D(ult
, (float64_unordered_quiet(fdt1
, fdt0
,
1997 &env
->active_fpu
.fp_status
)
1998 || float64_lt_quiet(fdt0
, fdt1
,
1999 &env
->active_fpu
.fp_status
)))
2000 FOP_CONDN_D(le
, (float64_le_quiet(fdt0
, fdt1
,
2001 &env
->active_fpu
.fp_status
)))
2002 FOP_CONDN_D(ule
, (float64_unordered_quiet(fdt1
, fdt0
,
2003 &env
->active_fpu
.fp_status
)
2004 || float64_le_quiet(fdt0
, fdt1
,
2005 &env
->active_fpu
.fp_status
)))
2007 * NOTE: the comma operator will make "cond" to eval to false,
2008 * but float64_unordered() is still called.\
2010 FOP_CONDN_D(saf
, (float64_unordered(fdt1
, fdt0
,
2011 &env
->active_fpu
.fp_status
), 0))
2012 FOP_CONDN_D(sun
, (float64_unordered(fdt1
, fdt0
,
2013 &env
->active_fpu
.fp_status
)))
2014 FOP_CONDN_D(seq
, (float64_eq(fdt0
, fdt1
,
2015 &env
->active_fpu
.fp_status
)))
2016 FOP_CONDN_D(sueq
, (float64_unordered(fdt1
, fdt0
,
2017 &env
->active_fpu
.fp_status
)
2018 || float64_eq(fdt0
, fdt1
,
2019 &env
->active_fpu
.fp_status
)))
2020 FOP_CONDN_D(slt
, (float64_lt(fdt0
, fdt1
,
2021 &env
->active_fpu
.fp_status
)))
2022 FOP_CONDN_D(sult
, (float64_unordered(fdt1
, fdt0
,
2023 &env
->active_fpu
.fp_status
)
2024 || float64_lt(fdt0
, fdt1
,
2025 &env
->active_fpu
.fp_status
)))
2026 FOP_CONDN_D(sle
, (float64_le(fdt0
, fdt1
,
2027 &env
->active_fpu
.fp_status
)))
2028 FOP_CONDN_D(sule
, (float64_unordered(fdt1
, fdt0
,
2029 &env
->active_fpu
.fp_status
)
2030 || float64_le(fdt0
, fdt1
,
2031 &env
->active_fpu
.fp_status
)))
2032 FOP_CONDN_D(or, (float64_le_quiet(fdt1
, fdt0
,
2033 &env
->active_fpu
.fp_status
)
2034 || float64_le_quiet(fdt0
, fdt1
,
2035 &env
->active_fpu
.fp_status
)))
2036 FOP_CONDN_D(une
, (float64_unordered_quiet(fdt1
, fdt0
,
2037 &env
->active_fpu
.fp_status
)
2038 || float64_lt_quiet(fdt1
, fdt0
,
2039 &env
->active_fpu
.fp_status
)
2040 || float64_lt_quiet(fdt0
, fdt1
,
2041 &env
->active_fpu
.fp_status
)))
2042 FOP_CONDN_D(ne
, (float64_lt_quiet(fdt1
, fdt0
,
2043 &env
->active_fpu
.fp_status
)
2044 || float64_lt_quiet(fdt0
, fdt1
,
2045 &env
->active_fpu
.fp_status
)))
2046 FOP_CONDN_D(sor
, (float64_le(fdt1
, fdt0
,
2047 &env
->active_fpu
.fp_status
)
2048 || float64_le(fdt0
, fdt1
,
2049 &env
->active_fpu
.fp_status
)))
2050 FOP_CONDN_D(sune
, (float64_unordered(fdt1
, fdt0
,
2051 &env
->active_fpu
.fp_status
)
2052 || float64_lt(fdt1
, fdt0
,
2053 &env
->active_fpu
.fp_status
)
2054 || float64_lt(fdt0
, fdt1
,
2055 &env
->active_fpu
.fp_status
)))
2056 FOP_CONDN_D(sne
, (float64_lt(fdt1
, fdt0
,
2057 &env
->active_fpu
.fp_status
)
2058 || float64_lt(fdt0
, fdt1
,
2059 &env
->active_fpu
.fp_status
)))
2061 #define FOP_CONDN_S(op, cond) \
2062 uint32_t helper_r6_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
2067 update_fcr31(env, GETPC()); \
2076 * NOTE: the comma operator will make "cond" to eval to false,
2077 * but float32_unordered_quiet() is still called.
2079 FOP_CONDN_S(af
, (float32_unordered_quiet(fst1
, fst0
,
2080 &env
->active_fpu
.fp_status
), 0))
2081 FOP_CONDN_S(un
, (float32_unordered_quiet(fst1
, fst0
,
2082 &env
->active_fpu
.fp_status
)))
2083 FOP_CONDN_S(eq
, (float32_eq_quiet(fst0
, fst1
,
2084 &env
->active_fpu
.fp_status
)))
2085 FOP_CONDN_S(ueq
, (float32_unordered_quiet(fst1
, fst0
,
2086 &env
->active_fpu
.fp_status
)
2087 || float32_eq_quiet(fst0
, fst1
,
2088 &env
->active_fpu
.fp_status
)))
2089 FOP_CONDN_S(lt
, (float32_lt_quiet(fst0
, fst1
,
2090 &env
->active_fpu
.fp_status
)))
2091 FOP_CONDN_S(ult
, (float32_unordered_quiet(fst1
, fst0
,
2092 &env
->active_fpu
.fp_status
)
2093 || float32_lt_quiet(fst0
, fst1
,
2094 &env
->active_fpu
.fp_status
)))
2095 FOP_CONDN_S(le
, (float32_le_quiet(fst0
, fst1
,
2096 &env
->active_fpu
.fp_status
)))
2097 FOP_CONDN_S(ule
, (float32_unordered_quiet(fst1
, fst0
,
2098 &env
->active_fpu
.fp_status
)
2099 || float32_le_quiet(fst0
, fst1
,
2100 &env
->active_fpu
.fp_status
)))
2102 * NOTE: the comma operator will make "cond" to eval to false,
2103 * but float32_unordered() is still called.
2105 FOP_CONDN_S(saf
, (float32_unordered(fst1
, fst0
,
2106 &env
->active_fpu
.fp_status
), 0))
2107 FOP_CONDN_S(sun
, (float32_unordered(fst1
, fst0
,
2108 &env
->active_fpu
.fp_status
)))
2109 FOP_CONDN_S(seq
, (float32_eq(fst0
, fst1
,
2110 &env
->active_fpu
.fp_status
)))
2111 FOP_CONDN_S(sueq
, (float32_unordered(fst1
, fst0
,
2112 &env
->active_fpu
.fp_status
)
2113 || float32_eq(fst0
, fst1
,
2114 &env
->active_fpu
.fp_status
)))
2115 FOP_CONDN_S(slt
, (float32_lt(fst0
, fst1
,
2116 &env
->active_fpu
.fp_status
)))
2117 FOP_CONDN_S(sult
, (float32_unordered(fst1
, fst0
,
2118 &env
->active_fpu
.fp_status
)
2119 || float32_lt(fst0
, fst1
,
2120 &env
->active_fpu
.fp_status
)))
2121 FOP_CONDN_S(sle
, (float32_le(fst0
, fst1
,
2122 &env
->active_fpu
.fp_status
)))
2123 FOP_CONDN_S(sule
, (float32_unordered(fst1
, fst0
,
2124 &env
->active_fpu
.fp_status
)
2125 || float32_le(fst0
, fst1
,
2126 &env
->active_fpu
.fp_status
)))
2127 FOP_CONDN_S(or, (float32_le_quiet(fst1
, fst0
,
2128 &env
->active_fpu
.fp_status
)
2129 || float32_le_quiet(fst0
, fst1
,
2130 &env
->active_fpu
.fp_status
)))
2131 FOP_CONDN_S(une
, (float32_unordered_quiet(fst1
, fst0
,
2132 &env
->active_fpu
.fp_status
)
2133 || float32_lt_quiet(fst1
, fst0
,
2134 &env
->active_fpu
.fp_status
)
2135 || float32_lt_quiet(fst0
, fst1
,
2136 &env
->active_fpu
.fp_status
)))
2137 FOP_CONDN_S(ne
, (float32_lt_quiet(fst1
, fst0
,
2138 &env
->active_fpu
.fp_status
)
2139 || float32_lt_quiet(fst0
, fst1
,
2140 &env
->active_fpu
.fp_status
)))
2141 FOP_CONDN_S(sor
, (float32_le(fst1
, fst0
,
2142 &env
->active_fpu
.fp_status
)
2143 || float32_le(fst0
, fst1
,
2144 &env
->active_fpu
.fp_status
)))
2145 FOP_CONDN_S(sune
, (float32_unordered(fst1
, fst0
,
2146 &env
->active_fpu
.fp_status
)
2147 || float32_lt(fst1
, fst0
,
2148 &env
->active_fpu
.fp_status
)
2149 || float32_lt(fst0
, fst1
,
2150 &env
->active_fpu
.fp_status
)))
2151 FOP_CONDN_S(sne
, (float32_lt(fst1
, fst0
,
2152 &env
->active_fpu
.fp_status
)
2153 || float32_lt(fst0
, fst1
,
2154 &env
->active_fpu
.fp_status
)))