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1 /*
2 * Helpers for emulation of FPU-related MIPS instructions.
3 *
4 * Copyright (C) 2004-2005 Jocelyn Mayer
5 * Copyright (C) 2020 Wave Computing, Inc.
6 * Copyright (C) 2020 Aleksandar Markovic <amarkovic@wavecomp.com>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 *
21 */
22
23 #include "qemu/osdep.h"
24 #include "qemu/main-loop.h"
25 #include "cpu.h"
26 #include "internal.h"
27 #include "qemu/host-utils.h"
28 #include "exec/helper-proto.h"
29 #include "exec/exec-all.h"
30 #include "exec/cpu_ldst.h"
31 #include "exec/memop.h"
32 #include "sysemu/kvm.h"
33 #include "fpu/softfloat.h"
34
35
36 /* Complex FPU operations which may need stack space. */
37
38 #define FLOAT_TWO32 make_float32(1 << 30)
39 #define FLOAT_TWO64 make_float64(1ULL << 62)
40
41 #define FP_TO_INT32_OVERFLOW 0x7fffffff
42 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
43
44 /* convert MIPS rounding mode in FCR31 to IEEE library */
45 unsigned int ieee_rm[] = {
46 float_round_nearest_even,
47 float_round_to_zero,
48 float_round_up,
49 float_round_down
50 };
51
52 target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
53 {
54 target_ulong arg1 = 0;
55
56 switch (reg) {
57 case 0:
58 arg1 = (int32_t)env->active_fpu.fcr0;
59 break;
60 case 1:
61 /* UFR Support - Read Status FR */
62 if (env->active_fpu.fcr0 & (1 << FCR0_UFRP)) {
63 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
64 arg1 = (int32_t)
65 ((env->CP0_Status & (1 << CP0St_FR)) >> CP0St_FR);
66 } else {
67 do_raise_exception(env, EXCP_RI, GETPC());
68 }
69 }
70 break;
71 case 5:
72 /* FRE Support - read Config5.FRE bit */
73 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) {
74 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
75 arg1 = (env->CP0_Config5 >> CP0C5_FRE) & 1;
76 } else {
77 helper_raise_exception(env, EXCP_RI);
78 }
79 }
80 break;
81 case 25:
82 arg1 = ((env->active_fpu.fcr31 >> 24) & 0xfe) |
83 ((env->active_fpu.fcr31 >> 23) & 0x1);
84 break;
85 case 26:
86 arg1 = env->active_fpu.fcr31 & 0x0003f07c;
87 break;
88 case 28:
89 arg1 = (env->active_fpu.fcr31 & 0x00000f83) |
90 ((env->active_fpu.fcr31 >> 22) & 0x4);
91 break;
92 default:
93 arg1 = (int32_t)env->active_fpu.fcr31;
94 break;
95 }
96
97 return arg1;
98 }
99
100 void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
101 {
102 switch (fs) {
103 case 1:
104 /* UFR Alias - Reset Status FR */
105 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) {
106 return;
107 }
108 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
109 env->CP0_Status &= ~(1 << CP0St_FR);
110 compute_hflags(env);
111 } else {
112 do_raise_exception(env, EXCP_RI, GETPC());
113 }
114 break;
115 case 4:
116 /* UNFR Alias - Set Status FR */
117 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) {
118 return;
119 }
120 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
121 env->CP0_Status |= (1 << CP0St_FR);
122 compute_hflags(env);
123 } else {
124 do_raise_exception(env, EXCP_RI, GETPC());
125 }
126 break;
127 case 5:
128 /* FRE Support - clear Config5.FRE bit */
129 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) {
130 return;
131 }
132 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
133 env->CP0_Config5 &= ~(1 << CP0C5_FRE);
134 compute_hflags(env);
135 } else {
136 helper_raise_exception(env, EXCP_RI);
137 }
138 break;
139 case 6:
140 /* FRE Support - set Config5.FRE bit */
141 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) {
142 return;
143 }
144 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
145 env->CP0_Config5 |= (1 << CP0C5_FRE);
146 compute_hflags(env);
147 } else {
148 helper_raise_exception(env, EXCP_RI);
149 }
150 break;
151 case 25:
152 if ((env->insn_flags & ISA_MIPS32R6) || (arg1 & 0xffffff00)) {
153 return;
154 }
155 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0x017fffff) |
156 ((arg1 & 0xfe) << 24) |
157 ((arg1 & 0x1) << 23);
158 break;
159 case 26:
160 if (arg1 & 0x007c0000) {
161 return;
162 }
163 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0xfffc0f83) |
164 (arg1 & 0x0003f07c);
165 break;
166 case 28:
167 if (arg1 & 0x007c0000) {
168 return;
169 }
170 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0xfefff07c) |
171 (arg1 & 0x00000f83) |
172 ((arg1 & 0x4) << 22);
173 break;
174 case 31:
175 env->active_fpu.fcr31 = (arg1 & env->active_fpu.fcr31_rw_bitmask) |
176 (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitmask));
177 break;
178 default:
179 if (env->insn_flags & ISA_MIPS32R6) {
180 do_raise_exception(env, EXCP_RI, GETPC());
181 }
182 return;
183 }
184 restore_fp_status(env);
185 set_float_exception_flags(0, &env->active_fpu.fp_status);
186 if ((GET_FP_ENABLE(env->active_fpu.fcr31) | 0x20) &
187 GET_FP_CAUSE(env->active_fpu.fcr31)) {
188 do_raise_exception(env, EXCP_FPE, GETPC());
189 }
190 }
191
192 int ieee_ex_to_mips(int xcpt)
193 {
194 int ret = 0;
195 if (xcpt) {
196 if (xcpt & float_flag_invalid) {
197 ret |= FP_INVALID;
198 }
199 if (xcpt & float_flag_overflow) {
200 ret |= FP_OVERFLOW;
201 }
202 if (xcpt & float_flag_underflow) {
203 ret |= FP_UNDERFLOW;
204 }
205 if (xcpt & float_flag_divbyzero) {
206 ret |= FP_DIV0;
207 }
208 if (xcpt & float_flag_inexact) {
209 ret |= FP_INEXACT;
210 }
211 }
212 return ret;
213 }
214
215 static inline void update_fcr31(CPUMIPSState *env, uintptr_t pc)
216 {
217 int tmp = ieee_ex_to_mips(get_float_exception_flags(
218 &env->active_fpu.fp_status));
219
220 SET_FP_CAUSE(env->active_fpu.fcr31, tmp);
221
222 if (tmp) {
223 set_float_exception_flags(0, &env->active_fpu.fp_status);
224
225 if (GET_FP_ENABLE(env->active_fpu.fcr31) & tmp) {
226 do_raise_exception(env, EXCP_FPE, pc);
227 } else {
228 UPDATE_FP_FLAGS(env->active_fpu.fcr31, tmp);
229 }
230 }
231 }
232
233 /*
234 * Float support.
235 * Single precition routines have a "s" suffix, double precision a
236 * "d" suffix, 32bit integer "w", 64bit integer "l", paired single "ps",
237 * paired single lower "pl", paired single upper "pu".
238 */
239
240 /* unary operations, modifying fp status */
241 uint64_t helper_float_sqrt_d(CPUMIPSState *env, uint64_t fdt0)
242 {
243 fdt0 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
244 update_fcr31(env, GETPC());
245 return fdt0;
246 }
247
248 uint32_t helper_float_sqrt_s(CPUMIPSState *env, uint32_t fst0)
249 {
250 fst0 = float32_sqrt(fst0, &env->active_fpu.fp_status);
251 update_fcr31(env, GETPC());
252 return fst0;
253 }
254
255 uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0)
256 {
257 uint64_t fdt2;
258
259 fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status);
260 update_fcr31(env, GETPC());
261 return fdt2;
262 }
263
264 uint64_t helper_float_cvtd_w(CPUMIPSState *env, uint32_t wt0)
265 {
266 uint64_t fdt2;
267
268 fdt2 = int32_to_float64(wt0, &env->active_fpu.fp_status);
269 update_fcr31(env, GETPC());
270 return fdt2;
271 }
272
273 uint64_t helper_float_cvtd_l(CPUMIPSState *env, uint64_t dt0)
274 {
275 uint64_t fdt2;
276
277 fdt2 = int64_to_float64(dt0, &env->active_fpu.fp_status);
278 update_fcr31(env, GETPC());
279 return fdt2;
280 }
281
282 uint64_t helper_float_cvt_l_d(CPUMIPSState *env, uint64_t fdt0)
283 {
284 uint64_t dt2;
285
286 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
287 if (get_float_exception_flags(&env->active_fpu.fp_status)
288 & (float_flag_invalid | float_flag_overflow)) {
289 dt2 = FP_TO_INT64_OVERFLOW;
290 }
291 update_fcr31(env, GETPC());
292 return dt2;
293 }
294
295 uint64_t helper_float_cvt_l_s(CPUMIPSState *env, uint32_t fst0)
296 {
297 uint64_t dt2;
298
299 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
300 if (get_float_exception_flags(&env->active_fpu.fp_status)
301 & (float_flag_invalid | float_flag_overflow)) {
302 dt2 = FP_TO_INT64_OVERFLOW;
303 }
304 update_fcr31(env, GETPC());
305 return dt2;
306 }
307
308 uint64_t helper_float_cvtps_pw(CPUMIPSState *env, uint64_t dt0)
309 {
310 uint32_t fst2;
311 uint32_t fsth2;
312
313 fst2 = int32_to_float32(dt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
314 fsth2 = int32_to_float32(dt0 >> 32, &env->active_fpu.fp_status);
315 update_fcr31(env, GETPC());
316 return ((uint64_t)fsth2 << 32) | fst2;
317 }
318
319 uint64_t helper_float_cvtpw_ps(CPUMIPSState *env, uint64_t fdt0)
320 {
321 uint32_t wt2;
322 uint32_t wth2;
323 int excp, excph;
324
325 wt2 = float32_to_int32(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
326 excp = get_float_exception_flags(&env->active_fpu.fp_status);
327 if (excp & (float_flag_overflow | float_flag_invalid)) {
328 wt2 = FP_TO_INT32_OVERFLOW;
329 }
330
331 set_float_exception_flags(0, &env->active_fpu.fp_status);
332 wth2 = float32_to_int32(fdt0 >> 32, &env->active_fpu.fp_status);
333 excph = get_float_exception_flags(&env->active_fpu.fp_status);
334 if (excph & (float_flag_overflow | float_flag_invalid)) {
335 wth2 = FP_TO_INT32_OVERFLOW;
336 }
337
338 set_float_exception_flags(excp | excph, &env->active_fpu.fp_status);
339 update_fcr31(env, GETPC());
340
341 return ((uint64_t)wth2 << 32) | wt2;
342 }
343
344 uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0)
345 {
346 uint32_t fst2;
347
348 fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status);
349 update_fcr31(env, GETPC());
350 return fst2;
351 }
352
353 uint32_t helper_float_cvts_w(CPUMIPSState *env, uint32_t wt0)
354 {
355 uint32_t fst2;
356
357 fst2 = int32_to_float32(wt0, &env->active_fpu.fp_status);
358 update_fcr31(env, GETPC());
359 return fst2;
360 }
361
362 uint32_t helper_float_cvts_l(CPUMIPSState *env, uint64_t dt0)
363 {
364 uint32_t fst2;
365
366 fst2 = int64_to_float32(dt0, &env->active_fpu.fp_status);
367 update_fcr31(env, GETPC());
368 return fst2;
369 }
370
371 uint32_t helper_float_cvts_pl(CPUMIPSState *env, uint32_t wt0)
372 {
373 uint32_t wt2;
374
375 wt2 = wt0;
376 update_fcr31(env, GETPC());
377 return wt2;
378 }
379
380 uint32_t helper_float_cvts_pu(CPUMIPSState *env, uint32_t wth0)
381 {
382 uint32_t wt2;
383
384 wt2 = wth0;
385 update_fcr31(env, GETPC());
386 return wt2;
387 }
388
389 uint32_t helper_float_cvt_w_s(CPUMIPSState *env, uint32_t fst0)
390 {
391 uint32_t wt2;
392
393 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
394 if (get_float_exception_flags(&env->active_fpu.fp_status)
395 & (float_flag_invalid | float_flag_overflow)) {
396 wt2 = FP_TO_INT32_OVERFLOW;
397 }
398 update_fcr31(env, GETPC());
399 return wt2;
400 }
401
402 uint32_t helper_float_cvt_w_d(CPUMIPSState *env, uint64_t fdt0)
403 {
404 uint32_t wt2;
405
406 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
407 if (get_float_exception_flags(&env->active_fpu.fp_status)
408 & (float_flag_invalid | float_flag_overflow)) {
409 wt2 = FP_TO_INT32_OVERFLOW;
410 }
411 update_fcr31(env, GETPC());
412 return wt2;
413 }
414
415 uint64_t helper_float_round_l_d(CPUMIPSState *env, uint64_t fdt0)
416 {
417 uint64_t dt2;
418
419 set_float_rounding_mode(float_round_nearest_even,
420 &env->active_fpu.fp_status);
421 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
422 restore_rounding_mode(env);
423 if (get_float_exception_flags(&env->active_fpu.fp_status)
424 & (float_flag_invalid | float_flag_overflow)) {
425 dt2 = FP_TO_INT64_OVERFLOW;
426 }
427 update_fcr31(env, GETPC());
428 return dt2;
429 }
430
431 uint64_t helper_float_round_l_s(CPUMIPSState *env, uint32_t fst0)
432 {
433 uint64_t dt2;
434
435 set_float_rounding_mode(float_round_nearest_even,
436 &env->active_fpu.fp_status);
437 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
438 restore_rounding_mode(env);
439 if (get_float_exception_flags(&env->active_fpu.fp_status)
440 & (float_flag_invalid | float_flag_overflow)) {
441 dt2 = FP_TO_INT64_OVERFLOW;
442 }
443 update_fcr31(env, GETPC());
444 return dt2;
445 }
446
447 uint32_t helper_float_round_w_d(CPUMIPSState *env, uint64_t fdt0)
448 {
449 uint32_t wt2;
450
451 set_float_rounding_mode(float_round_nearest_even,
452 &env->active_fpu.fp_status);
453 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
454 restore_rounding_mode(env);
455 if (get_float_exception_flags(&env->active_fpu.fp_status)
456 & (float_flag_invalid | float_flag_overflow)) {
457 wt2 = FP_TO_INT32_OVERFLOW;
458 }
459 update_fcr31(env, GETPC());
460 return wt2;
461 }
462
463 uint32_t helper_float_round_w_s(CPUMIPSState *env, uint32_t fst0)
464 {
465 uint32_t wt2;
466
467 set_float_rounding_mode(float_round_nearest_even,
468 &env->active_fpu.fp_status);
469 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
470 restore_rounding_mode(env);
471 if (get_float_exception_flags(&env->active_fpu.fp_status)
472 & (float_flag_invalid | float_flag_overflow)) {
473 wt2 = FP_TO_INT32_OVERFLOW;
474 }
475 update_fcr31(env, GETPC());
476 return wt2;
477 }
478
479 uint64_t helper_float_trunc_l_d(CPUMIPSState *env, uint64_t fdt0)
480 {
481 uint64_t dt2;
482
483 dt2 = float64_to_int64_round_to_zero(fdt0,
484 &env->active_fpu.fp_status);
485 if (get_float_exception_flags(&env->active_fpu.fp_status)
486 & (float_flag_invalid | float_flag_overflow)) {
487 dt2 = FP_TO_INT64_OVERFLOW;
488 }
489 update_fcr31(env, GETPC());
490 return dt2;
491 }
492
493 uint64_t helper_float_trunc_l_s(CPUMIPSState *env, uint32_t fst0)
494 {
495 uint64_t dt2;
496
497 dt2 = float32_to_int64_round_to_zero(fst0, &env->active_fpu.fp_status);
498 if (get_float_exception_flags(&env->active_fpu.fp_status)
499 & (float_flag_invalid | float_flag_overflow)) {
500 dt2 = FP_TO_INT64_OVERFLOW;
501 }
502 update_fcr31(env, GETPC());
503 return dt2;
504 }
505
506 uint32_t helper_float_trunc_w_d(CPUMIPSState *env, uint64_t fdt0)
507 {
508 uint32_t wt2;
509
510 wt2 = float64_to_int32_round_to_zero(fdt0, &env->active_fpu.fp_status);
511 if (get_float_exception_flags(&env->active_fpu.fp_status)
512 & (float_flag_invalid | float_flag_overflow)) {
513 wt2 = FP_TO_INT32_OVERFLOW;
514 }
515 update_fcr31(env, GETPC());
516 return wt2;
517 }
518
519 uint32_t helper_float_trunc_w_s(CPUMIPSState *env, uint32_t fst0)
520 {
521 uint32_t wt2;
522
523 wt2 = float32_to_int32_round_to_zero(fst0, &env->active_fpu.fp_status);
524 if (get_float_exception_flags(&env->active_fpu.fp_status)
525 & (float_flag_invalid | float_flag_overflow)) {
526 wt2 = FP_TO_INT32_OVERFLOW;
527 }
528 update_fcr31(env, GETPC());
529 return wt2;
530 }
531
532 uint64_t helper_float_ceil_l_d(CPUMIPSState *env, uint64_t fdt0)
533 {
534 uint64_t dt2;
535
536 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
537 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
538 restore_rounding_mode(env);
539 if (get_float_exception_flags(&env->active_fpu.fp_status)
540 & (float_flag_invalid | float_flag_overflow)) {
541 dt2 = FP_TO_INT64_OVERFLOW;
542 }
543 update_fcr31(env, GETPC());
544 return dt2;
545 }
546
547 uint64_t helper_float_ceil_l_s(CPUMIPSState *env, uint32_t fst0)
548 {
549 uint64_t dt2;
550
551 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
552 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
553 restore_rounding_mode(env);
554 if (get_float_exception_flags(&env->active_fpu.fp_status)
555 & (float_flag_invalid | float_flag_overflow)) {
556 dt2 = FP_TO_INT64_OVERFLOW;
557 }
558 update_fcr31(env, GETPC());
559 return dt2;
560 }
561
562 uint32_t helper_float_ceil_w_d(CPUMIPSState *env, uint64_t fdt0)
563 {
564 uint32_t wt2;
565
566 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
567 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
568 restore_rounding_mode(env);
569 if (get_float_exception_flags(&env->active_fpu.fp_status)
570 & (float_flag_invalid | float_flag_overflow)) {
571 wt2 = FP_TO_INT32_OVERFLOW;
572 }
573 update_fcr31(env, GETPC());
574 return wt2;
575 }
576
577 uint32_t helper_float_ceil_w_s(CPUMIPSState *env, uint32_t fst0)
578 {
579 uint32_t wt2;
580
581 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
582 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
583 restore_rounding_mode(env);
584 if (get_float_exception_flags(&env->active_fpu.fp_status)
585 & (float_flag_invalid | float_flag_overflow)) {
586 wt2 = FP_TO_INT32_OVERFLOW;
587 }
588 update_fcr31(env, GETPC());
589 return wt2;
590 }
591
592 uint64_t helper_float_floor_l_d(CPUMIPSState *env, uint64_t fdt0)
593 {
594 uint64_t dt2;
595
596 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
597 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
598 restore_rounding_mode(env);
599 if (get_float_exception_flags(&env->active_fpu.fp_status)
600 & (float_flag_invalid | float_flag_overflow)) {
601 dt2 = FP_TO_INT64_OVERFLOW;
602 }
603 update_fcr31(env, GETPC());
604 return dt2;
605 }
606
607 uint64_t helper_float_floor_l_s(CPUMIPSState *env, uint32_t fst0)
608 {
609 uint64_t dt2;
610
611 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
612 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
613 restore_rounding_mode(env);
614 if (get_float_exception_flags(&env->active_fpu.fp_status)
615 & (float_flag_invalid | float_flag_overflow)) {
616 dt2 = FP_TO_INT64_OVERFLOW;
617 }
618 update_fcr31(env, GETPC());
619 return dt2;
620 }
621
622 uint32_t helper_float_floor_w_d(CPUMIPSState *env, uint64_t fdt0)
623 {
624 uint32_t wt2;
625
626 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
627 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
628 restore_rounding_mode(env);
629 if (get_float_exception_flags(&env->active_fpu.fp_status)
630 & (float_flag_invalid | float_flag_overflow)) {
631 wt2 = FP_TO_INT32_OVERFLOW;
632 }
633 update_fcr31(env, GETPC());
634 return wt2;
635 }
636
637 uint32_t helper_float_floor_w_s(CPUMIPSState *env, uint32_t fst0)
638 {
639 uint32_t wt2;
640
641 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
642 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
643 restore_rounding_mode(env);
644 if (get_float_exception_flags(&env->active_fpu.fp_status)
645 & (float_flag_invalid | float_flag_overflow)) {
646 wt2 = FP_TO_INT32_OVERFLOW;
647 }
648 update_fcr31(env, GETPC());
649 return wt2;
650 }
651
652 uint64_t helper_float_cvt_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
653 {
654 uint64_t dt2;
655
656 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
657 if (get_float_exception_flags(&env->active_fpu.fp_status)
658 & float_flag_invalid) {
659 if (float64_is_any_nan(fdt0)) {
660 dt2 = 0;
661 }
662 }
663 update_fcr31(env, GETPC());
664 return dt2;
665 }
666
667 uint64_t helper_float_cvt_2008_l_s(CPUMIPSState *env, uint32_t fst0)
668 {
669 uint64_t dt2;
670
671 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
672 if (get_float_exception_flags(&env->active_fpu.fp_status)
673 & float_flag_invalid) {
674 if (float32_is_any_nan(fst0)) {
675 dt2 = 0;
676 }
677 }
678 update_fcr31(env, GETPC());
679 return dt2;
680 }
681
682 uint32_t helper_float_cvt_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
683 {
684 uint32_t wt2;
685
686 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
687 if (get_float_exception_flags(&env->active_fpu.fp_status)
688 & float_flag_invalid) {
689 if (float64_is_any_nan(fdt0)) {
690 wt2 = 0;
691 }
692 }
693 update_fcr31(env, GETPC());
694 return wt2;
695 }
696
697 uint32_t helper_float_cvt_2008_w_s(CPUMIPSState *env, uint32_t fst0)
698 {
699 uint32_t wt2;
700
701 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
702 if (get_float_exception_flags(&env->active_fpu.fp_status)
703 & float_flag_invalid) {
704 if (float32_is_any_nan(fst0)) {
705 wt2 = 0;
706 }
707 }
708 update_fcr31(env, GETPC());
709 return wt2;
710 }
711
712 uint64_t helper_float_round_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
713 {
714 uint64_t dt2;
715
716 set_float_rounding_mode(float_round_nearest_even,
717 &env->active_fpu.fp_status);
718 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
719 restore_rounding_mode(env);
720 if (get_float_exception_flags(&env->active_fpu.fp_status)
721 & float_flag_invalid) {
722 if (float64_is_any_nan(fdt0)) {
723 dt2 = 0;
724 }
725 }
726 update_fcr31(env, GETPC());
727 return dt2;
728 }
729
730 uint64_t helper_float_round_2008_l_s(CPUMIPSState *env, uint32_t fst0)
731 {
732 uint64_t dt2;
733
734 set_float_rounding_mode(float_round_nearest_even,
735 &env->active_fpu.fp_status);
736 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
737 restore_rounding_mode(env);
738 if (get_float_exception_flags(&env->active_fpu.fp_status)
739 & float_flag_invalid) {
740 if (float32_is_any_nan(fst0)) {
741 dt2 = 0;
742 }
743 }
744 update_fcr31(env, GETPC());
745 return dt2;
746 }
747
748 uint32_t helper_float_round_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
749 {
750 uint32_t wt2;
751
752 set_float_rounding_mode(float_round_nearest_even,
753 &env->active_fpu.fp_status);
754 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
755 restore_rounding_mode(env);
756 if (get_float_exception_flags(&env->active_fpu.fp_status)
757 & float_flag_invalid) {
758 if (float64_is_any_nan(fdt0)) {
759 wt2 = 0;
760 }
761 }
762 update_fcr31(env, GETPC());
763 return wt2;
764 }
765
766 uint32_t helper_float_round_2008_w_s(CPUMIPSState *env, uint32_t fst0)
767 {
768 uint32_t wt2;
769
770 set_float_rounding_mode(float_round_nearest_even,
771 &env->active_fpu.fp_status);
772 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
773 restore_rounding_mode(env);
774 if (get_float_exception_flags(&env->active_fpu.fp_status)
775 & float_flag_invalid) {
776 if (float32_is_any_nan(fst0)) {
777 wt2 = 0;
778 }
779 }
780 update_fcr31(env, GETPC());
781 return wt2;
782 }
783
784 uint64_t helper_float_trunc_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
785 {
786 uint64_t dt2;
787
788 dt2 = float64_to_int64_round_to_zero(fdt0, &env->active_fpu.fp_status);
789 if (get_float_exception_flags(&env->active_fpu.fp_status)
790 & float_flag_invalid) {
791 if (float64_is_any_nan(fdt0)) {
792 dt2 = 0;
793 }
794 }
795 update_fcr31(env, GETPC());
796 return dt2;
797 }
798
799 uint64_t helper_float_trunc_2008_l_s(CPUMIPSState *env, uint32_t fst0)
800 {
801 uint64_t dt2;
802
803 dt2 = float32_to_int64_round_to_zero(fst0, &env->active_fpu.fp_status);
804 if (get_float_exception_flags(&env->active_fpu.fp_status)
805 & float_flag_invalid) {
806 if (float32_is_any_nan(fst0)) {
807 dt2 = 0;
808 }
809 }
810 update_fcr31(env, GETPC());
811 return dt2;
812 }
813
814 uint32_t helper_float_trunc_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
815 {
816 uint32_t wt2;
817
818 wt2 = float64_to_int32_round_to_zero(fdt0, &env->active_fpu.fp_status);
819 if (get_float_exception_flags(&env->active_fpu.fp_status)
820 & float_flag_invalid) {
821 if (float64_is_any_nan(fdt0)) {
822 wt2 = 0;
823 }
824 }
825 update_fcr31(env, GETPC());
826 return wt2;
827 }
828
829 uint32_t helper_float_trunc_2008_w_s(CPUMIPSState *env, uint32_t fst0)
830 {
831 uint32_t wt2;
832
833 wt2 = float32_to_int32_round_to_zero(fst0, &env->active_fpu.fp_status);
834 if (get_float_exception_flags(&env->active_fpu.fp_status)
835 & float_flag_invalid) {
836 if (float32_is_any_nan(fst0)) {
837 wt2 = 0;
838 }
839 }
840 update_fcr31(env, GETPC());
841 return wt2;
842 }
843
844 uint64_t helper_float_ceil_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
845 {
846 uint64_t dt2;
847
848 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
849 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
850 restore_rounding_mode(env);
851 if (get_float_exception_flags(&env->active_fpu.fp_status)
852 & float_flag_invalid) {
853 if (float64_is_any_nan(fdt0)) {
854 dt2 = 0;
855 }
856 }
857 update_fcr31(env, GETPC());
858 return dt2;
859 }
860
861 uint64_t helper_float_ceil_2008_l_s(CPUMIPSState *env, uint32_t fst0)
862 {
863 uint64_t dt2;
864
865 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
866 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
867 restore_rounding_mode(env);
868 if (get_float_exception_flags(&env->active_fpu.fp_status)
869 & float_flag_invalid) {
870 if (float32_is_any_nan(fst0)) {
871 dt2 = 0;
872 }
873 }
874 update_fcr31(env, GETPC());
875 return dt2;
876 }
877
878 uint32_t helper_float_ceil_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
879 {
880 uint32_t wt2;
881
882 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
883 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
884 restore_rounding_mode(env);
885 if (get_float_exception_flags(&env->active_fpu.fp_status)
886 & float_flag_invalid) {
887 if (float64_is_any_nan(fdt0)) {
888 wt2 = 0;
889 }
890 }
891 update_fcr31(env, GETPC());
892 return wt2;
893 }
894
895 uint32_t helper_float_ceil_2008_w_s(CPUMIPSState *env, uint32_t fst0)
896 {
897 uint32_t wt2;
898
899 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
900 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
901 restore_rounding_mode(env);
902 if (get_float_exception_flags(&env->active_fpu.fp_status)
903 & float_flag_invalid) {
904 if (float32_is_any_nan(fst0)) {
905 wt2 = 0;
906 }
907 }
908 update_fcr31(env, GETPC());
909 return wt2;
910 }
911
912 uint64_t helper_float_floor_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
913 {
914 uint64_t dt2;
915
916 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
917 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
918 restore_rounding_mode(env);
919 if (get_float_exception_flags(&env->active_fpu.fp_status)
920 & float_flag_invalid) {
921 if (float64_is_any_nan(fdt0)) {
922 dt2 = 0;
923 }
924 }
925 update_fcr31(env, GETPC());
926 return dt2;
927 }
928
929 uint64_t helper_float_floor_2008_l_s(CPUMIPSState *env, uint32_t fst0)
930 {
931 uint64_t dt2;
932
933 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
934 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
935 restore_rounding_mode(env);
936 if (get_float_exception_flags(&env->active_fpu.fp_status)
937 & float_flag_invalid) {
938 if (float32_is_any_nan(fst0)) {
939 dt2 = 0;
940 }
941 }
942 update_fcr31(env, GETPC());
943 return dt2;
944 }
945
946 uint32_t helper_float_floor_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
947 {
948 uint32_t wt2;
949
950 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
951 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
952 restore_rounding_mode(env);
953 if (get_float_exception_flags(&env->active_fpu.fp_status)
954 & float_flag_invalid) {
955 if (float64_is_any_nan(fdt0)) {
956 wt2 = 0;
957 }
958 }
959 update_fcr31(env, GETPC());
960 return wt2;
961 }
962
963 uint32_t helper_float_floor_2008_w_s(CPUMIPSState *env, uint32_t fst0)
964 {
965 uint32_t wt2;
966
967 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
968 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
969 restore_rounding_mode(env);
970 if (get_float_exception_flags(&env->active_fpu.fp_status)
971 & float_flag_invalid) {
972 if (float32_is_any_nan(fst0)) {
973 wt2 = 0;
974 }
975 }
976 update_fcr31(env, GETPC());
977 return wt2;
978 }
979
980 /* unary operations, not modifying fp status */
981 #define FLOAT_UNOP(name) \
982 uint64_t helper_float_ ## name ## _d(uint64_t fdt0) \
983 { \
984 return float64_ ## name(fdt0); \
985 } \
986 uint32_t helper_float_ ## name ## _s(uint32_t fst0) \
987 { \
988 return float32_ ## name(fst0); \
989 } \
990 uint64_t helper_float_ ## name ## _ps(uint64_t fdt0) \
991 { \
992 uint32_t wt0; \
993 uint32_t wth0; \
994 \
995 wt0 = float32_ ## name(fdt0 & 0XFFFFFFFF); \
996 wth0 = float32_ ## name(fdt0 >> 32); \
997 return ((uint64_t)wth0 << 32) | wt0; \
998 }
999 FLOAT_UNOP(abs)
1000 FLOAT_UNOP(chs)
1001 #undef FLOAT_UNOP
1002
1003 /* MIPS specific unary operations */
1004 uint64_t helper_float_recip_d(CPUMIPSState *env, uint64_t fdt0)
1005 {
1006 uint64_t fdt2;
1007
1008 fdt2 = float64_div(float64_one, fdt0, &env->active_fpu.fp_status);
1009 update_fcr31(env, GETPC());
1010 return fdt2;
1011 }
1012
1013 uint32_t helper_float_recip_s(CPUMIPSState *env, uint32_t fst0)
1014 {
1015 uint32_t fst2;
1016
1017 fst2 = float32_div(float32_one, fst0, &env->active_fpu.fp_status);
1018 update_fcr31(env, GETPC());
1019 return fst2;
1020 }
1021
1022 uint64_t helper_float_rsqrt_d(CPUMIPSState *env, uint64_t fdt0)
1023 {
1024 uint64_t fdt2;
1025
1026 fdt2 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
1027 fdt2 = float64_div(float64_one, fdt2, &env->active_fpu.fp_status);
1028 update_fcr31(env, GETPC());
1029 return fdt2;
1030 }
1031
1032 uint32_t helper_float_rsqrt_s(CPUMIPSState *env, uint32_t fst0)
1033 {
1034 uint32_t fst2;
1035
1036 fst2 = float32_sqrt(fst0, &env->active_fpu.fp_status);
1037 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1038 update_fcr31(env, GETPC());
1039 return fst2;
1040 }
1041
1042 uint64_t helper_float_recip1_d(CPUMIPSState *env, uint64_t fdt0)
1043 {
1044 uint64_t fdt2;
1045
1046 fdt2 = float64_div(float64_one, fdt0, &env->active_fpu.fp_status);
1047 update_fcr31(env, GETPC());
1048 return fdt2;
1049 }
1050
1051 uint32_t helper_float_recip1_s(CPUMIPSState *env, uint32_t fst0)
1052 {
1053 uint32_t fst2;
1054
1055 fst2 = float32_div(float32_one, fst0, &env->active_fpu.fp_status);
1056 update_fcr31(env, GETPC());
1057 return fst2;
1058 }
1059
1060 uint64_t helper_float_recip1_ps(CPUMIPSState *env, uint64_t fdt0)
1061 {
1062 uint32_t fst2;
1063 uint32_t fsth2;
1064
1065 fst2 = float32_div(float32_one, fdt0 & 0XFFFFFFFF,
1066 &env->active_fpu.fp_status);
1067 fsth2 = float32_div(float32_one, fdt0 >> 32, &env->active_fpu.fp_status);
1068 update_fcr31(env, GETPC());
1069 return ((uint64_t)fsth2 << 32) | fst2;
1070 }
1071
1072 uint64_t helper_float_rsqrt1_d(CPUMIPSState *env, uint64_t fdt0)
1073 {
1074 uint64_t fdt2;
1075
1076 fdt2 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
1077 fdt2 = float64_div(float64_one, fdt2, &env->active_fpu.fp_status);
1078 update_fcr31(env, GETPC());
1079 return fdt2;
1080 }
1081
1082 uint32_t helper_float_rsqrt1_s(CPUMIPSState *env, uint32_t fst0)
1083 {
1084 uint32_t fst2;
1085
1086 fst2 = float32_sqrt(fst0, &env->active_fpu.fp_status);
1087 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1088 update_fcr31(env, GETPC());
1089 return fst2;
1090 }
1091
1092 uint64_t helper_float_rsqrt1_ps(CPUMIPSState *env, uint64_t fdt0)
1093 {
1094 uint32_t fst2;
1095 uint32_t fsth2;
1096
1097 fst2 = float32_sqrt(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
1098 fsth2 = float32_sqrt(fdt0 >> 32, &env->active_fpu.fp_status);
1099 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1100 fsth2 = float32_div(float32_one, fsth2, &env->active_fpu.fp_status);
1101 update_fcr31(env, GETPC());
1102 return ((uint64_t)fsth2 << 32) | fst2;
1103 }
1104
1105 uint64_t helper_float_rint_d(CPUMIPSState *env, uint64_t fs)
1106 {
1107 uint64_t fdret;
1108
1109 fdret = float64_round_to_int(fs, &env->active_fpu.fp_status);
1110 update_fcr31(env, GETPC());
1111 return fdret;
1112 }
1113
1114 uint32_t helper_float_rint_s(CPUMIPSState *env, uint32_t fs)
1115 {
1116 uint32_t fdret;
1117
1118 fdret = float32_round_to_int(fs, &env->active_fpu.fp_status);
1119 update_fcr31(env, GETPC());
1120 return fdret;
1121 }
1122
1123 #define FLOAT_CLASS_SIGNALING_NAN 0x001
1124 #define FLOAT_CLASS_QUIET_NAN 0x002
1125 #define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
1126 #define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
1127 #define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
1128 #define FLOAT_CLASS_NEGATIVE_ZERO 0x020
1129 #define FLOAT_CLASS_POSITIVE_INFINITY 0x040
1130 #define FLOAT_CLASS_POSITIVE_NORMAL 0x080
1131 #define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
1132 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
1133
1134 uint64_t float_class_d(uint64_t arg, float_status *status)
1135 {
1136 if (float64_is_signaling_nan(arg, status)) {
1137 return FLOAT_CLASS_SIGNALING_NAN;
1138 } else if (float64_is_quiet_nan(arg, status)) {
1139 return FLOAT_CLASS_QUIET_NAN;
1140 } else if (float64_is_neg(arg)) {
1141 if (float64_is_infinity(arg)) {
1142 return FLOAT_CLASS_NEGATIVE_INFINITY;
1143 } else if (float64_is_zero(arg)) {
1144 return FLOAT_CLASS_NEGATIVE_ZERO;
1145 } else if (float64_is_zero_or_denormal(arg)) {
1146 return FLOAT_CLASS_NEGATIVE_SUBNORMAL;
1147 } else {
1148 return FLOAT_CLASS_NEGATIVE_NORMAL;
1149 }
1150 } else {
1151 if (float64_is_infinity(arg)) {
1152 return FLOAT_CLASS_POSITIVE_INFINITY;
1153 } else if (float64_is_zero(arg)) {
1154 return FLOAT_CLASS_POSITIVE_ZERO;
1155 } else if (float64_is_zero_or_denormal(arg)) {
1156 return FLOAT_CLASS_POSITIVE_SUBNORMAL;
1157 } else {
1158 return FLOAT_CLASS_POSITIVE_NORMAL;
1159 }
1160 }
1161 }
1162
1163 uint64_t helper_float_class_d(CPUMIPSState *env, uint64_t arg)
1164 {
1165 return float_class_d(arg, &env->active_fpu.fp_status);
1166 }
1167
1168 uint32_t float_class_s(uint32_t arg, float_status *status)
1169 {
1170 if (float32_is_signaling_nan(arg, status)) {
1171 return FLOAT_CLASS_SIGNALING_NAN;
1172 } else if (float32_is_quiet_nan(arg, status)) {
1173 return FLOAT_CLASS_QUIET_NAN;
1174 } else if (float32_is_neg(arg)) {
1175 if (float32_is_infinity(arg)) {
1176 return FLOAT_CLASS_NEGATIVE_INFINITY;
1177 } else if (float32_is_zero(arg)) {
1178 return FLOAT_CLASS_NEGATIVE_ZERO;
1179 } else if (float32_is_zero_or_denormal(arg)) {
1180 return FLOAT_CLASS_NEGATIVE_SUBNORMAL;
1181 } else {
1182 return FLOAT_CLASS_NEGATIVE_NORMAL;
1183 }
1184 } else {
1185 if (float32_is_infinity(arg)) {
1186 return FLOAT_CLASS_POSITIVE_INFINITY;
1187 } else if (float32_is_zero(arg)) {
1188 return FLOAT_CLASS_POSITIVE_ZERO;
1189 } else if (float32_is_zero_or_denormal(arg)) {
1190 return FLOAT_CLASS_POSITIVE_SUBNORMAL;
1191 } else {
1192 return FLOAT_CLASS_POSITIVE_NORMAL;
1193 }
1194 }
1195 }
1196
1197 uint32_t helper_float_class_s(CPUMIPSState *env, uint32_t arg)
1198 {
1199 return float_class_s(arg, &env->active_fpu.fp_status);
1200 }
1201
1202 /* binary operations */
1203
1204 uint64_t helper_float_add_d(CPUMIPSState *env,
1205 uint64_t fdt0, uint64_t fdt1)
1206 {
1207 uint64_t dt2;
1208
1209 dt2 = float64_add(fdt0, fdt1, &env->active_fpu.fp_status);
1210 update_fcr31(env, GETPC());
1211 return dt2;
1212 }
1213
1214 uint32_t helper_float_add_s(CPUMIPSState *env,
1215 uint32_t fst0, uint32_t fst1)
1216 {
1217 uint32_t wt2;
1218
1219 wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);
1220 update_fcr31(env, GETPC());
1221 return wt2;
1222 }
1223
1224 uint64_t helper_float_add_ps(CPUMIPSState *env,
1225 uint64_t fdt0, uint64_t fdt1)
1226 {
1227 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1228 uint32_t fsth0 = fdt0 >> 32;
1229 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1230 uint32_t fsth1 = fdt1 >> 32;
1231 uint32_t wtl2;
1232 uint32_t wth2;
1233
1234 wtl2 = float32_add(fstl0, fstl1, &env->active_fpu.fp_status);
1235 wth2 = float32_add(fsth0, fsth1, &env->active_fpu.fp_status);
1236 update_fcr31(env, GETPC());
1237 return ((uint64_t)wth2 << 32) | wtl2;
1238 }
1239
1240 uint64_t helper_float_sub_d(CPUMIPSState *env,
1241 uint64_t fdt0, uint64_t fdt1)
1242 {
1243 uint64_t dt2;
1244
1245 dt2 = float64_sub(fdt0, fdt1, &env->active_fpu.fp_status);
1246 update_fcr31(env, GETPC());
1247 return dt2;
1248 }
1249
1250 uint32_t helper_float_sub_s(CPUMIPSState *env,
1251 uint32_t fst0, uint32_t fst1)
1252 {
1253 uint32_t wt2;
1254
1255 wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);
1256 update_fcr31(env, GETPC());
1257 return wt2;
1258 }
1259
1260 uint64_t helper_float_sub_ps(CPUMIPSState *env,
1261 uint64_t fdt0, uint64_t fdt1)
1262 {
1263 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1264 uint32_t fsth0 = fdt0 >> 32;
1265 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1266 uint32_t fsth1 = fdt1 >> 32;
1267 uint32_t wtl2;
1268 uint32_t wth2;
1269
1270 wtl2 = float32_sub(fstl0, fstl1, &env->active_fpu.fp_status);
1271 wth2 = float32_sub(fsth0, fsth1, &env->active_fpu.fp_status);
1272 update_fcr31(env, GETPC());
1273 return ((uint64_t)wth2 << 32) | wtl2;
1274 }
1275
1276 uint64_t helper_float_mul_d(CPUMIPSState *env,
1277 uint64_t fdt0, uint64_t fdt1)
1278 {
1279 uint64_t dt2;
1280
1281 dt2 = float64_mul(fdt0, fdt1, &env->active_fpu.fp_status);
1282 update_fcr31(env, GETPC());
1283 return dt2;
1284 }
1285
1286 uint32_t helper_float_mul_s(CPUMIPSState *env,
1287 uint32_t fst0, uint32_t fst1)
1288 {
1289 uint32_t wt2;
1290
1291 wt2 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
1292 update_fcr31(env, GETPC());
1293 return wt2;
1294 }
1295
1296 uint64_t helper_float_mul_ps(CPUMIPSState *env,
1297 uint64_t fdt0, uint64_t fdt1)
1298 {
1299 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1300 uint32_t fsth0 = fdt0 >> 32;
1301 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1302 uint32_t fsth1 = fdt1 >> 32;
1303 uint32_t wtl2;
1304 uint32_t wth2;
1305
1306 wtl2 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
1307 wth2 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
1308 update_fcr31(env, GETPC());
1309 return ((uint64_t)wth2 << 32) | wtl2;
1310 }
1311
1312 uint64_t helper_float_div_d(CPUMIPSState *env,
1313 uint64_t fdt0, uint64_t fdt1)
1314 {
1315 uint64_t dt2;
1316
1317 dt2 = float64_div(fdt0, fdt1, &env->active_fpu.fp_status);
1318 update_fcr31(env, GETPC());
1319 return dt2;
1320 }
1321
1322 uint32_t helper_float_div_s(CPUMIPSState *env,
1323 uint32_t fst0, uint32_t fst1)
1324 {
1325 uint32_t wt2;
1326
1327 wt2 = float32_div(fst0, fst1, &env->active_fpu.fp_status);
1328 update_fcr31(env, GETPC());
1329 return wt2;
1330 }
1331
1332 uint64_t helper_float_div_ps(CPUMIPSState *env,
1333 uint64_t fdt0, uint64_t fdt1)
1334 {
1335 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1336 uint32_t fsth0 = fdt0 >> 32;
1337 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1338 uint32_t fsth1 = fdt1 >> 32;
1339 uint32_t wtl2;
1340 uint32_t wth2;
1341
1342 wtl2 = float32_div(fstl0, fstl1, &env->active_fpu.fp_status);
1343 wth2 = float32_div(fsth0, fsth1, &env->active_fpu.fp_status);
1344 update_fcr31(env, GETPC());
1345 return ((uint64_t)wth2 << 32) | wtl2;
1346 }
1347
1348
1349 /* MIPS specific binary operations */
1350 uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1351 {
1352 fdt2 = float64_mul(fdt0, fdt2, &env->active_fpu.fp_status);
1353 fdt2 = float64_chs(float64_sub(fdt2, float64_one,
1354 &env->active_fpu.fp_status));
1355 update_fcr31(env, GETPC());
1356 return fdt2;
1357 }
1358
1359 uint32_t helper_float_recip2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
1360 {
1361 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1362 fst2 = float32_chs(float32_sub(fst2, float32_one,
1363 &env->active_fpu.fp_status));
1364 update_fcr31(env, GETPC());
1365 return fst2;
1366 }
1367
1368 uint64_t helper_float_recip2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1369 {
1370 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1371 uint32_t fsth0 = fdt0 >> 32;
1372 uint32_t fst2 = fdt2 & 0XFFFFFFFF;
1373 uint32_t fsth2 = fdt2 >> 32;
1374
1375 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1376 fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
1377 fst2 = float32_chs(float32_sub(fst2, float32_one,
1378 &env->active_fpu.fp_status));
1379 fsth2 = float32_chs(float32_sub(fsth2, float32_one,
1380 &env->active_fpu.fp_status));
1381 update_fcr31(env, GETPC());
1382 return ((uint64_t)fsth2 << 32) | fst2;
1383 }
1384
1385 uint64_t helper_float_rsqrt2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1386 {
1387 fdt2 = float64_mul(fdt0, fdt2, &env->active_fpu.fp_status);
1388 fdt2 = float64_sub(fdt2, float64_one, &env->active_fpu.fp_status);
1389 fdt2 = float64_chs(float64_div(fdt2, FLOAT_TWO64,
1390 &env->active_fpu.fp_status));
1391 update_fcr31(env, GETPC());
1392 return fdt2;
1393 }
1394
1395 uint32_t helper_float_rsqrt2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
1396 {
1397 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1398 fst2 = float32_sub(fst2, float32_one, &env->active_fpu.fp_status);
1399 fst2 = float32_chs(float32_div(fst2, FLOAT_TWO32,
1400 &env->active_fpu.fp_status));
1401 update_fcr31(env, GETPC());
1402 return fst2;
1403 }
1404
1405 uint64_t helper_float_rsqrt2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1406 {
1407 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1408 uint32_t fsth0 = fdt0 >> 32;
1409 uint32_t fst2 = fdt2 & 0XFFFFFFFF;
1410 uint32_t fsth2 = fdt2 >> 32;
1411
1412 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1413 fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
1414 fst2 = float32_sub(fst2, float32_one, &env->active_fpu.fp_status);
1415 fsth2 = float32_sub(fsth2, float32_one, &env->active_fpu.fp_status);
1416 fst2 = float32_chs(float32_div(fst2, FLOAT_TWO32,
1417 &env->active_fpu.fp_status));
1418 fsth2 = float32_chs(float32_div(fsth2, FLOAT_TWO32,
1419 &env->active_fpu.fp_status));
1420 update_fcr31(env, GETPC());
1421 return ((uint64_t)fsth2 << 32) | fst2;
1422 }
1423
1424 uint64_t helper_float_addr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
1425 {
1426 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1427 uint32_t fsth0 = fdt0 >> 32;
1428 uint32_t fst1 = fdt1 & 0XFFFFFFFF;
1429 uint32_t fsth1 = fdt1 >> 32;
1430 uint32_t fst2;
1431 uint32_t fsth2;
1432
1433 fst2 = float32_add(fst0, fsth0, &env->active_fpu.fp_status);
1434 fsth2 = float32_add(fst1, fsth1, &env->active_fpu.fp_status);
1435 update_fcr31(env, GETPC());
1436 return ((uint64_t)fsth2 << 32) | fst2;
1437 }
1438
1439 uint64_t helper_float_mulr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
1440 {
1441 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1442 uint32_t fsth0 = fdt0 >> 32;
1443 uint32_t fst1 = fdt1 & 0XFFFFFFFF;
1444 uint32_t fsth1 = fdt1 >> 32;
1445 uint32_t fst2;
1446 uint32_t fsth2;
1447
1448 fst2 = float32_mul(fst0, fsth0, &env->active_fpu.fp_status);
1449 fsth2 = float32_mul(fst1, fsth1, &env->active_fpu.fp_status);
1450 update_fcr31(env, GETPC());
1451 return ((uint64_t)fsth2 << 32) | fst2;
1452 }
1453
1454 #define FLOAT_MINMAX(name, bits, minmaxfunc) \
1455 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1456 uint ## bits ## _t fs, \
1457 uint ## bits ## _t ft) \
1458 { \
1459 uint ## bits ## _t fdret; \
1460 \
1461 fdret = float ## bits ## _ ## minmaxfunc(fs, ft, \
1462 &env->active_fpu.fp_status); \
1463 update_fcr31(env, GETPC()); \
1464 return fdret; \
1465 }
1466
1467 FLOAT_MINMAX(max_s, 32, maxnum)
1468 FLOAT_MINMAX(max_d, 64, maxnum)
1469 FLOAT_MINMAX(maxa_s, 32, maxnummag)
1470 FLOAT_MINMAX(maxa_d, 64, maxnummag)
1471
1472 FLOAT_MINMAX(min_s, 32, minnum)
1473 FLOAT_MINMAX(min_d, 64, minnum)
1474 FLOAT_MINMAX(mina_s, 32, minnummag)
1475 FLOAT_MINMAX(mina_d, 64, minnummag)
1476 #undef FLOAT_MINMAX
1477
1478 /* ternary operations */
1479
1480 uint64_t helper_float_madd_d(CPUMIPSState *env, uint64_t fst0,
1481 uint64_t fst1, uint64_t fst2)
1482 {
1483 fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
1484 fst0 = float64_add(fst0, fst2, &env->active_fpu.fp_status);
1485
1486 update_fcr31(env, GETPC());
1487 return fst0;
1488 }
1489
1490 uint32_t helper_float_madd_s(CPUMIPSState *env, uint32_t fst0,
1491 uint32_t fst1, uint32_t fst2)
1492 {
1493 fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
1494 fst0 = float32_add(fst0, fst2, &env->active_fpu.fp_status);
1495
1496 update_fcr31(env, GETPC());
1497 return fst0;
1498 }
1499
1500 uint64_t helper_float_madd_ps(CPUMIPSState *env, uint64_t fdt0,
1501 uint64_t fdt1, uint64_t fdt2)
1502 {
1503 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1504 uint32_t fsth0 = fdt0 >> 32;
1505 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1506 uint32_t fsth1 = fdt1 >> 32;
1507 uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
1508 uint32_t fsth2 = fdt2 >> 32;
1509
1510 fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
1511 fstl0 = float32_add(fstl0, fstl2, &env->active_fpu.fp_status);
1512 fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
1513 fsth0 = float32_add(fsth0, fsth2, &env->active_fpu.fp_status);
1514
1515 update_fcr31(env, GETPC());
1516 return ((uint64_t)fsth0 << 32) | fstl0;
1517 }
1518
1519 uint64_t helper_float_msub_d(CPUMIPSState *env, uint64_t fst0,
1520 uint64_t fst1, uint64_t fst2)
1521 {
1522 fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
1523 fst0 = float64_sub(fst0, fst2, &env->active_fpu.fp_status);
1524
1525 update_fcr31(env, GETPC());
1526 return fst0;
1527 }
1528
1529 uint32_t helper_float_msub_s(CPUMIPSState *env, uint32_t fst0,
1530 uint32_t fst1, uint32_t fst2)
1531 {
1532 fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
1533 fst0 = float32_sub(fst0, fst2, &env->active_fpu.fp_status);
1534
1535 update_fcr31(env, GETPC());
1536 return fst0;
1537 }
1538
1539 uint64_t helper_float_msub_ps(CPUMIPSState *env, uint64_t fdt0,
1540 uint64_t fdt1, uint64_t fdt2)
1541 {
1542 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1543 uint32_t fsth0 = fdt0 >> 32;
1544 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1545 uint32_t fsth1 = fdt1 >> 32;
1546 uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
1547 uint32_t fsth2 = fdt2 >> 32;
1548
1549 fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
1550 fstl0 = float32_sub(fstl0, fstl2, &env->active_fpu.fp_status);
1551 fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
1552 fsth0 = float32_sub(fsth0, fsth2, &env->active_fpu.fp_status);
1553
1554 update_fcr31(env, GETPC());
1555 return ((uint64_t)fsth0 << 32) | fstl0;
1556 }
1557
1558 uint64_t helper_float_nmadd_d(CPUMIPSState *env, uint64_t fst0,
1559 uint64_t fst1, uint64_t fst2)
1560 {
1561 fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
1562 fst0 = float64_add(fst0, fst2, &env->active_fpu.fp_status);
1563 fst0 = float64_chs(fst0);
1564
1565 update_fcr31(env, GETPC());
1566 return fst0;
1567 }
1568
1569 uint32_t helper_float_nmadd_s(CPUMIPSState *env, uint32_t fst0,
1570 uint32_t fst1, uint32_t fst2)
1571 {
1572 fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
1573 fst0 = float32_add(fst0, fst2, &env->active_fpu.fp_status);
1574 fst0 = float32_chs(fst0);
1575
1576 update_fcr31(env, GETPC());
1577 return fst0;
1578 }
1579
1580 uint64_t helper_float_nmadd_ps(CPUMIPSState *env, uint64_t fdt0,
1581 uint64_t fdt1, uint64_t fdt2)
1582 {
1583 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1584 uint32_t fsth0 = fdt0 >> 32;
1585 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1586 uint32_t fsth1 = fdt1 >> 32;
1587 uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
1588 uint32_t fsth2 = fdt2 >> 32;
1589
1590 fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
1591 fstl0 = float32_add(fstl0, fstl2, &env->active_fpu.fp_status);
1592 fstl0 = float32_chs(fstl0);
1593 fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
1594 fsth0 = float32_add(fsth0, fsth2, &env->active_fpu.fp_status);
1595 fsth0 = float32_chs(fsth0);
1596
1597 update_fcr31(env, GETPC());
1598 return ((uint64_t)fsth0 << 32) | fstl0;
1599 }
1600
1601 uint64_t helper_float_nmsub_d(CPUMIPSState *env, uint64_t fst0,
1602 uint64_t fst1, uint64_t fst2)
1603 {
1604 fst0 = float64_mul(fst0, fst1, &env->active_fpu.fp_status);
1605 fst0 = float64_sub(fst0, fst2, &env->active_fpu.fp_status);
1606 fst0 = float64_chs(fst0);
1607
1608 update_fcr31(env, GETPC());
1609 return fst0;
1610 }
1611
1612 uint32_t helper_float_nmsub_s(CPUMIPSState *env, uint32_t fst0,
1613 uint32_t fst1, uint32_t fst2)
1614 {
1615 fst0 = float32_mul(fst0, fst1, &env->active_fpu.fp_status);
1616 fst0 = float32_sub(fst0, fst2, &env->active_fpu.fp_status);
1617 fst0 = float32_chs(fst0);
1618
1619 update_fcr31(env, GETPC());
1620 return fst0;
1621 }
1622
1623 uint64_t helper_float_nmsub_ps(CPUMIPSState *env, uint64_t fdt0,
1624 uint64_t fdt1, uint64_t fdt2)
1625 {
1626 uint32_t fstl0 = fdt0 & 0XFFFFFFFF;
1627 uint32_t fsth0 = fdt0 >> 32;
1628 uint32_t fstl1 = fdt1 & 0XFFFFFFFF;
1629 uint32_t fsth1 = fdt1 >> 32;
1630 uint32_t fstl2 = fdt2 & 0XFFFFFFFF;
1631 uint32_t fsth2 = fdt2 >> 32;
1632
1633 fstl0 = float32_mul(fstl0, fstl1, &env->active_fpu.fp_status);
1634 fstl0 = float32_sub(fstl0, fstl2, &env->active_fpu.fp_status);
1635 fstl0 = float32_chs(fstl0);
1636 fsth0 = float32_mul(fsth0, fsth1, &env->active_fpu.fp_status);
1637 fsth0 = float32_sub(fsth0, fsth2, &env->active_fpu.fp_status);
1638 fsth0 = float32_chs(fsth0);
1639
1640 update_fcr31(env, GETPC());
1641 return ((uint64_t)fsth0 << 32) | fstl0;
1642 }
1643
1644
1645 #define FLOAT_FMADDSUB(name, bits, muladd_arg) \
1646 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1647 uint ## bits ## _t fs, \
1648 uint ## bits ## _t ft, \
1649 uint ## bits ## _t fd) \
1650 { \
1651 uint ## bits ## _t fdret; \
1652 \
1653 fdret = float ## bits ## _muladd(fs, ft, fd, muladd_arg, \
1654 &env->active_fpu.fp_status); \
1655 update_fcr31(env, GETPC()); \
1656 return fdret; \
1657 }
1658
1659 FLOAT_FMADDSUB(maddf_s, 32, 0)
1660 FLOAT_FMADDSUB(maddf_d, 64, 0)
1661 FLOAT_FMADDSUB(msubf_s, 32, float_muladd_negate_product)
1662 FLOAT_FMADDSUB(msubf_d, 64, float_muladd_negate_product)
1663 #undef FLOAT_FMADDSUB
1664
1665 /* compare operations */
1666 #define FOP_COND_D(op, cond) \
1667 void helper_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1668 uint64_t fdt1, int cc) \
1669 { \
1670 int c; \
1671 c = cond; \
1672 update_fcr31(env, GETPC()); \
1673 if (c) \
1674 SET_FP_COND(cc, env->active_fpu); \
1675 else \
1676 CLEAR_FP_COND(cc, env->active_fpu); \
1677 } \
1678 void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1679 uint64_t fdt1, int cc) \
1680 { \
1681 int c; \
1682 fdt0 = float64_abs(fdt0); \
1683 fdt1 = float64_abs(fdt1); \
1684 c = cond; \
1685 update_fcr31(env, GETPC()); \
1686 if (c) \
1687 SET_FP_COND(cc, env->active_fpu); \
1688 else \
1689 CLEAR_FP_COND(cc, env->active_fpu); \
1690 }
1691
1692 /*
1693 * NOTE: the comma operator will make "cond" to eval to false,
1694 * but float64_unordered_quiet() is still called.
1695 */
1696 FOP_COND_D(f, (float64_unordered_quiet(fdt1, fdt0,
1697 &env->active_fpu.fp_status), 0))
1698 FOP_COND_D(un, float64_unordered_quiet(fdt1, fdt0,
1699 &env->active_fpu.fp_status))
1700 FOP_COND_D(eq, float64_eq_quiet(fdt0, fdt1,
1701 &env->active_fpu.fp_status))
1702 FOP_COND_D(ueq, float64_unordered_quiet(fdt1, fdt0,
1703 &env->active_fpu.fp_status)
1704 || float64_eq_quiet(fdt0, fdt1,
1705 &env->active_fpu.fp_status))
1706 FOP_COND_D(olt, float64_lt_quiet(fdt0, fdt1,
1707 &env->active_fpu.fp_status))
1708 FOP_COND_D(ult, float64_unordered_quiet(fdt1, fdt0,
1709 &env->active_fpu.fp_status)
1710 || float64_lt_quiet(fdt0, fdt1,
1711 &env->active_fpu.fp_status))
1712 FOP_COND_D(ole, float64_le_quiet(fdt0, fdt1,
1713 &env->active_fpu.fp_status))
1714 FOP_COND_D(ule, float64_unordered_quiet(fdt1, fdt0,
1715 &env->active_fpu.fp_status)
1716 || float64_le_quiet(fdt0, fdt1,
1717 &env->active_fpu.fp_status))
1718 /*
1719 * NOTE: the comma operator will make "cond" to eval to false,
1720 * but float64_unordered() is still called.
1721 */
1722 FOP_COND_D(sf, (float64_unordered(fdt1, fdt0,
1723 &env->active_fpu.fp_status), 0))
1724 FOP_COND_D(ngle, float64_unordered(fdt1, fdt0,
1725 &env->active_fpu.fp_status))
1726 FOP_COND_D(seq, float64_eq(fdt0, fdt1,
1727 &env->active_fpu.fp_status))
1728 FOP_COND_D(ngl, float64_unordered(fdt1, fdt0,
1729 &env->active_fpu.fp_status)
1730 || float64_eq(fdt0, fdt1,
1731 &env->active_fpu.fp_status))
1732 FOP_COND_D(lt, float64_lt(fdt0, fdt1,
1733 &env->active_fpu.fp_status))
1734 FOP_COND_D(nge, float64_unordered(fdt1, fdt0,
1735 &env->active_fpu.fp_status)
1736 || float64_lt(fdt0, fdt1,
1737 &env->active_fpu.fp_status))
1738 FOP_COND_D(le, float64_le(fdt0, fdt1,
1739 &env->active_fpu.fp_status))
1740 FOP_COND_D(ngt, float64_unordered(fdt1, fdt0,
1741 &env->active_fpu.fp_status)
1742 || float64_le(fdt0, fdt1,
1743 &env->active_fpu.fp_status))
1744
1745 #define FOP_COND_S(op, cond) \
1746 void helper_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1747 uint32_t fst1, int cc) \
1748 { \
1749 int c; \
1750 c = cond; \
1751 update_fcr31(env, GETPC()); \
1752 if (c) \
1753 SET_FP_COND(cc, env->active_fpu); \
1754 else \
1755 CLEAR_FP_COND(cc, env->active_fpu); \
1756 } \
1757 void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1758 uint32_t fst1, int cc) \
1759 { \
1760 int c; \
1761 fst0 = float32_abs(fst0); \
1762 fst1 = float32_abs(fst1); \
1763 c = cond; \
1764 update_fcr31(env, GETPC()); \
1765 if (c) \
1766 SET_FP_COND(cc, env->active_fpu); \
1767 else \
1768 CLEAR_FP_COND(cc, env->active_fpu); \
1769 }
1770
1771 /*
1772 * NOTE: the comma operator will make "cond" to eval to false,
1773 * but float32_unordered_quiet() is still called.
1774 */
1775 FOP_COND_S(f, (float32_unordered_quiet(fst1, fst0,
1776 &env->active_fpu.fp_status), 0))
1777 FOP_COND_S(un, float32_unordered_quiet(fst1, fst0,
1778 &env->active_fpu.fp_status))
1779 FOP_COND_S(eq, float32_eq_quiet(fst0, fst1,
1780 &env->active_fpu.fp_status))
1781 FOP_COND_S(ueq, float32_unordered_quiet(fst1, fst0,
1782 &env->active_fpu.fp_status)
1783 || float32_eq_quiet(fst0, fst1,
1784 &env->active_fpu.fp_status))
1785 FOP_COND_S(olt, float32_lt_quiet(fst0, fst1,
1786 &env->active_fpu.fp_status))
1787 FOP_COND_S(ult, float32_unordered_quiet(fst1, fst0,
1788 &env->active_fpu.fp_status)
1789 || float32_lt_quiet(fst0, fst1,
1790 &env->active_fpu.fp_status))
1791 FOP_COND_S(ole, float32_le_quiet(fst0, fst1,
1792 &env->active_fpu.fp_status))
1793 FOP_COND_S(ule, float32_unordered_quiet(fst1, fst0,
1794 &env->active_fpu.fp_status)
1795 || float32_le_quiet(fst0, fst1,
1796 &env->active_fpu.fp_status))
1797 /*
1798 * NOTE: the comma operator will make "cond" to eval to false,
1799 * but float32_unordered() is still called.
1800 */
1801 FOP_COND_S(sf, (float32_unordered(fst1, fst0,
1802 &env->active_fpu.fp_status), 0))
1803 FOP_COND_S(ngle, float32_unordered(fst1, fst0,
1804 &env->active_fpu.fp_status))
1805 FOP_COND_S(seq, float32_eq(fst0, fst1,
1806 &env->active_fpu.fp_status))
1807 FOP_COND_S(ngl, float32_unordered(fst1, fst0,
1808 &env->active_fpu.fp_status)
1809 || float32_eq(fst0, fst1,
1810 &env->active_fpu.fp_status))
1811 FOP_COND_S(lt, float32_lt(fst0, fst1,
1812 &env->active_fpu.fp_status))
1813 FOP_COND_S(nge, float32_unordered(fst1, fst0,
1814 &env->active_fpu.fp_status)
1815 || float32_lt(fst0, fst1,
1816 &env->active_fpu.fp_status))
1817 FOP_COND_S(le, float32_le(fst0, fst1,
1818 &env->active_fpu.fp_status))
1819 FOP_COND_S(ngt, float32_unordered(fst1, fst0,
1820 &env->active_fpu.fp_status)
1821 || float32_le(fst0, fst1,
1822 &env->active_fpu.fp_status))
1823
1824 #define FOP_COND_PS(op, condl, condh) \
1825 void helper_cmp_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1826 uint64_t fdt1, int cc) \
1827 { \
1828 uint32_t fst0, fsth0, fst1, fsth1; \
1829 int ch, cl; \
1830 fst0 = fdt0 & 0XFFFFFFFF; \
1831 fsth0 = fdt0 >> 32; \
1832 fst1 = fdt1 & 0XFFFFFFFF; \
1833 fsth1 = fdt1 >> 32; \
1834 cl = condl; \
1835 ch = condh; \
1836 update_fcr31(env, GETPC()); \
1837 if (cl) \
1838 SET_FP_COND(cc, env->active_fpu); \
1839 else \
1840 CLEAR_FP_COND(cc, env->active_fpu); \
1841 if (ch) \
1842 SET_FP_COND(cc + 1, env->active_fpu); \
1843 else \
1844 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1845 } \
1846 void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1847 uint64_t fdt1, int cc) \
1848 { \
1849 uint32_t fst0, fsth0, fst1, fsth1; \
1850 int ch, cl; \
1851 fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
1852 fsth0 = float32_abs(fdt0 >> 32); \
1853 fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
1854 fsth1 = float32_abs(fdt1 >> 32); \
1855 cl = condl; \
1856 ch = condh; \
1857 update_fcr31(env, GETPC()); \
1858 if (cl) \
1859 SET_FP_COND(cc, env->active_fpu); \
1860 else \
1861 CLEAR_FP_COND(cc, env->active_fpu); \
1862 if (ch) \
1863 SET_FP_COND(cc + 1, env->active_fpu); \
1864 else \
1865 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1866 }
1867
1868 /*
1869 * NOTE: the comma operator will make "cond" to eval to false,
1870 * but float32_unordered_quiet() is still called.
1871 */
1872 FOP_COND_PS(f, (float32_unordered_quiet(fst1, fst0,
1873 &env->active_fpu.fp_status), 0),
1874 (float32_unordered_quiet(fsth1, fsth0,
1875 &env->active_fpu.fp_status), 0))
1876 FOP_COND_PS(un, float32_unordered_quiet(fst1, fst0,
1877 &env->active_fpu.fp_status),
1878 float32_unordered_quiet(fsth1, fsth0,
1879 &env->active_fpu.fp_status))
1880 FOP_COND_PS(eq, float32_eq_quiet(fst0, fst1,
1881 &env->active_fpu.fp_status),
1882 float32_eq_quiet(fsth0, fsth1,
1883 &env->active_fpu.fp_status))
1884 FOP_COND_PS(ueq, float32_unordered_quiet(fst1, fst0,
1885 &env->active_fpu.fp_status)
1886 || float32_eq_quiet(fst0, fst1,
1887 &env->active_fpu.fp_status),
1888 float32_unordered_quiet(fsth1, fsth0,
1889 &env->active_fpu.fp_status)
1890 || float32_eq_quiet(fsth0, fsth1,
1891 &env->active_fpu.fp_status))
1892 FOP_COND_PS(olt, float32_lt_quiet(fst0, fst1,
1893 &env->active_fpu.fp_status),
1894 float32_lt_quiet(fsth0, fsth1,
1895 &env->active_fpu.fp_status))
1896 FOP_COND_PS(ult, float32_unordered_quiet(fst1, fst0,
1897 &env->active_fpu.fp_status)
1898 || float32_lt_quiet(fst0, fst1,
1899 &env->active_fpu.fp_status),
1900 float32_unordered_quiet(fsth1, fsth0,
1901 &env->active_fpu.fp_status)
1902 || float32_lt_quiet(fsth0, fsth1,
1903 &env->active_fpu.fp_status))
1904 FOP_COND_PS(ole, float32_le_quiet(fst0, fst1,
1905 &env->active_fpu.fp_status),
1906 float32_le_quiet(fsth0, fsth1,
1907 &env->active_fpu.fp_status))
1908 FOP_COND_PS(ule, float32_unordered_quiet(fst1, fst0,
1909 &env->active_fpu.fp_status)
1910 || float32_le_quiet(fst0, fst1,
1911 &env->active_fpu.fp_status),
1912 float32_unordered_quiet(fsth1, fsth0,
1913 &env->active_fpu.fp_status)
1914 || float32_le_quiet(fsth0, fsth1,
1915 &env->active_fpu.fp_status))
1916 /*
1917 * NOTE: the comma operator will make "cond" to eval to false,
1918 * but float32_unordered() is still called.
1919 */
1920 FOP_COND_PS(sf, (float32_unordered(fst1, fst0,
1921 &env->active_fpu.fp_status), 0),
1922 (float32_unordered(fsth1, fsth0,
1923 &env->active_fpu.fp_status), 0))
1924 FOP_COND_PS(ngle, float32_unordered(fst1, fst0,
1925 &env->active_fpu.fp_status),
1926 float32_unordered(fsth1, fsth0,
1927 &env->active_fpu.fp_status))
1928 FOP_COND_PS(seq, float32_eq(fst0, fst1,
1929 &env->active_fpu.fp_status),
1930 float32_eq(fsth0, fsth1,
1931 &env->active_fpu.fp_status))
1932 FOP_COND_PS(ngl, float32_unordered(fst1, fst0,
1933 &env->active_fpu.fp_status)
1934 || float32_eq(fst0, fst1,
1935 &env->active_fpu.fp_status),
1936 float32_unordered(fsth1, fsth0,
1937 &env->active_fpu.fp_status)
1938 || float32_eq(fsth0, fsth1,
1939 &env->active_fpu.fp_status))
1940 FOP_COND_PS(lt, float32_lt(fst0, fst1,
1941 &env->active_fpu.fp_status),
1942 float32_lt(fsth0, fsth1,
1943 &env->active_fpu.fp_status))
1944 FOP_COND_PS(nge, float32_unordered(fst1, fst0,
1945 &env->active_fpu.fp_status)
1946 || float32_lt(fst0, fst1,
1947 &env->active_fpu.fp_status),
1948 float32_unordered(fsth1, fsth0,
1949 &env->active_fpu.fp_status)
1950 || float32_lt(fsth0, fsth1,
1951 &env->active_fpu.fp_status))
1952 FOP_COND_PS(le, float32_le(fst0, fst1,
1953 &env->active_fpu.fp_status),
1954 float32_le(fsth0, fsth1,
1955 &env->active_fpu.fp_status))
1956 FOP_COND_PS(ngt, float32_unordered(fst1, fst0,
1957 &env->active_fpu.fp_status)
1958 || float32_le(fst0, fst1,
1959 &env->active_fpu.fp_status),
1960 float32_unordered(fsth1, fsth0,
1961 &env->active_fpu.fp_status)
1962 || float32_le(fsth0, fsth1,
1963 &env->active_fpu.fp_status))
1964
1965 /* R6 compare operations */
1966 #define FOP_CONDN_D(op, cond) \
1967 uint64_t helper_r6_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1968 uint64_t fdt1) \
1969 { \
1970 uint64_t c; \
1971 c = cond; \
1972 update_fcr31(env, GETPC()); \
1973 if (c) { \
1974 return -1; \
1975 } else { \
1976 return 0; \
1977 } \
1978 }
1979
1980 /*
1981 * NOTE: the comma operator will make "cond" to eval to false,
1982 * but float64_unordered_quiet() is still called.
1983 */
1984 FOP_CONDN_D(af, (float64_unordered_quiet(fdt1, fdt0,
1985 &env->active_fpu.fp_status), 0))
1986 FOP_CONDN_D(un, (float64_unordered_quiet(fdt1, fdt0,
1987 &env->active_fpu.fp_status)))
1988 FOP_CONDN_D(eq, (float64_eq_quiet(fdt0, fdt1,
1989 &env->active_fpu.fp_status)))
1990 FOP_CONDN_D(ueq, (float64_unordered_quiet(fdt1, fdt0,
1991 &env->active_fpu.fp_status)
1992 || float64_eq_quiet(fdt0, fdt1,
1993 &env->active_fpu.fp_status)))
1994 FOP_CONDN_D(lt, (float64_lt_quiet(fdt0, fdt1,
1995 &env->active_fpu.fp_status)))
1996 FOP_CONDN_D(ult, (float64_unordered_quiet(fdt1, fdt0,
1997 &env->active_fpu.fp_status)
1998 || float64_lt_quiet(fdt0, fdt1,
1999 &env->active_fpu.fp_status)))
2000 FOP_CONDN_D(le, (float64_le_quiet(fdt0, fdt1,
2001 &env->active_fpu.fp_status)))
2002 FOP_CONDN_D(ule, (float64_unordered_quiet(fdt1, fdt0,
2003 &env->active_fpu.fp_status)
2004 || float64_le_quiet(fdt0, fdt1,
2005 &env->active_fpu.fp_status)))
2006 /*
2007 * NOTE: the comma operator will make "cond" to eval to false,
2008 * but float64_unordered() is still called.\
2009 */
2010 FOP_CONDN_D(saf, (float64_unordered(fdt1, fdt0,
2011 &env->active_fpu.fp_status), 0))
2012 FOP_CONDN_D(sun, (float64_unordered(fdt1, fdt0,
2013 &env->active_fpu.fp_status)))
2014 FOP_CONDN_D(seq, (float64_eq(fdt0, fdt1,
2015 &env->active_fpu.fp_status)))
2016 FOP_CONDN_D(sueq, (float64_unordered(fdt1, fdt0,
2017 &env->active_fpu.fp_status)
2018 || float64_eq(fdt0, fdt1,
2019 &env->active_fpu.fp_status)))
2020 FOP_CONDN_D(slt, (float64_lt(fdt0, fdt1,
2021 &env->active_fpu.fp_status)))
2022 FOP_CONDN_D(sult, (float64_unordered(fdt1, fdt0,
2023 &env->active_fpu.fp_status)
2024 || float64_lt(fdt0, fdt1,
2025 &env->active_fpu.fp_status)))
2026 FOP_CONDN_D(sle, (float64_le(fdt0, fdt1,
2027 &env->active_fpu.fp_status)))
2028 FOP_CONDN_D(sule, (float64_unordered(fdt1, fdt0,
2029 &env->active_fpu.fp_status)
2030 || float64_le(fdt0, fdt1,
2031 &env->active_fpu.fp_status)))
2032 FOP_CONDN_D(or, (float64_le_quiet(fdt1, fdt0,
2033 &env->active_fpu.fp_status)
2034 || float64_le_quiet(fdt0, fdt1,
2035 &env->active_fpu.fp_status)))
2036 FOP_CONDN_D(une, (float64_unordered_quiet(fdt1, fdt0,
2037 &env->active_fpu.fp_status)
2038 || float64_lt_quiet(fdt1, fdt0,
2039 &env->active_fpu.fp_status)
2040 || float64_lt_quiet(fdt0, fdt1,
2041 &env->active_fpu.fp_status)))
2042 FOP_CONDN_D(ne, (float64_lt_quiet(fdt1, fdt0,
2043 &env->active_fpu.fp_status)
2044 || float64_lt_quiet(fdt0, fdt1,
2045 &env->active_fpu.fp_status)))
2046 FOP_CONDN_D(sor, (float64_le(fdt1, fdt0,
2047 &env->active_fpu.fp_status)
2048 || float64_le(fdt0, fdt1,
2049 &env->active_fpu.fp_status)))
2050 FOP_CONDN_D(sune, (float64_unordered(fdt1, fdt0,
2051 &env->active_fpu.fp_status)
2052 || float64_lt(fdt1, fdt0,
2053 &env->active_fpu.fp_status)
2054 || float64_lt(fdt0, fdt1,
2055 &env->active_fpu.fp_status)))
2056 FOP_CONDN_D(sne, (float64_lt(fdt1, fdt0,
2057 &env->active_fpu.fp_status)
2058 || float64_lt(fdt0, fdt1,
2059 &env->active_fpu.fp_status)))
2060
2061 #define FOP_CONDN_S(op, cond) \
2062 uint32_t helper_r6_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
2063 uint32_t fst1) \
2064 { \
2065 uint64_t c; \
2066 c = cond; \
2067 update_fcr31(env, GETPC()); \
2068 if (c) { \
2069 return -1; \
2070 } else { \
2071 return 0; \
2072 } \
2073 }
2074
2075 /*
2076 * NOTE: the comma operator will make "cond" to eval to false,
2077 * but float32_unordered_quiet() is still called.
2078 */
2079 FOP_CONDN_S(af, (float32_unordered_quiet(fst1, fst0,
2080 &env->active_fpu.fp_status), 0))
2081 FOP_CONDN_S(un, (float32_unordered_quiet(fst1, fst0,
2082 &env->active_fpu.fp_status)))
2083 FOP_CONDN_S(eq, (float32_eq_quiet(fst0, fst1,
2084 &env->active_fpu.fp_status)))
2085 FOP_CONDN_S(ueq, (float32_unordered_quiet(fst1, fst0,
2086 &env->active_fpu.fp_status)
2087 || float32_eq_quiet(fst0, fst1,
2088 &env->active_fpu.fp_status)))
2089 FOP_CONDN_S(lt, (float32_lt_quiet(fst0, fst1,
2090 &env->active_fpu.fp_status)))
2091 FOP_CONDN_S(ult, (float32_unordered_quiet(fst1, fst0,
2092 &env->active_fpu.fp_status)
2093 || float32_lt_quiet(fst0, fst1,
2094 &env->active_fpu.fp_status)))
2095 FOP_CONDN_S(le, (float32_le_quiet(fst0, fst1,
2096 &env->active_fpu.fp_status)))
2097 FOP_CONDN_S(ule, (float32_unordered_quiet(fst1, fst0,
2098 &env->active_fpu.fp_status)
2099 || float32_le_quiet(fst0, fst1,
2100 &env->active_fpu.fp_status)))
2101 /*
2102 * NOTE: the comma operator will make "cond" to eval to false,
2103 * but float32_unordered() is still called.
2104 */
2105 FOP_CONDN_S(saf, (float32_unordered(fst1, fst0,
2106 &env->active_fpu.fp_status), 0))
2107 FOP_CONDN_S(sun, (float32_unordered(fst1, fst0,
2108 &env->active_fpu.fp_status)))
2109 FOP_CONDN_S(seq, (float32_eq(fst0, fst1,
2110 &env->active_fpu.fp_status)))
2111 FOP_CONDN_S(sueq, (float32_unordered(fst1, fst0,
2112 &env->active_fpu.fp_status)
2113 || float32_eq(fst0, fst1,
2114 &env->active_fpu.fp_status)))
2115 FOP_CONDN_S(slt, (float32_lt(fst0, fst1,
2116 &env->active_fpu.fp_status)))
2117 FOP_CONDN_S(sult, (float32_unordered(fst1, fst0,
2118 &env->active_fpu.fp_status)
2119 || float32_lt(fst0, fst1,
2120 &env->active_fpu.fp_status)))
2121 FOP_CONDN_S(sle, (float32_le(fst0, fst1,
2122 &env->active_fpu.fp_status)))
2123 FOP_CONDN_S(sule, (float32_unordered(fst1, fst0,
2124 &env->active_fpu.fp_status)
2125 || float32_le(fst0, fst1,
2126 &env->active_fpu.fp_status)))
2127 FOP_CONDN_S(or, (float32_le_quiet(fst1, fst0,
2128 &env->active_fpu.fp_status)
2129 || float32_le_quiet(fst0, fst1,
2130 &env->active_fpu.fp_status)))
2131 FOP_CONDN_S(une, (float32_unordered_quiet(fst1, fst0,
2132 &env->active_fpu.fp_status)
2133 || float32_lt_quiet(fst1, fst0,
2134 &env->active_fpu.fp_status)
2135 || float32_lt_quiet(fst0, fst1,
2136 &env->active_fpu.fp_status)))
2137 FOP_CONDN_S(ne, (float32_lt_quiet(fst1, fst0,
2138 &env->active_fpu.fp_status)
2139 || float32_lt_quiet(fst0, fst1,
2140 &env->active_fpu.fp_status)))
2141 FOP_CONDN_S(sor, (float32_le(fst1, fst0,
2142 &env->active_fpu.fp_status)
2143 || float32_le(fst0, fst1,
2144 &env->active_fpu.fp_status)))
2145 FOP_CONDN_S(sune, (float32_unordered(fst1, fst0,
2146 &env->active_fpu.fp_status)
2147 || float32_lt(fst1, fst0,
2148 &env->active_fpu.fp_status)
2149 || float32_lt(fst0, fst1,
2150 &env->active_fpu.fp_status)))
2151 FOP_CONDN_S(sne, (float32_lt(fst1, fst0,
2152 &env->active_fpu.fp_status)
2153 || float32_lt(fst0, fst1,
2154 &env->active_fpu.fp_status)))