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1 /*
2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
3 *
4 * Copyright (c) 2014 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internal.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "fpu/softfloat.h"
26
27 /* Data format min and max values */
28 #define DF_BITS(df) (1 << ((df) + 3))
29
30 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
31 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
32
33 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
34 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
35
36 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
37 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
38
39 #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
40 #define SIGNED(x, df) \
41 ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
42
43 /* Element-by-element access macros */
44 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
45
46
47
48 /*
49 * Bit Count
50 * ---------
51 *
52 * +---------------+----------------------------------------------------------+
53 * | NLOC.B | Vector Leading Ones Count (byte) |
54 * | NLOC.H | Vector Leading Ones Count (halfword) |
55 * | NLOC.W | Vector Leading Ones Count (word) |
56 * | NLOC.D | Vector Leading Ones Count (doubleword) |
57 * | NLZC.B | Vector Leading Zeros Count (byte) |
58 * | NLZC.H | Vector Leading Zeros Count (halfword) |
59 * | NLZC.W | Vector Leading Zeros Count (word) |
60 * | NLZC.D | Vector Leading Zeros Count (doubleword) |
61 * | PCNT.B | Vector Population Count (byte) |
62 * | PCNT.H | Vector Population Count (halfword) |
63 * | PCNT.W | Vector Population Count (word) |
64 * | PCNT.D | Vector Population Count (doubleword) |
65 * +---------------+----------------------------------------------------------+
66 */
67
68 static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
69 {
70 uint64_t x, y;
71 int n, c;
72
73 x = UNSIGNED(arg, df);
74 n = DF_BITS(df);
75 c = DF_BITS(df) / 2;
76
77 do {
78 y = x >> c;
79 if (y != 0) {
80 n = n - c;
81 x = y;
82 }
83 c = c >> 1;
84 } while (c != 0);
85
86 return n - x;
87 }
88
89 static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
90 {
91 return msa_nlzc_df(df, UNSIGNED((~arg), df));
92 }
93
94 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
95 {
96 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
97 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
98
99 pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
100 pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
101 pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
102 pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
103 pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
104 pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
105 pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
106 pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
107 pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
108 pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
109 pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
110 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
111 pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
112 pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
113 pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
114 pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
115 }
116
117 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
118 {
119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
121
122 pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
123 pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
124 pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
125 pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
126 pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
127 pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
128 pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
129 pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
130 }
131
132 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
133 {
134 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
135 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
136
137 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
138 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
139 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
140 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
141 }
142
143 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
144 {
145 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
146 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
147
148 pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
149 pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
150 }
151
152 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
153 {
154 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
155 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
156
157 pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
158 pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
159 pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
160 pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
161 pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
162 pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
163 pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
164 pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
165 pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
166 pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
167 pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
168 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
169 pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
170 pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
171 pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
172 pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
173 }
174
175 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
176 {
177 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
178 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
179
180 pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
181 pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
182 pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
183 pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
184 pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
185 pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
186 pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
187 pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
188 }
189
190 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
191 {
192 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
193 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
194
195 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
196 pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
197 pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
198 pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
199 }
200
201 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
202 {
203 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
204 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
205
206 pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
207 pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
208 }
209
210 static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
211 {
212 uint64_t x;
213
214 x = UNSIGNED(arg, df);
215
216 x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL);
217 x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL);
218 x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL);
219 x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL);
220 x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
221 x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
222
223 return x;
224 }
225
226 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
227 {
228 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
229 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
230
231 pwd->b[0] = msa_pcnt_df(DF_BYTE, pws->b[0]);
232 pwd->b[1] = msa_pcnt_df(DF_BYTE, pws->b[1]);
233 pwd->b[2] = msa_pcnt_df(DF_BYTE, pws->b[2]);
234 pwd->b[3] = msa_pcnt_df(DF_BYTE, pws->b[3]);
235 pwd->b[4] = msa_pcnt_df(DF_BYTE, pws->b[4]);
236 pwd->b[5] = msa_pcnt_df(DF_BYTE, pws->b[5]);
237 pwd->b[6] = msa_pcnt_df(DF_BYTE, pws->b[6]);
238 pwd->b[7] = msa_pcnt_df(DF_BYTE, pws->b[7]);
239 pwd->b[8] = msa_pcnt_df(DF_BYTE, pws->b[8]);
240 pwd->b[9] = msa_pcnt_df(DF_BYTE, pws->b[9]);
241 pwd->b[10] = msa_pcnt_df(DF_BYTE, pws->b[10]);
242 pwd->b[11] = msa_pcnt_df(DF_BYTE, pws->b[11]);
243 pwd->b[12] = msa_pcnt_df(DF_BYTE, pws->b[12]);
244 pwd->b[13] = msa_pcnt_df(DF_BYTE, pws->b[13]);
245 pwd->b[14] = msa_pcnt_df(DF_BYTE, pws->b[14]);
246 pwd->b[15] = msa_pcnt_df(DF_BYTE, pws->b[15]);
247 }
248
249 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
250 {
251 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
252 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
253
254 pwd->h[0] = msa_pcnt_df(DF_HALF, pws->h[0]);
255 pwd->h[1] = msa_pcnt_df(DF_HALF, pws->h[1]);
256 pwd->h[2] = msa_pcnt_df(DF_HALF, pws->h[2]);
257 pwd->h[3] = msa_pcnt_df(DF_HALF, pws->h[3]);
258 pwd->h[4] = msa_pcnt_df(DF_HALF, pws->h[4]);
259 pwd->h[5] = msa_pcnt_df(DF_HALF, pws->h[5]);
260 pwd->h[6] = msa_pcnt_df(DF_HALF, pws->h[6]);
261 pwd->h[7] = msa_pcnt_df(DF_HALF, pws->h[7]);
262 }
263
264 void helper_msa_pcnt_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
265 {
266 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
267 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
268
269 pwd->w[0] = msa_pcnt_df(DF_WORD, pws->w[0]);
270 pwd->w[1] = msa_pcnt_df(DF_WORD, pws->w[1]);
271 pwd->w[2] = msa_pcnt_df(DF_WORD, pws->w[2]);
272 pwd->w[3] = msa_pcnt_df(DF_WORD, pws->w[3]);
273 }
274
275 void helper_msa_pcnt_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
276 {
277 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
278 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
279
280 pwd->d[0] = msa_pcnt_df(DF_DOUBLE, pws->d[0]);
281 pwd->d[1] = msa_pcnt_df(DF_DOUBLE, pws->d[1]);
282 }
283
284
285 /*
286 * Bit Move
287 * --------
288 *
289 * +---------------+----------------------------------------------------------+
290 * | BINSL.B | Vector Bit Insert Left (byte) |
291 * | BINSL.H | Vector Bit Insert Left (halfword) |
292 * | BINSL.W | Vector Bit Insert Left (word) |
293 * | BINSL.D | Vector Bit Insert Left (doubleword) |
294 * | BINSR.B | Vector Bit Insert Right (byte) |
295 * | BINSR.H | Vector Bit Insert Right (halfword) |
296 * | BINSR.W | Vector Bit Insert Right (word) |
297 * | BINSR.D | Vector Bit Insert Right (doubleword) |
298 * | BMNZ.V | Vector Bit Move If Not Zero |
299 * | BMZ.V | Vector Bit Move If Zero |
300 * | BSEL.V | Vector Bit Select |
301 * +---------------+----------------------------------------------------------+
302 */
303
304 /* Data format bit position and unsigned values */
305 #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
306
307 static inline int64_t msa_binsl_df(uint32_t df,
308 int64_t dest, int64_t arg1, int64_t arg2)
309 {
310 uint64_t u_arg1 = UNSIGNED(arg1, df);
311 uint64_t u_dest = UNSIGNED(dest, df);
312 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
313 int32_t sh_a = DF_BITS(df) - sh_d;
314 if (sh_d == DF_BITS(df)) {
315 return u_arg1;
316 } else {
317 return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
318 UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
319 }
320 }
321
322 void helper_msa_binsl_b(CPUMIPSState *env,
323 uint32_t wd, uint32_t ws, uint32_t wt)
324 {
325 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
326 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
327 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
328
329 pwd->b[0] = msa_binsl_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
330 pwd->b[1] = msa_binsl_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
331 pwd->b[2] = msa_binsl_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
332 pwd->b[3] = msa_binsl_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
333 pwd->b[4] = msa_binsl_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
334 pwd->b[5] = msa_binsl_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
335 pwd->b[6] = msa_binsl_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
336 pwd->b[7] = msa_binsl_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
337 pwd->b[8] = msa_binsl_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
338 pwd->b[9] = msa_binsl_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
339 pwd->b[10] = msa_binsl_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
340 pwd->b[11] = msa_binsl_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
341 pwd->b[12] = msa_binsl_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
342 pwd->b[13] = msa_binsl_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
343 pwd->b[14] = msa_binsl_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
344 pwd->b[15] = msa_binsl_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
345 }
346
347 void helper_msa_binsl_h(CPUMIPSState *env,
348 uint32_t wd, uint32_t ws, uint32_t wt)
349 {
350 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
351 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
352 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
353
354 pwd->h[0] = msa_binsl_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
355 pwd->h[1] = msa_binsl_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
356 pwd->h[2] = msa_binsl_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
357 pwd->h[3] = msa_binsl_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
358 pwd->h[4] = msa_binsl_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
359 pwd->h[5] = msa_binsl_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
360 pwd->h[6] = msa_binsl_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
361 pwd->h[7] = msa_binsl_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
362 }
363
364 void helper_msa_binsl_w(CPUMIPSState *env,
365 uint32_t wd, uint32_t ws, uint32_t wt)
366 {
367 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
368 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
369 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
370
371 pwd->w[0] = msa_binsl_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
372 pwd->w[1] = msa_binsl_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
373 pwd->w[2] = msa_binsl_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
374 pwd->w[3] = msa_binsl_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
375 }
376
377 void helper_msa_binsl_d(CPUMIPSState *env,
378 uint32_t wd, uint32_t ws, uint32_t wt)
379 {
380 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
381 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
382 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
383
384 pwd->d[0] = msa_binsl_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
385 pwd->d[1] = msa_binsl_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
386 }
387
388 static inline int64_t msa_binsr_df(uint32_t df,
389 int64_t dest, int64_t arg1, int64_t arg2)
390 {
391 uint64_t u_arg1 = UNSIGNED(arg1, df);
392 uint64_t u_dest = UNSIGNED(dest, df);
393 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
394 int32_t sh_a = DF_BITS(df) - sh_d;
395 if (sh_d == DF_BITS(df)) {
396 return u_arg1;
397 } else {
398 return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
399 UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
400 }
401 }
402
403 void helper_msa_binsr_b(CPUMIPSState *env,
404 uint32_t wd, uint32_t ws, uint32_t wt)
405 {
406 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
407 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
408 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
409
410 pwd->b[0] = msa_binsr_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
411 pwd->b[1] = msa_binsr_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
412 pwd->b[2] = msa_binsr_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
413 pwd->b[3] = msa_binsr_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
414 pwd->b[4] = msa_binsr_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
415 pwd->b[5] = msa_binsr_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
416 pwd->b[6] = msa_binsr_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
417 pwd->b[7] = msa_binsr_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
418 pwd->b[8] = msa_binsr_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
419 pwd->b[9] = msa_binsr_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
420 pwd->b[10] = msa_binsr_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
421 pwd->b[11] = msa_binsr_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
422 pwd->b[12] = msa_binsr_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
423 pwd->b[13] = msa_binsr_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
424 pwd->b[14] = msa_binsr_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
425 pwd->b[15] = msa_binsr_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
426 }
427
428 void helper_msa_binsr_h(CPUMIPSState *env,
429 uint32_t wd, uint32_t ws, uint32_t wt)
430 {
431 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
432 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
433 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
434
435 pwd->h[0] = msa_binsr_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
436 pwd->h[1] = msa_binsr_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
437 pwd->h[2] = msa_binsr_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
438 pwd->h[3] = msa_binsr_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
439 pwd->h[4] = msa_binsr_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
440 pwd->h[5] = msa_binsr_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
441 pwd->h[6] = msa_binsr_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
442 pwd->h[7] = msa_binsr_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
443 }
444
445 void helper_msa_binsr_w(CPUMIPSState *env,
446 uint32_t wd, uint32_t ws, uint32_t wt)
447 {
448 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
449 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
450 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
451
452 pwd->w[0] = msa_binsr_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
453 pwd->w[1] = msa_binsr_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
454 pwd->w[2] = msa_binsr_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
455 pwd->w[3] = msa_binsr_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
456 }
457
458 void helper_msa_binsr_d(CPUMIPSState *env,
459 uint32_t wd, uint32_t ws, uint32_t wt)
460 {
461 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
462 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
463 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
464
465 pwd->d[0] = msa_binsr_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
466 pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
467 }
468
469 void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
470 {
471 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
472 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
473 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
474
475 pwd->d[0] = UNSIGNED( \
476 ((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
477 pwd->d[1] = UNSIGNED( \
478 ((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
479 }
480
481 void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
482 {
483 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
484 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
485 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
486
487 pwd->d[0] = UNSIGNED( \
488 ((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
489 pwd->d[1] = UNSIGNED( \
490 ((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
491 }
492
493 void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
494 {
495 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
496 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
497 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
498
499 pwd->d[0] = UNSIGNED( \
500 (pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
501 pwd->d[1] = UNSIGNED( \
502 (pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
503 }
504
505
506 /*
507 * Bit Set
508 * -------
509 *
510 * +---------------+----------------------------------------------------------+
511 * | BCLR.B | Vector Bit Clear (byte) |
512 * | BCLR.H | Vector Bit Clear (halfword) |
513 * | BCLR.W | Vector Bit Clear (word) |
514 * | BCLR.D | Vector Bit Clear (doubleword) |
515 * | BNEG.B | Vector Bit Negate (byte) |
516 * | BNEG.H | Vector Bit Negate (halfword) |
517 * | BNEG.W | Vector Bit Negate (word) |
518 * | BNEG.D | Vector Bit Negate (doubleword) |
519 * | BSET.B | Vector Bit Set (byte) |
520 * | BSET.H | Vector Bit Set (halfword) |
521 * | BSET.W | Vector Bit Set (word) |
522 * | BSET.D | Vector Bit Set (doubleword) |
523 * +---------------+----------------------------------------------------------+
524 */
525
526 static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
527 {
528 int32_t b_arg2 = BIT_POSITION(arg2, df);
529 return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
530 }
531
532 void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
533 {
534 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
535 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
536 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
537
538 pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
539 pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[1], pwt->b[1]);
540 pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[2], pwt->b[2]);
541 pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[3], pwt->b[3]);
542 pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[4], pwt->b[4]);
543 pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[5], pwt->b[5]);
544 pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[6], pwt->b[6]);
545 pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[7], pwt->b[7]);
546 pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[8], pwt->b[8]);
547 pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[9], pwt->b[9]);
548 pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[10], pwt->b[10]);
549 pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[11], pwt->b[11]);
550 pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[12], pwt->b[12]);
551 pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[13], pwt->b[13]);
552 pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[14], pwt->b[14]);
553 pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[15], pwt->b[15]);
554 }
555
556 void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
557 {
558 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
559 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
560 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
561
562 pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
563 pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[1], pwt->h[1]);
564 pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[2], pwt->h[2]);
565 pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[3], pwt->h[3]);
566 pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[4], pwt->h[4]);
567 pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[5], pwt->h[5]);
568 pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[6], pwt->h[6]);
569 pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[7], pwt->h[7]);
570 }
571
572 void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
573 {
574 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
575 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
576 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
577
578 pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
579 pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[1], pwt->w[1]);
580 pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[2], pwt->w[2]);
581 pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[3], pwt->w[3]);
582 }
583
584 void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
585 {
586 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
587 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
588 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
589
590 pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
591 pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
592 }
593
594 static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
595 {
596 int32_t b_arg2 = BIT_POSITION(arg2, df);
597 return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
598 }
599
600 void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
601 {
602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
605
606 pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
607 pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[1], pwt->b[1]);
608 pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[2], pwt->b[2]);
609 pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[3], pwt->b[3]);
610 pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[4], pwt->b[4]);
611 pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[5], pwt->b[5]);
612 pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[6], pwt->b[6]);
613 pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[7], pwt->b[7]);
614 pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[8], pwt->b[8]);
615 pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[9], pwt->b[9]);
616 pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[10], pwt->b[10]);
617 pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[11], pwt->b[11]);
618 pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[12], pwt->b[12]);
619 pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[13], pwt->b[13]);
620 pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[14], pwt->b[14]);
621 pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[15], pwt->b[15]);
622 }
623
624 void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
625 {
626 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
627 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
628 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
629
630 pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
631 pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[1], pwt->h[1]);
632 pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[2], pwt->h[2]);
633 pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[3], pwt->h[3]);
634 pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[4], pwt->h[4]);
635 pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[5], pwt->h[5]);
636 pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[6], pwt->h[6]);
637 pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[7], pwt->h[7]);
638 }
639
640 void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
641 {
642 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
643 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
644 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
645
646 pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
647 pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[1], pwt->w[1]);
648 pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[2], pwt->w[2]);
649 pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[3], pwt->w[3]);
650 }
651
652 void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
653 {
654 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
655 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
656 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
657
658 pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
659 pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
660 }
661
662 static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
663 int64_t arg2)
664 {
665 int32_t b_arg2 = BIT_POSITION(arg2, df);
666 return UNSIGNED(arg1 | (1LL << b_arg2), df);
667 }
668
669 void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
670 {
671 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
672 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
673 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
674
675 pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
676 pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[1], pwt->b[1]);
677 pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[2], pwt->b[2]);
678 pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[3], pwt->b[3]);
679 pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[4], pwt->b[4]);
680 pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[5], pwt->b[5]);
681 pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[6], pwt->b[6]);
682 pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[7], pwt->b[7]);
683 pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[8], pwt->b[8]);
684 pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[9], pwt->b[9]);
685 pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[10], pwt->b[10]);
686 pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[11], pwt->b[11]);
687 pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[12], pwt->b[12]);
688 pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[13], pwt->b[13]);
689 pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[14], pwt->b[14]);
690 pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[15], pwt->b[15]);
691 }
692
693 void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
694 {
695 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
696 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
697 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
698
699 pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
700 pwd->h[1] = msa_bset_df(DF_HALF, pws->h[1], pwt->h[1]);
701 pwd->h[2] = msa_bset_df(DF_HALF, pws->h[2], pwt->h[2]);
702 pwd->h[3] = msa_bset_df(DF_HALF, pws->h[3], pwt->h[3]);
703 pwd->h[4] = msa_bset_df(DF_HALF, pws->h[4], pwt->h[4]);
704 pwd->h[5] = msa_bset_df(DF_HALF, pws->h[5], pwt->h[5]);
705 pwd->h[6] = msa_bset_df(DF_HALF, pws->h[6], pwt->h[6]);
706 pwd->h[7] = msa_bset_df(DF_HALF, pws->h[7], pwt->h[7]);
707 }
708
709 void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
710 {
711 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
712 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
713 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
714
715 pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
716 pwd->w[1] = msa_bset_df(DF_WORD, pws->w[1], pwt->w[1]);
717 pwd->w[2] = msa_bset_df(DF_WORD, pws->w[2], pwt->w[2]);
718 pwd->w[3] = msa_bset_df(DF_WORD, pws->w[3], pwt->w[3]);
719 }
720
721 void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
722 {
723 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
724 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
725 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
726
727 pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
728 pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
729 }
730
731
732 /*
733 * Fixed Multiply
734 * --------------
735 *
736 * +---------------+----------------------------------------------------------+
737 * | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
738 * | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
739 * | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
740 * | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
741 * | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
742 * | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
743 * | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
744 * | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
745 * | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
746 * | MUL_Q.W | Vector Fixed-Point Multiply (word) |
747 * | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
748 * | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
749 * +---------------+----------------------------------------------------------+
750 */
751
752 /* TODO: insert Fixed Multiply group helpers here */
753
754
755 /*
756 * Float Max Min
757 * -------------
758 *
759 * +---------------+----------------------------------------------------------+
760 * | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
761 * | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
762 * | FMAX.W | Vector Floating-Point Maximum (word) |
763 * | FMAX.D | Vector Floating-Point Maximum (doubleword) |
764 * | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
765 * | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
766 * | FMIN.W | Vector Floating-Point Minimum (word) |
767 * | FMIN.D | Vector Floating-Point Minimum (doubleword) |
768 * +---------------+----------------------------------------------------------+
769 */
770
771 /* TODO: insert Float Max Min group helpers here */
772
773
774 /*
775 * Int Add
776 * -------
777 *
778 * +---------------+----------------------------------------------------------+
779 * | ADD_A.B | Vector Add Absolute Values (byte) |
780 * | ADD_A.H | Vector Add Absolute Values (halfword) |
781 * | ADD_A.W | Vector Add Absolute Values (word) |
782 * | ADD_A.D | Vector Add Absolute Values (doubleword) |
783 * | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
784 * | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
785 * | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
786 * | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
787 * | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
788 * | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
789 * | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
790 * | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
791 * | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
792 * | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
793 * | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
794 * | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
795 * | ADDV.B | Vector Add (byte) |
796 * | ADDV.H | Vector Add (halfword) |
797 * | ADDV.W | Vector Add (word) |
798 * | ADDV.D | Vector Add (doubleword) |
799 * | HADD_S.H | Vector Signed Horizontal Add (halfword) |
800 * | HADD_S.W | Vector Signed Horizontal Add (word) |
801 * | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
802 * | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
803 * | HADD_U.W | Vector Unigned Horizontal Add (word) |
804 * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
805 * +---------------+----------------------------------------------------------+
806 */
807
808
809 static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
810 {
811 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
812 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
813 return abs_arg1 + abs_arg2;
814 }
815
816 void helper_msa_add_a_b(CPUMIPSState *env,
817 uint32_t wd, uint32_t ws, uint32_t wt)
818 {
819 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
820 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
821 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
822
823 pwd->b[0] = msa_add_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
824 pwd->b[1] = msa_add_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
825 pwd->b[2] = msa_add_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
826 pwd->b[3] = msa_add_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
827 pwd->b[4] = msa_add_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
828 pwd->b[5] = msa_add_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
829 pwd->b[6] = msa_add_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
830 pwd->b[7] = msa_add_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
831 pwd->b[8] = msa_add_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
832 pwd->b[9] = msa_add_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
833 pwd->b[10] = msa_add_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
834 pwd->b[11] = msa_add_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
835 pwd->b[12] = msa_add_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
836 pwd->b[13] = msa_add_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
837 pwd->b[14] = msa_add_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
838 pwd->b[15] = msa_add_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
839 }
840
841 void helper_msa_add_a_h(CPUMIPSState *env,
842 uint32_t wd, uint32_t ws, uint32_t wt)
843 {
844 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
845 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
846 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
847
848 pwd->h[0] = msa_add_a_df(DF_HALF, pws->h[0], pwt->h[0]);
849 pwd->h[1] = msa_add_a_df(DF_HALF, pws->h[1], pwt->h[1]);
850 pwd->h[2] = msa_add_a_df(DF_HALF, pws->h[2], pwt->h[2]);
851 pwd->h[3] = msa_add_a_df(DF_HALF, pws->h[3], pwt->h[3]);
852 pwd->h[4] = msa_add_a_df(DF_HALF, pws->h[4], pwt->h[4]);
853 pwd->h[5] = msa_add_a_df(DF_HALF, pws->h[5], pwt->h[5]);
854 pwd->h[6] = msa_add_a_df(DF_HALF, pws->h[6], pwt->h[6]);
855 pwd->h[7] = msa_add_a_df(DF_HALF, pws->h[7], pwt->h[7]);
856 }
857
858 void helper_msa_add_a_w(CPUMIPSState *env,
859 uint32_t wd, uint32_t ws, uint32_t wt)
860 {
861 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
862 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
863 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
864
865 pwd->w[0] = msa_add_a_df(DF_WORD, pws->w[0], pwt->w[0]);
866 pwd->w[1] = msa_add_a_df(DF_WORD, pws->w[1], pwt->w[1]);
867 pwd->w[2] = msa_add_a_df(DF_WORD, pws->w[2], pwt->w[2]);
868 pwd->w[3] = msa_add_a_df(DF_WORD, pws->w[3], pwt->w[3]);
869 }
870
871 void helper_msa_add_a_d(CPUMIPSState *env,
872 uint32_t wd, uint32_t ws, uint32_t wt)
873 {
874 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
875 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
876 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
877
878 pwd->d[0] = msa_add_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
879 pwd->d[1] = msa_add_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
880 }
881
882
883 static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
884 {
885 uint64_t max_int = (uint64_t)DF_MAX_INT(df);
886 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
887 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
888 if (abs_arg1 > max_int || abs_arg2 > max_int) {
889 return (int64_t)max_int;
890 } else {
891 return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
892 }
893 }
894
895 void helper_msa_adds_a_b(CPUMIPSState *env,
896 uint32_t wd, uint32_t ws, uint32_t wt)
897 {
898 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
899 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
900 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
901
902 pwd->b[0] = msa_adds_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
903 pwd->b[1] = msa_adds_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
904 pwd->b[2] = msa_adds_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
905 pwd->b[3] = msa_adds_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
906 pwd->b[4] = msa_adds_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
907 pwd->b[5] = msa_adds_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
908 pwd->b[6] = msa_adds_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
909 pwd->b[7] = msa_adds_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
910 pwd->b[8] = msa_adds_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
911 pwd->b[9] = msa_adds_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
912 pwd->b[10] = msa_adds_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
913 pwd->b[11] = msa_adds_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
914 pwd->b[12] = msa_adds_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
915 pwd->b[13] = msa_adds_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
916 pwd->b[14] = msa_adds_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
917 pwd->b[15] = msa_adds_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
918 }
919
920 void helper_msa_adds_a_h(CPUMIPSState *env,
921 uint32_t wd, uint32_t ws, uint32_t wt)
922 {
923 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
924 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
925 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
926
927 pwd->h[0] = msa_adds_a_df(DF_HALF, pws->h[0], pwt->h[0]);
928 pwd->h[1] = msa_adds_a_df(DF_HALF, pws->h[1], pwt->h[1]);
929 pwd->h[2] = msa_adds_a_df(DF_HALF, pws->h[2], pwt->h[2]);
930 pwd->h[3] = msa_adds_a_df(DF_HALF, pws->h[3], pwt->h[3]);
931 pwd->h[4] = msa_adds_a_df(DF_HALF, pws->h[4], pwt->h[4]);
932 pwd->h[5] = msa_adds_a_df(DF_HALF, pws->h[5], pwt->h[5]);
933 pwd->h[6] = msa_adds_a_df(DF_HALF, pws->h[6], pwt->h[6]);
934 pwd->h[7] = msa_adds_a_df(DF_HALF, pws->h[7], pwt->h[7]);
935 }
936
937 void helper_msa_adds_a_w(CPUMIPSState *env,
938 uint32_t wd, uint32_t ws, uint32_t wt)
939 {
940 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
941 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
942 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
943
944 pwd->w[0] = msa_adds_a_df(DF_WORD, pws->w[0], pwt->w[0]);
945 pwd->w[1] = msa_adds_a_df(DF_WORD, pws->w[1], pwt->w[1]);
946 pwd->w[2] = msa_adds_a_df(DF_WORD, pws->w[2], pwt->w[2]);
947 pwd->w[3] = msa_adds_a_df(DF_WORD, pws->w[3], pwt->w[3]);
948 }
949
950 void helper_msa_adds_a_d(CPUMIPSState *env,
951 uint32_t wd, uint32_t ws, uint32_t wt)
952 {
953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
956
957 pwd->d[0] = msa_adds_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
958 pwd->d[1] = msa_adds_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
959 }
960
961
962 static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
963 {
964 int64_t max_int = DF_MAX_INT(df);
965 int64_t min_int = DF_MIN_INT(df);
966 if (arg1 < 0) {
967 return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
968 } else {
969 return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
970 }
971 }
972
973 void helper_msa_adds_s_b(CPUMIPSState *env,
974 uint32_t wd, uint32_t ws, uint32_t wt)
975 {
976 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
977 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
978 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
979
980 pwd->b[0] = msa_adds_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
981 pwd->b[1] = msa_adds_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
982 pwd->b[2] = msa_adds_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
983 pwd->b[3] = msa_adds_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
984 pwd->b[4] = msa_adds_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
985 pwd->b[5] = msa_adds_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
986 pwd->b[6] = msa_adds_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
987 pwd->b[7] = msa_adds_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
988 pwd->b[8] = msa_adds_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
989 pwd->b[9] = msa_adds_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
990 pwd->b[10] = msa_adds_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
991 pwd->b[11] = msa_adds_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
992 pwd->b[12] = msa_adds_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
993 pwd->b[13] = msa_adds_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
994 pwd->b[14] = msa_adds_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
995 pwd->b[15] = msa_adds_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
996 }
997
998 void helper_msa_adds_s_h(CPUMIPSState *env,
999 uint32_t wd, uint32_t ws, uint32_t wt)
1000 {
1001 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1002 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1003 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1004
1005 pwd->h[0] = msa_adds_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1006 pwd->h[1] = msa_adds_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1007 pwd->h[2] = msa_adds_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1008 pwd->h[3] = msa_adds_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1009 pwd->h[4] = msa_adds_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1010 pwd->h[5] = msa_adds_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1011 pwd->h[6] = msa_adds_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1012 pwd->h[7] = msa_adds_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1013 }
1014
1015 void helper_msa_adds_s_w(CPUMIPSState *env,
1016 uint32_t wd, uint32_t ws, uint32_t wt)
1017 {
1018 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1019 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1020 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1021
1022 pwd->w[0] = msa_adds_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1023 pwd->w[1] = msa_adds_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1024 pwd->w[2] = msa_adds_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1025 pwd->w[3] = msa_adds_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1026 }
1027
1028 void helper_msa_adds_s_d(CPUMIPSState *env,
1029 uint32_t wd, uint32_t ws, uint32_t wt)
1030 {
1031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1033 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1034
1035 pwd->d[0] = msa_adds_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1036 pwd->d[1] = msa_adds_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1037 }
1038
1039
1040 static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1041 {
1042 uint64_t max_uint = DF_MAX_UINT(df);
1043 uint64_t u_arg1 = UNSIGNED(arg1, df);
1044 uint64_t u_arg2 = UNSIGNED(arg2, df);
1045 return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
1046 }
1047
1048 void helper_msa_adds_u_b(CPUMIPSState *env,
1049 uint32_t wd, uint32_t ws, uint32_t wt)
1050 {
1051 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1052 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1053 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1054
1055 pwd->b[0] = msa_adds_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1056 pwd->b[1] = msa_adds_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1057 pwd->b[2] = msa_adds_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1058 pwd->b[3] = msa_adds_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1059 pwd->b[4] = msa_adds_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1060 pwd->b[5] = msa_adds_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1061 pwd->b[6] = msa_adds_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1062 pwd->b[7] = msa_adds_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1063 pwd->b[8] = msa_adds_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1064 pwd->b[9] = msa_adds_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1065 pwd->b[10] = msa_adds_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1066 pwd->b[11] = msa_adds_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1067 pwd->b[12] = msa_adds_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1068 pwd->b[13] = msa_adds_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1069 pwd->b[14] = msa_adds_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1070 pwd->b[15] = msa_adds_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1071 }
1072
1073 void helper_msa_adds_u_h(CPUMIPSState *env,
1074 uint32_t wd, uint32_t ws, uint32_t wt)
1075 {
1076 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1077 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1078 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1079
1080 pwd->h[0] = msa_adds_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1081 pwd->h[1] = msa_adds_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1082 pwd->h[2] = msa_adds_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1083 pwd->h[3] = msa_adds_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1084 pwd->h[4] = msa_adds_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1085 pwd->h[5] = msa_adds_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1086 pwd->h[6] = msa_adds_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1087 pwd->h[7] = msa_adds_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1088 }
1089
1090 void helper_msa_adds_u_w(CPUMIPSState *env,
1091 uint32_t wd, uint32_t ws, uint32_t wt)
1092 {
1093 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1094 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1095 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1096
1097 pwd->w[0] = msa_adds_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1098 pwd->w[1] = msa_adds_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1099 pwd->w[2] = msa_adds_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1100 pwd->w[3] = msa_adds_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1101 }
1102
1103 void helper_msa_adds_u_d(CPUMIPSState *env,
1104 uint32_t wd, uint32_t ws, uint32_t wt)
1105 {
1106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1109
1110 pwd->d[0] = msa_adds_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1111 pwd->d[1] = msa_adds_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1112 }
1113
1114
1115 static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
1116 {
1117 return arg1 + arg2;
1118 }
1119
1120 void helper_msa_addv_b(CPUMIPSState *env,
1121 uint32_t wd, uint32_t ws, uint32_t wt)
1122 {
1123 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1124 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1125 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1126
1127 pwd->b[0] = msa_addv_df(DF_BYTE, pws->b[0], pwt->b[0]);
1128 pwd->b[1] = msa_addv_df(DF_BYTE, pws->b[1], pwt->b[1]);
1129 pwd->b[2] = msa_addv_df(DF_BYTE, pws->b[2], pwt->b[2]);
1130 pwd->b[3] = msa_addv_df(DF_BYTE, pws->b[3], pwt->b[3]);
1131 pwd->b[4] = msa_addv_df(DF_BYTE, pws->b[4], pwt->b[4]);
1132 pwd->b[5] = msa_addv_df(DF_BYTE, pws->b[5], pwt->b[5]);
1133 pwd->b[6] = msa_addv_df(DF_BYTE, pws->b[6], pwt->b[6]);
1134 pwd->b[7] = msa_addv_df(DF_BYTE, pws->b[7], pwt->b[7]);
1135 pwd->b[8] = msa_addv_df(DF_BYTE, pws->b[8], pwt->b[8]);
1136 pwd->b[9] = msa_addv_df(DF_BYTE, pws->b[9], pwt->b[9]);
1137 pwd->b[10] = msa_addv_df(DF_BYTE, pws->b[10], pwt->b[10]);
1138 pwd->b[11] = msa_addv_df(DF_BYTE, pws->b[11], pwt->b[11]);
1139 pwd->b[12] = msa_addv_df(DF_BYTE, pws->b[12], pwt->b[12]);
1140 pwd->b[13] = msa_addv_df(DF_BYTE, pws->b[13], pwt->b[13]);
1141 pwd->b[14] = msa_addv_df(DF_BYTE, pws->b[14], pwt->b[14]);
1142 pwd->b[15] = msa_addv_df(DF_BYTE, pws->b[15], pwt->b[15]);
1143 }
1144
1145 void helper_msa_addv_h(CPUMIPSState *env,
1146 uint32_t wd, uint32_t ws, uint32_t wt)
1147 {
1148 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1149 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1150 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1151
1152 pwd->h[0] = msa_addv_df(DF_HALF, pws->h[0], pwt->h[0]);
1153 pwd->h[1] = msa_addv_df(DF_HALF, pws->h[1], pwt->h[1]);
1154 pwd->h[2] = msa_addv_df(DF_HALF, pws->h[2], pwt->h[2]);
1155 pwd->h[3] = msa_addv_df(DF_HALF, pws->h[3], pwt->h[3]);
1156 pwd->h[4] = msa_addv_df(DF_HALF, pws->h[4], pwt->h[4]);
1157 pwd->h[5] = msa_addv_df(DF_HALF, pws->h[5], pwt->h[5]);
1158 pwd->h[6] = msa_addv_df(DF_HALF, pws->h[6], pwt->h[6]);
1159 pwd->h[7] = msa_addv_df(DF_HALF, pws->h[7], pwt->h[7]);
1160 }
1161
1162 void helper_msa_addv_w(CPUMIPSState *env,
1163 uint32_t wd, uint32_t ws, uint32_t wt)
1164 {
1165 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1166 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1167 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1168
1169 pwd->w[0] = msa_addv_df(DF_WORD, pws->w[0], pwt->w[0]);
1170 pwd->w[1] = msa_addv_df(DF_WORD, pws->w[1], pwt->w[1]);
1171 pwd->w[2] = msa_addv_df(DF_WORD, pws->w[2], pwt->w[2]);
1172 pwd->w[3] = msa_addv_df(DF_WORD, pws->w[3], pwt->w[3]);
1173 }
1174
1175 void helper_msa_addv_d(CPUMIPSState *env,
1176 uint32_t wd, uint32_t ws, uint32_t wt)
1177 {
1178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1180 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1181
1182 pwd->d[0] = msa_addv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1183 pwd->d[1] = msa_addv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1184 }
1185
1186
1187 #define SIGNED_EVEN(a, df) \
1188 ((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1189
1190 #define UNSIGNED_EVEN(a, df) \
1191 ((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1192
1193 #define SIGNED_ODD(a, df) \
1194 ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1195
1196 #define UNSIGNED_ODD(a, df) \
1197 ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1198
1199
1200 static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1201 {
1202 return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
1203 }
1204
1205 void helper_msa_hadd_s_h(CPUMIPSState *env,
1206 uint32_t wd, uint32_t ws, uint32_t wt)
1207 {
1208 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1209 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1210 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1211
1212 pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1213 pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1214 pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1215 pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1216 pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1217 pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1218 pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1219 pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1220 }
1221
1222 void helper_msa_hadd_s_w(CPUMIPSState *env,
1223 uint32_t wd, uint32_t ws, uint32_t wt)
1224 {
1225 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1226 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1227 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1228
1229 pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1230 pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1231 pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1232 pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1233 }
1234
1235 void helper_msa_hadd_s_d(CPUMIPSState *env,
1236 uint32_t wd, uint32_t ws, uint32_t wt)
1237 {
1238 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1239 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1240 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1241
1242 pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1243 pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1244 }
1245
1246
1247 static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1248 {
1249 return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
1250 }
1251
1252 void helper_msa_hadd_u_h(CPUMIPSState *env,
1253 uint32_t wd, uint32_t ws, uint32_t wt)
1254 {
1255 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1256 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1257 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1258
1259 pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1260 pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1261 pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1262 pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1263 pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1264 pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1265 pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1266 pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1267 }
1268
1269 void helper_msa_hadd_u_w(CPUMIPSState *env,
1270 uint32_t wd, uint32_t ws, uint32_t wt)
1271 {
1272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1275
1276 pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1277 pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1278 pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1279 pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1280 }
1281
1282 void helper_msa_hadd_u_d(CPUMIPSState *env,
1283 uint32_t wd, uint32_t ws, uint32_t wt)
1284 {
1285 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1286 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1287 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1288
1289 pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1290 pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1291 }
1292
1293
1294 /*
1295 * Int Average
1296 * -----------
1297 *
1298 * +---------------+----------------------------------------------------------+
1299 * | AVE_S.B | Vector Signed Average (byte) |
1300 * | AVE_S.H | Vector Signed Average (halfword) |
1301 * | AVE_S.W | Vector Signed Average (word) |
1302 * | AVE_S.D | Vector Signed Average (doubleword) |
1303 * | AVE_U.B | Vector Unsigned Average (byte) |
1304 * | AVE_U.H | Vector Unsigned Average (halfword) |
1305 * | AVE_U.W | Vector Unsigned Average (word) |
1306 * | AVE_U.D | Vector Unsigned Average (doubleword) |
1307 * | AVER_S.B | Vector Signed Average Rounded (byte) |
1308 * | AVER_S.H | Vector Signed Average Rounded (halfword) |
1309 * | AVER_S.W | Vector Signed Average Rounded (word) |
1310 * | AVER_S.D | Vector Signed Average Rounded (doubleword) |
1311 * | AVER_U.B | Vector Unsigned Average Rounded (byte) |
1312 * | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
1313 * | AVER_U.W | Vector Unsigned Average Rounded (word) |
1314 * | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
1315 * +---------------+----------------------------------------------------------+
1316 */
1317
1318 static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1319 {
1320 /* signed shift */
1321 return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
1322 }
1323
1324 void helper_msa_ave_s_b(CPUMIPSState *env,
1325 uint32_t wd, uint32_t ws, uint32_t wt)
1326 {
1327 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1328 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1329 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1330
1331 pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1332 pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1333 pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1334 pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1335 pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1336 pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1337 pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1338 pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1339 pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1340 pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1341 pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1342 pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1343 pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1344 pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1345 pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1346 pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1347 }
1348
1349 void helper_msa_ave_s_h(CPUMIPSState *env,
1350 uint32_t wd, uint32_t ws, uint32_t wt)
1351 {
1352 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1353 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1354 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1355
1356 pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1357 pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1358 pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1359 pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1360 pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1361 pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1362 pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1363 pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1364 }
1365
1366 void helper_msa_ave_s_w(CPUMIPSState *env,
1367 uint32_t wd, uint32_t ws, uint32_t wt)
1368 {
1369 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1370 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1371 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1372
1373 pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1374 pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1375 pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1376 pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1377 }
1378
1379 void helper_msa_ave_s_d(CPUMIPSState *env,
1380 uint32_t wd, uint32_t ws, uint32_t wt)
1381 {
1382 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1383 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1384 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1385
1386 pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1387 pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1388 }
1389
1390 static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1391 {
1392 uint64_t u_arg1 = UNSIGNED(arg1, df);
1393 uint64_t u_arg2 = UNSIGNED(arg2, df);
1394 /* unsigned shift */
1395 return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
1396 }
1397
1398 void helper_msa_ave_u_b(CPUMIPSState *env,
1399 uint32_t wd, uint32_t ws, uint32_t wt)
1400 {
1401 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1402 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1403 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1404
1405 pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1406 pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1407 pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1408 pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1409 pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1410 pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1411 pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1412 pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1413 pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1414 pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1415 pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1416 pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1417 pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1418 pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1419 pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1420 pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1421 }
1422
1423 void helper_msa_ave_u_h(CPUMIPSState *env,
1424 uint32_t wd, uint32_t ws, uint32_t wt)
1425 {
1426 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1427 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1428 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1429
1430 pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1431 pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1432 pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1433 pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1434 pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1435 pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1436 pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1437 pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1438 }
1439
1440 void helper_msa_ave_u_w(CPUMIPSState *env,
1441 uint32_t wd, uint32_t ws, uint32_t wt)
1442 {
1443 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1444 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1445 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1446
1447 pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1448 pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1449 pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1450 pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1451 }
1452
1453 void helper_msa_ave_u_d(CPUMIPSState *env,
1454 uint32_t wd, uint32_t ws, uint32_t wt)
1455 {
1456 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1457 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1458 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1459
1460 pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1461 pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1462 }
1463
1464 static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1465 {
1466 /* signed shift */
1467 return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
1468 }
1469
1470 void helper_msa_aver_s_b(CPUMIPSState *env,
1471 uint32_t wd, uint32_t ws, uint32_t wt)
1472 {
1473 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1474 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1475 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1476
1477 pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1478 pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1479 pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1480 pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1481 pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1482 pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1483 pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1484 pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1485 pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1486 pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1487 pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1488 pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1489 pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1490 pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1491 pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1492 pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1493 }
1494
1495 void helper_msa_aver_s_h(CPUMIPSState *env,
1496 uint32_t wd, uint32_t ws, uint32_t wt)
1497 {
1498 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1499 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1500 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1501
1502 pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1503 pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1504 pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1505 pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1506 pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1507 pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1508 pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1509 pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1510 }
1511
1512 void helper_msa_aver_s_w(CPUMIPSState *env,
1513 uint32_t wd, uint32_t ws, uint32_t wt)
1514 {
1515 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1516 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1517 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1518
1519 pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1520 pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1521 pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1522 pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1523 }
1524
1525 void helper_msa_aver_s_d(CPUMIPSState *env,
1526 uint32_t wd, uint32_t ws, uint32_t wt)
1527 {
1528 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1529 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1530 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1531
1532 pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1533 pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1534 }
1535
1536 static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1537 {
1538 uint64_t u_arg1 = UNSIGNED(arg1, df);
1539 uint64_t u_arg2 = UNSIGNED(arg2, df);
1540 /* unsigned shift */
1541 return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
1542 }
1543
1544 void helper_msa_aver_u_b(CPUMIPSState *env,
1545 uint32_t wd, uint32_t ws, uint32_t wt)
1546 {
1547 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1548 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1549 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1550
1551 pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1552 pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1553 pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1554 pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1555 pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1556 pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1557 pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1558 pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1559 pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1560 pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1561 pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1562 pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1563 pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1564 pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1565 pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1566 pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1567 }
1568
1569 void helper_msa_aver_u_h(CPUMIPSState *env,
1570 uint32_t wd, uint32_t ws, uint32_t wt)
1571 {
1572 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1573 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1574 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1575
1576 pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1577 pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1578 pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1579 pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1580 pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1581 pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1582 pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1583 pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1584 }
1585
1586 void helper_msa_aver_u_w(CPUMIPSState *env,
1587 uint32_t wd, uint32_t ws, uint32_t wt)
1588 {
1589 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1590 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1591 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1592
1593 pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1594 pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1595 pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1596 pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1597 }
1598
1599 void helper_msa_aver_u_d(CPUMIPSState *env,
1600 uint32_t wd, uint32_t ws, uint32_t wt)
1601 {
1602 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1603 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1604 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1605
1606 pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1607 pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1608 }
1609
1610
1611 /*
1612 * Int Compare
1613 * -----------
1614 *
1615 * +---------------+----------------------------------------------------------+
1616 * | CEQ.B | Vector Compare Equal (byte) |
1617 * | CEQ.H | Vector Compare Equal (halfword) |
1618 * | CEQ.W | Vector Compare Equal (word) |
1619 * | CEQ.D | Vector Compare Equal (doubleword) |
1620 * | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
1621 * | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
1622 * | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
1623 * | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
1624 * | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
1625 * | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
1626 * | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
1627 * | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
1628 * | CLT_S.B | Vector Compare Signed Less Than (byte) |
1629 * | CLT_S.H | Vector Compare Signed Less Than (halfword) |
1630 * | CLT_S.W | Vector Compare Signed Less Than (word) |
1631 * | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
1632 * | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
1633 * | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
1634 * | CLT_U.W | Vector Compare Unsigned Less Than (word) |
1635 * | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
1636 * +---------------+----------------------------------------------------------+
1637 */
1638
1639 static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
1640 {
1641 return arg1 == arg2 ? -1 : 0;
1642 }
1643
1644 static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
1645 {
1646 return arg1 == arg2 ? -1 : 0;
1647 }
1648
1649 void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1650 {
1651 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1652 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1653 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1654
1655 pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
1656 pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
1657 pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
1658 pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
1659 pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
1660 pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
1661 pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
1662 pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
1663 pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
1664 pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
1665 pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
1666 pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
1667 pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
1668 pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
1669 pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
1670 pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
1671 }
1672
1673 static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
1674 {
1675 return arg1 == arg2 ? -1 : 0;
1676 }
1677
1678 void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1679 {
1680 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1681 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1682 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1683
1684 pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
1685 pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
1686 pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
1687 pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
1688 pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
1689 pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
1690 pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
1691 pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
1692 }
1693
1694 static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
1695 {
1696 return arg1 == arg2 ? -1 : 0;
1697 }
1698
1699 void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1700 {
1701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1704
1705 pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
1706 pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
1707 pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
1708 pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
1709 }
1710
1711 static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
1712 {
1713 return arg1 == arg2 ? -1 : 0;
1714 }
1715
1716 void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1717 {
1718 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1719 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1720 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1721
1722 pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
1723 pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
1724 }
1725
1726 static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1727 {
1728 return arg1 <= arg2 ? -1 : 0;
1729 }
1730
1731 void helper_msa_cle_s_b(CPUMIPSState *env,
1732 uint32_t wd, uint32_t ws, uint32_t wt)
1733 {
1734 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1735 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1736 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1737
1738 pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1739 pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1740 pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1741 pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1742 pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1743 pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1744 pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1745 pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1746 pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1747 pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1748 pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1749 pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1750 pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1751 pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1752 pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1753 pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1754 }
1755
1756 void helper_msa_cle_s_h(CPUMIPSState *env,
1757 uint32_t wd, uint32_t ws, uint32_t wt)
1758 {
1759 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1760 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1761 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1762
1763 pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1764 pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1765 pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1766 pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1767 pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1768 pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1769 pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1770 pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1771 }
1772
1773 void helper_msa_cle_s_w(CPUMIPSState *env,
1774 uint32_t wd, uint32_t ws, uint32_t wt)
1775 {
1776 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1777 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1778 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1779
1780 pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1781 pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1782 pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1783 pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1784 }
1785
1786 void helper_msa_cle_s_d(CPUMIPSState *env,
1787 uint32_t wd, uint32_t ws, uint32_t wt)
1788 {
1789 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1790 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1791 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1792
1793 pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1794 pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1795 }
1796
1797 static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1798 {
1799 uint64_t u_arg1 = UNSIGNED(arg1, df);
1800 uint64_t u_arg2 = UNSIGNED(arg2, df);
1801 return u_arg1 <= u_arg2 ? -1 : 0;
1802 }
1803
1804 void helper_msa_cle_u_b(CPUMIPSState *env,
1805 uint32_t wd, uint32_t ws, uint32_t wt)
1806 {
1807 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1808 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1809 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1810
1811 pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1812 pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1813 pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1814 pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1815 pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1816 pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1817 pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1818 pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1819 pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1820 pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1821 pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1822 pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1823 pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1824 pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1825 pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1826 pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1827 }
1828
1829 void helper_msa_cle_u_h(CPUMIPSState *env,
1830 uint32_t wd, uint32_t ws, uint32_t wt)
1831 {
1832 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1833 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1834 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1835
1836 pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1837 pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1838 pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1839 pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1840 pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1841 pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1842 pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1843 pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1844 }
1845
1846 void helper_msa_cle_u_w(CPUMIPSState *env,
1847 uint32_t wd, uint32_t ws, uint32_t wt)
1848 {
1849 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1850 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1851 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1852
1853 pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1854 pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1855 pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1856 pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1857 }
1858
1859 void helper_msa_cle_u_d(CPUMIPSState *env,
1860 uint32_t wd, uint32_t ws, uint32_t wt)
1861 {
1862 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1863 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1864 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1865
1866 pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1867 pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1868 }
1869
1870 static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1871 {
1872 return arg1 < arg2 ? -1 : 0;
1873 }
1874
1875 static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
1876 {
1877 return arg1 < arg2 ? -1 : 0;
1878 }
1879
1880 void helper_msa_clt_s_b(CPUMIPSState *env,
1881 uint32_t wd, uint32_t ws, uint32_t wt)
1882 {
1883 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1884 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1885 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1886
1887 pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
1888 pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
1889 pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
1890 pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
1891 pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
1892 pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
1893 pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
1894 pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
1895 pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
1896 pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
1897 pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
1898 pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
1899 pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
1900 pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
1901 pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
1902 pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
1903 }
1904
1905 static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
1906 {
1907 return arg1 < arg2 ? -1 : 0;
1908 }
1909
1910 void helper_msa_clt_s_h(CPUMIPSState *env,
1911 uint32_t wd, uint32_t ws, uint32_t wt)
1912 {
1913 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1914 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1915 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1916
1917 pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
1918 pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
1919 pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
1920 pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
1921 pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
1922 pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
1923 pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
1924 pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
1925 }
1926
1927 static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
1928 {
1929 return arg1 < arg2 ? -1 : 0;
1930 }
1931
1932 void helper_msa_clt_s_w(CPUMIPSState *env,
1933 uint32_t wd, uint32_t ws, uint32_t wt)
1934 {
1935 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1936 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1937 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1938
1939 pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
1940 pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
1941 pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
1942 pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
1943 }
1944
1945 static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
1946 {
1947 return arg1 < arg2 ? -1 : 0;
1948 }
1949
1950 void helper_msa_clt_s_d(CPUMIPSState *env,
1951 uint32_t wd, uint32_t ws, uint32_t wt)
1952 {
1953 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1954 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1955 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1956
1957 pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
1958 pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
1959 }
1960
1961 static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1962 {
1963 uint64_t u_arg1 = UNSIGNED(arg1, df);
1964 uint64_t u_arg2 = UNSIGNED(arg2, df);
1965 return u_arg1 < u_arg2 ? -1 : 0;
1966 }
1967
1968 void helper_msa_clt_u_b(CPUMIPSState *env,
1969 uint32_t wd, uint32_t ws, uint32_t wt)
1970 {
1971 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1972 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1973 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1974
1975 pwd->b[0] = msa_clt_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1976 pwd->b[1] = msa_clt_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1977 pwd->b[2] = msa_clt_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1978 pwd->b[3] = msa_clt_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1979 pwd->b[4] = msa_clt_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1980 pwd->b[5] = msa_clt_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1981 pwd->b[6] = msa_clt_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1982 pwd->b[7] = msa_clt_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1983 pwd->b[8] = msa_clt_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1984 pwd->b[9] = msa_clt_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1985 pwd->b[10] = msa_clt_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1986 pwd->b[11] = msa_clt_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1987 pwd->b[12] = msa_clt_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1988 pwd->b[13] = msa_clt_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1989 pwd->b[14] = msa_clt_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1990 pwd->b[15] = msa_clt_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1991 }
1992
1993 void helper_msa_clt_u_h(CPUMIPSState *env,
1994 uint32_t wd, uint32_t ws, uint32_t wt)
1995 {
1996 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1997 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1998 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1999
2000 pwd->h[0] = msa_clt_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2001 pwd->h[1] = msa_clt_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2002 pwd->h[2] = msa_clt_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2003 pwd->h[3] = msa_clt_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2004 pwd->h[4] = msa_clt_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2005 pwd->h[5] = msa_clt_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2006 pwd->h[6] = msa_clt_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2007 pwd->h[7] = msa_clt_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2008 }
2009
2010 void helper_msa_clt_u_w(CPUMIPSState *env,
2011 uint32_t wd, uint32_t ws, uint32_t wt)
2012 {
2013 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2014 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2015 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2016
2017 pwd->w[0] = msa_clt_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2018 pwd->w[1] = msa_clt_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2019 pwd->w[2] = msa_clt_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2020 pwd->w[3] = msa_clt_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2021 }
2022
2023 void helper_msa_clt_u_d(CPUMIPSState *env,
2024 uint32_t wd, uint32_t ws, uint32_t wt)
2025 {
2026 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2027 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2028 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2029
2030 pwd->d[0] = msa_clt_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2031 pwd->d[1] = msa_clt_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2032 }
2033
2034
2035 /*
2036 * Int Divide
2037 * ----------
2038 *
2039 * +---------------+----------------------------------------------------------+
2040 * | DIV_S.B | Vector Signed Divide (byte) |
2041 * | DIV_S.H | Vector Signed Divide (halfword) |
2042 * | DIV_S.W | Vector Signed Divide (word) |
2043 * | DIV_S.D | Vector Signed Divide (doubleword) |
2044 * | DIV_U.B | Vector Unsigned Divide (byte) |
2045 * | DIV_U.H | Vector Unsigned Divide (halfword) |
2046 * | DIV_U.W | Vector Unsigned Divide (word) |
2047 * | DIV_U.D | Vector Unsigned Divide (doubleword) |
2048 * +---------------+----------------------------------------------------------+
2049 */
2050
2051
2052 static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2053 {
2054 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2055 return DF_MIN_INT(df);
2056 }
2057 return arg2 ? arg1 / arg2
2058 : arg1 >= 0 ? -1 : 1;
2059 }
2060
2061 void helper_msa_div_s_b(CPUMIPSState *env,
2062 uint32_t wd, uint32_t ws, uint32_t wt)
2063 {
2064 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2065 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2066 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2067
2068 pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2069 pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2070 pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2071 pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2072 pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2073 pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2074 pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2075 pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2076 pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2077 pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2078 pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2079 pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2080 pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2081 pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2082 pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2083 pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2084 }
2085
2086 void helper_msa_div_s_h(CPUMIPSState *env,
2087 uint32_t wd, uint32_t ws, uint32_t wt)
2088 {
2089 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2090 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2091 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2092
2093 pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2094 pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2095 pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2096 pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2097 pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2098 pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2099 pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2100 pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2101 }
2102
2103 void helper_msa_div_s_w(CPUMIPSState *env,
2104 uint32_t wd, uint32_t ws, uint32_t wt)
2105 {
2106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2109
2110 pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2111 pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2112 pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2113 pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2114 }
2115
2116 void helper_msa_div_s_d(CPUMIPSState *env,
2117 uint32_t wd, uint32_t ws, uint32_t wt)
2118 {
2119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2121 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2122
2123 pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2124 pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2125 }
2126
2127 static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2128 {
2129 uint64_t u_arg1 = UNSIGNED(arg1, df);
2130 uint64_t u_arg2 = UNSIGNED(arg2, df);
2131 return arg2 ? u_arg1 / u_arg2 : -1;
2132 }
2133
2134 void helper_msa_div_u_b(CPUMIPSState *env,
2135 uint32_t wd, uint32_t ws, uint32_t wt)
2136 {
2137 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2138 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2139 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2140
2141 pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2142 pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2143 pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2144 pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2145 pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2146 pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2147 pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2148 pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2149 pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2150 pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2151 pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2152 pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2153 pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2154 pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2155 pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2156 pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2157 }
2158
2159 void helper_msa_div_u_h(CPUMIPSState *env,
2160 uint32_t wd, uint32_t ws, uint32_t wt)
2161 {
2162 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2163 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2164 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2165
2166 pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2167 pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2168 pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2169 pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2170 pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2171 pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2172 pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2173 pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2174 }
2175
2176 void helper_msa_div_u_w(CPUMIPSState *env,
2177 uint32_t wd, uint32_t ws, uint32_t wt)
2178 {
2179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2181 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2182
2183 pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2184 pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2185 pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2186 pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2187 }
2188
2189 void helper_msa_div_u_d(CPUMIPSState *env,
2190 uint32_t wd, uint32_t ws, uint32_t wt)
2191 {
2192 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2193 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2194 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2195
2196 pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2197 pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2198 }
2199
2200
2201 /*
2202 * Int Dot Product
2203 * ---------------
2204 *
2205 * +---------------+----------------------------------------------------------+
2206 * | DOTP_S.H | Vector Signed Dot Product (halfword) |
2207 * | DOTP_S.W | Vector Signed Dot Product (word) |
2208 * | DOTP_S.D | Vector Signed Dot Product (doubleword) |
2209 * | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
2210 * | DOTP_U.W | Vector Unsigned Dot Product (word) |
2211 * | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
2212 * | DPADD_S.H | Vector Signed Dot Product (halfword) |
2213 * | DPADD_S.W | Vector Signed Dot Product (word) |
2214 * | DPADD_S.D | Vector Signed Dot Product (doubleword) |
2215 * | DPADD_U.H | Vector Unsigned Dot Product (halfword) |
2216 * | DPADD_U.W | Vector Unsigned Dot Product (word) |
2217 * | DPADD_U.D | Vector Unsigned Dot Product (doubleword) |
2218 * | DPSUB_S.H | Vector Signed Dot Product (halfword) |
2219 * | DPSUB_S.W | Vector Signed Dot Product (word) |
2220 * | DPSUB_S.D | Vector Signed Dot Product (doubleword) |
2221 * | DPSUB_U.H | Vector Unsigned Dot Product (halfword) |
2222 * | DPSUB_U.W | Vector Unsigned Dot Product (word) |
2223 * | DPSUB_U.D | Vector Unsigned Dot Product (doubleword) |
2224 * +---------------+----------------------------------------------------------+
2225 */
2226
2227 #define SIGNED_EXTRACT(e, o, a, df) \
2228 do { \
2229 e = SIGNED_EVEN(a, df); \
2230 o = SIGNED_ODD(a, df); \
2231 } while (0)
2232
2233 #define UNSIGNED_EXTRACT(e, o, a, df) \
2234 do { \
2235 e = UNSIGNED_EVEN(a, df); \
2236 o = UNSIGNED_ODD(a, df); \
2237 } while (0)
2238
2239
2240 static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2241 {
2242 int64_t even_arg1;
2243 int64_t even_arg2;
2244 int64_t odd_arg1;
2245 int64_t odd_arg2;
2246 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2247 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2248 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2249 }
2250
2251 void helper_msa_dotp_s_h(CPUMIPSState *env,
2252 uint32_t wd, uint32_t ws, uint32_t wt)
2253 {
2254 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2255 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2256 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2257
2258 pwd->h[0] = msa_dotp_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2259 pwd->h[1] = msa_dotp_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2260 pwd->h[2] = msa_dotp_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2261 pwd->h[3] = msa_dotp_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2262 pwd->h[4] = msa_dotp_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2263 pwd->h[5] = msa_dotp_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2264 pwd->h[6] = msa_dotp_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2265 pwd->h[7] = msa_dotp_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2266 }
2267
2268 void helper_msa_dotp_s_w(CPUMIPSState *env,
2269 uint32_t wd, uint32_t ws, uint32_t wt)
2270 {
2271 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2272 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2273 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2274
2275 pwd->w[0] = msa_dotp_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2276 pwd->w[1] = msa_dotp_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2277 pwd->w[2] = msa_dotp_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2278 pwd->w[3] = msa_dotp_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2279 }
2280
2281 void helper_msa_dotp_s_d(CPUMIPSState *env,
2282 uint32_t wd, uint32_t ws, uint32_t wt)
2283 {
2284 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2285 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2286 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2287
2288 pwd->d[0] = msa_dotp_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2289 pwd->d[1] = msa_dotp_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2290 }
2291
2292
2293 static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2294 {
2295 int64_t even_arg1;
2296 int64_t even_arg2;
2297 int64_t odd_arg1;
2298 int64_t odd_arg2;
2299 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2300 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2301 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2302 }
2303
2304 void helper_msa_dotp_u_h(CPUMIPSState *env,
2305 uint32_t wd, uint32_t ws, uint32_t wt)
2306 {
2307 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2308 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2309 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2310
2311 pwd->h[0] = msa_dotp_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2312 pwd->h[1] = msa_dotp_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2313 pwd->h[2] = msa_dotp_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2314 pwd->h[3] = msa_dotp_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2315 pwd->h[4] = msa_dotp_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2316 pwd->h[5] = msa_dotp_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2317 pwd->h[6] = msa_dotp_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2318 pwd->h[7] = msa_dotp_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2319 }
2320
2321 void helper_msa_dotp_u_w(CPUMIPSState *env,
2322 uint32_t wd, uint32_t ws, uint32_t wt)
2323 {
2324 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2325 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2326 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2327
2328 pwd->w[0] = msa_dotp_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2329 pwd->w[1] = msa_dotp_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2330 pwd->w[2] = msa_dotp_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2331 pwd->w[3] = msa_dotp_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2332 }
2333
2334 void helper_msa_dotp_u_d(CPUMIPSState *env,
2335 uint32_t wd, uint32_t ws, uint32_t wt)
2336 {
2337 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2338 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2339 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2340
2341 pwd->d[0] = msa_dotp_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2342 pwd->d[1] = msa_dotp_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2343 }
2344
2345
2346 static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
2347 int64_t arg2)
2348 {
2349 int64_t even_arg1;
2350 int64_t even_arg2;
2351 int64_t odd_arg1;
2352 int64_t odd_arg2;
2353 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2354 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2355 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2356 }
2357
2358 void helper_msa_dpadd_s_h(CPUMIPSState *env,
2359 uint32_t wd, uint32_t ws, uint32_t wt)
2360 {
2361 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2362 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2363 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2364
2365 pwd->h[0] = msa_dpadd_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2366 pwd->h[1] = msa_dpadd_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2367 pwd->h[2] = msa_dpadd_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2368 pwd->h[3] = msa_dpadd_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2369 pwd->h[4] = msa_dpadd_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2370 pwd->h[5] = msa_dpadd_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2371 pwd->h[6] = msa_dpadd_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2372 pwd->h[7] = msa_dpadd_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2373 }
2374
2375 void helper_msa_dpadd_s_w(CPUMIPSState *env,
2376 uint32_t wd, uint32_t ws, uint32_t wt)
2377 {
2378 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2379 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2380 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2381
2382 pwd->w[0] = msa_dpadd_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2383 pwd->w[1] = msa_dpadd_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2384 pwd->w[2] = msa_dpadd_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2385 pwd->w[3] = msa_dpadd_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2386 }
2387
2388 void helper_msa_dpadd_s_d(CPUMIPSState *env,
2389 uint32_t wd, uint32_t ws, uint32_t wt)
2390 {
2391 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2392 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2393 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2394
2395 pwd->d[0] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2396 pwd->d[1] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2397 }
2398
2399
2400 static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
2401 int64_t arg2)
2402 {
2403 int64_t even_arg1;
2404 int64_t even_arg2;
2405 int64_t odd_arg1;
2406 int64_t odd_arg2;
2407 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2408 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2409 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2410 }
2411
2412 void helper_msa_dpadd_u_h(CPUMIPSState *env,
2413 uint32_t wd, uint32_t ws, uint32_t wt)
2414 {
2415 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2416 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2417 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2418
2419 pwd->h[0] = msa_dpadd_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2420 pwd->h[1] = msa_dpadd_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2421 pwd->h[2] = msa_dpadd_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2422 pwd->h[3] = msa_dpadd_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2423 pwd->h[4] = msa_dpadd_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2424 pwd->h[5] = msa_dpadd_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2425 pwd->h[6] = msa_dpadd_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2426 pwd->h[7] = msa_dpadd_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2427 }
2428
2429 void helper_msa_dpadd_u_w(CPUMIPSState *env,
2430 uint32_t wd, uint32_t ws, uint32_t wt)
2431 {
2432 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2433 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2434 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2435
2436 pwd->w[0] = msa_dpadd_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2437 pwd->w[1] = msa_dpadd_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2438 pwd->w[2] = msa_dpadd_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2439 pwd->w[3] = msa_dpadd_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2440 }
2441
2442 void helper_msa_dpadd_u_d(CPUMIPSState *env,
2443 uint32_t wd, uint32_t ws, uint32_t wt)
2444 {
2445 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2446 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2447 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2448
2449 pwd->d[0] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2450 pwd->d[1] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2451 }
2452
2453
2454 static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
2455 int64_t arg2)
2456 {
2457 int64_t even_arg1;
2458 int64_t even_arg2;
2459 int64_t odd_arg1;
2460 int64_t odd_arg2;
2461 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2462 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2463 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2464 }
2465
2466 void helper_msa_dpsub_s_h(CPUMIPSState *env,
2467 uint32_t wd, uint32_t ws, uint32_t wt)
2468 {
2469 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2470 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2471 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2472
2473 pwd->h[0] = msa_dpsub_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2474 pwd->h[1] = msa_dpsub_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2475 pwd->h[2] = msa_dpsub_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2476 pwd->h[3] = msa_dpsub_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2477 pwd->h[4] = msa_dpsub_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2478 pwd->h[5] = msa_dpsub_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2479 pwd->h[6] = msa_dpsub_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2480 pwd->h[7] = msa_dpsub_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2481 }
2482
2483 void helper_msa_dpsub_s_w(CPUMIPSState *env,
2484 uint32_t wd, uint32_t ws, uint32_t wt)
2485 {
2486 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2487 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2488 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2489
2490 pwd->w[0] = msa_dpsub_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2491 pwd->w[1] = msa_dpsub_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2492 pwd->w[2] = msa_dpsub_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2493 pwd->w[3] = msa_dpsub_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2494 }
2495
2496 void helper_msa_dpsub_s_d(CPUMIPSState *env,
2497 uint32_t wd, uint32_t ws, uint32_t wt)
2498 {
2499 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2500 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2501 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2502
2503 pwd->d[0] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2504 pwd->d[1] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2505 }
2506
2507
2508 static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
2509 int64_t arg2)
2510 {
2511 int64_t even_arg1;
2512 int64_t even_arg2;
2513 int64_t odd_arg1;
2514 int64_t odd_arg2;
2515 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2516 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2517 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2518 }
2519
2520 void helper_msa_dpsub_u_h(CPUMIPSState *env,
2521 uint32_t wd, uint32_t ws, uint32_t wt)
2522 {
2523 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2524 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2525 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2526
2527 pwd->h[0] = msa_dpsub_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2528 pwd->h[1] = msa_dpsub_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2529 pwd->h[2] = msa_dpsub_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2530 pwd->h[3] = msa_dpsub_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2531 pwd->h[4] = msa_dpsub_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2532 pwd->h[5] = msa_dpsub_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2533 pwd->h[6] = msa_dpsub_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2534 pwd->h[7] = msa_dpsub_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2535 }
2536
2537 void helper_msa_dpsub_u_w(CPUMIPSState *env,
2538 uint32_t wd, uint32_t ws, uint32_t wt)
2539 {
2540 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2541 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2542 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2543
2544 pwd->w[0] = msa_dpsub_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2545 pwd->w[1] = msa_dpsub_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2546 pwd->w[2] = msa_dpsub_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2547 pwd->w[3] = msa_dpsub_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2548 }
2549
2550 void helper_msa_dpsub_u_d(CPUMIPSState *env,
2551 uint32_t wd, uint32_t ws, uint32_t wt)
2552 {
2553 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2554 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2555 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2556
2557 pwd->d[0] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2558 pwd->d[1] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2559 }
2560
2561
2562 /*
2563 * Int Max Min
2564 * -----------
2565 *
2566 * +---------------+----------------------------------------------------------+
2567 * | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
2568 * | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
2569 * | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
2570 * | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
2571 * | MAX_S.B | Vector Signed Maximum (byte) |
2572 * | MAX_S.H | Vector Signed Maximum (halfword) |
2573 * | MAX_S.W | Vector Signed Maximum (word) |
2574 * | MAX_S.D | Vector Signed Maximum (doubleword) |
2575 * | MAX_U.B | Vector Unsigned Maximum (byte) |
2576 * | MAX_U.H | Vector Unsigned Maximum (halfword) |
2577 * | MAX_U.W | Vector Unsigned Maximum (word) |
2578 * | MAX_U.D | Vector Unsigned Maximum (doubleword) |
2579 * | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
2580 * | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
2581 * | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
2582 * | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
2583 * | MIN_S.B | Vector Signed Minimum (byte) |
2584 * | MIN_S.H | Vector Signed Minimum (halfword) |
2585 * | MIN_S.W | Vector Signed Minimum (word) |
2586 * | MIN_S.D | Vector Signed Minimum (doubleword) |
2587 * | MIN_U.B | Vector Unsigned Minimum (byte) |
2588 * | MIN_U.H | Vector Unsigned Minimum (halfword) |
2589 * | MIN_U.W | Vector Unsigned Minimum (word) |
2590 * | MIN_U.D | Vector Unsigned Minimum (doubleword) |
2591 * +---------------+----------------------------------------------------------+
2592 */
2593
2594 static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2595 {
2596 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2597 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2598 return abs_arg1 > abs_arg2 ? arg1 : arg2;
2599 }
2600
2601 void helper_msa_max_a_b(CPUMIPSState *env,
2602 uint32_t wd, uint32_t ws, uint32_t wt)
2603 {
2604 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2605 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2606 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2607
2608 pwd->b[0] = msa_max_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2609 pwd->b[1] = msa_max_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2610 pwd->b[2] = msa_max_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2611 pwd->b[3] = msa_max_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2612 pwd->b[4] = msa_max_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2613 pwd->b[5] = msa_max_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2614 pwd->b[6] = msa_max_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2615 pwd->b[7] = msa_max_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2616 pwd->b[8] = msa_max_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2617 pwd->b[9] = msa_max_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2618 pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2619 pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2620 pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2621 pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2622 pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2623 pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2624 }
2625
2626 void helper_msa_max_a_h(CPUMIPSState *env,
2627 uint32_t wd, uint32_t ws, uint32_t wt)
2628 {
2629 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2630 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2631 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2632
2633 pwd->h[0] = msa_max_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2634 pwd->h[1] = msa_max_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2635 pwd->h[2] = msa_max_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2636 pwd->h[3] = msa_max_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2637 pwd->h[4] = msa_max_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2638 pwd->h[5] = msa_max_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2639 pwd->h[6] = msa_max_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2640 pwd->h[7] = msa_max_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2641 }
2642
2643 void helper_msa_max_a_w(CPUMIPSState *env,
2644 uint32_t wd, uint32_t ws, uint32_t wt)
2645 {
2646 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2647 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2648 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2649
2650 pwd->w[0] = msa_max_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2651 pwd->w[1] = msa_max_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2652 pwd->w[2] = msa_max_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2653 pwd->w[3] = msa_max_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2654 }
2655
2656 void helper_msa_max_a_d(CPUMIPSState *env,
2657 uint32_t wd, uint32_t ws, uint32_t wt)
2658 {
2659 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2660 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2661 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2662
2663 pwd->d[0] = msa_max_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2664 pwd->d[1] = msa_max_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2665 }
2666
2667
2668 static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2669 {
2670 return arg1 > arg2 ? arg1 : arg2;
2671 }
2672
2673 void helper_msa_max_s_b(CPUMIPSState *env,
2674 uint32_t wd, uint32_t ws, uint32_t wt)
2675 {
2676 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2677 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2678 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2679
2680 pwd->b[0] = msa_max_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2681 pwd->b[1] = msa_max_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2682 pwd->b[2] = msa_max_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2683 pwd->b[3] = msa_max_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2684 pwd->b[4] = msa_max_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2685 pwd->b[5] = msa_max_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2686 pwd->b[6] = msa_max_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2687 pwd->b[7] = msa_max_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2688 pwd->b[8] = msa_max_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2689 pwd->b[9] = msa_max_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2690 pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2691 pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2692 pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2693 pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2694 pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2695 pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2696 }
2697
2698 void helper_msa_max_s_h(CPUMIPSState *env,
2699 uint32_t wd, uint32_t ws, uint32_t wt)
2700 {
2701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2704
2705 pwd->h[0] = msa_max_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2706 pwd->h[1] = msa_max_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2707 pwd->h[2] = msa_max_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2708 pwd->h[3] = msa_max_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2709 pwd->h[4] = msa_max_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2710 pwd->h[5] = msa_max_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2711 pwd->h[6] = msa_max_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2712 pwd->h[7] = msa_max_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2713 }
2714
2715 void helper_msa_max_s_w(CPUMIPSState *env,
2716 uint32_t wd, uint32_t ws, uint32_t wt)
2717 {
2718 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2719 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2720 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2721
2722 pwd->w[0] = msa_max_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2723 pwd->w[1] = msa_max_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2724 pwd->w[2] = msa_max_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2725 pwd->w[3] = msa_max_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2726 }
2727
2728 void helper_msa_max_s_d(CPUMIPSState *env,
2729 uint32_t wd, uint32_t ws, uint32_t wt)
2730 {
2731 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2732 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2733 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2734
2735 pwd->d[0] = msa_max_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2736 pwd->d[1] = msa_max_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2737 }
2738
2739
2740 static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2741 {
2742 uint64_t u_arg1 = UNSIGNED(arg1, df);
2743 uint64_t u_arg2 = UNSIGNED(arg2, df);
2744 return u_arg1 > u_arg2 ? arg1 : arg2;
2745 }
2746
2747 void helper_msa_max_u_b(CPUMIPSState *env,
2748 uint32_t wd, uint32_t ws, uint32_t wt)
2749 {
2750 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2751 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2752 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2753
2754 pwd->b[0] = msa_max_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2755 pwd->b[1] = msa_max_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2756 pwd->b[2] = msa_max_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2757 pwd->b[3] = msa_max_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2758 pwd->b[4] = msa_max_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2759 pwd->b[5] = msa_max_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2760 pwd->b[6] = msa_max_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2761 pwd->b[7] = msa_max_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2762 pwd->b[8] = msa_max_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2763 pwd->b[9] = msa_max_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2764 pwd->b[10] = msa_max_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2765 pwd->b[11] = msa_max_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2766 pwd->b[12] = msa_max_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2767 pwd->b[13] = msa_max_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2768 pwd->b[14] = msa_max_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2769 pwd->b[15] = msa_max_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2770 }
2771
2772 void helper_msa_max_u_h(CPUMIPSState *env,
2773 uint32_t wd, uint32_t ws, uint32_t wt)
2774 {
2775 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2776 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2777 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2778
2779 pwd->h[0] = msa_max_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2780 pwd->h[1] = msa_max_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2781 pwd->h[2] = msa_max_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2782 pwd->h[3] = msa_max_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2783 pwd->h[4] = msa_max_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2784 pwd->h[5] = msa_max_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2785 pwd->h[6] = msa_max_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2786 pwd->h[7] = msa_max_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2787 }
2788
2789 void helper_msa_max_u_w(CPUMIPSState *env,
2790 uint32_t wd, uint32_t ws, uint32_t wt)
2791 {
2792 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2793 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2794 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2795
2796 pwd->w[0] = msa_max_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2797 pwd->w[1] = msa_max_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2798 pwd->w[2] = msa_max_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2799 pwd->w[3] = msa_max_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2800 }
2801
2802 void helper_msa_max_u_d(CPUMIPSState *env,
2803 uint32_t wd, uint32_t ws, uint32_t wt)
2804 {
2805 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2806 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2807 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2808
2809 pwd->d[0] = msa_max_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2810 pwd->d[1] = msa_max_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2811 }
2812
2813
2814 static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2815 {
2816 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2817 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2818 return abs_arg1 < abs_arg2 ? arg1 : arg2;
2819 }
2820
2821 void helper_msa_min_a_b(CPUMIPSState *env,
2822 uint32_t wd, uint32_t ws, uint32_t wt)
2823 {
2824 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2825 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2826 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2827
2828 pwd->b[0] = msa_min_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2829 pwd->b[1] = msa_min_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2830 pwd->b[2] = msa_min_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2831 pwd->b[3] = msa_min_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2832 pwd->b[4] = msa_min_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2833 pwd->b[5] = msa_min_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2834 pwd->b[6] = msa_min_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2835 pwd->b[7] = msa_min_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2836 pwd->b[8] = msa_min_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2837 pwd->b[9] = msa_min_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2838 pwd->b[10] = msa_min_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2839 pwd->b[11] = msa_min_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2840 pwd->b[12] = msa_min_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2841 pwd->b[13] = msa_min_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2842 pwd->b[14] = msa_min_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2843 pwd->b[15] = msa_min_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2844 }
2845
2846 void helper_msa_min_a_h(CPUMIPSState *env,
2847 uint32_t wd, uint32_t ws, uint32_t wt)
2848 {
2849 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2850 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2851 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2852
2853 pwd->h[0] = msa_min_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2854 pwd->h[1] = msa_min_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2855 pwd->h[2] = msa_min_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2856 pwd->h[3] = msa_min_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2857 pwd->h[4] = msa_min_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2858 pwd->h[5] = msa_min_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2859 pwd->h[6] = msa_min_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2860 pwd->h[7] = msa_min_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2861 }
2862
2863 void helper_msa_min_a_w(CPUMIPSState *env,
2864 uint32_t wd, uint32_t ws, uint32_t wt)
2865 {
2866 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2867 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2868 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2869
2870 pwd->w[0] = msa_min_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2871 pwd->w[1] = msa_min_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2872 pwd->w[2] = msa_min_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2873 pwd->w[3] = msa_min_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2874 }
2875
2876 void helper_msa_min_a_d(CPUMIPSState *env,
2877 uint32_t wd, uint32_t ws, uint32_t wt)
2878 {
2879 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2880 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2881 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2882
2883 pwd->d[0] = msa_min_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2884 pwd->d[1] = msa_min_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2885 }
2886
2887
2888 static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2889 {
2890 return arg1 < arg2 ? arg1 : arg2;
2891 }
2892
2893 void helper_msa_min_s_b(CPUMIPSState *env,
2894 uint32_t wd, uint32_t ws, uint32_t wt)
2895 {
2896 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2897 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2898 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2899
2900 pwd->b[0] = msa_min_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2901 pwd->b[1] = msa_min_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2902 pwd->b[2] = msa_min_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2903 pwd->b[3] = msa_min_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2904 pwd->b[4] = msa_min_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2905 pwd->b[5] = msa_min_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2906 pwd->b[6] = msa_min_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2907 pwd->b[7] = msa_min_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2908 pwd->b[8] = msa_min_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2909 pwd->b[9] = msa_min_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2910 pwd->b[10] = msa_min_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2911 pwd->b[11] = msa_min_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2912 pwd->b[12] = msa_min_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2913 pwd->b[13] = msa_min_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2914 pwd->b[14] = msa_min_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2915 pwd->b[15] = msa_min_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2916 }
2917
2918 void helper_msa_min_s_h(CPUMIPSState *env,
2919 uint32_t wd, uint32_t ws, uint32_t wt)
2920 {
2921 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2922 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2923 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2924
2925 pwd->h[0] = msa_min_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2926 pwd->h[1] = msa_min_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2927 pwd->h[2] = msa_min_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2928 pwd->h[3] = msa_min_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2929 pwd->h[4] = msa_min_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2930 pwd->h[5] = msa_min_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2931 pwd->h[6] = msa_min_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2932 pwd->h[7] = msa_min_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2933 }
2934
2935 void helper_msa_min_s_w(CPUMIPSState *env,
2936 uint32_t wd, uint32_t ws, uint32_t wt)
2937 {
2938 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2939 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2940 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2941
2942 pwd->w[0] = msa_min_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2943 pwd->w[1] = msa_min_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2944 pwd->w[2] = msa_min_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2945 pwd->w[3] = msa_min_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2946 }
2947
2948 void helper_msa_min_s_d(CPUMIPSState *env,
2949 uint32_t wd, uint32_t ws, uint32_t wt)
2950 {
2951 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2952 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2953 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2954
2955 pwd->d[0] = msa_min_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2956 pwd->d[1] = msa_min_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2957 }
2958
2959
2960 static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2961 {
2962 uint64_t u_arg1 = UNSIGNED(arg1, df);
2963 uint64_t u_arg2 = UNSIGNED(arg2, df);
2964 return u_arg1 < u_arg2 ? arg1 : arg2;
2965 }
2966
2967 void helper_msa_min_u_b(CPUMIPSState *env,
2968 uint32_t wd, uint32_t ws, uint32_t wt)
2969 {
2970 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2971 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2972 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2973
2974 pwd->b[0] = msa_min_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2975 pwd->b[1] = msa_min_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2976 pwd->b[2] = msa_min_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2977 pwd->b[3] = msa_min_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2978 pwd->b[4] = msa_min_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2979 pwd->b[5] = msa_min_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2980 pwd->b[6] = msa_min_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2981 pwd->b[7] = msa_min_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2982 pwd->b[8] = msa_min_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2983 pwd->b[9] = msa_min_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2984 pwd->b[10] = msa_min_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2985 pwd->b[11] = msa_min_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2986 pwd->b[12] = msa_min_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2987 pwd->b[13] = msa_min_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2988 pwd->b[14] = msa_min_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2989 pwd->b[15] = msa_min_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2990 }
2991
2992 void helper_msa_min_u_h(CPUMIPSState *env,
2993 uint32_t wd, uint32_t ws, uint32_t wt)
2994 {
2995 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2996 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2997 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2998
2999 pwd->h[0] = msa_min_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3000 pwd->h[1] = msa_min_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3001 pwd->h[2] = msa_min_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3002 pwd->h[3] = msa_min_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3003 pwd->h[4] = msa_min_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3004 pwd->h[5] = msa_min_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3005 pwd->h[6] = msa_min_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3006 pwd->h[7] = msa_min_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3007 }
3008
3009 void helper_msa_min_u_w(CPUMIPSState *env,
3010 uint32_t wd, uint32_t ws, uint32_t wt)
3011 {
3012 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3013 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3014 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3015
3016 pwd->w[0] = msa_min_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3017 pwd->w[1] = msa_min_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3018 pwd->w[2] = msa_min_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3019 pwd->w[3] = msa_min_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3020 }
3021
3022 void helper_msa_min_u_d(CPUMIPSState *env,
3023 uint32_t wd, uint32_t ws, uint32_t wt)
3024 {
3025 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3026 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3027 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3028
3029 pwd->d[0] = msa_min_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3030 pwd->d[1] = msa_min_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3031 }
3032
3033
3034 /*
3035 * Int Modulo
3036 * ----------
3037 *
3038 * +---------------+----------------------------------------------------------+
3039 * | MOD_S.B | Vector Signed Modulo (byte) |
3040 * | MOD_S.H | Vector Signed Modulo (halfword) |
3041 * | MOD_S.W | Vector Signed Modulo (word) |
3042 * | MOD_S.D | Vector Signed Modulo (doubleword) |
3043 * | MOD_U.B | Vector Unsigned Modulo (byte) |
3044 * | MOD_U.H | Vector Unsigned Modulo (halfword) |
3045 * | MOD_U.W | Vector Unsigned Modulo (word) |
3046 * | MOD_U.D | Vector Unsigned Modulo (doubleword) |
3047 * +---------------+----------------------------------------------------------+
3048 */
3049
3050 static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3051 {
3052 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
3053 return 0;
3054 }
3055 return arg2 ? arg1 % arg2 : arg1;
3056 }
3057
3058 void helper_msa_mod_s_b(CPUMIPSState *env,
3059 uint32_t wd, uint32_t ws, uint32_t wt)
3060 {
3061 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3062 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3063 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3064
3065 pwd->b[0] = msa_mod_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3066 pwd->b[1] = msa_mod_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3067 pwd->b[2] = msa_mod_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3068 pwd->b[3] = msa_mod_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3069 pwd->b[4] = msa_mod_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3070 pwd->b[5] = msa_mod_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3071 pwd->b[6] = msa_mod_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3072 pwd->b[7] = msa_mod_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3073 pwd->b[8] = msa_mod_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3074 pwd->b[9] = msa_mod_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3075 pwd->b[10] = msa_mod_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3076 pwd->b[11] = msa_mod_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3077 pwd->b[12] = msa_mod_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3078 pwd->b[13] = msa_mod_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3079 pwd->b[14] = msa_mod_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3080 pwd->b[15] = msa_mod_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3081 }
3082
3083 void helper_msa_mod_s_h(CPUMIPSState *env,
3084 uint32_t wd, uint32_t ws, uint32_t wt)
3085 {
3086 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3087 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3088 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3089
3090 pwd->h[0] = msa_mod_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3091 pwd->h[1] = msa_mod_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3092 pwd->h[2] = msa_mod_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3093 pwd->h[3] = msa_mod_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3094 pwd->h[4] = msa_mod_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3095 pwd->h[5] = msa_mod_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3096 pwd->h[6] = msa_mod_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3097 pwd->h[7] = msa_mod_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3098 }
3099
3100 void helper_msa_mod_s_w(CPUMIPSState *env,
3101 uint32_t wd, uint32_t ws, uint32_t wt)
3102 {
3103 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3104 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3105 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3106
3107 pwd->w[0] = msa_mod_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3108 pwd->w[1] = msa_mod_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3109 pwd->w[2] = msa_mod_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3110 pwd->w[3] = msa_mod_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3111 }
3112
3113 void helper_msa_mod_s_d(CPUMIPSState *env,
3114 uint32_t wd, uint32_t ws, uint32_t wt)
3115 {
3116 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3117 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3118 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3119
3120 pwd->d[0] = msa_mod_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3121 pwd->d[1] = msa_mod_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3122 }
3123
3124 static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3125 {
3126 uint64_t u_arg1 = UNSIGNED(arg1, df);
3127 uint64_t u_arg2 = UNSIGNED(arg2, df);
3128 return u_arg2 ? u_arg1 % u_arg2 : u_arg1;
3129 }
3130
3131 void helper_msa_mod_u_b(CPUMIPSState *env,
3132 uint32_t wd, uint32_t ws, uint32_t wt)
3133 {
3134 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3135 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3136 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3137
3138 pwd->b[0] = msa_mod_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3139 pwd->b[1] = msa_mod_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3140 pwd->b[2] = msa_mod_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3141 pwd->b[3] = msa_mod_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3142 pwd->b[4] = msa_mod_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3143 pwd->b[5] = msa_mod_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3144 pwd->b[6] = msa_mod_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3145 pwd->b[7] = msa_mod_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3146 pwd->b[8] = msa_mod_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3147 pwd->b[9] = msa_mod_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3148 pwd->b[10] = msa_mod_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3149 pwd->b[11] = msa_mod_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3150 pwd->b[12] = msa_mod_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3151 pwd->b[13] = msa_mod_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3152 pwd->b[14] = msa_mod_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3153 pwd->b[15] = msa_mod_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3154 }
3155
3156 void helper_msa_mod_u_h(CPUMIPSState *env,
3157 uint32_t wd, uint32_t ws, uint32_t wt)
3158 {
3159 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3160 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3161 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3162
3163 pwd->h[0] = msa_mod_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3164 pwd->h[1] = msa_mod_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3165 pwd->h[2] = msa_mod_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3166 pwd->h[3] = msa_mod_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3167 pwd->h[4] = msa_mod_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3168 pwd->h[5] = msa_mod_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3169 pwd->h[6] = msa_mod_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3170 pwd->h[7] = msa_mod_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3171 }
3172
3173 void helper_msa_mod_u_w(CPUMIPSState *env,
3174 uint32_t wd, uint32_t ws, uint32_t wt)
3175 {
3176 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3177 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3178 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3179
3180 pwd->w[0] = msa_mod_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3181 pwd->w[1] = msa_mod_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3182 pwd->w[2] = msa_mod_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3183 pwd->w[3] = msa_mod_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3184 }
3185
3186 void helper_msa_mod_u_d(CPUMIPSState *env,
3187 uint32_t wd, uint32_t ws, uint32_t wt)
3188 {
3189 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3190 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3191 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3192
3193 pwd->d[0] = msa_mod_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3194 pwd->d[1] = msa_mod_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3195 }
3196
3197
3198 /*
3199 * Int Multiply
3200 * ------------
3201 *
3202 * +---------------+----------------------------------------------------------+
3203 * | MADDV.B | Vector Multiply and Add (byte) |
3204 * | MADDV.H | Vector Multiply and Add (halfword) |
3205 * | MADDV.W | Vector Multiply and Add (word) |
3206 * | MADDV.D | Vector Multiply and Add (doubleword) |
3207 * | MSUBV.B | Vector Multiply and Subtract (byte) |
3208 * | MSUBV.H | Vector Multiply and Subtract (halfword) |
3209 * | MSUBV.W | Vector Multiply and Subtract (word) |
3210 * | MSUBV.D | Vector Multiply and Subtract (doubleword) |
3211 * | MULV.B | Vector Multiply (byte) |
3212 * | MULV.H | Vector Multiply (halfword) |
3213 * | MULV.W | Vector Multiply (word) |
3214 * | MULV.D | Vector Multiply (doubleword) |
3215 * +---------------+----------------------------------------------------------+
3216 */
3217
3218 static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
3219 int64_t arg2)
3220 {
3221 return dest + arg1 * arg2;
3222 }
3223
3224 void helper_msa_maddv_b(CPUMIPSState *env,
3225 uint32_t wd, uint32_t ws, uint32_t wt)
3226 {
3227 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3228 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3229 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3230
3231 pwd->b[0] = msa_maddv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3232 pwd->b[1] = msa_maddv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3233 pwd->b[2] = msa_maddv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3234 pwd->b[3] = msa_maddv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3235 pwd->b[4] = msa_maddv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3236 pwd->b[5] = msa_maddv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3237 pwd->b[6] = msa_maddv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3238 pwd->b[7] = msa_maddv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3239 pwd->b[8] = msa_maddv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3240 pwd->b[9] = msa_maddv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3241 pwd->b[10] = msa_maddv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3242 pwd->b[11] = msa_maddv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3243 pwd->b[12] = msa_maddv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3244 pwd->b[13] = msa_maddv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3245 pwd->b[14] = msa_maddv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3246 pwd->b[15] = msa_maddv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3247 }
3248
3249 void helper_msa_maddv_h(CPUMIPSState *env,
3250 uint32_t wd, uint32_t ws, uint32_t wt)
3251 {
3252 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3253 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3254 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3255
3256 pwd->h[0] = msa_maddv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3257 pwd->h[1] = msa_maddv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3258 pwd->h[2] = msa_maddv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3259 pwd->h[3] = msa_maddv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3260 pwd->h[4] = msa_maddv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3261 pwd->h[5] = msa_maddv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3262 pwd->h[6] = msa_maddv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3263 pwd->h[7] = msa_maddv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3264 }
3265
3266 void helper_msa_maddv_w(CPUMIPSState *env,
3267 uint32_t wd, uint32_t ws, uint32_t wt)
3268 {
3269 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3270 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3271 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3272
3273 pwd->w[0] = msa_maddv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3274 pwd->w[1] = msa_maddv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3275 pwd->w[2] = msa_maddv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3276 pwd->w[3] = msa_maddv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3277 }
3278
3279 void helper_msa_maddv_d(CPUMIPSState *env,
3280 uint32_t wd, uint32_t ws, uint32_t wt)
3281 {
3282 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3283 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3284 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3285
3286 pwd->d[0] = msa_maddv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3287 pwd->d[1] = msa_maddv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3288 }
3289
3290 static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
3291 int64_t arg2)
3292 {
3293 return dest - arg1 * arg2;
3294 }
3295
3296 void helper_msa_msubv_b(CPUMIPSState *env,
3297 uint32_t wd, uint32_t ws, uint32_t wt)
3298 {
3299 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3300 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3301 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3302
3303 pwd->b[0] = msa_msubv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3304 pwd->b[1] = msa_msubv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3305 pwd->b[2] = msa_msubv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3306 pwd->b[3] = msa_msubv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3307 pwd->b[4] = msa_msubv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3308 pwd->b[5] = msa_msubv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3309 pwd->b[6] = msa_msubv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3310 pwd->b[7] = msa_msubv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3311 pwd->b[8] = msa_msubv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3312 pwd->b[9] = msa_msubv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3313 pwd->b[10] = msa_msubv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3314 pwd->b[11] = msa_msubv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3315 pwd->b[12] = msa_msubv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3316 pwd->b[13] = msa_msubv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3317 pwd->b[14] = msa_msubv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3318 pwd->b[15] = msa_msubv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3319 }
3320
3321 void helper_msa_msubv_h(CPUMIPSState *env,
3322 uint32_t wd, uint32_t ws, uint32_t wt)
3323 {
3324 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3325 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3326 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3327
3328 pwd->h[0] = msa_msubv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3329 pwd->h[1] = msa_msubv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3330 pwd->h[2] = msa_msubv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3331 pwd->h[3] = msa_msubv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3332 pwd->h[4] = msa_msubv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3333 pwd->h[5] = msa_msubv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3334 pwd->h[6] = msa_msubv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3335 pwd->h[7] = msa_msubv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3336 }
3337
3338 void helper_msa_msubv_w(CPUMIPSState *env,
3339 uint32_t wd, uint32_t ws, uint32_t wt)
3340 {
3341 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3342 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3343 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3344
3345 pwd->w[0] = msa_msubv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3346 pwd->w[1] = msa_msubv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3347 pwd->w[2] = msa_msubv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3348 pwd->w[3] = msa_msubv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3349 }
3350
3351 void helper_msa_msubv_d(CPUMIPSState *env,
3352 uint32_t wd, uint32_t ws, uint32_t wt)
3353 {
3354 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3355 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3356 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3357
3358 pwd->d[0] = msa_msubv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3359 pwd->d[1] = msa_msubv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3360 }
3361
3362
3363 /*
3364 * Int Subtract
3365 * ------------
3366 *
3367 * +---------------+----------------------------------------------------------+
3368 * | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
3369 * | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
3370 * | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
3371 * | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
3372 * | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
3373 * | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
3374 * | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
3375 * | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
3376 * | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
3377 * | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
3378 * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
3379 * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
3380 * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
3381 * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
3382 * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
3383 * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
3384 * | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
3385 * | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
3386 * | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
3387 * | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
3388 * | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
3389 * | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
3390 * | SUBSUS_U.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
3391 * | SUBSUS_U.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
3392 * | SUBSUS_U.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
3393 * | SUBSUS_U.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
3394 * | SUBSUU_S.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
3395 * | SUBSUU_S.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
3396 * | SUBSUU_S.W | Vector Signed Saturated Subtract (of Uns.) (word) |
3397 * | SUBSUU_S.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
3398 * | SUBV.B | Vector Subtract (byte) |
3399 * | SUBV.H | Vector Subtract (halfword) |
3400 * | SUBV.W | Vector Subtract (word) |
3401 * | SUBV.D | Vector Subtract (doubleword) |
3402 * +---------------+----------------------------------------------------------+
3403 */
3404
3405
3406 static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3407 {
3408 /* signed compare */
3409 return (arg1 < arg2) ?
3410 (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
3411 }
3412
3413 void helper_msa_asub_s_b(CPUMIPSState *env,
3414 uint32_t wd, uint32_t ws, uint32_t wt)
3415 {
3416 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3417 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3418 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3419
3420 pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3421 pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3422 pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3423 pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3424 pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3425 pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3426 pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3427 pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3428 pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3429 pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3430 pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3431 pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3432 pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3433 pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3434 pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3435 pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3436 }
3437
3438 void helper_msa_asub_s_h(CPUMIPSState *env,
3439 uint32_t wd, uint32_t ws, uint32_t wt)
3440 {
3441 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3442 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3443 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3444
3445 pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3446 pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3447 pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3448 pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3449 pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3450 pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3451 pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3452 pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3453 }
3454
3455 void helper_msa_asub_s_w(CPUMIPSState *env,
3456 uint32_t wd, uint32_t ws, uint32_t wt)
3457 {
3458 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3459 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3460 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3461
3462 pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3463 pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3464 pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3465 pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3466 }
3467
3468 void helper_msa_asub_s_d(CPUMIPSState *env,
3469 uint32_t wd, uint32_t ws, uint32_t wt)
3470 {
3471 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3472 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3473 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3474
3475 pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3476 pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3477 }
3478
3479
3480 static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
3481 {
3482 uint64_t u_arg1 = UNSIGNED(arg1, df);
3483 uint64_t u_arg2 = UNSIGNED(arg2, df);
3484 /* unsigned compare */
3485 return (u_arg1 < u_arg2) ?
3486 (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
3487 }
3488
3489 void helper_msa_asub_u_b(CPUMIPSState *env,
3490 uint32_t wd, uint32_t ws, uint32_t wt)
3491 {
3492 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3493 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3494 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3495
3496 pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3497 pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3498 pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3499 pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3500 pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3501 pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3502 pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3503 pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3504 pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3505 pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3506 pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3507 pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3508 pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3509 pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3510 pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3511 pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3512 }
3513
3514 void helper_msa_asub_u_h(CPUMIPSState *env,
3515 uint32_t wd, uint32_t ws, uint32_t wt)
3516 {
3517 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3518 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3519 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3520
3521 pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3522 pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3523 pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3524 pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3525 pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3526 pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3527 pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3528 pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3529 }
3530
3531 void helper_msa_asub_u_w(CPUMIPSState *env,
3532 uint32_t wd, uint32_t ws, uint32_t wt)
3533 {
3534 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3535 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3536 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3537
3538 pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3539 pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3540 pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3541 pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3542 }
3543
3544 void helper_msa_asub_u_d(CPUMIPSState *env,
3545 uint32_t wd, uint32_t ws, uint32_t wt)
3546 {
3547 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3548 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3549 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3550
3551 pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3552 pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3553 }
3554
3555
3556 /* TODO: insert the rest of Int Subtract group helpers here */
3557
3558
3559 static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3560 {
3561 return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
3562 }
3563
3564 void helper_msa_hsub_s_h(CPUMIPSState *env,
3565 uint32_t wd, uint32_t ws, uint32_t wt)
3566 {
3567 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3568 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3569 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3570
3571 pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3572 pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3573 pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3574 pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3575 pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3576 pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3577 pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3578 pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3579 }
3580
3581 void helper_msa_hsub_s_w(CPUMIPSState *env,
3582 uint32_t wd, uint32_t ws, uint32_t wt)
3583 {
3584 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3585 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3586 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3587
3588 pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3589 pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3590 pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3591 pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3592 }
3593
3594 void helper_msa_hsub_s_d(CPUMIPSState *env,
3595 uint32_t wd, uint32_t ws, uint32_t wt)
3596 {
3597 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3598 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3599 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3600
3601 pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3602 pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3603 }
3604
3605
3606 static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3607 {
3608 return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
3609 }
3610
3611 void helper_msa_hsub_u_h(CPUMIPSState *env,
3612 uint32_t wd, uint32_t ws, uint32_t wt)
3613 {
3614 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3615 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3616 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3617
3618 pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3619 pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3620 pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3621 pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3622 pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3623 pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3624 pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3625 pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3626 }
3627
3628 void helper_msa_hsub_u_w(CPUMIPSState *env,
3629 uint32_t wd, uint32_t ws, uint32_t wt)
3630 {
3631 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3632 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3633 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3634
3635 pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3636 pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3637 pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3638 pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3639 }
3640
3641 void helper_msa_hsub_u_d(CPUMIPSState *env,
3642 uint32_t wd, uint32_t ws, uint32_t wt)
3643 {
3644 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3645 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3646 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3647
3648 pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3649 pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3650 }
3651
3652
3653 static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3654 {
3655 int64_t max_int = DF_MAX_INT(df);
3656 int64_t min_int = DF_MIN_INT(df);
3657 if (arg2 > 0) {
3658 return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
3659 } else {
3660 return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
3661 }
3662 }
3663
3664 void helper_msa_subs_s_b(CPUMIPSState *env,
3665 uint32_t wd, uint32_t ws, uint32_t wt)
3666 {
3667 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3668 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3669 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3670
3671 pwd->b[0] = msa_subs_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3672 pwd->b[1] = msa_subs_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3673 pwd->b[2] = msa_subs_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3674 pwd->b[3] = msa_subs_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3675 pwd->b[4] = msa_subs_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3676 pwd->b[5] = msa_subs_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3677 pwd->b[6] = msa_subs_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3678 pwd->b[7] = msa_subs_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3679 pwd->b[8] = msa_subs_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3680 pwd->b[9] = msa_subs_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3681 pwd->b[10] = msa_subs_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3682 pwd->b[11] = msa_subs_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3683 pwd->b[12] = msa_subs_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3684 pwd->b[13] = msa_subs_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3685 pwd->b[14] = msa_subs_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3686 pwd->b[15] = msa_subs_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3687 }
3688
3689 void helper_msa_subs_s_h(CPUMIPSState *env,
3690 uint32_t wd, uint32_t ws, uint32_t wt)
3691 {
3692 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3693 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3694 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3695
3696 pwd->h[0] = msa_subs_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3697 pwd->h[1] = msa_subs_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3698 pwd->h[2] = msa_subs_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3699 pwd->h[3] = msa_subs_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3700 pwd->h[4] = msa_subs_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3701 pwd->h[5] = msa_subs_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3702 pwd->h[6] = msa_subs_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3703 pwd->h[7] = msa_subs_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3704 }
3705
3706 void helper_msa_subs_s_w(CPUMIPSState *env,
3707 uint32_t wd, uint32_t ws, uint32_t wt)
3708 {
3709 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3710 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3711 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3712
3713 pwd->w[0] = msa_subs_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3714 pwd->w[1] = msa_subs_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3715 pwd->w[2] = msa_subs_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3716 pwd->w[3] = msa_subs_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3717 }
3718
3719 void helper_msa_subs_s_d(CPUMIPSState *env,
3720 uint32_t wd, uint32_t ws, uint32_t wt)
3721 {
3722 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3723 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3724 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3725
3726 pwd->d[0] = msa_subs_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3727 pwd->d[1] = msa_subs_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3728 }
3729
3730
3731 static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3732 {
3733 uint64_t u_arg1 = UNSIGNED(arg1, df);
3734 uint64_t u_arg2 = UNSIGNED(arg2, df);
3735 return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
3736 }
3737
3738 void helper_msa_subs_u_b(CPUMIPSState *env,
3739 uint32_t wd, uint32_t ws, uint32_t wt)
3740 {
3741 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3742 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3743 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3744
3745 pwd->b[0] = msa_subs_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3746 pwd->b[1] = msa_subs_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3747 pwd->b[2] = msa_subs_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3748 pwd->b[3] = msa_subs_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3749 pwd->b[4] = msa_subs_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3750 pwd->b[5] = msa_subs_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3751 pwd->b[6] = msa_subs_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3752 pwd->b[7] = msa_subs_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3753 pwd->b[8] = msa_subs_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3754 pwd->b[9] = msa_subs_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3755 pwd->b[10] = msa_subs_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3756 pwd->b[11] = msa_subs_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3757 pwd->b[12] = msa_subs_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3758 pwd->b[13] = msa_subs_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3759 pwd->b[14] = msa_subs_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3760 pwd->b[15] = msa_subs_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3761 }
3762
3763 void helper_msa_subs_u_h(CPUMIPSState *env,
3764 uint32_t wd, uint32_t ws, uint32_t wt)
3765 {
3766 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3767 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3768 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3769
3770 pwd->h[0] = msa_subs_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3771 pwd->h[1] = msa_subs_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3772 pwd->h[2] = msa_subs_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3773 pwd->h[3] = msa_subs_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3774 pwd->h[4] = msa_subs_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3775 pwd->h[5] = msa_subs_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3776 pwd->h[6] = msa_subs_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3777 pwd->h[7] = msa_subs_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3778 }
3779
3780 void helper_msa_subs_u_w(CPUMIPSState *env,
3781 uint32_t wd, uint32_t ws, uint32_t wt)
3782 {
3783 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3784 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3785 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3786
3787 pwd->w[0] = msa_subs_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3788 pwd->w[1] = msa_subs_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3789 pwd->w[2] = msa_subs_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3790 pwd->w[3] = msa_subs_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3791 }
3792
3793 void helper_msa_subs_u_d(CPUMIPSState *env,
3794 uint32_t wd, uint32_t ws, uint32_t wt)
3795 {
3796 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3797 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3798 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3799
3800 pwd->d[0] = msa_subs_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3801 pwd->d[1] = msa_subs_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3802 }
3803
3804
3805 static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3806 {
3807 uint64_t u_arg1 = UNSIGNED(arg1, df);
3808 uint64_t max_uint = DF_MAX_UINT(df);
3809 if (arg2 >= 0) {
3810 uint64_t u_arg2 = (uint64_t)arg2;
3811 return (u_arg1 > u_arg2) ?
3812 (int64_t)(u_arg1 - u_arg2) :
3813 0;
3814 } else {
3815 uint64_t u_arg2 = (uint64_t)(-arg2);
3816 return (u_arg1 < max_uint - u_arg2) ?
3817 (int64_t)(u_arg1 + u_arg2) :
3818 (int64_t)max_uint;
3819 }
3820 }
3821
3822 void helper_msa_subsus_u_b(CPUMIPSState *env,
3823 uint32_t wd, uint32_t ws, uint32_t wt)
3824 {
3825 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3826 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3827 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3828
3829 pwd->b[0] = msa_subsus_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3830 pwd->b[1] = msa_subsus_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3831 pwd->b[2] = msa_subsus_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3832 pwd->b[3] = msa_subsus_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3833 pwd->b[4] = msa_subsus_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3834 pwd->b[5] = msa_subsus_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3835 pwd->b[6] = msa_subsus_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3836 pwd->b[7] = msa_subsus_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3837 pwd->b[8] = msa_subsus_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3838 pwd->b[9] = msa_subsus_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3839 pwd->b[10] = msa_subsus_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3840 pwd->b[11] = msa_subsus_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3841 pwd->b[12] = msa_subsus_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3842 pwd->b[13] = msa_subsus_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3843 pwd->b[14] = msa_subsus_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3844 pwd->b[15] = msa_subsus_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3845 }
3846
3847 void helper_msa_subsus_u_h(CPUMIPSState *env,
3848 uint32_t wd, uint32_t ws, uint32_t wt)
3849 {
3850 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3851 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3852 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3853
3854 pwd->h[0] = msa_subsus_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3855 pwd->h[1] = msa_subsus_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3856 pwd->h[2] = msa_subsus_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3857 pwd->h[3] = msa_subsus_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3858 pwd->h[4] = msa_subsus_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3859 pwd->h[5] = msa_subsus_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3860 pwd->h[6] = msa_subsus_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3861 pwd->h[7] = msa_subsus_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3862 }
3863
3864 void helper_msa_subsus_u_w(CPUMIPSState *env,
3865 uint32_t wd, uint32_t ws, uint32_t wt)
3866 {
3867 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3868 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3869 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3870
3871 pwd->w[0] = msa_subsus_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3872 pwd->w[1] = msa_subsus_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3873 pwd->w[2] = msa_subsus_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3874 pwd->w[3] = msa_subsus_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3875 }
3876
3877 void helper_msa_subsus_u_d(CPUMIPSState *env,
3878 uint32_t wd, uint32_t ws, uint32_t wt)
3879 {
3880 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3881 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3882 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3883
3884 pwd->d[0] = msa_subsus_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3885 pwd->d[1] = msa_subsus_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3886 }
3887
3888
3889 /*
3890 * Interleave
3891 * ----------
3892 *
3893 * +---------------+----------------------------------------------------------+
3894 * | ILVEV.B | Vector Interleave Even (byte) |
3895 * | ILVEV.H | Vector Interleave Even (halfword) |
3896 * | ILVEV.W | Vector Interleave Even (word) |
3897 * | ILVEV.D | Vector Interleave Even (doubleword) |
3898 * | ILVOD.B | Vector Interleave Odd (byte) |
3899 * | ILVOD.H | Vector Interleave Odd (halfword) |
3900 * | ILVOD.W | Vector Interleave Odd (word) |
3901 * | ILVOD.D | Vector Interleave Odd (doubleword) |
3902 * | ILVL.B | Vector Interleave Left (byte) |
3903 * | ILVL.H | Vector Interleave Left (halfword) |
3904 * | ILVL.W | Vector Interleave Left (word) |
3905 * | ILVL.D | Vector Interleave Left (doubleword) |
3906 * | ILVR.B | Vector Interleave Right (byte) |
3907 * | ILVR.H | Vector Interleave Right (halfword) |
3908 * | ILVR.W | Vector Interleave Right (word) |
3909 * | ILVR.D | Vector Interleave Right (doubleword) |
3910 * +---------------+----------------------------------------------------------+
3911 */
3912
3913
3914 void helper_msa_ilvev_b(CPUMIPSState *env,
3915 uint32_t wd, uint32_t ws, uint32_t wt)
3916 {
3917 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3918 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3919 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3920
3921 #if defined(HOST_WORDS_BIGENDIAN)
3922 pwd->b[8] = pws->b[9];
3923 pwd->b[9] = pwt->b[9];
3924 pwd->b[10] = pws->b[11];
3925 pwd->b[11] = pwt->b[11];
3926 pwd->b[12] = pws->b[13];
3927 pwd->b[13] = pwt->b[13];
3928 pwd->b[14] = pws->b[15];
3929 pwd->b[15] = pwt->b[15];
3930 pwd->b[0] = pws->b[1];
3931 pwd->b[1] = pwt->b[1];
3932 pwd->b[2] = pws->b[3];
3933 pwd->b[3] = pwt->b[3];
3934 pwd->b[4] = pws->b[5];
3935 pwd->b[5] = pwt->b[5];
3936 pwd->b[6] = pws->b[7];
3937 pwd->b[7] = pwt->b[7];
3938 #else
3939 pwd->b[15] = pws->b[14];
3940 pwd->b[14] = pwt->b[14];
3941 pwd->b[13] = pws->b[12];
3942 pwd->b[12] = pwt->b[12];
3943 pwd->b[11] = pws->b[10];
3944 pwd->b[10] = pwt->b[10];
3945 pwd->b[9] = pws->b[8];
3946 pwd->b[8] = pwt->b[8];
3947 pwd->b[7] = pws->b[6];
3948 pwd->b[6] = pwt->b[6];
3949 pwd->b[5] = pws->b[4];
3950 pwd->b[4] = pwt->b[4];
3951 pwd->b[3] = pws->b[2];
3952 pwd->b[2] = pwt->b[2];
3953 pwd->b[1] = pws->b[0];
3954 pwd->b[0] = pwt->b[0];
3955 #endif
3956 }
3957
3958 void helper_msa_ilvev_h(CPUMIPSState *env,
3959 uint32_t wd, uint32_t ws, uint32_t wt)
3960 {
3961 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3962 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3963 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3964
3965 #if defined(HOST_WORDS_BIGENDIAN)
3966 pwd->h[4] = pws->h[5];
3967 pwd->h[5] = pwt->h[5];
3968 pwd->h[6] = pws->h[7];
3969 pwd->h[7] = pwt->h[7];
3970 pwd->h[0] = pws->h[1];
3971 pwd->h[1] = pwt->h[1];
3972 pwd->h[2] = pws->h[3];
3973 pwd->h[3] = pwt->h[3];
3974 #else
3975 pwd->h[7] = pws->h[6];
3976 pwd->h[6] = pwt->h[6];
3977 pwd->h[5] = pws->h[4];
3978 pwd->h[4] = pwt->h[4];
3979 pwd->h[3] = pws->h[2];
3980 pwd->h[2] = pwt->h[2];
3981 pwd->h[1] = pws->h[0];
3982 pwd->h[0] = pwt->h[0];
3983 #endif
3984 }
3985
3986 void helper_msa_ilvev_w(CPUMIPSState *env,
3987 uint32_t wd, uint32_t ws, uint32_t wt)
3988 {
3989 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3990 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3991 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3992
3993 #if defined(HOST_WORDS_BIGENDIAN)
3994 pwd->w[2] = pws->w[3];
3995 pwd->w[3] = pwt->w[3];
3996 pwd->w[0] = pws->w[1];
3997 pwd->w[1] = pwt->w[1];
3998 #else
3999 pwd->w[3] = pws->w[2];
4000 pwd->w[2] = pwt->w[2];
4001 pwd->w[1] = pws->w[0];
4002 pwd->w[0] = pwt->w[0];
4003 #endif
4004 }
4005
4006 void helper_msa_ilvev_d(CPUMIPSState *env,
4007 uint32_t wd, uint32_t ws, uint32_t wt)
4008 {
4009 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4010 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4011 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4012
4013 pwd->d[1] = pws->d[0];
4014 pwd->d[0] = pwt->d[0];
4015 }
4016
4017
4018 void helper_msa_ilvod_b(CPUMIPSState *env,
4019 uint32_t wd, uint32_t ws, uint32_t wt)
4020 {
4021 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4022 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4023 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4024
4025 #if defined(HOST_WORDS_BIGENDIAN)
4026 pwd->b[7] = pwt->b[6];
4027 pwd->b[6] = pws->b[6];
4028 pwd->b[5] = pwt->b[4];
4029 pwd->b[4] = pws->b[4];
4030 pwd->b[3] = pwt->b[2];
4031 pwd->b[2] = pws->b[2];
4032 pwd->b[1] = pwt->b[0];
4033 pwd->b[0] = pws->b[0];
4034 pwd->b[15] = pwt->b[14];
4035 pwd->b[14] = pws->b[14];
4036 pwd->b[13] = pwt->b[12];
4037 pwd->b[12] = pws->b[12];
4038 pwd->b[11] = pwt->b[10];
4039 pwd->b[10] = pws->b[10];
4040 pwd->b[9] = pwt->b[8];
4041 pwd->b[8] = pws->b[8];
4042 #else
4043 pwd->b[0] = pwt->b[1];
4044 pwd->b[1] = pws->b[1];
4045 pwd->b[2] = pwt->b[3];
4046 pwd->b[3] = pws->b[3];
4047 pwd->b[4] = pwt->b[5];
4048 pwd->b[5] = pws->b[5];
4049 pwd->b[6] = pwt->b[7];
4050 pwd->b[7] = pws->b[7];
4051 pwd->b[8] = pwt->b[9];
4052 pwd->b[9] = pws->b[9];
4053 pwd->b[10] = pwt->b[11];
4054 pwd->b[11] = pws->b[11];
4055 pwd->b[12] = pwt->b[13];
4056 pwd->b[13] = pws->b[13];
4057 pwd->b[14] = pwt->b[15];
4058 pwd->b[15] = pws->b[15];
4059 #endif
4060 }
4061
4062 void helper_msa_ilvod_h(CPUMIPSState *env,
4063 uint32_t wd, uint32_t ws, uint32_t wt)
4064 {
4065 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4066 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4067 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4068
4069 #if defined(HOST_WORDS_BIGENDIAN)
4070 pwd->h[3] = pwt->h[2];
4071 pwd->h[2] = pws->h[2];
4072 pwd->h[1] = pwt->h[0];
4073 pwd->h[0] = pws->h[0];
4074 pwd->h[7] = pwt->h[6];
4075 pwd->h[6] = pws->h[6];
4076 pwd->h[5] = pwt->h[4];
4077 pwd->h[4] = pws->h[4];
4078 #else
4079 pwd->h[0] = pwt->h[1];
4080 pwd->h[1] = pws->h[1];
4081 pwd->h[2] = pwt->h[3];
4082 pwd->h[3] = pws->h[3];
4083 pwd->h[4] = pwt->h[5];
4084 pwd->h[5] = pws->h[5];
4085 pwd->h[6] = pwt->h[7];
4086 pwd->h[7] = pws->h[7];
4087 #endif
4088 }
4089
4090 void helper_msa_ilvod_w(CPUMIPSState *env,
4091 uint32_t wd, uint32_t ws, uint32_t wt)
4092 {
4093 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4094 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4095 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4096
4097 #if defined(HOST_WORDS_BIGENDIAN)
4098 pwd->w[1] = pwt->w[0];
4099 pwd->w[0] = pws->w[0];
4100 pwd->w[3] = pwt->w[2];
4101 pwd->w[2] = pws->w[2];
4102 #else
4103 pwd->w[0] = pwt->w[1];
4104 pwd->w[1] = pws->w[1];
4105 pwd->w[2] = pwt->w[3];
4106 pwd->w[3] = pws->w[3];
4107 #endif
4108 }
4109
4110 void helper_msa_ilvod_d(CPUMIPSState *env,
4111 uint32_t wd, uint32_t ws, uint32_t wt)
4112 {
4113 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4114 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4115 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4116
4117 pwd->d[0] = pwt->d[1];
4118 pwd->d[1] = pws->d[1];
4119 }
4120
4121
4122 void helper_msa_ilvl_b(CPUMIPSState *env,
4123 uint32_t wd, uint32_t ws, uint32_t wt)
4124 {
4125 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4126 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4127 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4128
4129 #if defined(HOST_WORDS_BIGENDIAN)
4130 pwd->b[7] = pwt->b[15];
4131 pwd->b[6] = pws->b[15];
4132 pwd->b[5] = pwt->b[14];
4133 pwd->b[4] = pws->b[14];
4134 pwd->b[3] = pwt->b[13];
4135 pwd->b[2] = pws->b[13];
4136 pwd->b[1] = pwt->b[12];
4137 pwd->b[0] = pws->b[12];
4138 pwd->b[15] = pwt->b[11];
4139 pwd->b[14] = pws->b[11];
4140 pwd->b[13] = pwt->b[10];
4141 pwd->b[12] = pws->b[10];
4142 pwd->b[11] = pwt->b[9];
4143 pwd->b[10] = pws->b[9];
4144 pwd->b[9] = pwt->b[8];
4145 pwd->b[8] = pws->b[8];
4146 #else
4147 pwd->b[0] = pwt->b[8];
4148 pwd->b[1] = pws->b[8];
4149 pwd->b[2] = pwt->b[9];
4150 pwd->b[3] = pws->b[9];
4151 pwd->b[4] = pwt->b[10];
4152 pwd->b[5] = pws->b[10];
4153 pwd->b[6] = pwt->b[11];
4154 pwd->b[7] = pws->b[11];
4155 pwd->b[8] = pwt->b[12];
4156 pwd->b[9] = pws->b[12];
4157 pwd->b[10] = pwt->b[13];
4158 pwd->b[11] = pws->b[13];
4159 pwd->b[12] = pwt->b[14];
4160 pwd->b[13] = pws->b[14];
4161 pwd->b[14] = pwt->b[15];
4162 pwd->b[15] = pws->b[15];
4163 #endif
4164 }
4165
4166 void helper_msa_ilvl_h(CPUMIPSState *env,
4167 uint32_t wd, uint32_t ws, uint32_t wt)
4168 {
4169 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4170 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4171 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4172
4173 #if defined(HOST_WORDS_BIGENDIAN)
4174 pwd->h[3] = pwt->h[7];
4175 pwd->h[2] = pws->h[7];
4176 pwd->h[1] = pwt->h[6];
4177 pwd->h[0] = pws->h[6];
4178 pwd->h[7] = pwt->h[5];
4179 pwd->h[6] = pws->h[5];
4180 pwd->h[5] = pwt->h[4];
4181 pwd->h[4] = pws->h[4];
4182 #else
4183 pwd->h[0] = pwt->h[4];
4184 pwd->h[1] = pws->h[4];
4185 pwd->h[2] = pwt->h[5];
4186 pwd->h[3] = pws->h[5];
4187 pwd->h[4] = pwt->h[6];
4188 pwd->h[5] = pws->h[6];
4189 pwd->h[6] = pwt->h[7];
4190 pwd->h[7] = pws->h[7];
4191 #endif
4192 }
4193
4194 void helper_msa_ilvl_w(CPUMIPSState *env,
4195 uint32_t wd, uint32_t ws, uint32_t wt)
4196 {
4197 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4198 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4199 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4200
4201 #if defined(HOST_WORDS_BIGENDIAN)
4202 pwd->w[1] = pwt->w[3];
4203 pwd->w[0] = pws->w[3];
4204 pwd->w[3] = pwt->w[2];
4205 pwd->w[2] = pws->w[2];
4206 #else
4207 pwd->w[0] = pwt->w[2];
4208 pwd->w[1] = pws->w[2];
4209 pwd->w[2] = pwt->w[3];
4210 pwd->w[3] = pws->w[3];
4211 #endif
4212 }
4213
4214 void helper_msa_ilvl_d(CPUMIPSState *env,
4215 uint32_t wd, uint32_t ws, uint32_t wt)
4216 {
4217 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4218 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4219 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4220
4221 pwd->d[0] = pwt->d[1];
4222 pwd->d[1] = pws->d[1];
4223 }
4224
4225
4226 void helper_msa_ilvr_b(CPUMIPSState *env,
4227 uint32_t wd, uint32_t ws, uint32_t wt)
4228 {
4229 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4230 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4231 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4232
4233 #if defined(HOST_WORDS_BIGENDIAN)
4234 pwd->b[8] = pws->b[0];
4235 pwd->b[9] = pwt->b[0];
4236 pwd->b[10] = pws->b[1];
4237 pwd->b[11] = pwt->b[1];
4238 pwd->b[12] = pws->b[2];
4239 pwd->b[13] = pwt->b[2];
4240 pwd->b[14] = pws->b[3];
4241 pwd->b[15] = pwt->b[3];
4242 pwd->b[0] = pws->b[4];
4243 pwd->b[1] = pwt->b[4];
4244 pwd->b[2] = pws->b[5];
4245 pwd->b[3] = pwt->b[5];
4246 pwd->b[4] = pws->b[6];
4247 pwd->b[5] = pwt->b[6];
4248 pwd->b[6] = pws->b[7];
4249 pwd->b[7] = pwt->b[7];
4250 #else
4251 pwd->b[15] = pws->b[7];
4252 pwd->b[14] = pwt->b[7];
4253 pwd->b[13] = pws->b[6];
4254 pwd->b[12] = pwt->b[6];
4255 pwd->b[11] = pws->b[5];
4256 pwd->b[10] = pwt->b[5];
4257 pwd->b[9] = pws->b[4];
4258 pwd->b[8] = pwt->b[4];
4259 pwd->b[7] = pws->b[3];
4260 pwd->b[6] = pwt->b[3];
4261 pwd->b[5] = pws->b[2];
4262 pwd->b[4] = pwt->b[2];
4263 pwd->b[3] = pws->b[1];
4264 pwd->b[2] = pwt->b[1];
4265 pwd->b[1] = pws->b[0];
4266 pwd->b[0] = pwt->b[0];
4267 #endif
4268 }
4269
4270 void helper_msa_ilvr_h(CPUMIPSState *env,
4271 uint32_t wd, uint32_t ws, uint32_t wt)
4272 {
4273 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4274 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4275 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4276
4277 #if defined(HOST_WORDS_BIGENDIAN)
4278 pwd->h[4] = pws->h[0];
4279 pwd->h[5] = pwt->h[0];
4280 pwd->h[6] = pws->h[1];
4281 pwd->h[7] = pwt->h[1];
4282 pwd->h[0] = pws->h[2];
4283 pwd->h[1] = pwt->h[2];
4284 pwd->h[2] = pws->h[3];
4285 pwd->h[3] = pwt->h[3];
4286 #else
4287 pwd->h[7] = pws->h[3];
4288 pwd->h[6] = pwt->h[3];
4289 pwd->h[5] = pws->h[2];
4290 pwd->h[4] = pwt->h[2];
4291 pwd->h[3] = pws->h[1];
4292 pwd->h[2] = pwt->h[1];
4293 pwd->h[1] = pws->h[0];
4294 pwd->h[0] = pwt->h[0];
4295 #endif
4296 }
4297
4298 void helper_msa_ilvr_w(CPUMIPSState *env,
4299 uint32_t wd, uint32_t ws, uint32_t wt)
4300 {
4301 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4302 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4303 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4304
4305 #if defined(HOST_WORDS_BIGENDIAN)
4306 pwd->w[2] = pws->w[0];
4307 pwd->w[3] = pwt->w[0];
4308 pwd->w[0] = pws->w[1];
4309 pwd->w[1] = pwt->w[1];
4310 #else
4311 pwd->w[3] = pws->w[1];
4312 pwd->w[2] = pwt->w[1];
4313 pwd->w[1] = pws->w[0];
4314 pwd->w[0] = pwt->w[0];
4315 #endif
4316 }
4317
4318 void helper_msa_ilvr_d(CPUMIPSState *env,
4319 uint32_t wd, uint32_t ws, uint32_t wt)
4320 {
4321 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4322 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4323 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4324
4325 pwd->d[1] = pws->d[0];
4326 pwd->d[0] = pwt->d[0];
4327 }
4328
4329
4330 /*
4331 * Logic
4332 * -----
4333 *
4334 * +---------------+----------------------------------------------------------+
4335 * | AND.V | Vector Logical And |
4336 * | NOR.V | Vector Logical Negated Or |
4337 * | OR.V | Vector Logical Or |
4338 * | XOR.V | Vector Logical Exclusive Or |
4339 * +---------------+----------------------------------------------------------+
4340 */
4341
4342
4343 void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4344 {
4345 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4346 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4347 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4348
4349 pwd->d[0] = pws->d[0] & pwt->d[0];
4350 pwd->d[1] = pws->d[1] & pwt->d[1];
4351 }
4352
4353 void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4354 {
4355 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4356 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4357 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4358
4359 pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
4360 pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
4361 }
4362
4363 void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4364 {
4365 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4366 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4367 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4368
4369 pwd->d[0] = pws->d[0] | pwt->d[0];
4370 pwd->d[1] = pws->d[1] | pwt->d[1];
4371 }
4372
4373 void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4374 {
4375 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4376 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4377 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4378
4379 pwd->d[0] = pws->d[0] ^ pwt->d[0];
4380 pwd->d[1] = pws->d[1] ^ pwt->d[1];
4381 }
4382
4383
4384 /*
4385 * Move
4386 * ----
4387 *
4388 * +---------------+----------------------------------------------------------+
4389 * | MOVE.V | Vector Move |
4390 * +---------------+----------------------------------------------------------+
4391 */
4392
4393 static inline void msa_move_v(wr_t *pwd, wr_t *pws)
4394 {
4395 pwd->d[0] = pws->d[0];
4396 pwd->d[1] = pws->d[1];
4397 }
4398
4399 void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
4400 {
4401 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4402 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4403
4404 msa_move_v(pwd, pws);
4405 }
4406
4407
4408 /*
4409 * Pack
4410 * ----
4411 *
4412 * +---------------+----------------------------------------------------------+
4413 * | PCKEV.B | Vector Pack Even (byte) |
4414 * | PCKEV.H | Vector Pack Even (halfword) |
4415 * | PCKEV.W | Vector Pack Even (word) |
4416 * | PCKEV.D | Vector Pack Even (doubleword) |
4417 * | PCKOD.B | Vector Pack Odd (byte) |
4418 * | PCKOD.H | Vector Pack Odd (halfword) |
4419 * | PCKOD.W | Vector Pack Odd (word) |
4420 * | PCKOD.D | Vector Pack Odd (doubleword) |
4421 * | VSHF.B | Vector Data Preserving Shuffle (byte) |
4422 * | VSHF.H | Vector Data Preserving Shuffle (halfword) |
4423 * | VSHF.W | Vector Data Preserving Shuffle (word) |
4424 * | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
4425 * +---------------+----------------------------------------------------------+
4426 */
4427
4428
4429 void helper_msa_pckev_b(CPUMIPSState *env,
4430 uint32_t wd, uint32_t ws, uint32_t wt)
4431 {
4432 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4433 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4434 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4435
4436 #if defined(HOST_WORDS_BIGENDIAN)
4437 pwd->b[8] = pws->b[9];
4438 pwd->b[10] = pws->b[13];
4439 pwd->b[12] = pws->b[1];
4440 pwd->b[14] = pws->b[5];
4441 pwd->b[0] = pwt->b[9];
4442 pwd->b[2] = pwt->b[13];
4443 pwd->b[4] = pwt->b[1];
4444 pwd->b[6] = pwt->b[5];
4445 pwd->b[9] = pws->b[11];
4446 pwd->b[13] = pws->b[3];
4447 pwd->b[1] = pwt->b[11];
4448 pwd->b[5] = pwt->b[3];
4449 pwd->b[11] = pws->b[15];
4450 pwd->b[3] = pwt->b[15];
4451 pwd->b[15] = pws->b[7];
4452 pwd->b[7] = pwt->b[7];
4453 #else
4454 pwd->b[15] = pws->b[14];
4455 pwd->b[13] = pws->b[10];
4456 pwd->b[11] = pws->b[6];
4457 pwd->b[9] = pws->b[2];
4458 pwd->b[7] = pwt->b[14];
4459 pwd->b[5] = pwt->b[10];
4460 pwd->b[3] = pwt->b[6];
4461 pwd->b[1] = pwt->b[2];
4462 pwd->b[14] = pws->b[12];
4463 pwd->b[10] = pws->b[4];
4464 pwd->b[6] = pwt->b[12];
4465 pwd->b[2] = pwt->b[4];
4466 pwd->b[12] = pws->b[8];
4467 pwd->b[4] = pwt->b[8];
4468 pwd->b[8] = pws->b[0];
4469 pwd->b[0] = pwt->b[0];
4470 #endif
4471 }
4472
4473 void helper_msa_pckev_h(CPUMIPSState *env,
4474 uint32_t wd, uint32_t ws, uint32_t wt)
4475 {
4476 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4477 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4478 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4479
4480 #if defined(HOST_WORDS_BIGENDIAN)
4481 pwd->h[4] = pws->h[5];
4482 pwd->h[6] = pws->h[1];
4483 pwd->h[0] = pwt->h[5];
4484 pwd->h[2] = pwt->h[1];
4485 pwd->h[5] = pws->h[7];
4486 pwd->h[1] = pwt->h[7];
4487 pwd->h[7] = pws->h[3];
4488 pwd->h[3] = pwt->h[3];
4489 #else
4490 pwd->h[7] = pws->h[6];
4491 pwd->h[5] = pws->h[2];
4492 pwd->h[3] = pwt->h[6];
4493 pwd->h[1] = pwt->h[2];
4494 pwd->h[6] = pws->h[4];
4495 pwd->h[2] = pwt->h[4];
4496 pwd->h[4] = pws->h[0];
4497 pwd->h[0] = pwt->h[0];
4498 #endif
4499 }
4500
4501 void helper_msa_pckev_w(CPUMIPSState *env,
4502 uint32_t wd, uint32_t ws, uint32_t wt)
4503 {
4504 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4505 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4506 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4507
4508 #if defined(HOST_WORDS_BIGENDIAN)
4509 pwd->w[2] = pws->w[3];
4510 pwd->w[0] = pwt->w[3];
4511 pwd->w[3] = pws->w[1];
4512 pwd->w[1] = pwt->w[1];
4513 #else
4514 pwd->w[3] = pws->w[2];
4515 pwd->w[1] = pwt->w[2];
4516 pwd->w[2] = pws->w[0];
4517 pwd->w[0] = pwt->w[0];
4518 #endif
4519 }
4520
4521 void helper_msa_pckev_d(CPUMIPSState *env,
4522 uint32_t wd, uint32_t ws, uint32_t wt)
4523 {
4524 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4525 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4526 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4527
4528 pwd->d[1] = pws->d[0];
4529 pwd->d[0] = pwt->d[0];
4530 }
4531
4532
4533 void helper_msa_pckod_b(CPUMIPSState *env,
4534 uint32_t wd, uint32_t ws, uint32_t wt)
4535 {
4536 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4537 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4538 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4539
4540 #if defined(HOST_WORDS_BIGENDIAN)
4541 pwd->b[7] = pwt->b[6];
4542 pwd->b[5] = pwt->b[2];
4543 pwd->b[3] = pwt->b[14];
4544 pwd->b[1] = pwt->b[10];
4545 pwd->b[15] = pws->b[6];
4546 pwd->b[13] = pws->b[2];
4547 pwd->b[11] = pws->b[14];
4548 pwd->b[9] = pws->b[10];
4549 pwd->b[6] = pwt->b[4];
4550 pwd->b[2] = pwt->b[12];
4551 pwd->b[14] = pws->b[4];
4552 pwd->b[10] = pws->b[12];
4553 pwd->b[4] = pwt->b[0];
4554 pwd->b[12] = pws->b[0];
4555 pwd->b[0] = pwt->b[8];
4556 pwd->b[8] = pws->b[8];
4557 #else
4558 pwd->b[0] = pwt->b[1];
4559 pwd->b[2] = pwt->b[5];
4560 pwd->b[4] = pwt->b[9];
4561 pwd->b[6] = pwt->b[13];
4562 pwd->b[8] = pws->b[1];
4563 pwd->b[10] = pws->b[5];
4564 pwd->b[12] = pws->b[9];
4565 pwd->b[14] = pws->b[13];
4566 pwd->b[1] = pwt->b[3];
4567 pwd->b[5] = pwt->b[11];
4568 pwd->b[9] = pws->b[3];
4569 pwd->b[13] = pws->b[11];
4570 pwd->b[3] = pwt->b[7];
4571 pwd->b[11] = pws->b[7];
4572 pwd->b[7] = pwt->b[15];
4573 pwd->b[15] = pws->b[15];
4574 #endif
4575
4576 }
4577
4578 void helper_msa_pckod_h(CPUMIPSState *env,
4579 uint32_t wd, uint32_t ws, uint32_t wt)
4580 {
4581 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4582 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4583 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4584
4585 #if defined(HOST_WORDS_BIGENDIAN)
4586 pwd->h[3] = pwt->h[2];
4587 pwd->h[1] = pwt->h[6];
4588 pwd->h[7] = pws->h[2];
4589 pwd->h[5] = pws->h[6];
4590 pwd->h[2] = pwt->h[0];
4591 pwd->h[6] = pws->h[0];
4592 pwd->h[0] = pwt->h[4];
4593 pwd->h[4] = pws->h[4];
4594 #else
4595 pwd->h[0] = pwt->h[1];
4596 pwd->h[2] = pwt->h[5];
4597 pwd->h[4] = pws->h[1];
4598 pwd->h[6] = pws->h[5];
4599 pwd->h[1] = pwt->h[3];
4600 pwd->h[5] = pws->h[3];
4601 pwd->h[3] = pwt->h[7];
4602 pwd->h[7] = pws->h[7];
4603 #endif
4604 }
4605
4606 void helper_msa_pckod_w(CPUMIPSState *env,
4607 uint32_t wd, uint32_t ws, uint32_t wt)
4608 {
4609 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4610 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4611 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4612
4613 #if defined(HOST_WORDS_BIGENDIAN)
4614 pwd->w[1] = pwt->w[0];
4615 pwd->w[3] = pws->w[0];
4616 pwd->w[0] = pwt->w[2];
4617 pwd->w[2] = pws->w[2];
4618 #else
4619 pwd->w[0] = pwt->w[1];
4620 pwd->w[2] = pws->w[1];
4621 pwd->w[1] = pwt->w[3];
4622 pwd->w[3] = pws->w[3];
4623 #endif
4624 }
4625
4626 void helper_msa_pckod_d(CPUMIPSState *env,
4627 uint32_t wd, uint32_t ws, uint32_t wt)
4628 {
4629 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4630 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4631 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4632
4633 pwd->d[0] = pwt->d[1];
4634 pwd->d[1] = pws->d[1];
4635 }
4636
4637
4638 /*
4639 * Shift
4640 * -----
4641 *
4642 * +---------------+----------------------------------------------------------+
4643 * | SLL.B | Vector Shift Left (byte) |
4644 * | SLL.H | Vector Shift Left (halfword) |
4645 * | SLL.W | Vector Shift Left (word) |
4646 * | SLL.D | Vector Shift Left (doubleword) |
4647 * | SRA.B | Vector Shift Right Arithmetic (byte) |
4648 * | SRA.H | Vector Shift Right Arithmetic (halfword) |
4649 * | SRA.W | Vector Shift Right Arithmetic (word) |
4650 * | SRA.D | Vector Shift Right Arithmetic (doubleword) |
4651 * | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
4652 * | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
4653 * | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
4654 * | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
4655 * | SRL.B | Vector Shift Right Logical (byte) |
4656 * | SRL.H | Vector Shift Right Logical (halfword) |
4657 * | SRL.W | Vector Shift Right Logical (word) |
4658 * | SRL.D | Vector Shift Right Logical (doubleword) |
4659 * | SRLR.B | Vector Shift Right Logical Rounded (byte) |
4660 * | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
4661 * | SRLR.W | Vector Shift Right Logical Rounded (word) |
4662 * | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
4663 * +---------------+----------------------------------------------------------+
4664 */
4665
4666
4667 static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
4668 {
4669 int32_t b_arg2 = BIT_POSITION(arg2, df);
4670 return arg1 << b_arg2;
4671 }
4672
4673 void helper_msa_sll_b(CPUMIPSState *env,
4674 uint32_t wd, uint32_t ws, uint32_t wt)
4675 {
4676 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4677 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4678 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4679
4680 pwd->b[0] = msa_sll_df(DF_BYTE, pws->b[0], pwt->b[0]);
4681 pwd->b[1] = msa_sll_df(DF_BYTE, pws->b[1], pwt->b[1]);
4682 pwd->b[2] = msa_sll_df(DF_BYTE, pws->b[2], pwt->b[2]);
4683 pwd->b[3] = msa_sll_df(DF_BYTE, pws->b[3], pwt->b[3]);
4684 pwd->b[4] = msa_sll_df(DF_BYTE, pws->b[4], pwt->b[4]);
4685 pwd->b[5] = msa_sll_df(DF_BYTE, pws->b[5], pwt->b[5]);
4686 pwd->b[6] = msa_sll_df(DF_BYTE, pws->b[6], pwt->b[6]);
4687 pwd->b[7] = msa_sll_df(DF_BYTE, pws->b[7], pwt->b[7]);
4688 pwd->b[8] = msa_sll_df(DF_BYTE, pws->b[8], pwt->b[8]);
4689 pwd->b[9] = msa_sll_df(DF_BYTE, pws->b[9], pwt->b[9]);
4690 pwd->b[10] = msa_sll_df(DF_BYTE, pws->b[10], pwt->b[10]);
4691 pwd->b[11] = msa_sll_df(DF_BYTE, pws->b[11], pwt->b[11]);
4692 pwd->b[12] = msa_sll_df(DF_BYTE, pws->b[12], pwt->b[12]);
4693 pwd->b[13] = msa_sll_df(DF_BYTE, pws->b[13], pwt->b[13]);
4694 pwd->b[14] = msa_sll_df(DF_BYTE, pws->b[14], pwt->b[14]);
4695 pwd->b[15] = msa_sll_df(DF_BYTE, pws->b[15], pwt->b[15]);
4696 }
4697
4698 void helper_msa_sll_h(CPUMIPSState *env,
4699 uint32_t wd, uint32_t ws, uint32_t wt)
4700 {
4701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4704
4705 pwd->h[0] = msa_sll_df(DF_HALF, pws->h[0], pwt->h[0]);
4706 pwd->h[1] = msa_sll_df(DF_HALF, pws->h[1], pwt->h[1]);
4707 pwd->h[2] = msa_sll_df(DF_HALF, pws->h[2], pwt->h[2]);
4708 pwd->h[3] = msa_sll_df(DF_HALF, pws->h[3], pwt->h[3]);
4709 pwd->h[4] = msa_sll_df(DF_HALF, pws->h[4], pwt->h[4]);
4710 pwd->h[5] = msa_sll_df(DF_HALF, pws->h[5], pwt->h[5]);
4711 pwd->h[6] = msa_sll_df(DF_HALF, pws->h[6], pwt->h[6]);
4712 pwd->h[7] = msa_sll_df(DF_HALF, pws->h[7], pwt->h[7]);
4713 }
4714
4715 void helper_msa_sll_w(CPUMIPSState *env,
4716 uint32_t wd, uint32_t ws, uint32_t wt)
4717 {
4718 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4719 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4720 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4721
4722 pwd->w[0] = msa_sll_df(DF_WORD, pws->w[0], pwt->w[0]);
4723 pwd->w[1] = msa_sll_df(DF_WORD, pws->w[1], pwt->w[1]);
4724 pwd->w[2] = msa_sll_df(DF_WORD, pws->w[2], pwt->w[2]);
4725 pwd->w[3] = msa_sll_df(DF_WORD, pws->w[3], pwt->w[3]);
4726 }
4727
4728 void helper_msa_sll_d(CPUMIPSState *env,
4729 uint32_t wd, uint32_t ws, uint32_t wt)
4730 {
4731 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4732 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4733 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4734
4735 pwd->d[0] = msa_sll_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4736 pwd->d[1] = msa_sll_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4737 }
4738
4739
4740 static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
4741 {
4742 int32_t b_arg2 = BIT_POSITION(arg2, df);
4743 return arg1 >> b_arg2;
4744 }
4745
4746 void helper_msa_sra_b(CPUMIPSState *env,
4747 uint32_t wd, uint32_t ws, uint32_t wt)
4748 {
4749 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4750 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4751 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4752
4753 pwd->b[0] = msa_sra_df(DF_BYTE, pws->b[0], pwt->b[0]);
4754 pwd->b[1] = msa_sra_df(DF_BYTE, pws->b[1], pwt->b[1]);
4755 pwd->b[2] = msa_sra_df(DF_BYTE, pws->b[2], pwt->b[2]);
4756 pwd->b[3] = msa_sra_df(DF_BYTE, pws->b[3], pwt->b[3]);
4757 pwd->b[4] = msa_sra_df(DF_BYTE, pws->b[4], pwt->b[4]);
4758 pwd->b[5] = msa_sra_df(DF_BYTE, pws->b[5], pwt->b[5]);
4759 pwd->b[6] = msa_sra_df(DF_BYTE, pws->b[6], pwt->b[6]);
4760 pwd->b[7] = msa_sra_df(DF_BYTE, pws->b[7], pwt->b[7]);
4761 pwd->b[8] = msa_sra_df(DF_BYTE, pws->b[8], pwt->b[8]);
4762 pwd->b[9] = msa_sra_df(DF_BYTE, pws->b[9], pwt->b[9]);
4763 pwd->b[10] = msa_sra_df(DF_BYTE, pws->b[10], pwt->b[10]);
4764 pwd->b[11] = msa_sra_df(DF_BYTE, pws->b[11], pwt->b[11]);
4765 pwd->b[12] = msa_sra_df(DF_BYTE, pws->b[12], pwt->b[12]);
4766 pwd->b[13] = msa_sra_df(DF_BYTE, pws->b[13], pwt->b[13]);
4767 pwd->b[14] = msa_sra_df(DF_BYTE, pws->b[14], pwt->b[14]);
4768 pwd->b[15] = msa_sra_df(DF_BYTE, pws->b[15], pwt->b[15]);
4769 }
4770
4771 void helper_msa_sra_h(CPUMIPSState *env,
4772 uint32_t wd, uint32_t ws, uint32_t wt)
4773 {
4774 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4775 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4776 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4777
4778 pwd->h[0] = msa_sra_df(DF_HALF, pws->h[0], pwt->h[0]);
4779 pwd->h[1] = msa_sra_df(DF_HALF, pws->h[1], pwt->h[1]);
4780 pwd->h[2] = msa_sra_df(DF_HALF, pws->h[2], pwt->h[2]);
4781 pwd->h[3] = msa_sra_df(DF_HALF, pws->h[3], pwt->h[3]);
4782 pwd->h[4] = msa_sra_df(DF_HALF, pws->h[4], pwt->h[4]);
4783 pwd->h[5] = msa_sra_df(DF_HALF, pws->h[5], pwt->h[5]);
4784 pwd->h[6] = msa_sra_df(DF_HALF, pws->h[6], pwt->h[6]);
4785 pwd->h[7] = msa_sra_df(DF_HALF, pws->h[7], pwt->h[7]);
4786 }
4787
4788 void helper_msa_sra_w(CPUMIPSState *env,
4789 uint32_t wd, uint32_t ws, uint32_t wt)
4790 {
4791 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4792 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4793 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4794
4795 pwd->w[0] = msa_sra_df(DF_WORD, pws->w[0], pwt->w[0]);
4796 pwd->w[1] = msa_sra_df(DF_WORD, pws->w[1], pwt->w[1]);
4797 pwd->w[2] = msa_sra_df(DF_WORD, pws->w[2], pwt->w[2]);
4798 pwd->w[3] = msa_sra_df(DF_WORD, pws->w[3], pwt->w[3]);
4799 }
4800
4801 void helper_msa_sra_d(CPUMIPSState *env,
4802 uint32_t wd, uint32_t ws, uint32_t wt)
4803 {
4804 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4805 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4806 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4807
4808 pwd->d[0] = msa_sra_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4809 pwd->d[1] = msa_sra_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4810 }
4811
4812
4813 static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
4814 {
4815 int32_t b_arg2 = BIT_POSITION(arg2, df);
4816 if (b_arg2 == 0) {
4817 return arg1;
4818 } else {
4819 int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
4820 return (arg1 >> b_arg2) + r_bit;
4821 }
4822 }
4823
4824 void helper_msa_srar_b(CPUMIPSState *env,
4825 uint32_t wd, uint32_t ws, uint32_t wt)
4826 {
4827 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4828 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4829 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4830
4831 pwd->b[0] = msa_srar_df(DF_BYTE, pws->b[0], pwt->b[0]);
4832 pwd->b[1] = msa_srar_df(DF_BYTE, pws->b[1], pwt->b[1]);
4833 pwd->b[2] = msa_srar_df(DF_BYTE, pws->b[2], pwt->b[2]);
4834 pwd->b[3] = msa_srar_df(DF_BYTE, pws->b[3], pwt->b[3]);
4835 pwd->b[4] = msa_srar_df(DF_BYTE, pws->b[4], pwt->b[4]);
4836 pwd->b[5] = msa_srar_df(DF_BYTE, pws->b[5], pwt->b[5]);
4837 pwd->b[6] = msa_srar_df(DF_BYTE, pws->b[6], pwt->b[6]);
4838 pwd->b[7] = msa_srar_df(DF_BYTE, pws->b[7], pwt->b[7]);
4839 pwd->b[8] = msa_srar_df(DF_BYTE, pws->b[8], pwt->b[8]);
4840 pwd->b[9] = msa_srar_df(DF_BYTE, pws->b[9], pwt->b[9]);
4841 pwd->b[10] = msa_srar_df(DF_BYTE, pws->b[10], pwt->b[10]);
4842 pwd->b[11] = msa_srar_df(DF_BYTE, pws->b[11], pwt->b[11]);
4843 pwd->b[12] = msa_srar_df(DF_BYTE, pws->b[12], pwt->b[12]);
4844 pwd->b[13] = msa_srar_df(DF_BYTE, pws->b[13], pwt->b[13]);
4845 pwd->b[14] = msa_srar_df(DF_BYTE, pws->b[14], pwt->b[14]);
4846 pwd->b[15] = msa_srar_df(DF_BYTE, pws->b[15], pwt->b[15]);
4847 }
4848
4849 void helper_msa_srar_h(CPUMIPSState *env,
4850 uint32_t wd, uint32_t ws, uint32_t wt)
4851 {
4852 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4853 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4854 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4855
4856 pwd->h[0] = msa_srar_df(DF_HALF, pws->h[0], pwt->h[0]);
4857 pwd->h[1] = msa_srar_df(DF_HALF, pws->h[1], pwt->h[1]);
4858 pwd->h[2] = msa_srar_df(DF_HALF, pws->h[2], pwt->h[2]);
4859 pwd->h[3] = msa_srar_df(DF_HALF, pws->h[3], pwt->h[3]);
4860 pwd->h[4] = msa_srar_df(DF_HALF, pws->h[4], pwt->h[4]);
4861 pwd->h[5] = msa_srar_df(DF_HALF, pws->h[5], pwt->h[5]);
4862 pwd->h[6] = msa_srar_df(DF_HALF, pws->h[6], pwt->h[6]);
4863 pwd->h[7] = msa_srar_df(DF_HALF, pws->h[7], pwt->h[7]);
4864 }
4865
4866 void helper_msa_srar_w(CPUMIPSState *env,
4867 uint32_t wd, uint32_t ws, uint32_t wt)
4868 {
4869 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4870 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4871 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4872
4873 pwd->w[0] = msa_srar_df(DF_WORD, pws->w[0], pwt->w[0]);
4874 pwd->w[1] = msa_srar_df(DF_WORD, pws->w[1], pwt->w[1]);
4875 pwd->w[2] = msa_srar_df(DF_WORD, pws->w[2], pwt->w[2]);
4876 pwd->w[3] = msa_srar_df(DF_WORD, pws->w[3], pwt->w[3]);
4877 }
4878
4879 void helper_msa_srar_d(CPUMIPSState *env,
4880 uint32_t wd, uint32_t ws, uint32_t wt)
4881 {
4882 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4883 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4884 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4885
4886 pwd->d[0] = msa_srar_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4887 pwd->d[1] = msa_srar_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4888 }
4889
4890
4891 static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
4892 {
4893 uint64_t u_arg1 = UNSIGNED(arg1, df);
4894 int32_t b_arg2 = BIT_POSITION(arg2, df);
4895 return u_arg1 >> b_arg2;
4896 }
4897
4898 void helper_msa_srl_b(CPUMIPSState *env,
4899 uint32_t wd, uint32_t ws, uint32_t wt)
4900 {
4901 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4902 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4903 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4904
4905 pwd->b[0] = msa_srl_df(DF_BYTE, pws->b[0], pwt->b[0]);
4906 pwd->b[1] = msa_srl_df(DF_BYTE, pws->b[1], pwt->b[1]);
4907 pwd->b[2] = msa_srl_df(DF_BYTE, pws->b[2], pwt->b[2]);
4908 pwd->b[3] = msa_srl_df(DF_BYTE, pws->b[3], pwt->b[3]);
4909 pwd->b[4] = msa_srl_df(DF_BYTE, pws->b[4], pwt->b[4]);
4910 pwd->b[5] = msa_srl_df(DF_BYTE, pws->b[5], pwt->b[5]);
4911 pwd->b[6] = msa_srl_df(DF_BYTE, pws->b[6], pwt->b[6]);
4912 pwd->b[7] = msa_srl_df(DF_BYTE, pws->b[7], pwt->b[7]);
4913 pwd->b[8] = msa_srl_df(DF_BYTE, pws->b[8], pwt->b[8]);
4914 pwd->b[9] = msa_srl_df(DF_BYTE, pws->b[9], pwt->b[9]);
4915 pwd->b[10] = msa_srl_df(DF_BYTE, pws->b[10], pwt->b[10]);
4916 pwd->b[11] = msa_srl_df(DF_BYTE, pws->b[11], pwt->b[11]);
4917 pwd->b[12] = msa_srl_df(DF_BYTE, pws->b[12], pwt->b[12]);
4918 pwd->b[13] = msa_srl_df(DF_BYTE, pws->b[13], pwt->b[13]);
4919 pwd->b[14] = msa_srl_df(DF_BYTE, pws->b[14], pwt->b[14]);
4920 pwd->b[15] = msa_srl_df(DF_BYTE, pws->b[15], pwt->b[15]);
4921 }
4922
4923 void helper_msa_srl_h(CPUMIPSState *env,
4924 uint32_t wd, uint32_t ws, uint32_t wt)
4925 {
4926 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4927 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4928 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4929
4930 pwd->h[0] = msa_srl_df(DF_HALF, pws->h[0], pwt->h[0]);
4931 pwd->h[1] = msa_srl_df(DF_HALF, pws->h[1], pwt->h[1]);
4932 pwd->h[2] = msa_srl_df(DF_HALF, pws->h[2], pwt->h[2]);
4933 pwd->h[3] = msa_srl_df(DF_HALF, pws->h[3], pwt->h[3]);
4934 pwd->h[4] = msa_srl_df(DF_HALF, pws->h[4], pwt->h[4]);
4935 pwd->h[5] = msa_srl_df(DF_HALF, pws->h[5], pwt->h[5]);
4936 pwd->h[6] = msa_srl_df(DF_HALF, pws->h[6], pwt->h[6]);
4937 pwd->h[7] = msa_srl_df(DF_HALF, pws->h[7], pwt->h[7]);
4938 }
4939
4940 void helper_msa_srl_w(CPUMIPSState *env,
4941 uint32_t wd, uint32_t ws, uint32_t wt)
4942 {
4943 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4944 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4945 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4946
4947 pwd->w[0] = msa_srl_df(DF_WORD, pws->w[0], pwt->w[0]);
4948 pwd->w[1] = msa_srl_df(DF_WORD, pws->w[1], pwt->w[1]);
4949 pwd->w[2] = msa_srl_df(DF_WORD, pws->w[2], pwt->w[2]);
4950 pwd->w[3] = msa_srl_df(DF_WORD, pws->w[3], pwt->w[3]);
4951 }
4952
4953 void helper_msa_srl_d(CPUMIPSState *env,
4954 uint32_t wd, uint32_t ws, uint32_t wt)
4955 {
4956 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4957 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4958 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4959
4960 pwd->d[0] = msa_srl_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4961 pwd->d[1] = msa_srl_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4962 }
4963
4964
4965 static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
4966 {
4967 uint64_t u_arg1 = UNSIGNED(arg1, df);
4968 int32_t b_arg2 = BIT_POSITION(arg2, df);
4969 if (b_arg2 == 0) {
4970 return u_arg1;
4971 } else {
4972 uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
4973 return (u_arg1 >> b_arg2) + r_bit;
4974 }
4975 }
4976
4977 void helper_msa_srlr_b(CPUMIPSState *env,
4978 uint32_t wd, uint32_t ws, uint32_t wt)
4979 {
4980 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4981 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4982 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4983
4984 pwd->b[0] = msa_srlr_df(DF_BYTE, pws->b[0], pwt->b[0]);
4985 pwd->b[1] = msa_srlr_df(DF_BYTE, pws->b[1], pwt->b[1]);
4986 pwd->b[2] = msa_srlr_df(DF_BYTE, pws->b[2], pwt->b[2]);
4987 pwd->b[3] = msa_srlr_df(DF_BYTE, pws->b[3], pwt->b[3]);
4988 pwd->b[4] = msa_srlr_df(DF_BYTE, pws->b[4], pwt->b[4]);
4989 pwd->b[5] = msa_srlr_df(DF_BYTE, pws->b[5], pwt->b[5]);
4990 pwd->b[6] = msa_srlr_df(DF_BYTE, pws->b[6], pwt->b[6]);
4991 pwd->b[7] = msa_srlr_df(DF_BYTE, pws->b[7], pwt->b[7]);
4992 pwd->b[8] = msa_srlr_df(DF_BYTE, pws->b[8], pwt->b[8]);
4993 pwd->b[9] = msa_srlr_df(DF_BYTE, pws->b[9], pwt->b[9]);
4994 pwd->b[10] = msa_srlr_df(DF_BYTE, pws->b[10], pwt->b[10]);
4995 pwd->b[11] = msa_srlr_df(DF_BYTE, pws->b[11], pwt->b[11]);
4996 pwd->b[12] = msa_srlr_df(DF_BYTE, pws->b[12], pwt->b[12]);
4997 pwd->b[13] = msa_srlr_df(DF_BYTE, pws->b[13], pwt->b[13]);
4998 pwd->b[14] = msa_srlr_df(DF_BYTE, pws->b[14], pwt->b[14]);
4999 pwd->b[15] = msa_srlr_df(DF_BYTE, pws->b[15], pwt->b[15]);
5000 }
5001
5002 void helper_msa_srlr_h(CPUMIPSState *env,
5003 uint32_t wd, uint32_t ws, uint32_t wt)
5004 {
5005 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5006 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5007 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5008
5009 pwd->h[0] = msa_srlr_df(DF_HALF, pws->h[0], pwt->h[0]);
5010 pwd->h[1] = msa_srlr_df(DF_HALF, pws->h[1], pwt->h[1]);
5011 pwd->h[2] = msa_srlr_df(DF_HALF, pws->h[2], pwt->h[2]);
5012 pwd->h[3] = msa_srlr_df(DF_HALF, pws->h[3], pwt->h[3]);
5013 pwd->h[4] = msa_srlr_df(DF_HALF, pws->h[4], pwt->h[4]);
5014 pwd->h[5] = msa_srlr_df(DF_HALF, pws->h[5], pwt->h[5]);
5015 pwd->h[6] = msa_srlr_df(DF_HALF, pws->h[6], pwt->h[6]);
5016 pwd->h[7] = msa_srlr_df(DF_HALF, pws->h[7], pwt->h[7]);
5017 }
5018
5019 void helper_msa_srlr_w(CPUMIPSState *env,
5020 uint32_t wd, uint32_t ws, uint32_t wt)
5021 {
5022 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5023 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5024 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5025
5026 pwd->w[0] = msa_srlr_df(DF_WORD, pws->w[0], pwt->w[0]);
5027 pwd->w[1] = msa_srlr_df(DF_WORD, pws->w[1], pwt->w[1]);
5028 pwd->w[2] = msa_srlr_df(DF_WORD, pws->w[2], pwt->w[2]);
5029 pwd->w[3] = msa_srlr_df(DF_WORD, pws->w[3], pwt->w[3]);
5030 }
5031
5032 void helper_msa_srlr_d(CPUMIPSState *env,
5033 uint32_t wd, uint32_t ws, uint32_t wt)
5034 {
5035 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5036 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5037 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5038
5039 pwd->d[0] = msa_srlr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5040 pwd->d[1] = msa_srlr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5041 }
5042
5043
5044 #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \
5045 void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
5046 uint32_t i8) \
5047 { \
5048 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5049 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5050 uint32_t i; \
5051 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5052 DEST = OPERATION; \
5053 } \
5054 }
5055
5056 MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
5057 MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
5058 MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
5059 MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
5060
5061 #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
5062 UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
5063 MSA_FN_IMM8(bmnzi_b, pwd->b[i],
5064 BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5065
5066 #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
5067 UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
5068 MSA_FN_IMM8(bmzi_b, pwd->b[i],
5069 BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5070
5071 #define BIT_SELECT(dest, arg1, arg2, df) \
5072 UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
5073 MSA_FN_IMM8(bseli_b, pwd->b[i],
5074 BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
5075
5076 #undef BIT_SELECT
5077 #undef BIT_MOVE_IF_ZERO
5078 #undef BIT_MOVE_IF_NOT_ZERO
5079 #undef MSA_FN_IMM8
5080
5081 #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
5082
5083 void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5084 uint32_t ws, uint32_t imm)
5085 {
5086 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5087 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5088 wr_t wx, *pwx = &wx;
5089 uint32_t i;
5090
5091 switch (df) {
5092 case DF_BYTE:
5093 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5094 pwx->b[i] = pws->b[SHF_POS(i, imm)];
5095 }
5096 break;
5097 case DF_HALF:
5098 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5099 pwx->h[i] = pws->h[SHF_POS(i, imm)];
5100 }
5101 break;
5102 case DF_WORD:
5103 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5104 pwx->w[i] = pws->w[SHF_POS(i, imm)];
5105 }
5106 break;
5107 default:
5108 assert(0);
5109 }
5110 msa_move_v(pwd, pwx);
5111 }
5112
5113 static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
5114 {
5115 return arg1 - arg2;
5116 }
5117
5118 #define MSA_BINOP_IMM_DF(helper, func) \
5119 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5120 uint32_t wd, uint32_t ws, int32_t u5) \
5121 { \
5122 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5123 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5124 uint32_t i; \
5125 \
5126 switch (df) { \
5127 case DF_BYTE: \
5128 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5129 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5130 } \
5131 break; \
5132 case DF_HALF: \
5133 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5134 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5135 } \
5136 break; \
5137 case DF_WORD: \
5138 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5139 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5140 } \
5141 break; \
5142 case DF_DOUBLE: \
5143 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5144 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5145 } \
5146 break; \
5147 default: \
5148 assert(0); \
5149 } \
5150 }
5151
5152 MSA_BINOP_IMM_DF(addvi, addv)
5153 MSA_BINOP_IMM_DF(subvi, subv)
5154 MSA_BINOP_IMM_DF(ceqi, ceq)
5155 MSA_BINOP_IMM_DF(clei_s, cle_s)
5156 MSA_BINOP_IMM_DF(clei_u, cle_u)
5157 MSA_BINOP_IMM_DF(clti_s, clt_s)
5158 MSA_BINOP_IMM_DF(clti_u, clt_u)
5159 MSA_BINOP_IMM_DF(maxi_s, max_s)
5160 MSA_BINOP_IMM_DF(maxi_u, max_u)
5161 MSA_BINOP_IMM_DF(mini_s, min_s)
5162 MSA_BINOP_IMM_DF(mini_u, min_u)
5163 #undef MSA_BINOP_IMM_DF
5164
5165 void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5166 int32_t s10)
5167 {
5168 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5169 uint32_t i;
5170
5171 switch (df) {
5172 case DF_BYTE:
5173 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5174 pwd->b[i] = (int8_t)s10;
5175 }
5176 break;
5177 case DF_HALF:
5178 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5179 pwd->h[i] = (int16_t)s10;
5180 }
5181 break;
5182 case DF_WORD:
5183 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5184 pwd->w[i] = (int32_t)s10;
5185 }
5186 break;
5187 case DF_DOUBLE:
5188 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5189 pwd->d[i] = (int64_t)s10;
5190 }
5191 break;
5192 default:
5193 assert(0);
5194 }
5195 }
5196
5197 static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
5198 {
5199 return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
5200 arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
5201 arg;
5202 }
5203
5204 static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
5205 {
5206 uint64_t u_arg = UNSIGNED(arg, df);
5207 return u_arg < M_MAX_UINT(m + 1) ? u_arg :
5208 M_MAX_UINT(m + 1);
5209 }
5210
5211 #define MSA_BINOP_IMMU_DF(helper, func) \
5212 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5213 uint32_t ws, uint32_t u5) \
5214 { \
5215 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5216 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5217 uint32_t i; \
5218 \
5219 switch (df) { \
5220 case DF_BYTE: \
5221 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5222 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5223 } \
5224 break; \
5225 case DF_HALF: \
5226 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5227 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5228 } \
5229 break; \
5230 case DF_WORD: \
5231 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5232 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5233 } \
5234 break; \
5235 case DF_DOUBLE: \
5236 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5237 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5238 } \
5239 break; \
5240 default: \
5241 assert(0); \
5242 } \
5243 }
5244
5245 MSA_BINOP_IMMU_DF(slli, sll)
5246 MSA_BINOP_IMMU_DF(srai, sra)
5247 MSA_BINOP_IMMU_DF(srli, srl)
5248 MSA_BINOP_IMMU_DF(bclri, bclr)
5249 MSA_BINOP_IMMU_DF(bseti, bset)
5250 MSA_BINOP_IMMU_DF(bnegi, bneg)
5251 MSA_BINOP_IMMU_DF(sat_s, sat_s)
5252 MSA_BINOP_IMMU_DF(sat_u, sat_u)
5253 MSA_BINOP_IMMU_DF(srari, srar)
5254 MSA_BINOP_IMMU_DF(srlri, srlr)
5255 #undef MSA_BINOP_IMMU_DF
5256
5257 #define MSA_TEROP_IMMU_DF(helper, func) \
5258 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5259 uint32_t wd, uint32_t ws, uint32_t u5) \
5260 { \
5261 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5262 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5263 uint32_t i; \
5264 \
5265 switch (df) { \
5266 case DF_BYTE: \
5267 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5268 pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \
5269 u5); \
5270 } \
5271 break; \
5272 case DF_HALF: \
5273 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5274 pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \
5275 u5); \
5276 } \
5277 break; \
5278 case DF_WORD: \
5279 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5280 pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \
5281 u5); \
5282 } \
5283 break; \
5284 case DF_DOUBLE: \
5285 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5286 pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \
5287 u5); \
5288 } \
5289 break; \
5290 default: \
5291 assert(0); \
5292 } \
5293 }
5294
5295 MSA_TEROP_IMMU_DF(binsli, binsl)
5296 MSA_TEROP_IMMU_DF(binsri, binsr)
5297 #undef MSA_TEROP_IMMU_DF
5298
5299 static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
5300 {
5301 uint64_t u_arg1 = UNSIGNED(arg1, df);
5302 uint64_t u_arg2 = UNSIGNED(arg2, df);
5303 int64_t max_int = DF_MAX_INT(df);
5304 int64_t min_int = DF_MIN_INT(df);
5305 if (u_arg1 > u_arg2) {
5306 return u_arg1 - u_arg2 < (uint64_t)max_int ?
5307 (int64_t)(u_arg1 - u_arg2) :
5308 max_int;
5309 } else {
5310 return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
5311 (int64_t)(u_arg1 - u_arg2) :
5312 min_int;
5313 }
5314 }
5315
5316 static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
5317 {
5318 return arg1 * arg2;
5319 }
5320
5321 #define CONCATENATE_AND_SLIDE(s, k) \
5322 do { \
5323 for (i = 0; i < s; i++) { \
5324 v[i] = pws->b[s * k + i]; \
5325 v[i + s] = pwd->b[s * k + i]; \
5326 } \
5327 for (i = 0; i < s; i++) { \
5328 pwd->b[s * k + i] = v[i + n]; \
5329 } \
5330 } while (0)
5331
5332 static inline void msa_sld_df(uint32_t df, wr_t *pwd,
5333 wr_t *pws, target_ulong rt)
5334 {
5335 uint32_t n = rt % DF_ELEMENTS(df);
5336 uint8_t v[64];
5337 uint32_t i, k;
5338
5339 switch (df) {
5340 case DF_BYTE:
5341 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
5342 break;
5343 case DF_HALF:
5344 for (k = 0; k < 2; k++) {
5345 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
5346 }
5347 break;
5348 case DF_WORD:
5349 for (k = 0; k < 4; k++) {
5350 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
5351 }
5352 break;
5353 case DF_DOUBLE:
5354 for (k = 0; k < 8; k++) {
5355 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
5356 }
5357 break;
5358 default:
5359 assert(0);
5360 }
5361 }
5362
5363 static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5364 {
5365 int64_t q_min = DF_MIN_INT(df);
5366 int64_t q_max = DF_MAX_INT(df);
5367
5368 if (arg1 == q_min && arg2 == q_min) {
5369 return q_max;
5370 }
5371 return (arg1 * arg2) >> (DF_BITS(df) - 1);
5372 }
5373
5374 static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5375 {
5376 int64_t q_min = DF_MIN_INT(df);
5377 int64_t q_max = DF_MAX_INT(df);
5378 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5379
5380 if (arg1 == q_min && arg2 == q_min) {
5381 return q_max;
5382 }
5383 return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
5384 }
5385
5386 #define MSA_BINOP_DF(func) \
5387 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
5388 uint32_t wd, uint32_t ws, uint32_t wt) \
5389 { \
5390 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5391 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5392 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5393 \
5394 switch (df) { \
5395 case DF_BYTE: \
5396 pwd->b[0] = msa_ ## func ## _df(df, pws->b[0], pwt->b[0]); \
5397 pwd->b[1] = msa_ ## func ## _df(df, pws->b[1], pwt->b[1]); \
5398 pwd->b[2] = msa_ ## func ## _df(df, pws->b[2], pwt->b[2]); \
5399 pwd->b[3] = msa_ ## func ## _df(df, pws->b[3], pwt->b[3]); \
5400 pwd->b[4] = msa_ ## func ## _df(df, pws->b[4], pwt->b[4]); \
5401 pwd->b[5] = msa_ ## func ## _df(df, pws->b[5], pwt->b[5]); \
5402 pwd->b[6] = msa_ ## func ## _df(df, pws->b[6], pwt->b[6]); \
5403 pwd->b[7] = msa_ ## func ## _df(df, pws->b[7], pwt->b[7]); \
5404 pwd->b[8] = msa_ ## func ## _df(df, pws->b[8], pwt->b[8]); \
5405 pwd->b[9] = msa_ ## func ## _df(df, pws->b[9], pwt->b[9]); \
5406 pwd->b[10] = msa_ ## func ## _df(df, pws->b[10], pwt->b[10]); \
5407 pwd->b[11] = msa_ ## func ## _df(df, pws->b[11], pwt->b[11]); \
5408 pwd->b[12] = msa_ ## func ## _df(df, pws->b[12], pwt->b[12]); \
5409 pwd->b[13] = msa_ ## func ## _df(df, pws->b[13], pwt->b[13]); \
5410 pwd->b[14] = msa_ ## func ## _df(df, pws->b[14], pwt->b[14]); \
5411 pwd->b[15] = msa_ ## func ## _df(df, pws->b[15], pwt->b[15]); \
5412 break; \
5413 case DF_HALF: \
5414 pwd->h[0] = msa_ ## func ## _df(df, pws->h[0], pwt->h[0]); \
5415 pwd->h[1] = msa_ ## func ## _df(df, pws->h[1], pwt->h[1]); \
5416 pwd->h[2] = msa_ ## func ## _df(df, pws->h[2], pwt->h[2]); \
5417 pwd->h[3] = msa_ ## func ## _df(df, pws->h[3], pwt->h[3]); \
5418 pwd->h[4] = msa_ ## func ## _df(df, pws->h[4], pwt->h[4]); \
5419 pwd->h[5] = msa_ ## func ## _df(df, pws->h[5], pwt->h[5]); \
5420 pwd->h[6] = msa_ ## func ## _df(df, pws->h[6], pwt->h[6]); \
5421 pwd->h[7] = msa_ ## func ## _df(df, pws->h[7], pwt->h[7]); \
5422 break; \
5423 case DF_WORD: \
5424 pwd->w[0] = msa_ ## func ## _df(df, pws->w[0], pwt->w[0]); \
5425 pwd->w[1] = msa_ ## func ## _df(df, pws->w[1], pwt->w[1]); \
5426 pwd->w[2] = msa_ ## func ## _df(df, pws->w[2], pwt->w[2]); \
5427 pwd->w[3] = msa_ ## func ## _df(df, pws->w[3], pwt->w[3]); \
5428 break; \
5429 case DF_DOUBLE: \
5430 pwd->d[0] = msa_ ## func ## _df(df, pws->d[0], pwt->d[0]); \
5431 pwd->d[1] = msa_ ## func ## _df(df, pws->d[1], pwt->d[1]); \
5432 break; \
5433 default: \
5434 assert(0); \
5435 } \
5436 }
5437
5438 MSA_BINOP_DF(subv)
5439 MSA_BINOP_DF(subsuu_s)
5440 MSA_BINOP_DF(mulv)
5441
5442 MSA_BINOP_DF(mul_q)
5443 MSA_BINOP_DF(mulr_q)
5444 #undef MSA_BINOP_DF
5445
5446 void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5447 uint32_t ws, uint32_t rt)
5448 {
5449 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5450 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5451
5452 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
5453 }
5454
5455 static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
5456 int64_t arg2)
5457 {
5458 int64_t q_prod, q_ret;
5459
5460 int64_t q_max = DF_MAX_INT(df);
5461 int64_t q_min = DF_MIN_INT(df);
5462
5463 q_prod = arg1 * arg2;
5464 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
5465
5466 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5467 }
5468
5469 static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
5470 int64_t arg2)
5471 {
5472 int64_t q_prod, q_ret;
5473
5474 int64_t q_max = DF_MAX_INT(df);
5475 int64_t q_min = DF_MIN_INT(df);
5476
5477 q_prod = arg1 * arg2;
5478 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
5479
5480 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5481 }
5482
5483 static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5484 int64_t arg2)
5485 {
5486 int64_t q_prod, q_ret;
5487
5488 int64_t q_max = DF_MAX_INT(df);
5489 int64_t q_min = DF_MIN_INT(df);
5490 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5491
5492 q_prod = arg1 * arg2;
5493 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
5494
5495 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5496 }
5497
5498 static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5499 int64_t arg2)
5500 {
5501 int64_t q_prod, q_ret;
5502
5503 int64_t q_max = DF_MAX_INT(df);
5504 int64_t q_min = DF_MIN_INT(df);
5505 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5506
5507 q_prod = arg1 * arg2;
5508 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
5509
5510 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5511 }
5512
5513 #define MSA_TEROP_DF(func) \
5514 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5515 uint32_t ws, uint32_t wt) \
5516 { \
5517 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5518 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5519 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5520 \
5521 switch (df) { \
5522 case DF_BYTE: \
5523 pwd->b[0] = msa_ ## func ## _df(df, pwd->b[0], pws->b[0], \
5524 pwt->b[0]); \
5525 pwd->b[1] = msa_ ## func ## _df(df, pwd->b[1], pws->b[1], \
5526 pwt->b[1]); \
5527 pwd->b[2] = msa_ ## func ## _df(df, pwd->b[2], pws->b[2], \
5528 pwt->b[2]); \
5529 pwd->b[3] = msa_ ## func ## _df(df, pwd->b[3], pws->b[3], \
5530 pwt->b[3]); \
5531 pwd->b[4] = msa_ ## func ## _df(df, pwd->b[4], pws->b[4], \
5532 pwt->b[4]); \
5533 pwd->b[5] = msa_ ## func ## _df(df, pwd->b[5], pws->b[5], \
5534 pwt->b[5]); \
5535 pwd->b[6] = msa_ ## func ## _df(df, pwd->b[6], pws->b[6], \
5536 pwt->b[6]); \
5537 pwd->b[7] = msa_ ## func ## _df(df, pwd->b[7], pws->b[7], \
5538 pwt->b[7]); \
5539 pwd->b[8] = msa_ ## func ## _df(df, pwd->b[8], pws->b[8], \
5540 pwt->b[8]); \
5541 pwd->b[9] = msa_ ## func ## _df(df, pwd->b[9], pws->b[9], \
5542 pwt->b[9]); \
5543 pwd->b[10] = msa_ ## func ## _df(df, pwd->b[10], pws->b[10], \
5544 pwt->b[10]); \
5545 pwd->b[11] = msa_ ## func ## _df(df, pwd->b[11], pws->b[11], \
5546 pwt->b[11]); \
5547 pwd->b[12] = msa_ ## func ## _df(df, pwd->b[12], pws->b[12], \
5548 pwt->b[12]); \
5549 pwd->b[13] = msa_ ## func ## _df(df, pwd->b[13], pws->b[13], \
5550 pwt->b[13]); \
5551 pwd->b[14] = msa_ ## func ## _df(df, pwd->b[14], pws->b[14], \
5552 pwt->b[14]); \
5553 pwd->b[15] = msa_ ## func ## _df(df, pwd->b[15], pws->b[15], \
5554 pwt->b[15]); \
5555 break; \
5556 case DF_HALF: \
5557 pwd->h[0] = msa_ ## func ## _df(df, pwd->h[0], pws->h[0], pwt->h[0]); \
5558 pwd->h[1] = msa_ ## func ## _df(df, pwd->h[1], pws->h[1], pwt->h[1]); \
5559 pwd->h[2] = msa_ ## func ## _df(df, pwd->h[2], pws->h[2], pwt->h[2]); \
5560 pwd->h[3] = msa_ ## func ## _df(df, pwd->h[3], pws->h[3], pwt->h[3]); \
5561 pwd->h[4] = msa_ ## func ## _df(df, pwd->h[4], pws->h[4], pwt->h[4]); \
5562 pwd->h[5] = msa_ ## func ## _df(df, pwd->h[5], pws->h[5], pwt->h[5]); \
5563 pwd->h[6] = msa_ ## func ## _df(df, pwd->h[6], pws->h[6], pwt->h[6]); \
5564 pwd->h[7] = msa_ ## func ## _df(df, pwd->h[7], pws->h[7], pwt->h[7]); \
5565 break; \
5566 case DF_WORD: \
5567 pwd->w[0] = msa_ ## func ## _df(df, pwd->w[0], pws->w[0], pwt->w[0]); \
5568 pwd->w[1] = msa_ ## func ## _df(df, pwd->w[1], pws->w[1], pwt->w[1]); \
5569 pwd->w[2] = msa_ ## func ## _df(df, pwd->w[2], pws->w[2], pwt->w[2]); \
5570 pwd->w[3] = msa_ ## func ## _df(df, pwd->w[3], pws->w[3], pwt->w[3]); \
5571 break; \
5572 case DF_DOUBLE: \
5573 pwd->d[0] = msa_ ## func ## _df(df, pwd->d[0], pws->d[0], pwt->d[0]); \
5574 pwd->d[1] = msa_ ## func ## _df(df, pwd->d[1], pws->d[1], pwt->d[1]); \
5575 break; \
5576 default: \
5577 assert(0); \
5578 } \
5579 }
5580
5581 MSA_TEROP_DF(binsl)
5582 MSA_TEROP_DF(binsr)
5583 MSA_TEROP_DF(madd_q)
5584 MSA_TEROP_DF(msub_q)
5585 MSA_TEROP_DF(maddr_q)
5586 MSA_TEROP_DF(msubr_q)
5587 #undef MSA_TEROP_DF
5588
5589 static inline void msa_splat_df(uint32_t df, wr_t *pwd,
5590 wr_t *pws, target_ulong rt)
5591 {
5592 uint32_t n = rt % DF_ELEMENTS(df);
5593 uint32_t i;
5594
5595 switch (df) {
5596 case DF_BYTE:
5597 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5598 pwd->b[i] = pws->b[n];
5599 }
5600 break;
5601 case DF_HALF:
5602 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5603 pwd->h[i] = pws->h[n];
5604 }
5605 break;
5606 case DF_WORD:
5607 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5608 pwd->w[i] = pws->w[n];
5609 }
5610 break;
5611 case DF_DOUBLE:
5612 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5613 pwd->d[i] = pws->d[n];
5614 }
5615 break;
5616 default:
5617 assert(0);
5618 }
5619 }
5620
5621 void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5622 uint32_t ws, uint32_t rt)
5623 {
5624 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5625 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5626
5627 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
5628 }
5629
5630 #define MSA_DO_B MSA_DO(b)
5631 #define MSA_DO_H MSA_DO(h)
5632 #define MSA_DO_W MSA_DO(w)
5633 #define MSA_DO_D MSA_DO(d)
5634
5635 #define MSA_LOOP_B MSA_LOOP(B)
5636 #define MSA_LOOP_H MSA_LOOP(H)
5637 #define MSA_LOOP_W MSA_LOOP(W)
5638 #define MSA_LOOP_D MSA_LOOP(D)
5639
5640 #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
5641 #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
5642 #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
5643 #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
5644
5645 #define MSA_LOOP(DF) \
5646 do { \
5647 for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
5648 MSA_DO_ ## DF; \
5649 } \
5650 } while (0)
5651
5652 #define MSA_FN_DF(FUNC) \
5653 void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5654 uint32_t ws, uint32_t wt) \
5655 { \
5656 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5657 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5658 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5659 wr_t wx, *pwx = &wx; \
5660 uint32_t i; \
5661 switch (df) { \
5662 case DF_BYTE: \
5663 MSA_LOOP_B; \
5664 break; \
5665 case DF_HALF: \
5666 MSA_LOOP_H; \
5667 break; \
5668 case DF_WORD: \
5669 MSA_LOOP_W; \
5670 break; \
5671 case DF_DOUBLE: \
5672 MSA_LOOP_D; \
5673 break; \
5674 default: \
5675 assert(0); \
5676 } \
5677 msa_move_v(pwd, pwx); \
5678 }
5679
5680 #define MSA_LOOP_COND(DF) \
5681 (DF_ELEMENTS(DF) / 2)
5682
5683 #define Rb(pwr, i) (pwr->b[i])
5684 #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
5685 #define Rh(pwr, i) (pwr->h[i])
5686 #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
5687 #define Rw(pwr, i) (pwr->w[i])
5688 #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
5689 #define Rd(pwr, i) (pwr->d[i])
5690 #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
5691
5692 #undef MSA_LOOP_COND
5693
5694 #define MSA_LOOP_COND(DF) \
5695 (DF_ELEMENTS(DF))
5696
5697 #define MSA_DO(DF) \
5698 do { \
5699 uint32_t n = DF_ELEMENTS(df); \
5700 uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \
5701 pwx->DF[i] = \
5702 (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \
5703 } while (0)
5704 MSA_FN_DF(vshf_df)
5705 #undef MSA_DO
5706 #undef MSA_LOOP_COND
5707 #undef MSA_FN_DF
5708
5709
5710 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5711 uint32_t ws, uint32_t n)
5712 {
5713 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5714 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5715
5716 msa_sld_df(df, pwd, pws, n);
5717 }
5718
5719 void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5720 uint32_t ws, uint32_t n)
5721 {
5722 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5723 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5724
5725 msa_splat_df(df, pwd, pws, n);
5726 }
5727
5728 void helper_msa_copy_s_b(CPUMIPSState *env, uint32_t rd,
5729 uint32_t ws, uint32_t n)
5730 {
5731 n %= 16;
5732 #if defined(HOST_WORDS_BIGENDIAN)
5733 if (n < 8) {
5734 n = 8 - n - 1;
5735 } else {
5736 n = 24 - n - 1;
5737 }
5738 #endif
5739 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
5740 }
5741
5742 void helper_msa_copy_s_h(CPUMIPSState *env, uint32_t rd,
5743 uint32_t ws, uint32_t n)
5744 {
5745 n %= 8;
5746 #if defined(HOST_WORDS_BIGENDIAN)
5747 if (n < 4) {
5748 n = 4 - n - 1;
5749 } else {
5750 n = 12 - n - 1;
5751 }
5752 #endif
5753 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
5754 }
5755
5756 void helper_msa_copy_s_w(CPUMIPSState *env, uint32_t rd,
5757 uint32_t ws, uint32_t n)
5758 {
5759 n %= 4;
5760 #if defined(HOST_WORDS_BIGENDIAN)
5761 if (n < 2) {
5762 n = 2 - n - 1;
5763 } else {
5764 n = 6 - n - 1;
5765 }
5766 #endif
5767 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
5768 }
5769
5770 void helper_msa_copy_s_d(CPUMIPSState *env, uint32_t rd,
5771 uint32_t ws, uint32_t n)
5772 {
5773 n %= 2;
5774 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
5775 }
5776
5777 void helper_msa_copy_u_b(CPUMIPSState *env, uint32_t rd,
5778 uint32_t ws, uint32_t n)
5779 {
5780 n %= 16;
5781 #if defined(HOST_WORDS_BIGENDIAN)
5782 if (n < 8) {
5783 n = 8 - n - 1;
5784 } else {
5785 n = 24 - n - 1;
5786 }
5787 #endif
5788 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
5789 }
5790
5791 void helper_msa_copy_u_h(CPUMIPSState *env, uint32_t rd,
5792 uint32_t ws, uint32_t n)
5793 {
5794 n %= 8;
5795 #if defined(HOST_WORDS_BIGENDIAN)
5796 if (n < 4) {
5797 n = 4 - n - 1;
5798 } else {
5799 n = 12 - n - 1;
5800 }
5801 #endif
5802 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
5803 }
5804
5805 void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
5806 uint32_t ws, uint32_t n)
5807 {
5808 n %= 4;
5809 #if defined(HOST_WORDS_BIGENDIAN)
5810 if (n < 2) {
5811 n = 2 - n - 1;
5812 } else {
5813 n = 6 - n - 1;
5814 }
5815 #endif
5816 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
5817 }
5818
5819 void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
5820 uint32_t rs_num, uint32_t n)
5821 {
5822 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5823 target_ulong rs = env->active_tc.gpr[rs_num];
5824 n %= 16;
5825 #if defined(HOST_WORDS_BIGENDIAN)
5826 if (n < 8) {
5827 n = 8 - n - 1;
5828 } else {
5829 n = 24 - n - 1;
5830 }
5831 #endif
5832 pwd->b[n] = (int8_t)rs;
5833 }
5834
5835 void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
5836 uint32_t rs_num, uint32_t n)
5837 {
5838 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5839 target_ulong rs = env->active_tc.gpr[rs_num];
5840 n %= 8;
5841 #if defined(HOST_WORDS_BIGENDIAN)
5842 if (n < 4) {
5843 n = 4 - n - 1;
5844 } else {
5845 n = 12 - n - 1;
5846 }
5847 #endif
5848 pwd->h[n] = (int16_t)rs;
5849 }
5850
5851 void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
5852 uint32_t rs_num, uint32_t n)
5853 {
5854 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5855 target_ulong rs = env->active_tc.gpr[rs_num];
5856 n %= 4;
5857 #if defined(HOST_WORDS_BIGENDIAN)
5858 if (n < 2) {
5859 n = 2 - n - 1;
5860 } else {
5861 n = 6 - n - 1;
5862 }
5863 #endif
5864 pwd->w[n] = (int32_t)rs;
5865 }
5866
5867 void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
5868 uint32_t rs_num, uint32_t n)
5869 {
5870 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5871 target_ulong rs = env->active_tc.gpr[rs_num];
5872 n %= 2;
5873 pwd->d[n] = (int64_t)rs;
5874 }
5875
5876 void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5877 uint32_t ws, uint32_t n)
5878 {
5879 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5880 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5881
5882 switch (df) {
5883 case DF_BYTE:
5884 pwd->b[n] = (int8_t)pws->b[0];
5885 break;
5886 case DF_HALF:
5887 pwd->h[n] = (int16_t)pws->h[0];
5888 break;
5889 case DF_WORD:
5890 pwd->w[n] = (int32_t)pws->w[0];
5891 break;
5892 case DF_DOUBLE:
5893 pwd->d[n] = (int64_t)pws->d[0];
5894 break;
5895 default:
5896 assert(0);
5897 }
5898 }
5899
5900 void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
5901 {
5902 switch (cd) {
5903 case 0:
5904 break;
5905 case 1:
5906 env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
5907 restore_msa_fp_status(env);
5908 /* check exception */
5909 if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
5910 & GET_FP_CAUSE(env->active_tc.msacsr)) {
5911 do_raise_exception(env, EXCP_MSAFPE, GETPC());
5912 }
5913 break;
5914 }
5915 }
5916
5917 target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
5918 {
5919 switch (cs) {
5920 case 0:
5921 return env->msair;
5922 case 1:
5923 return env->active_tc.msacsr & MSACSR_MASK;
5924 }
5925 return 0;
5926 }
5927
5928 void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5929 uint32_t rs)
5930 {
5931 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5932 uint32_t i;
5933
5934 switch (df) {
5935 case DF_BYTE:
5936 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5937 pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
5938 }
5939 break;
5940 case DF_HALF:
5941 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5942 pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
5943 }
5944 break;
5945 case DF_WORD:
5946 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5947 pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
5948 }
5949 break;
5950 case DF_DOUBLE:
5951 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5952 pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
5953 }
5954 break;
5955 default:
5956 assert(0);
5957 }
5958 }
5959
5960
5961 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
5962 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
5963
5964 #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
5965 /* 0x7c20 */
5966 #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
5967 /* 0x7f800020 */
5968 #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
5969 /* 0x7ff0000000000020 */
5970
5971 static inline void clear_msacsr_cause(CPUMIPSState *env)
5972 {
5973 SET_FP_CAUSE(env->active_tc.msacsr, 0);
5974 }
5975
5976 static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
5977 {
5978 if ((GET_FP_CAUSE(env->active_tc.msacsr) &
5979 (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
5980 UPDATE_FP_FLAGS(env->active_tc.msacsr,
5981 GET_FP_CAUSE(env->active_tc.msacsr));
5982 } else {
5983 do_raise_exception(env, EXCP_MSAFPE, retaddr);
5984 }
5985 }
5986
5987 /* Flush-to-zero use cases for update_msacsr() */
5988 #define CLEAR_FS_UNDERFLOW 1
5989 #define CLEAR_IS_INEXACT 2
5990 #define RECIPROCAL_INEXACT 4
5991
5992
5993 static inline int ieee_to_mips_xcpt_msa(int ieee_xcpt)
5994 {
5995 int mips_xcpt = 0;
5996
5997 if (ieee_xcpt & float_flag_invalid) {
5998 mips_xcpt |= FP_INVALID;
5999 }
6000 if (ieee_xcpt & float_flag_overflow) {
6001 mips_xcpt |= FP_OVERFLOW;
6002 }
6003 if (ieee_xcpt & float_flag_underflow) {
6004 mips_xcpt |= FP_UNDERFLOW;
6005 }
6006 if (ieee_xcpt & float_flag_divbyzero) {
6007 mips_xcpt |= FP_DIV0;
6008 }
6009 if (ieee_xcpt & float_flag_inexact) {
6010 mips_xcpt |= FP_INEXACT;
6011 }
6012
6013 return mips_xcpt;
6014 }
6015
6016 static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
6017 {
6018 int ieee_exception_flags;
6019 int mips_exception_flags = 0;
6020 int cause;
6021 int enable;
6022
6023 ieee_exception_flags = get_float_exception_flags(
6024 &env->active_tc.msa_fp_status);
6025
6026 /* QEMU softfloat does not signal all underflow cases */
6027 if (denormal) {
6028 ieee_exception_flags |= float_flag_underflow;
6029 }
6030 if (ieee_exception_flags) {
6031 mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags);
6032 }
6033 enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6034
6035 /* Set Inexact (I) when flushing inputs to zero */
6036 if ((ieee_exception_flags & float_flag_input_denormal) &&
6037 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6038 if (action & CLEAR_IS_INEXACT) {
6039 mips_exception_flags &= ~FP_INEXACT;
6040 } else {
6041 mips_exception_flags |= FP_INEXACT;
6042 }
6043 }
6044
6045 /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
6046 if ((ieee_exception_flags & float_flag_output_denormal) &&
6047 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6048 mips_exception_flags |= FP_INEXACT;
6049 if (action & CLEAR_FS_UNDERFLOW) {
6050 mips_exception_flags &= ~FP_UNDERFLOW;
6051 } else {
6052 mips_exception_flags |= FP_UNDERFLOW;
6053 }
6054 }
6055
6056 /* Set Inexact (I) when Overflow (O) is not enabled */
6057 if ((mips_exception_flags & FP_OVERFLOW) != 0 &&
6058 (enable & FP_OVERFLOW) == 0) {
6059 mips_exception_flags |= FP_INEXACT;
6060 }
6061
6062 /* Clear Exact Underflow when Underflow (U) is not enabled */
6063 if ((mips_exception_flags & FP_UNDERFLOW) != 0 &&
6064 (enable & FP_UNDERFLOW) == 0 &&
6065 (mips_exception_flags & FP_INEXACT) == 0) {
6066 mips_exception_flags &= ~FP_UNDERFLOW;
6067 }
6068
6069 /*
6070 * Reciprocal operations set only Inexact when valid and not
6071 * divide by zero
6072 */
6073 if ((action & RECIPROCAL_INEXACT) &&
6074 (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) {
6075 mips_exception_flags = FP_INEXACT;
6076 }
6077
6078 cause = mips_exception_flags & enable; /* all current enabled exceptions */
6079
6080 if (cause == 0) {
6081 /*
6082 * No enabled exception, update the MSACSR Cause
6083 * with all current exceptions
6084 */
6085 SET_FP_CAUSE(env->active_tc.msacsr,
6086 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6087 } else {
6088 /* Current exceptions are enabled */
6089 if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
6090 /*
6091 * Exception(s) will trap, update MSACSR Cause
6092 * with all enabled exceptions
6093 */
6094 SET_FP_CAUSE(env->active_tc.msacsr,
6095 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6096 }
6097 }
6098
6099 return mips_exception_flags;
6100 }
6101
6102 static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
6103 {
6104 int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6105 return c & enable;
6106 }
6107
6108 static inline float16 float16_from_float32(int32_t a, bool ieee,
6109 float_status *status)
6110 {
6111 float16 f_val;
6112
6113 f_val = float32_to_float16((float32)a, ieee, status);
6114
6115 return a < 0 ? (f_val | (1 << 15)) : f_val;
6116 }
6117
6118 static inline float32 float32_from_float64(int64_t a, float_status *status)
6119 {
6120 float32 f_val;
6121
6122 f_val = float64_to_float32((float64)a, status);
6123
6124 return a < 0 ? (f_val | (1 << 31)) : f_val;
6125 }
6126
6127 static inline float32 float32_from_float16(int16_t a, bool ieee,
6128 float_status *status)
6129 {
6130 float32 f_val;
6131
6132 f_val = float16_to_float32((float16)a, ieee, status);
6133
6134 return a < 0 ? (f_val | (1 << 31)) : f_val;
6135 }
6136
6137 static inline float64 float64_from_float32(int32_t a, float_status *status)
6138 {
6139 float64 f_val;
6140
6141 f_val = float32_to_float64((float64)a, status);
6142
6143 return a < 0 ? (f_val | (1ULL << 63)) : f_val;
6144 }
6145
6146 static inline float32 float32_from_q16(int16_t a, float_status *status)
6147 {
6148 float32 f_val;
6149
6150 /* conversion as integer and scaling */
6151 f_val = int32_to_float32(a, status);
6152 f_val = float32_scalbn(f_val, -15, status);
6153
6154 return f_val;
6155 }
6156
6157 static inline float64 float64_from_q32(int32_t a, float_status *status)
6158 {
6159 float64 f_val;
6160
6161 /* conversion as integer and scaling */
6162 f_val = int32_to_float64(a, status);
6163 f_val = float64_scalbn(f_val, -31, status);
6164
6165 return f_val;
6166 }
6167
6168 static inline int16_t float32_to_q16(float32 a, float_status *status)
6169 {
6170 int32_t q_val;
6171 int32_t q_min = 0xffff8000;
6172 int32_t q_max = 0x00007fff;
6173
6174 int ieee_ex;
6175
6176 if (float32_is_any_nan(a)) {
6177 float_raise(float_flag_invalid, status);
6178 return 0;
6179 }
6180
6181 /* scaling */
6182 a = float32_scalbn(a, 15, status);
6183
6184 ieee_ex = get_float_exception_flags(status);
6185 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6186 , status);
6187
6188 if (ieee_ex & float_flag_overflow) {
6189 float_raise(float_flag_inexact, status);
6190 return (int32_t)a < 0 ? q_min : q_max;
6191 }
6192
6193 /* conversion to int */
6194 q_val = float32_to_int32(a, status);
6195
6196 ieee_ex = get_float_exception_flags(status);
6197 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6198 , status);
6199
6200 if (ieee_ex & float_flag_invalid) {
6201 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6202 , status);
6203 float_raise(float_flag_overflow | float_flag_inexact, status);
6204 return (int32_t)a < 0 ? q_min : q_max;
6205 }
6206
6207 if (q_val < q_min) {
6208 float_raise(float_flag_overflow | float_flag_inexact, status);
6209 return (int16_t)q_min;
6210 }
6211
6212 if (q_max < q_val) {
6213 float_raise(float_flag_overflow | float_flag_inexact, status);
6214 return (int16_t)q_max;
6215 }
6216
6217 return (int16_t)q_val;
6218 }
6219
6220 static inline int32_t float64_to_q32(float64 a, float_status *status)
6221 {
6222 int64_t q_val;
6223 int64_t q_min = 0xffffffff80000000LL;
6224 int64_t q_max = 0x000000007fffffffLL;
6225
6226 int ieee_ex;
6227
6228 if (float64_is_any_nan(a)) {
6229 float_raise(float_flag_invalid, status);
6230 return 0;
6231 }
6232
6233 /* scaling */
6234 a = float64_scalbn(a, 31, status);
6235
6236 ieee_ex = get_float_exception_flags(status);
6237 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6238 , status);
6239
6240 if (ieee_ex & float_flag_overflow) {
6241 float_raise(float_flag_inexact, status);
6242 return (int64_t)a < 0 ? q_min : q_max;
6243 }
6244
6245 /* conversion to integer */
6246 q_val = float64_to_int64(a, status);
6247
6248 ieee_ex = get_float_exception_flags(status);
6249 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6250 , status);
6251
6252 if (ieee_ex & float_flag_invalid) {
6253 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6254 , status);
6255 float_raise(float_flag_overflow | float_flag_inexact, status);
6256 return (int64_t)a < 0 ? q_min : q_max;
6257 }
6258
6259 if (q_val < q_min) {
6260 float_raise(float_flag_overflow | float_flag_inexact, status);
6261 return (int32_t)q_min;
6262 }
6263
6264 if (q_max < q_val) {
6265 float_raise(float_flag_overflow | float_flag_inexact, status);
6266 return (int32_t)q_max;
6267 }
6268
6269 return (int32_t)q_val;
6270 }
6271
6272 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
6273 do { \
6274 float_status *status = &env->active_tc.msa_fp_status; \
6275 int c; \
6276 int64_t cond; \
6277 set_float_exception_flags(0, status); \
6278 if (!QUIET) { \
6279 cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6280 } else { \
6281 cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
6282 } \
6283 DEST = cond ? M_MAX_UINT(BITS) : 0; \
6284 c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
6285 \
6286 if (get_enabled_exceptions(env, c)) { \
6287 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6288 } \
6289 } while (0)
6290
6291 #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \
6292 do { \
6293 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6294 if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \
6295 DEST = 0; \
6296 } \
6297 } while (0)
6298
6299 #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \
6300 do { \
6301 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6302 if (DEST == 0) { \
6303 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6304 } \
6305 } while (0)
6306
6307 #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \
6308 do { \
6309 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6310 if (DEST == 0) { \
6311 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6312 } \
6313 } while (0)
6314
6315 #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \
6316 do { \
6317 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6318 if (DEST == 0) { \
6319 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6320 if (DEST == 0) { \
6321 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6322 } \
6323 } \
6324 } while (0)
6325
6326 #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \
6327 do { \
6328 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6329 if (DEST == 0) { \
6330 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6331 } \
6332 } while (0)
6333
6334 #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \
6335 do { \
6336 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6337 if (DEST == 0) { \
6338 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6339 } \
6340 } while (0)
6341
6342 #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \
6343 do { \
6344 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6345 if (DEST == 0) { \
6346 MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \
6347 } \
6348 } while (0)
6349
6350 static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6351 wr_t *pwt, uint32_t df, int quiet,
6352 uintptr_t retaddr)
6353 {
6354 wr_t wx, *pwx = &wx;
6355 uint32_t i;
6356
6357 clear_msacsr_cause(env);
6358
6359 switch (df) {
6360 case DF_WORD:
6361 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6362 MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6363 }
6364 break;
6365 case DF_DOUBLE:
6366 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6367 MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6368 }
6369 break;
6370 default:
6371 assert(0);
6372 }
6373
6374 check_msacsr_cause(env, retaddr);
6375
6376 msa_move_v(pwd, pwx);
6377 }
6378
6379 static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6380 wr_t *pwt, uint32_t df, int quiet,
6381 uintptr_t retaddr)
6382 {
6383 wr_t wx, *pwx = &wx;
6384 uint32_t i;
6385
6386 clear_msacsr_cause(env);
6387
6388 switch (df) {
6389 case DF_WORD:
6390 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6391 MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
6392 quiet);
6393 }
6394 break;
6395 case DF_DOUBLE:
6396 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6397 MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
6398 quiet);
6399 }
6400 break;
6401 default:
6402 assert(0);
6403 }
6404
6405 check_msacsr_cause(env, retaddr);
6406
6407 msa_move_v(pwd, pwx);
6408 }
6409
6410 static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6411 wr_t *pwt, uint32_t df, int quiet,
6412 uintptr_t retaddr)
6413 {
6414 wr_t wx, *pwx = &wx;
6415 uint32_t i;
6416
6417 clear_msacsr_cause(env);
6418
6419 switch (df) {
6420 case DF_WORD:
6421 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6422 MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
6423 }
6424 break;
6425 case DF_DOUBLE:
6426 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6427 MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
6428 }
6429 break;
6430 default:
6431 assert(0);
6432 }
6433
6434 check_msacsr_cause(env, retaddr);
6435
6436 msa_move_v(pwd, pwx);
6437 }
6438
6439 static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6440 wr_t *pwt, uint32_t df, int quiet,
6441 uintptr_t retaddr)
6442 {
6443 wr_t wx, *pwx = &wx;
6444 uint32_t i;
6445
6446 clear_msacsr_cause(env);
6447
6448 switch (df) {
6449 case DF_WORD:
6450 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6451 MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6452 }
6453 break;
6454 case DF_DOUBLE:
6455 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6456 MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6457 }
6458 break;
6459 default:
6460 assert(0);
6461 }
6462
6463 check_msacsr_cause(env, retaddr);
6464
6465 msa_move_v(pwd, pwx);
6466 }
6467
6468 static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6469 wr_t *pwt, uint32_t df, int quiet,
6470 uintptr_t retaddr)
6471 {
6472 wr_t wx, *pwx = &wx;
6473 uint32_t i;
6474
6475 clear_msacsr_cause(env);
6476
6477 switch (df) {
6478 case DF_WORD:
6479 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6480 MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
6481 }
6482 break;
6483 case DF_DOUBLE:
6484 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6485 MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
6486 }
6487 break;
6488 default:
6489 assert(0);
6490 }
6491
6492 check_msacsr_cause(env, retaddr);
6493
6494 msa_move_v(pwd, pwx);
6495 }
6496
6497 static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6498 wr_t *pwt, uint32_t df, int quiet,
6499 uintptr_t retaddr)
6500 {
6501 wr_t wx, *pwx = &wx;
6502 uint32_t i;
6503
6504 clear_msacsr_cause(env);
6505
6506 switch (df) {
6507 case DF_WORD:
6508 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6509 MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6510 }
6511 break;
6512 case DF_DOUBLE:
6513 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6514 MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6515 }
6516 break;
6517 default:
6518 assert(0);
6519 }
6520
6521 check_msacsr_cause(env, retaddr);
6522
6523 msa_move_v(pwd, pwx);
6524 }
6525
6526 static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6527 wr_t *pwt, uint32_t df, int quiet,
6528 uintptr_t retaddr)
6529 {
6530 wr_t wx, *pwx = &wx;
6531 uint32_t i;
6532
6533 clear_msacsr_cause(env);
6534
6535 switch (df) {
6536 case DF_WORD:
6537 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6538 MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
6539 }
6540 break;
6541 case DF_DOUBLE:
6542 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6543 MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
6544 }
6545 break;
6546 default:
6547 assert(0);
6548 }
6549
6550 check_msacsr_cause(env, retaddr);
6551
6552 msa_move_v(pwd, pwx);
6553 }
6554
6555 static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6556 wr_t *pwt, uint32_t df, int quiet,
6557 uintptr_t retaddr)
6558 {
6559 wr_t wx, *pwx = &wx;
6560 uint32_t i;
6561
6562 clear_msacsr_cause(env);
6563
6564 switch (df) {
6565 case DF_WORD:
6566 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6567 MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6568 }
6569 break;
6570 case DF_DOUBLE:
6571 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6572 MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6573 }
6574 break;
6575 default:
6576 assert(0);
6577 }
6578
6579 check_msacsr_cause(env, retaddr);
6580
6581 msa_move_v(pwd, pwx);
6582 }
6583
6584 static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6585 wr_t *pwt, uint32_t df, int quiet,
6586 uintptr_t retaddr)
6587 {
6588 wr_t wx, *pwx = &wx;
6589 uint32_t i;
6590
6591 clear_msacsr_cause(env);
6592
6593 switch (df) {
6594 case DF_WORD:
6595 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6596 MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6597 }
6598 break;
6599 case DF_DOUBLE:
6600 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6601 MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6602 }
6603 break;
6604 default:
6605 assert(0);
6606 }
6607
6608 check_msacsr_cause(env, retaddr);
6609
6610 msa_move_v(pwd, pwx);
6611 }
6612
6613 static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6614 wr_t *pwt, uint32_t df, int quiet,
6615 uintptr_t retaddr)
6616 {
6617 wr_t wx, *pwx = &wx;
6618 uint32_t i;
6619
6620 clear_msacsr_cause(env);
6621
6622 switch (df) {
6623 case DF_WORD:
6624 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6625 MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6626 }
6627 break;
6628 case DF_DOUBLE:
6629 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6630 MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6631 }
6632 break;
6633 default:
6634 assert(0);
6635 }
6636
6637 check_msacsr_cause(env, retaddr);
6638
6639 msa_move_v(pwd, pwx);
6640 }
6641
6642 static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6643 wr_t *pwt, uint32_t df, int quiet,
6644 uintptr_t retaddr)
6645 {
6646 wr_t wx, *pwx = &wx;
6647 uint32_t i;
6648
6649 clear_msacsr_cause(env);
6650
6651 switch (df) {
6652 case DF_WORD:
6653 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6654 MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6655 }
6656 break;
6657 case DF_DOUBLE:
6658 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6659 MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6660 }
6661 break;
6662 default:
6663 assert(0);
6664 }
6665
6666 check_msacsr_cause(env, retaddr);
6667
6668 msa_move_v(pwd, pwx);
6669 }
6670
6671 void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6672 uint32_t ws, uint32_t wt)
6673 {
6674 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6675 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6676 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6677 compare_af(env, pwd, pws, pwt, df, 1, GETPC());
6678 }
6679
6680 void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6681 uint32_t ws, uint32_t wt)
6682 {
6683 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6684 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6685 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6686 compare_un(env, pwd, pws, pwt, df, 1, GETPC());
6687 }
6688
6689 void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6690 uint32_t ws, uint32_t wt)
6691 {
6692 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6693 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6694 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6695 compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
6696 }
6697
6698 void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6699 uint32_t ws, uint32_t wt)
6700 {
6701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6704 compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
6705 }
6706
6707 void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6708 uint32_t ws, uint32_t wt)
6709 {
6710 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6711 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6712 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6713 compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
6714 }
6715
6716 void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6717 uint32_t ws, uint32_t wt)
6718 {
6719 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6720 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6721 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6722 compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
6723 }
6724
6725 void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6726 uint32_t ws, uint32_t wt)
6727 {
6728 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6729 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6730 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6731 compare_le(env, pwd, pws, pwt, df, 1, GETPC());
6732 }
6733
6734 void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6735 uint32_t ws, uint32_t wt)
6736 {
6737 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6738 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6739 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6740 compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
6741 }
6742
6743 void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6744 uint32_t ws, uint32_t wt)
6745 {
6746 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6747 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6748 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6749 compare_af(env, pwd, pws, pwt, df, 0, GETPC());
6750 }
6751
6752 void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6753 uint32_t ws, uint32_t wt)
6754 {
6755 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6756 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6757 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6758 compare_un(env, pwd, pws, pwt, df, 0, GETPC());
6759 }
6760
6761 void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6762 uint32_t ws, uint32_t wt)
6763 {
6764 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6765 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6766 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6767 compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
6768 }
6769
6770 void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6771 uint32_t ws, uint32_t wt)
6772 {
6773 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6774 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6775 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6776 compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
6777 }
6778
6779 void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6780 uint32_t ws, uint32_t wt)
6781 {
6782 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6783 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6784 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6785 compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
6786 }
6787
6788 void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6789 uint32_t ws, uint32_t wt)
6790 {
6791 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6792 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6793 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6794 compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
6795 }
6796
6797 void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6798 uint32_t ws, uint32_t wt)
6799 {
6800 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6801 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6802 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6803 compare_le(env, pwd, pws, pwt, df, 0, GETPC());
6804 }
6805
6806 void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6807 uint32_t ws, uint32_t wt)
6808 {
6809 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6810 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6811 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6812 compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
6813 }
6814
6815 void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6816 uint32_t ws, uint32_t wt)
6817 {
6818 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6819 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6820 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6821 compare_or(env, pwd, pws, pwt, df, 1, GETPC());
6822 }
6823
6824 void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6825 uint32_t ws, uint32_t wt)
6826 {
6827 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6828 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6829 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6830 compare_une(env, pwd, pws, pwt, df, 1, GETPC());
6831 }
6832
6833 void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6834 uint32_t ws, uint32_t wt)
6835 {
6836 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6837 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6838 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6839 compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
6840 }
6841
6842 void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6843 uint32_t ws, uint32_t wt)
6844 {
6845 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6846 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6847 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6848 compare_or(env, pwd, pws, pwt, df, 0, GETPC());
6849 }
6850
6851 void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6852 uint32_t ws, uint32_t wt)
6853 {
6854 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6855 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6856 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6857 compare_une(env, pwd, pws, pwt, df, 0, GETPC());
6858 }
6859
6860 void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6861 uint32_t ws, uint32_t wt)
6862 {
6863 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6864 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6865 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6866 compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
6867 }
6868
6869 #define float16_is_zero(ARG) 0
6870 #define float16_is_zero_or_denormal(ARG) 0
6871
6872 #define IS_DENORMAL(ARG, BITS) \
6873 (!float ## BITS ## _is_zero(ARG) \
6874 && float ## BITS ## _is_zero_or_denormal(ARG))
6875
6876 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
6877 do { \
6878 float_status *status = &env->active_tc.msa_fp_status; \
6879 int c; \
6880 \
6881 set_float_exception_flags(0, status); \
6882 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6883 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
6884 \
6885 if (get_enabled_exceptions(env, c)) { \
6886 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6887 } \
6888 } while (0)
6889
6890 void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6891 uint32_t ws, uint32_t wt)
6892 {
6893 wr_t wx, *pwx = &wx;
6894 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6895 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6896 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6897 uint32_t i;
6898
6899 clear_msacsr_cause(env);
6900
6901 switch (df) {
6902 case DF_WORD:
6903 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6904 MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
6905 }
6906 break;
6907 case DF_DOUBLE:
6908 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6909 MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
6910 }
6911 break;
6912 default:
6913 assert(0);
6914 }
6915
6916 check_msacsr_cause(env, GETPC());
6917 msa_move_v(pwd, pwx);
6918 }
6919
6920 void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6921 uint32_t ws, uint32_t wt)
6922 {
6923 wr_t wx, *pwx = &wx;
6924 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6925 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6926 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6927 uint32_t i;
6928
6929 clear_msacsr_cause(env);
6930
6931 switch (df) {
6932 case DF_WORD:
6933 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6934 MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
6935 }
6936 break;
6937 case DF_DOUBLE:
6938 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6939 MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
6940 }
6941 break;
6942 default:
6943 assert(0);
6944 }
6945
6946 check_msacsr_cause(env, GETPC());
6947 msa_move_v(pwd, pwx);
6948 }
6949
6950 void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6951 uint32_t ws, uint32_t wt)
6952 {
6953 wr_t wx, *pwx = &wx;
6954 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6955 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6956 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6957 uint32_t i;
6958
6959 clear_msacsr_cause(env);
6960
6961 switch (df) {
6962 case DF_WORD:
6963 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6964 MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
6965 }
6966 break;
6967 case DF_DOUBLE:
6968 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6969 MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
6970 }
6971 break;
6972 default:
6973 assert(0);
6974 }
6975
6976 check_msacsr_cause(env, GETPC());
6977
6978 msa_move_v(pwd, pwx);
6979 }
6980
6981 void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6982 uint32_t ws, uint32_t wt)
6983 {
6984 wr_t wx, *pwx = &wx;
6985 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6986 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6987 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6988 uint32_t i;
6989
6990 clear_msacsr_cause(env);
6991
6992 switch (df) {
6993 case DF_WORD:
6994 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6995 MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
6996 }
6997 break;
6998 case DF_DOUBLE:
6999 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7000 MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
7001 }
7002 break;
7003 default:
7004 assert(0);
7005 }
7006
7007 check_msacsr_cause(env, GETPC());
7008
7009 msa_move_v(pwd, pwx);
7010 }
7011
7012 #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
7013 do { \
7014 float_status *status = &env->active_tc.msa_fp_status; \
7015 int c; \
7016 \
7017 set_float_exception_flags(0, status); \
7018 DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
7019 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7020 \
7021 if (get_enabled_exceptions(env, c)) { \
7022 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7023 } \
7024 } while (0)
7025
7026 void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7027 uint32_t ws, uint32_t wt)
7028 {
7029 wr_t wx, *pwx = &wx;
7030 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7031 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7032 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7033 uint32_t i;
7034
7035 clear_msacsr_cause(env);
7036
7037 switch (df) {
7038 case DF_WORD:
7039 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7040 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7041 pws->w[i], pwt->w[i], 0, 32);
7042 }
7043 break;
7044 case DF_DOUBLE:
7045 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7046 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7047 pws->d[i], pwt->d[i], 0, 64);
7048 }
7049 break;
7050 default:
7051 assert(0);
7052 }
7053
7054 check_msacsr_cause(env, GETPC());
7055
7056 msa_move_v(pwd, pwx);
7057 }
7058
7059 void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7060 uint32_t ws, uint32_t wt)
7061 {
7062 wr_t wx, *pwx = &wx;
7063 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7064 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7065 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7066 uint32_t i;
7067
7068 clear_msacsr_cause(env);
7069
7070 switch (df) {
7071 case DF_WORD:
7072 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7073 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7074 pws->w[i], pwt->w[i],
7075 float_muladd_negate_product, 32);
7076 }
7077 break;
7078 case DF_DOUBLE:
7079 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7080 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7081 pws->d[i], pwt->d[i],
7082 float_muladd_negate_product, 64);
7083 }
7084 break;
7085 default:
7086 assert(0);
7087 }
7088
7089 check_msacsr_cause(env, GETPC());
7090
7091 msa_move_v(pwd, pwx);
7092 }
7093
7094 void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7095 uint32_t ws, uint32_t wt)
7096 {
7097 wr_t wx, *pwx = &wx;
7098 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7099 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7100 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7101 uint32_t i;
7102
7103 clear_msacsr_cause(env);
7104
7105 switch (df) {
7106 case DF_WORD:
7107 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7108 MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
7109 pwt->w[i] > 0x200 ? 0x200 :
7110 pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
7111 32);
7112 }
7113 break;
7114 case DF_DOUBLE:
7115 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7116 MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
7117 pwt->d[i] > 0x1000 ? 0x1000 :
7118 pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
7119 64);
7120 }
7121 break;
7122 default:
7123 assert(0);
7124 }
7125
7126 check_msacsr_cause(env, GETPC());
7127
7128 msa_move_v(pwd, pwx);
7129 }
7130
7131 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
7132 do { \
7133 float_status *status = &env->active_tc.msa_fp_status; \
7134 int c; \
7135 \
7136 set_float_exception_flags(0, status); \
7137 DEST = float ## BITS ## _ ## OP(ARG, status); \
7138 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7139 \
7140 if (get_enabled_exceptions(env, c)) { \
7141 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7142 } \
7143 } while (0)
7144
7145 void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7146 uint32_t ws, uint32_t wt)
7147 {
7148 wr_t wx, *pwx = &wx;
7149 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7150 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7151 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7152 uint32_t i;
7153
7154 clear_msacsr_cause(env);
7155
7156 switch (df) {
7157 case DF_WORD:
7158 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7159 /*
7160 * Half precision floats come in two formats: standard
7161 * IEEE and "ARM" format. The latter gains extra exponent
7162 * range by omitting the NaN/Inf encodings.
7163 */
7164 bool ieee = true;
7165
7166 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
7167 MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
7168 }
7169 break;
7170 case DF_DOUBLE:
7171 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7172 MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
7173 MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
7174 }
7175 break;
7176 default:
7177 assert(0);
7178 }
7179
7180 check_msacsr_cause(env, GETPC());
7181 msa_move_v(pwd, pwx);
7182 }
7183
7184 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
7185 do { \
7186 float_status *status = &env->active_tc.msa_fp_status; \
7187 int c; \
7188 \
7189 set_float_exception_flags(0, status); \
7190 DEST = float ## BITS ## _ ## OP(ARG, status); \
7191 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7192 \
7193 if (get_enabled_exceptions(env, c)) { \
7194 DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
7195 } \
7196 } while (0)
7197
7198 void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7199 uint32_t ws, uint32_t wt)
7200 {
7201 wr_t wx, *pwx = &wx;
7202 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7203 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7204 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7205 uint32_t i;
7206
7207 clear_msacsr_cause(env);
7208
7209 switch (df) {
7210 case DF_WORD:
7211 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7212 MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
7213 MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
7214 }
7215 break;
7216 case DF_DOUBLE:
7217 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7218 MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
7219 MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
7220 }
7221 break;
7222 default:
7223 assert(0);
7224 }
7225
7226 check_msacsr_cause(env, GETPC());
7227
7228 msa_move_v(pwd, pwx);
7229 }
7230
7231 #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
7232 !float ## BITS ## _is_any_nan(ARG1) \
7233 && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
7234
7235 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
7236 do { \
7237 float_status *status = &env->active_tc.msa_fp_status; \
7238 int c; \
7239 \
7240 set_float_exception_flags(0, status); \
7241 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7242 c = update_msacsr(env, 0, 0); \
7243 \
7244 if (get_enabled_exceptions(env, c)) { \
7245 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7246 } \
7247 } while (0)
7248
7249 #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
7250 do { \
7251 uint## BITS ##_t S = _S, T = _T; \
7252 uint## BITS ##_t as, at, xs, xt, xd; \
7253 if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
7254 T = S; \
7255 } \
7256 else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
7257 S = T; \
7258 } \
7259 as = float## BITS ##_abs(S); \
7260 at = float## BITS ##_abs(T); \
7261 MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \
7262 MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \
7263 MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \
7264 X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \
7265 } while (0)
7266
7267 void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7268 uint32_t ws, uint32_t wt)
7269 {
7270 float_status *status = &env->active_tc.msa_fp_status;
7271 wr_t wx, *pwx = &wx;
7272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7275
7276 clear_msacsr_cause(env);
7277
7278 if (df == DF_WORD) {
7279
7280 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7281 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32);
7282 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7283 MSA_FLOAT_MAXOP(pwx->w[0], min, pwt->w[0], pwt->w[0], 32);
7284 } else {
7285 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pwt->w[0], 32);
7286 }
7287
7288 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7289 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pws->w[1], 32);
7290 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7291 MSA_FLOAT_MAXOP(pwx->w[1], min, pwt->w[1], pwt->w[1], 32);
7292 } else {
7293 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pwt->w[1], 32);
7294 }
7295
7296 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7297 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pws->w[2], 32);
7298 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7299 MSA_FLOAT_MAXOP(pwx->w[2], min, pwt->w[2], pwt->w[2], 32);
7300 } else {
7301 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pwt->w[2], 32);
7302 }
7303
7304 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7305 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pws->w[3], 32);
7306 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7307 MSA_FLOAT_MAXOP(pwx->w[3], min, pwt->w[3], pwt->w[3], 32);
7308 } else {
7309 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pwt->w[3], 32);
7310 }
7311
7312 } else if (df == DF_DOUBLE) {
7313
7314 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7315 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pws->d[0], 64);
7316 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7317 MSA_FLOAT_MAXOP(pwx->d[0], min, pwt->d[0], pwt->d[0], 64);
7318 } else {
7319 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pwt->d[0], 64);
7320 }
7321
7322 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7323 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pws->d[1], 64);
7324 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7325 MSA_FLOAT_MAXOP(pwx->d[1], min, pwt->d[1], pwt->d[1], 64);
7326 } else {
7327 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pwt->d[1], 64);
7328 }
7329
7330 } else {
7331
7332 assert(0);
7333
7334 }
7335
7336 check_msacsr_cause(env, GETPC());
7337
7338 msa_move_v(pwd, pwx);
7339 }
7340
7341 void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7342 uint32_t ws, uint32_t wt)
7343 {
7344 float_status *status = &env->active_tc.msa_fp_status;
7345 wr_t wx, *pwx = &wx;
7346 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7347 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7348 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7349
7350 clear_msacsr_cause(env);
7351
7352 if (df == DF_WORD) {
7353 FMAXMIN_A(min, max, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7354 FMAXMIN_A(min, max, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7355 FMAXMIN_A(min, max, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7356 FMAXMIN_A(min, max, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7357 } else if (df == DF_DOUBLE) {
7358 FMAXMIN_A(min, max, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7359 FMAXMIN_A(min, max, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7360 } else {
7361 assert(0);
7362 }
7363
7364 check_msacsr_cause(env, GETPC());
7365
7366 msa_move_v(pwd, pwx);
7367 }
7368
7369 void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7370 uint32_t ws, uint32_t wt)
7371 {
7372 float_status *status = &env->active_tc.msa_fp_status;
7373 wr_t wx, *pwx = &wx;
7374 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7375 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7376 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7377
7378 clear_msacsr_cause(env);
7379
7380 if (df == DF_WORD) {
7381
7382 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7383 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pws->w[0], 32);
7384 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7385 MSA_FLOAT_MAXOP(pwx->w[0], max, pwt->w[0], pwt->w[0], 32);
7386 } else {
7387 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pwt->w[0], 32);
7388 }
7389
7390 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7391 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pws->w[1], 32);
7392 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7393 MSA_FLOAT_MAXOP(pwx->w[1], max, pwt->w[1], pwt->w[1], 32);
7394 } else {
7395 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pwt->w[1], 32);
7396 }
7397
7398 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7399 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pws->w[2], 32);
7400 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7401 MSA_FLOAT_MAXOP(pwx->w[2], max, pwt->w[2], pwt->w[2], 32);
7402 } else {
7403 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pwt->w[2], 32);
7404 }
7405
7406 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7407 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pws->w[3], 32);
7408 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7409 MSA_FLOAT_MAXOP(pwx->w[3], max, pwt->w[3], pwt->w[3], 32);
7410 } else {
7411 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pwt->w[3], 32);
7412 }
7413
7414 } else if (df == DF_DOUBLE) {
7415
7416 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7417 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pws->d[0], 64);
7418 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7419 MSA_FLOAT_MAXOP(pwx->d[0], max, pwt->d[0], pwt->d[0], 64);
7420 } else {
7421 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pwt->d[0], 64);
7422 }
7423
7424 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7425 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pws->d[1], 64);
7426 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7427 MSA_FLOAT_MAXOP(pwx->d[1], max, pwt->d[1], pwt->d[1], 64);
7428 } else {
7429 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pwt->d[1], 64);
7430 }
7431
7432 } else {
7433
7434 assert(0);
7435
7436 }
7437
7438 check_msacsr_cause(env, GETPC());
7439
7440 msa_move_v(pwd, pwx);
7441 }
7442
7443 void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7444 uint32_t ws, uint32_t wt)
7445 {
7446 float_status *status = &env->active_tc.msa_fp_status;
7447 wr_t wx, *pwx = &wx;
7448 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7449 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7450 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7451
7452 clear_msacsr_cause(env);
7453
7454 if (df == DF_WORD) {
7455 FMAXMIN_A(max, min, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7456 FMAXMIN_A(max, min, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7457 FMAXMIN_A(max, min, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7458 FMAXMIN_A(max, min, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7459 } else if (df == DF_DOUBLE) {
7460 FMAXMIN_A(max, min, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7461 FMAXMIN_A(max, min, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7462 } else {
7463 assert(0);
7464 }
7465
7466 check_msacsr_cause(env, GETPC());
7467
7468 msa_move_v(pwd, pwx);
7469 }
7470
7471 void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
7472 uint32_t wd, uint32_t ws)
7473 {
7474 float_status *status = &env->active_tc.msa_fp_status;
7475
7476 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7477 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7478 if (df == DF_WORD) {
7479 pwd->w[0] = float_class_s(pws->w[0], status);
7480 pwd->w[1] = float_class_s(pws->w[1], status);
7481 pwd->w[2] = float_class_s(pws->w[2], status);
7482 pwd->w[3] = float_class_s(pws->w[3], status);
7483 } else if (df == DF_DOUBLE) {
7484 pwd->d[0] = float_class_d(pws->d[0], status);
7485 pwd->d[1] = float_class_d(pws->d[1], status);
7486 } else {
7487 assert(0);
7488 }
7489 }
7490
7491 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
7492 do { \
7493 float_status *status = &env->active_tc.msa_fp_status; \
7494 int c; \
7495 \
7496 set_float_exception_flags(0, status); \
7497 DEST = float ## BITS ## _ ## OP(ARG, status); \
7498 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7499 \
7500 if (get_enabled_exceptions(env, c)) { \
7501 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7502 } else if (float ## BITS ## _is_any_nan(ARG)) { \
7503 DEST = 0; \
7504 } \
7505 } while (0)
7506
7507 void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7508 uint32_t ws)
7509 {
7510 wr_t wx, *pwx = &wx;
7511 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7512 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7513 uint32_t i;
7514
7515 clear_msacsr_cause(env);
7516
7517 switch (df) {
7518 case DF_WORD:
7519 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7520 MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
7521 }
7522 break;
7523 case DF_DOUBLE:
7524 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7525 MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
7526 }
7527 break;
7528 default:
7529 assert(0);
7530 }
7531
7532 check_msacsr_cause(env, GETPC());
7533
7534 msa_move_v(pwd, pwx);
7535 }
7536
7537 void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7538 uint32_t ws)
7539 {
7540 wr_t wx, *pwx = &wx;
7541 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7542 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7543 uint32_t i;
7544
7545 clear_msacsr_cause(env);
7546
7547 switch (df) {
7548 case DF_WORD:
7549 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7550 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
7551 }
7552 break;
7553 case DF_DOUBLE:
7554 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7555 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
7556 }
7557 break;
7558 default:
7559 assert(0);
7560 }
7561
7562 check_msacsr_cause(env, GETPC());
7563
7564 msa_move_v(pwd, pwx);
7565 }
7566
7567 void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7568 uint32_t ws)
7569 {
7570 wr_t wx, *pwx = &wx;
7571 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7572 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7573 uint32_t i;
7574
7575 clear_msacsr_cause(env);
7576
7577 switch (df) {
7578 case DF_WORD:
7579 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7580 MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
7581 }
7582 break;
7583 case DF_DOUBLE:
7584 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7585 MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
7586 }
7587 break;
7588 default:
7589 assert(0);
7590 }
7591
7592 check_msacsr_cause(env, GETPC());
7593
7594 msa_move_v(pwd, pwx);
7595 }
7596
7597 #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
7598 do { \
7599 float_status *status = &env->active_tc.msa_fp_status; \
7600 int c; \
7601 \
7602 set_float_exception_flags(0, status); \
7603 DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
7604 c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
7605 float ## BITS ## _is_quiet_nan(DEST, status) ? \
7606 0 : RECIPROCAL_INEXACT, \
7607 IS_DENORMAL(DEST, BITS)); \
7608 \
7609 if (get_enabled_exceptions(env, c)) { \
7610 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7611 } \
7612 } while (0)
7613
7614 void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7615 uint32_t ws)
7616 {
7617 wr_t wx, *pwx = &wx;
7618 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7619 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7620 uint32_t i;
7621
7622 clear_msacsr_cause(env);
7623
7624 switch (df) {
7625 case DF_WORD:
7626 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7627 MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
7628 &env->active_tc.msa_fp_status), 32);
7629 }
7630 break;
7631 case DF_DOUBLE:
7632 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7633 MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
7634 &env->active_tc.msa_fp_status), 64);
7635 }
7636 break;
7637 default:
7638 assert(0);
7639 }
7640
7641 check_msacsr_cause(env, GETPC());
7642
7643 msa_move_v(pwd, pwx);
7644 }
7645
7646 void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7647 uint32_t ws)
7648 {
7649 wr_t wx, *pwx = &wx;
7650 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7651 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7652 uint32_t i;
7653
7654 clear_msacsr_cause(env);
7655
7656 switch (df) {
7657 case DF_WORD:
7658 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7659 MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
7660 }
7661 break;
7662 case DF_DOUBLE:
7663 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7664 MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
7665 }
7666 break;
7667 default:
7668 assert(0);
7669 }
7670
7671 check_msacsr_cause(env, GETPC());
7672
7673 msa_move_v(pwd, pwx);
7674 }
7675
7676 void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7677 uint32_t ws)
7678 {
7679 wr_t wx, *pwx = &wx;
7680 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7681 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7682 uint32_t i;
7683
7684 clear_msacsr_cause(env);
7685
7686 switch (df) {
7687 case DF_WORD:
7688 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7689 MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
7690 }
7691 break;
7692 case DF_DOUBLE:
7693 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7694 MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
7695 }
7696 break;
7697 default:
7698 assert(0);
7699 }
7700
7701 check_msacsr_cause(env, GETPC());
7702
7703 msa_move_v(pwd, pwx);
7704 }
7705
7706 #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
7707 do { \
7708 float_status *status = &env->active_tc.msa_fp_status; \
7709 int c; \
7710 \
7711 set_float_exception_flags(0, status); \
7712 set_float_rounding_mode(float_round_down, status); \
7713 DEST = float ## BITS ## _ ## log2(ARG, status); \
7714 DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
7715 set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
7716 MSACSR_RM_MASK) >> MSACSR_RM], \
7717 status); \
7718 \
7719 set_float_exception_flags(get_float_exception_flags(status) & \
7720 (~float_flag_inexact), \
7721 status); \
7722 \
7723 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7724 \
7725 if (get_enabled_exceptions(env, c)) { \
7726 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7727 } \
7728 } while (0)
7729
7730 void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7731 uint32_t ws)
7732 {
7733 wr_t wx, *pwx = &wx;
7734 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7735 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7736 uint32_t i;
7737
7738 clear_msacsr_cause(env);
7739
7740 switch (df) {
7741 case DF_WORD:
7742 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7743 MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
7744 }
7745 break;
7746 case DF_DOUBLE:
7747 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7748 MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
7749 }
7750 break;
7751 default:
7752 assert(0);
7753 }
7754
7755 check_msacsr_cause(env, GETPC());
7756
7757 msa_move_v(pwd, pwx);
7758 }
7759
7760 void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7761 uint32_t ws)
7762 {
7763 wr_t wx, *pwx = &wx;
7764 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7765 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7766 uint32_t i;
7767
7768 clear_msacsr_cause(env);
7769
7770 switch (df) {
7771 case DF_WORD:
7772 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7773 /*
7774 * Half precision floats come in two formats: standard
7775 * IEEE and "ARM" format. The latter gains extra exponent
7776 * range by omitting the NaN/Inf encodings.
7777 */
7778 bool ieee = true;
7779
7780 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
7781 }
7782 break;
7783 case DF_DOUBLE:
7784 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7785 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
7786 }
7787 break;
7788 default:
7789 assert(0);
7790 }
7791
7792 check_msacsr_cause(env, GETPC());
7793 msa_move_v(pwd, pwx);
7794 }
7795
7796 void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7797 uint32_t ws)
7798 {
7799 wr_t wx, *pwx = &wx;
7800 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7801 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7802 uint32_t i;
7803
7804 clear_msacsr_cause(env);
7805
7806 switch (df) {
7807 case DF_WORD:
7808 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7809 /*
7810 * Half precision floats come in two formats: standard
7811 * IEEE and "ARM" format. The latter gains extra exponent
7812 * range by omitting the NaN/Inf encodings.
7813 */
7814 bool ieee = true;
7815
7816 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
7817 }
7818 break;
7819 case DF_DOUBLE:
7820 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7821 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
7822 }
7823 break;
7824 default:
7825 assert(0);
7826 }
7827
7828 check_msacsr_cause(env, GETPC());
7829 msa_move_v(pwd, pwx);
7830 }
7831
7832 void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7833 uint32_t ws)
7834 {
7835 wr_t wx, *pwx = &wx;
7836 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7837 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7838 uint32_t i;
7839
7840 switch (df) {
7841 case DF_WORD:
7842 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7843 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
7844 }
7845 break;
7846 case DF_DOUBLE:
7847 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7848 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
7849 }
7850 break;
7851 default:
7852 assert(0);
7853 }
7854
7855 msa_move_v(pwd, pwx);
7856 }
7857
7858 void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7859 uint32_t ws)
7860 {
7861 wr_t wx, *pwx = &wx;
7862 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7863 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7864 uint32_t i;
7865
7866 switch (df) {
7867 case DF_WORD:
7868 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7869 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
7870 }
7871 break;
7872 case DF_DOUBLE:
7873 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7874 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
7875 }
7876 break;
7877 default:
7878 assert(0);
7879 }
7880
7881 msa_move_v(pwd, pwx);
7882 }
7883
7884 void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7885 uint32_t ws)
7886 {
7887 wr_t wx, *pwx = &wx;
7888 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7889 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7890 uint32_t i;
7891
7892 clear_msacsr_cause(env);
7893
7894 switch (df) {
7895 case DF_WORD:
7896 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7897 MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
7898 }
7899 break;
7900 case DF_DOUBLE:
7901 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7902 MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
7903 }
7904 break;
7905 default:
7906 assert(0);
7907 }
7908
7909 check_msacsr_cause(env, GETPC());
7910
7911 msa_move_v(pwd, pwx);
7912 }
7913
7914 void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7915 uint32_t ws)
7916 {
7917 wr_t wx, *pwx = &wx;
7918 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7919 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7920 uint32_t i;
7921
7922 clear_msacsr_cause(env);
7923
7924 switch (df) {
7925 case DF_WORD:
7926 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7927 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
7928 }
7929 break;
7930 case DF_DOUBLE:
7931 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7932 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
7933 }
7934 break;
7935 default:
7936 assert(0);
7937 }
7938
7939 check_msacsr_cause(env, GETPC());
7940
7941 msa_move_v(pwd, pwx);
7942 }
7943
7944 #define float32_from_int32 int32_to_float32
7945 #define float32_from_uint32 uint32_to_float32
7946
7947 #define float64_from_int64 int64_to_float64
7948 #define float64_from_uint64 uint64_to_float64
7949
7950 void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7951 uint32_t ws)
7952 {
7953 wr_t wx, *pwx = &wx;
7954 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7955 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7956 uint32_t i;
7957
7958 clear_msacsr_cause(env);
7959
7960 switch (df) {
7961 case DF_WORD:
7962 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7963 MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
7964 }
7965 break;
7966 case DF_DOUBLE:
7967 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7968 MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
7969 }
7970 break;
7971 default:
7972 assert(0);
7973 }
7974
7975 check_msacsr_cause(env, GETPC());
7976
7977 msa_move_v(pwd, pwx);
7978 }
7979
7980 void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7981 uint32_t ws)
7982 {
7983 wr_t wx, *pwx = &wx;
7984 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7985 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7986 uint32_t i;
7987
7988 clear_msacsr_cause(env);
7989
7990 switch (df) {
7991 case DF_WORD:
7992 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7993 MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
7994 }
7995 break;
7996 case DF_DOUBLE:
7997 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7998 MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
7999 }
8000 break;
8001 default:
8002 assert(0);
8003 }
8004
8005 check_msacsr_cause(env, GETPC());
8006
8007 msa_move_v(pwd, pwx);
8008 }