target/moxie/helper.c

   1 /*
   2  *  Moxie helper routines.
   3  *
   4  *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21
  22 #include "cpu.h"
  23 #include "mmu.h"
  24 #include "exec/exec-all.h"
  25 #include "exec/cpu_ldst.h"
  26 #include "qemu/host-utils.h"
  27 #include "exec/helper-proto.h"
  28
  29 void tlb_fill(CPUState *cs, target_ulong addr, int size,
  30               MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
  31 {
  32     moxie_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
  33 }
  34
  35 void helper_raise_exception(CPUMoxieState *env, int ex)
  36 {
  37     CPUState *cs = CPU(moxie_env_get_cpu(env));
  38
  39     cs->exception_index = ex;
  40     /* Stash the exception type.  */
  41     env->sregs[2] = ex;
  42     /* Stash the address where the exception occurred.  */
  43     cpu_restore_state(cs, GETPC(), true);
  44     env->sregs[5] = env->pc;
  45     /* Jump to the exception handline routine.  */
  46     env->pc = env->sregs[1];
  47     cpu_loop_exit(cs);
  48 }
  49
  50 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  51 {
  52     if (unlikely(b == 0)) {
  53         helper_raise_exception(env, MOXIE_EX_DIV0);
  54         return 0;
  55     }
  56     if (unlikely(a == INT_MIN && b == -1)) {
  57         return INT_MIN;
  58     }
  59
  60     return (int32_t)a / (int32_t)b;
  61 }
  62
  63 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  64 {
  65     if (unlikely(b == 0)) {
  66         helper_raise_exception(env, MOXIE_EX_DIV0);
  67         return 0;
  68     }
  69     return a / b;
  70 }
  71
  72 void helper_debug(CPUMoxieState *env)
  73 {
  74     CPUState *cs = CPU(moxie_env_get_cpu(env));
  75
  76     cs->exception_index = EXCP_DEBUG;
  77     cpu_loop_exit(cs);
  78 }
  79
  80 bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
  81                         MMUAccessType access_type, int mmu_idx,
  82                         bool probe, uintptr_t retaddr)
  83 {
  84     MoxieCPU *cpu = MOXIE_CPU(cs);
  85     CPUMoxieState *env = &cpu->env;
  86     MoxieMMUResult res;
  87     int prot, miss;
  88
  89     address &= TARGET_PAGE_MASK;
  90     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
  91     miss = moxie_mmu_translate(&res, env, address, access_type, mmu_idx);
  92     if (likely(!miss)) {
  93         tlb_set_page(cs, address, res.phy, prot, mmu_idx, TARGET_PAGE_SIZE);
  94         return true;
  95     }
  96     if (probe) {
  97         return false;
  98     }
  99
 100     cs->exception_index = MOXIE_EX_MMU_MISS;
 101     cpu_loop_exit_restore(cs, retaddr);
 102 }
 103
 104 void moxie_cpu_do_interrupt(CPUState *cs)
 105 {
 106     switch (cs->exception_index) {
 107     case MOXIE_EX_BREAK:
 108         break;
 109     default:
 110         break;
 111     }
 112 }
 113
 114 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 115 {
 116     MoxieCPU *cpu = MOXIE_CPU(cs);
 117     uint32_t phy = addr;
 118     MoxieMMUResult res;
 119     int miss;
 120
 121     miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 122     if (!miss) {
 123         phy = res.phy;
 124     }
 125     return phy;
 126 }