target/ppc/insn64.decode

   1 #
   2 # Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1)
   3 #
   4 # Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
   5 #
   6 # This library is free software; you can redistribute it and/or
   7 # modify it under the terms of the GNU Lesser General Public
   8 # License as published by the Free Software Foundation; either
   9 # version 2.1 of the License, or (at your option) any later version.
  10 #
  11 # This library is distributed in the hope that it will be useful,
  12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 # Lesser General Public License for more details.
  15 #
  16 # You should have received a copy of the GNU Lesser General Public
  17 # License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 #
  19
  20 # Format MLS:D and 8LS:D
  21 &PLS_D          rt ra si:int64_t r:bool
  22 %pls_si         32:s18 0:16
  23 @PLS_D          ...... .. ... r:1 .. .................. \
  24                 ...... rt:5 ra:5 ................       \
  25                 &PLS_D si=%pls_si
  26 @8LS_D_TSX      ...... .. . .. r:1 .. .................. \
  27                 ..... rt:6 ra:5 ................         \
  28                 &PLS_D si=%pls_si
  29
  30 %rt_tsxp        21:1 22:4 !function=times_2
  31 @8LS_D_TSXP     ...... .. . .. r:1 .. .................. \
  32                 ...... ..... ra:5 ................       \
  33                 &PLS_D si=%pls_si rt=%rt_tsxp
  34
  35 # Format 8RR:D
  36 %8rr_si         32:s16 0:16
  37 %8rr_xt         16:1 21:5
  38 &8RR_D_IX       xt ix si
  39 @8RR_D_IX       ...... .. .... .. .. ................ \
  40                 ...... ..... ... ix:1 . ................ \
  41                 &8RR_D_IX si=%8rr_si xt=%8rr_xt
  42
  43 ### Fixed-Point Load Instructions
  44
  45 PLBZ            000001 10 0--.-- .................. \
  46                 100010 ..... ..... ................     @PLS_D
  47 PLHZ            000001 10 0--.-- .................. \
  48                 101000 ..... ..... ................     @PLS_D
  49 PLHA            000001 10 0--.-- .................. \
  50                 101010 ..... ..... ................     @PLS_D
  51 PLWZ            000001 10 0--.-- .................. \
  52                 100000 ..... ..... ................     @PLS_D
  53 PLWA            000001 00 0--.-- .................. \
  54                 101001 ..... ..... ................     @PLS_D
  55 PLD             000001 00 0--.-- .................. \
  56                 111001 ..... ..... ................     @PLS_D
  57 PLQ             000001 00 0--.-- .................. \
  58                 111000 ..... ..... ................     @PLS_D
  59
  60 ### Fixed-Point Store Instructions
  61
  62 PSTW            000001 10 0--.-- .................. \
  63                 100100 ..... ..... ................     @PLS_D
  64 PSTB            000001 10 0--.-- .................. \
  65                 100110 ..... ..... ................     @PLS_D
  66 PSTH            000001 10 0--.-- .................. \
  67                 101100 ..... ..... ................     @PLS_D
  68
  69 PSTD            000001 00 0--.-- .................. \
  70                 111101 ..... ..... ................     @PLS_D
  71 PSTQ            000001 00 0--.-- .................. \
  72                 111100 ..... ..... ................     @PLS_D
  73
  74 ### Fixed-Point Arithmetic Instructions
  75
  76 PADDI           000001 10 0--.-- ..................     \
  77                 001110 ..... ..... ................     @PLS_D
  78
  79 ### Float-Point Load and Store Instructions
  80
  81 PLFS            000001 10 0--.-- .................. \
  82                 110000 ..... ..... ................     @PLS_D
  83 PLFD            000001 10 0--.-- .................. \
  84                 110010 ..... ..... ................     @PLS_D
  85 PSTFS           000001 10 0--.-- .................. \
  86                 110100 ..... ..... ................     @PLS_D
  87 PSTFD           000001 10 0--.-- .................. \
  88                 110110 ..... ..... ................     @PLS_D
  89
  90 ### Prefixed No-operation Instruction
  91
  92 @PNOP           000001 11 0000-- 000000000000000000     \
  93                 ................................
  94
  95 {
  96   [
  97     ## Invalid suffixes: Branch instruction
  98     # bc[l][a]
  99     INVALID     ................................        \
 100                 010000--------------------------        @PNOP
 101     # b[l][a]
 102     INVALID     ................................        \
 103                 010010--------------------------        @PNOP
 104     # bclr[l]
 105     INVALID     ................................        \
 106                 010011---------------0000010000-        @PNOP
 107     # bcctr[l]
 108     INVALID     ................................        \
 109                 010011---------------1000010000-        @PNOP
 110     # bctar[l]
 111     INVALID     ................................        \
 112                 010011---------------1000110000-        @PNOP
 113
 114     ## Invalid suffixes: rfebb
 115     INVALID     ................................        \
 116                 010011---------------0010010010-        @PNOP
 117
 118     ## Invalid suffixes: context synchronizing other than isync
 119     # sc
 120     INVALID     ................................        \
 121                 010001------------------------1-        @PNOP
 122     # scv
 123     INVALID     ................................        \
 124                 010001------------------------01        @PNOP
 125     # rfscv
 126     INVALID     ................................        \
 127                 010011---------------0001010010-        @PNOP
 128     # rfid
 129     INVALID     ................................        \
 130                 010011---------------0000010010-        @PNOP
 131     # hrfid
 132     INVALID     ................................        \
 133                 010011---------------0100010010-        @PNOP
 134     # urfid
 135     INVALID     ................................        \
 136                 010011---------------0100110010-        @PNOP
 137     # stop
 138     INVALID     ................................        \
 139                 010011---------------0101110010-        @PNOP
 140     # mtmsr w/ L=0
 141     INVALID     ................................        \
 142                 011111---------0-----0010010010-        @PNOP
 143     # mtmsrd w/ L=0
 144     INVALID     ................................        \
 145                 011111---------0-----0010110010-        @PNOP
 146
 147     ## Invalid suffixes: Service Processor Attention
 148     INVALID     ................................        \
 149                 000000----------------100000000-        @PNOP
 150   ]
 151
 152   ## Valid suffixes
 153   PNOP          ................................        \
 154                 --------------------------------        @PNOP
 155 }
 156
 157 ### VSX instructions
 158
 159 PLXV            000001 00 0--.-- .................. \
 160                 11001 ...... ..... ................     @8LS_D_TSX
 161 PSTXV           000001 00 0--.-- .................. \
 162                 11011 ...... ..... ................     @8LS_D_TSX
 163 PLXVP           000001 00 0--.-- .................. \
 164                 111010 ..... ..... ................     @8LS_D_TSXP
 165 PSTXVP          000001 00 0--.-- .................. \
 166                 111110 ..... ..... ................     @8LS_D_TSXP
 167
 168 XXSPLTI32DX     000001 01 0000 -- -- ................ \
 169                 100000 ..... 000 .. ................    @8RR_D_IX