2 * PowerPC integer and vector emulation helpers for QEMU.
4 * Copyright (c) 2003-2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
22 #include "exec/exec-all.h"
23 #include "qemu/host-utils.h"
24 #include "exec/helper-proto.h"
25 #include "crypto/aes.h"
27 #include "helper_regs.h"
28 /*****************************************************************************/
29 /* Fixed point operations helpers */
31 target_ulong
helper_divweu(CPUPPCState
*env
, target_ulong ra
, target_ulong rb
,
37 uint64_t dividend
= (uint64_t)ra
<< 32;
38 uint64_t divisor
= (uint32_t)rb
;
40 if (unlikely(divisor
== 0)) {
43 rt
= dividend
/ divisor
;
44 overflow
= rt
> UINT32_MAX
;
47 if (unlikely(overflow
)) {
48 rt
= 0; /* Undefined */
52 if (unlikely(overflow
)) {
53 env
->so
= env
->ov
= 1;
59 return (target_ulong
)rt
;
62 target_ulong
helper_divwe(CPUPPCState
*env
, target_ulong ra
, target_ulong rb
,
68 int64_t dividend
= (int64_t)ra
<< 32;
69 int64_t divisor
= (int64_t)((int32_t)rb
);
71 if (unlikely((divisor
== 0) ||
72 ((divisor
== -1ull) && (dividend
== INT64_MIN
)))) {
75 rt
= dividend
/ divisor
;
76 overflow
= rt
!= (int32_t)rt
;
79 if (unlikely(overflow
)) {
80 rt
= 0; /* Undefined */
84 if (unlikely(overflow
)) {
85 env
->so
= env
->ov
= 1;
91 return (target_ulong
)rt
;
94 #if defined(TARGET_PPC64)
96 uint64_t helper_divdeu(CPUPPCState
*env
, uint64_t ra
, uint64_t rb
, uint32_t oe
)
101 overflow
= divu128(&rt
, &ra
, rb
);
103 if (unlikely(overflow
)) {
104 rt
= 0; /* Undefined */
108 if (unlikely(overflow
)) {
109 env
->so
= env
->ov
= 1;
118 uint64_t helper_divde(CPUPPCState
*env
, uint64_t rau
, uint64_t rbu
, uint32_t oe
)
121 int64_t ra
= (int64_t)rau
;
122 int64_t rb
= (int64_t)rbu
;
123 int overflow
= divs128(&rt
, &ra
, rb
);
125 if (unlikely(overflow
)) {
126 rt
= 0; /* Undefined */
131 if (unlikely(overflow
)) {
132 env
->so
= env
->ov
= 1;
144 #if defined(TARGET_PPC64)
145 /* if x = 0xab, returns 0xababababababababa */
146 #define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff))
148 /* substract 1 from each byte, and with inverse, check if MSB is set at each
150 * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80
151 * (0xFF & 0xFF) & 0x80 = 0x80 (zero found)
153 #define haszero(v) (((v) - pattern(0x01)) & ~(v) & pattern(0x80))
155 /* When you XOR the pattern and there is a match, that byte will be zero */
156 #define hasvalue(x, n) (haszero((x) ^ pattern(n)))
158 uint32_t helper_cmpeqb(target_ulong ra
, target_ulong rb
)
160 return hasvalue(rb
, ra
) ? 1 << CRF_GT
: 0;
167 /* Return invalid random number.
169 * FIXME: Add rng backend or other mechanism to get cryptographically suitable
172 target_ulong
helper_darn32(void)
177 target_ulong
helper_darn64(void)
184 #if defined(TARGET_PPC64)
186 uint64_t helper_bpermd(uint64_t rs
, uint64_t rb
)
191 for (i
= 0; i
< 8; i
++) {
192 int index
= (rs
>> (i
*8)) & 0xFF;
194 if (rb
& (1ull << (63-index
))) {
204 target_ulong
helper_cmpb(target_ulong rs
, target_ulong rb
)
206 target_ulong mask
= 0xff;
210 for (i
= 0; i
< sizeof(target_ulong
); i
++) {
211 if ((rs
& mask
) == (rb
& mask
)) {
219 /* shift right arithmetic helper */
220 target_ulong
helper_sraw(CPUPPCState
*env
, target_ulong value
,
225 if (likely(!(shift
& 0x20))) {
226 if (likely((uint32_t)shift
!= 0)) {
228 ret
= (int32_t)value
>> shift
;
229 if (likely(ret
>= 0 || (value
& ((1 << shift
) - 1)) == 0)) {
235 ret
= (int32_t)value
;
239 ret
= (int32_t)value
>> 31;
240 env
->ca
= (ret
!= 0);
242 return (target_long
)ret
;
245 #if defined(TARGET_PPC64)
246 target_ulong
helper_srad(CPUPPCState
*env
, target_ulong value
,
251 if (likely(!(shift
& 0x40))) {
252 if (likely((uint64_t)shift
!= 0)) {
254 ret
= (int64_t)value
>> shift
;
255 if (likely(ret
>= 0 || (value
& ((1ULL << shift
) - 1)) == 0)) {
261 ret
= (int64_t)value
;
265 ret
= (int64_t)value
>> 63;
266 env
->ca
= (ret
!= 0);
272 #if defined(TARGET_PPC64)
273 target_ulong
helper_popcntb(target_ulong val
)
275 val
= (val
& 0x5555555555555555ULL
) + ((val
>> 1) &
276 0x5555555555555555ULL
);
277 val
= (val
& 0x3333333333333333ULL
) + ((val
>> 2) &
278 0x3333333333333333ULL
);
279 val
= (val
& 0x0f0f0f0f0f0f0f0fULL
) + ((val
>> 4) &
280 0x0f0f0f0f0f0f0f0fULL
);
284 target_ulong
helper_popcntw(target_ulong val
)
286 val
= (val
& 0x5555555555555555ULL
) + ((val
>> 1) &
287 0x5555555555555555ULL
);
288 val
= (val
& 0x3333333333333333ULL
) + ((val
>> 2) &
289 0x3333333333333333ULL
);
290 val
= (val
& 0x0f0f0f0f0f0f0f0fULL
) + ((val
>> 4) &
291 0x0f0f0f0f0f0f0f0fULL
);
292 val
= (val
& 0x00ff00ff00ff00ffULL
) + ((val
>> 8) &
293 0x00ff00ff00ff00ffULL
);
294 val
= (val
& 0x0000ffff0000ffffULL
) + ((val
>> 16) &
295 0x0000ffff0000ffffULL
);
299 target_ulong
helper_popcntd(target_ulong val
)
304 target_ulong
helper_popcntb(target_ulong val
)
306 val
= (val
& 0x55555555) + ((val
>> 1) & 0x55555555);
307 val
= (val
& 0x33333333) + ((val
>> 2) & 0x33333333);
308 val
= (val
& 0x0f0f0f0f) + ((val
>> 4) & 0x0f0f0f0f);
312 target_ulong
helper_popcntw(target_ulong val
)
314 val
= (val
& 0x55555555) + ((val
>> 1) & 0x55555555);
315 val
= (val
& 0x33333333) + ((val
>> 2) & 0x33333333);
316 val
= (val
& 0x0f0f0f0f) + ((val
>> 4) & 0x0f0f0f0f);
317 val
= (val
& 0x00ff00ff) + ((val
>> 8) & 0x00ff00ff);
318 val
= (val
& 0x0000ffff) + ((val
>> 16) & 0x0000ffff);
323 /*****************************************************************************/
324 /* PowerPC 601 specific instructions (POWER bridge) */
325 target_ulong
helper_div(CPUPPCState
*env
, target_ulong arg1
, target_ulong arg2
)
327 uint64_t tmp
= (uint64_t)arg1
<< 32 | env
->spr
[SPR_MQ
];
329 if (((int32_t)tmp
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
330 (int32_t)arg2
== 0) {
331 env
->spr
[SPR_MQ
] = 0;
334 env
->spr
[SPR_MQ
] = tmp
% arg2
;
335 return tmp
/ (int32_t)arg2
;
339 target_ulong
helper_divo(CPUPPCState
*env
, target_ulong arg1
,
342 uint64_t tmp
= (uint64_t)arg1
<< 32 | env
->spr
[SPR_MQ
];
344 if (((int32_t)tmp
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
345 (int32_t)arg2
== 0) {
346 env
->so
= env
->ov
= 1;
347 env
->spr
[SPR_MQ
] = 0;
350 env
->spr
[SPR_MQ
] = tmp
% arg2
;
351 tmp
/= (int32_t)arg2
;
352 if ((int32_t)tmp
!= tmp
) {
353 env
->so
= env
->ov
= 1;
361 target_ulong
helper_divs(CPUPPCState
*env
, target_ulong arg1
,
364 if (((int32_t)arg1
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
365 (int32_t)arg2
== 0) {
366 env
->spr
[SPR_MQ
] = 0;
369 env
->spr
[SPR_MQ
] = (int32_t)arg1
% (int32_t)arg2
;
370 return (int32_t)arg1
/ (int32_t)arg2
;
374 target_ulong
helper_divso(CPUPPCState
*env
, target_ulong arg1
,
377 if (((int32_t)arg1
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
378 (int32_t)arg2
== 0) {
379 env
->so
= env
->ov
= 1;
380 env
->spr
[SPR_MQ
] = 0;
384 env
->spr
[SPR_MQ
] = (int32_t)arg1
% (int32_t)arg2
;
385 return (int32_t)arg1
/ (int32_t)arg2
;
389 /*****************************************************************************/
390 /* 602 specific instructions */
391 /* mfrom is the most crazy instruction ever seen, imho ! */
392 /* Real implementation uses a ROM table. Do the same */
393 /* Extremely decomposed:
395 * return 256 * log10(10 + 1.0) + 0.5
397 #if !defined(CONFIG_USER_ONLY)
398 target_ulong
helper_602_mfrom(target_ulong arg
)
400 if (likely(arg
< 602)) {
401 #include "mfrom_table.c"
402 return mfrom_ROM_table
[arg
];
409 /*****************************************************************************/
410 /* Altivec extension helpers */
411 #if defined(HOST_WORDS_BIGENDIAN)
414 #define AVRB(i) u8[i]
415 #define AVRW(i) u32[i]
419 #define AVRB(i) u8[15-(i)]
420 #define AVRW(i) u32[3-(i)]
423 #if defined(HOST_WORDS_BIGENDIAN)
424 #define VECTOR_FOR_INORDER_I(index, element) \
425 for (index = 0; index < ARRAY_SIZE(r->element); index++)
427 #define VECTOR_FOR_INORDER_I(index, element) \
428 for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--)
431 /* Saturating arithmetic helpers. */
432 #define SATCVT(from, to, from_type, to_type, min, max) \
433 static inline to_type cvt##from##to(from_type x, int *sat) \
437 if (x < (from_type)min) { \
440 } else if (x > (from_type)max) { \
448 #define SATCVTU(from, to, from_type, to_type, min, max) \
449 static inline to_type cvt##from##to(from_type x, int *sat) \
453 if (x > (from_type)max) { \
461 SATCVT(sh
, sb
, int16_t, int8_t, INT8_MIN
, INT8_MAX
)
462 SATCVT(sw
, sh
, int32_t, int16_t, INT16_MIN
, INT16_MAX
)
463 SATCVT(sd
, sw
, int64_t, int32_t, INT32_MIN
, INT32_MAX
)
465 SATCVTU(uh
, ub
, uint16_t, uint8_t, 0, UINT8_MAX
)
466 SATCVTU(uw
, uh
, uint32_t, uint16_t, 0, UINT16_MAX
)
467 SATCVTU(ud
, uw
, uint64_t, uint32_t, 0, UINT32_MAX
)
468 SATCVT(sh
, ub
, int16_t, uint8_t, 0, UINT8_MAX
)
469 SATCVT(sw
, uh
, int32_t, uint16_t, 0, UINT16_MAX
)
470 SATCVT(sd
, uw
, int64_t, uint32_t, 0, UINT32_MAX
)
474 void helper_lvsl(ppc_avr_t
*r
, target_ulong sh
)
476 int i
, j
= (sh
& 0xf);
478 VECTOR_FOR_INORDER_I(i
, u8
) {
483 void helper_lvsr(ppc_avr_t
*r
, target_ulong sh
)
485 int i
, j
= 0x10 - (sh
& 0xf);
487 VECTOR_FOR_INORDER_I(i
, u8
) {
492 void helper_mtvscr(CPUPPCState
*env
, ppc_avr_t
*r
)
494 #if defined(HOST_WORDS_BIGENDIAN)
495 env
->vscr
= r
->u32
[3];
497 env
->vscr
= r
->u32
[0];
499 set_flush_to_zero(vscr_nj
, &env
->vec_status
);
502 void helper_vaddcuw(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
506 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
507 r
->u32
[i
] = ~a
->u32
[i
] < b
->u32
[i
];
512 void helper_vprtybw(ppc_avr_t
*r
, ppc_avr_t
*b
)
515 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
516 uint64_t res
= b
->u32
[i
] ^ (b
->u32
[i
] >> 16);
523 void helper_vprtybd(ppc_avr_t
*r
, ppc_avr_t
*b
)
526 for (i
= 0; i
< ARRAY_SIZE(r
->u64
); i
++) {
527 uint64_t res
= b
->u64
[i
] ^ (b
->u64
[i
] >> 32);
535 void helper_vprtybq(ppc_avr_t
*r
, ppc_avr_t
*b
)
537 uint64_t res
= b
->u64
[0] ^ b
->u64
[1];
541 r
->u64
[LO_IDX
] = res
& 1;
545 #define VARITH_DO(name, op, element) \
546 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
550 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
551 r->element[i] = a->element[i] op b->element[i]; \
554 #define VARITH(suffix, element) \
555 VARITH_DO(add##suffix, +, element) \
556 VARITH_DO(sub##suffix, -, element)
561 VARITH_DO(muluwm
, *, u32
)
565 #define VARITHFP(suffix, func) \
566 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
571 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
572 r->f[i] = func(a->f[i], b->f[i], &env->vec_status); \
575 VARITHFP(addfp
, float32_add
)
576 VARITHFP(subfp
, float32_sub
)
577 VARITHFP(minfp
, float32_min
)
578 VARITHFP(maxfp
, float32_max
)
581 #define VARITHFPFMA(suffix, type) \
582 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
583 ppc_avr_t *b, ppc_avr_t *c) \
586 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
587 r->f[i] = float32_muladd(a->f[i], c->f[i], b->f[i], \
588 type, &env->vec_status); \
591 VARITHFPFMA(maddfp
, 0);
592 VARITHFPFMA(nmsubfp
, float_muladd_negate_result
| float_muladd_negate_c
);
595 #define VARITHSAT_CASE(type, op, cvt, element) \
597 type result = (type)a->element[i] op (type)b->element[i]; \
598 r->element[i] = cvt(result, &sat); \
601 #define VARITHSAT_DO(name, op, optype, cvt, element) \
602 void helper_v##name(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
608 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
609 switch (sizeof(r->element[0])) { \
611 VARITHSAT_CASE(optype, op, cvt, element); \
614 VARITHSAT_CASE(optype, op, cvt, element); \
617 VARITHSAT_CASE(optype, op, cvt, element); \
622 env->vscr |= (1 << VSCR_SAT); \
625 #define VARITHSAT_SIGNED(suffix, element, optype, cvt) \
626 VARITHSAT_DO(adds##suffix##s, +, optype, cvt, element) \
627 VARITHSAT_DO(subs##suffix##s, -, optype, cvt, element)
628 #define VARITHSAT_UNSIGNED(suffix, element, optype, cvt) \
629 VARITHSAT_DO(addu##suffix##s, +, optype, cvt, element) \
630 VARITHSAT_DO(subu##suffix##s, -, optype, cvt, element)
631 VARITHSAT_SIGNED(b
, s8
, int16_t, cvtshsb
)
632 VARITHSAT_SIGNED(h
, s16
, int32_t, cvtswsh
)
633 VARITHSAT_SIGNED(w
, s32
, int64_t, cvtsdsw
)
634 VARITHSAT_UNSIGNED(b
, u8
, uint16_t, cvtshub
)
635 VARITHSAT_UNSIGNED(h
, u16
, uint32_t, cvtswuh
)
636 VARITHSAT_UNSIGNED(w
, u32
, uint64_t, cvtsduw
)
637 #undef VARITHSAT_CASE
639 #undef VARITHSAT_SIGNED
640 #undef VARITHSAT_UNSIGNED
642 #define VAVG_DO(name, element, etype) \
643 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
647 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
648 etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \
649 r->element[i] = x >> 1; \
653 #define VAVG(type, signed_element, signed_type, unsigned_element, \
655 VAVG_DO(avgs##type, signed_element, signed_type) \
656 VAVG_DO(avgu##type, unsigned_element, unsigned_type)
657 VAVG(b
, s8
, int16_t, u8
, uint16_t)
658 VAVG(h
, s16
, int32_t, u16
, uint32_t)
659 VAVG(w
, s32
, int64_t, u32
, uint64_t)
663 #define VABSDU_DO(name, element) \
664 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
668 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
669 r->element[i] = (a->element[i] > b->element[i]) ? \
670 (a->element[i] - b->element[i]) : \
671 (b->element[i] - a->element[i]); \
675 /* VABSDU - Vector absolute difference unsigned
676 * name - instruction mnemonic suffix (b: byte, h: halfword, w: word)
677 * element - element type to access from vector
679 #define VABSDU(type, element) \
680 VABSDU_DO(absdu##type, element)
687 #define VCF(suffix, cvt, element) \
688 void helper_vcf##suffix(CPUPPCState *env, ppc_avr_t *r, \
689 ppc_avr_t *b, uint32_t uim) \
693 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
694 float32 t = cvt(b->element[i], &env->vec_status); \
695 r->f[i] = float32_scalbn(t, -uim, &env->vec_status); \
698 VCF(ux
, uint32_to_float32
, u32
)
699 VCF(sx
, int32_to_float32
, s32
)
702 #define VCMP_DO(suffix, compare, element, record) \
703 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
704 ppc_avr_t *a, ppc_avr_t *b) \
706 uint64_t ones = (uint64_t)-1; \
707 uint64_t all = ones; \
711 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
712 uint64_t result = (a->element[i] compare b->element[i] ? \
714 switch (sizeof(a->element[0])) { \
716 r->u64[i] = result; \
719 r->u32[i] = result; \
722 r->u16[i] = result; \
732 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
735 #define VCMP(suffix, compare, element) \
736 VCMP_DO(suffix, compare, element, 0) \
737 VCMP_DO(suffix##_dot, compare, element, 1)
753 #define VCMPNE_DO(suffix, element, etype, cmpzero, record) \
754 void helper_vcmpne##suffix(CPUPPCState *env, ppc_avr_t *r, \
755 ppc_avr_t *a, ppc_avr_t *b) \
757 etype ones = (etype)-1; \
759 etype result, none = 0; \
762 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
764 result = ((a->element[i] == 0) \
765 || (b->element[i] == 0) \
766 || (a->element[i] != b->element[i]) ? \
769 result = (a->element[i] != b->element[i]) ? ones : 0x0; \
771 r->element[i] = result; \
776 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
780 /* VCMPNEZ - Vector compare not equal to zero
781 * suffix - instruction mnemonic suffix (b: byte, h: halfword, w: word)
782 * element - element type to access from vector
784 #define VCMPNE(suffix, element, etype, cmpzero) \
785 VCMPNE_DO(suffix, element, etype, cmpzero, 0) \
786 VCMPNE_DO(suffix##_dot, element, etype, cmpzero, 1)
787 VCMPNE(zb
, u8
, uint8_t, 1)
788 VCMPNE(zh
, u16
, uint16_t, 1)
789 VCMPNE(zw
, u32
, uint32_t, 1)
790 VCMPNE(b
, u8
, uint8_t, 0)
791 VCMPNE(h
, u16
, uint16_t, 0)
792 VCMPNE(w
, u32
, uint32_t, 0)
796 #define VCMPFP_DO(suffix, compare, order, record) \
797 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
798 ppc_avr_t *a, ppc_avr_t *b) \
800 uint32_t ones = (uint32_t)-1; \
801 uint32_t all = ones; \
805 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
807 int rel = float32_compare_quiet(a->f[i], b->f[i], \
809 if (rel == float_relation_unordered) { \
811 } else if (rel compare order) { \
816 r->u32[i] = result; \
821 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
824 #define VCMPFP(suffix, compare, order) \
825 VCMPFP_DO(suffix, compare, order, 0) \
826 VCMPFP_DO(suffix##_dot, compare, order, 1)
827 VCMPFP(eqfp
, ==, float_relation_equal
)
828 VCMPFP(gefp
, !=, float_relation_less
)
829 VCMPFP(gtfp
, ==, float_relation_greater
)
833 static inline void vcmpbfp_internal(CPUPPCState
*env
, ppc_avr_t
*r
,
834 ppc_avr_t
*a
, ppc_avr_t
*b
, int record
)
839 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
840 int le_rel
= float32_compare_quiet(a
->f
[i
], b
->f
[i
], &env
->vec_status
);
841 if (le_rel
== float_relation_unordered
) {
842 r
->u32
[i
] = 0xc0000000;
845 float32 bneg
= float32_chs(b
->f
[i
]);
846 int ge_rel
= float32_compare_quiet(a
->f
[i
], bneg
, &env
->vec_status
);
847 int le
= le_rel
!= float_relation_greater
;
848 int ge
= ge_rel
!= float_relation_less
;
850 r
->u32
[i
] = ((!le
) << 31) | ((!ge
) << 30);
851 all_in
|= (!le
| !ge
);
855 env
->crf
[6] = (all_in
== 0) << 1;
859 void helper_vcmpbfp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
861 vcmpbfp_internal(env
, r
, a
, b
, 0);
864 void helper_vcmpbfp_dot(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
867 vcmpbfp_internal(env
, r
, a
, b
, 1);
870 #define VCT(suffix, satcvt, element) \
871 void helper_vct##suffix(CPUPPCState *env, ppc_avr_t *r, \
872 ppc_avr_t *b, uint32_t uim) \
876 float_status s = env->vec_status; \
878 set_float_rounding_mode(float_round_to_zero, &s); \
879 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
880 if (float32_is_any_nan(b->f[i])) { \
883 float64 t = float32_to_float64(b->f[i], &s); \
886 t = float64_scalbn(t, uim, &s); \
887 j = float64_to_int64(t, &s); \
888 r->element[i] = satcvt(j, &sat); \
892 env->vscr |= (1 << VSCR_SAT); \
895 VCT(uxs
, cvtsduw
, u32
)
896 VCT(sxs
, cvtsdsw
, s32
)
899 target_ulong
helper_vclzlsbb(ppc_avr_t
*r
)
901 target_ulong count
= 0;
903 VECTOR_FOR_INORDER_I(i
, u8
) {
904 if (r
->u8
[i
] & 0x01) {
912 target_ulong
helper_vctzlsbb(ppc_avr_t
*r
)
914 target_ulong count
= 0;
916 #if defined(HOST_WORDS_BIGENDIAN)
917 for (i
= ARRAY_SIZE(r
->u8
) - 1; i
>= 0; i
--) {
919 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
921 if (r
->u8
[i
] & 0x01) {
929 void helper_vmhaddshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
930 ppc_avr_t
*b
, ppc_avr_t
*c
)
935 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
936 int32_t prod
= a
->s16
[i
] * b
->s16
[i
];
937 int32_t t
= (int32_t)c
->s16
[i
] + (prod
>> 15);
939 r
->s16
[i
] = cvtswsh(t
, &sat
);
943 env
->vscr
|= (1 << VSCR_SAT
);
947 void helper_vmhraddshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
948 ppc_avr_t
*b
, ppc_avr_t
*c
)
953 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
954 int32_t prod
= a
->s16
[i
] * b
->s16
[i
] + 0x00004000;
955 int32_t t
= (int32_t)c
->s16
[i
] + (prod
>> 15);
956 r
->s16
[i
] = cvtswsh(t
, &sat
);
960 env
->vscr
|= (1 << VSCR_SAT
);
964 #define VMINMAX_DO(name, compare, element) \
965 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
969 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
970 if (a->element[i] compare b->element[i]) { \
971 r->element[i] = b->element[i]; \
973 r->element[i] = a->element[i]; \
977 #define VMINMAX(suffix, element) \
978 VMINMAX_DO(min##suffix, >, element) \
979 VMINMAX_DO(max##suffix, <, element)
991 void helper_vmladduhm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
995 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
996 int32_t prod
= a
->s16
[i
] * b
->s16
[i
];
997 r
->s16
[i
] = (int16_t) (prod
+ c
->s16
[i
]);
1001 #define VMRG_DO(name, element, highp) \
1002 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1006 size_t n_elems = ARRAY_SIZE(r->element); \
1008 for (i = 0; i < n_elems / 2; i++) { \
1010 result.element[i*2+HI_IDX] = a->element[i]; \
1011 result.element[i*2+LO_IDX] = b->element[i]; \
1013 result.element[n_elems - i * 2 - (1 + HI_IDX)] = \
1014 b->element[n_elems - i - 1]; \
1015 result.element[n_elems - i * 2 - (1 + LO_IDX)] = \
1016 a->element[n_elems - i - 1]; \
1021 #if defined(HOST_WORDS_BIGENDIAN)
1028 #define VMRG(suffix, element) \
1029 VMRG_DO(mrgl##suffix, element, MRGHI) \
1030 VMRG_DO(mrgh##suffix, element, MRGLO)
1039 void helper_vmsummbm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1040 ppc_avr_t
*b
, ppc_avr_t
*c
)
1045 for (i
= 0; i
< ARRAY_SIZE(r
->s8
); i
++) {
1046 prod
[i
] = (int32_t)a
->s8
[i
] * b
->u8
[i
];
1049 VECTOR_FOR_INORDER_I(i
, s32
) {
1050 r
->s32
[i
] = c
->s32
[i
] + prod
[4 * i
] + prod
[4 * i
+ 1] +
1051 prod
[4 * i
+ 2] + prod
[4 * i
+ 3];
1055 void helper_vmsumshm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1056 ppc_avr_t
*b
, ppc_avr_t
*c
)
1061 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
1062 prod
[i
] = a
->s16
[i
] * b
->s16
[i
];
1065 VECTOR_FOR_INORDER_I(i
, s32
) {
1066 r
->s32
[i
] = c
->s32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
1070 void helper_vmsumshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1071 ppc_avr_t
*b
, ppc_avr_t
*c
)
1077 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
1078 prod
[i
] = (int32_t)a
->s16
[i
] * b
->s16
[i
];
1081 VECTOR_FOR_INORDER_I(i
, s32
) {
1082 int64_t t
= (int64_t)c
->s32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
1084 r
->u32
[i
] = cvtsdsw(t
, &sat
);
1088 env
->vscr
|= (1 << VSCR_SAT
);
1092 void helper_vmsumubm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1093 ppc_avr_t
*b
, ppc_avr_t
*c
)
1098 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
1099 prod
[i
] = a
->u8
[i
] * b
->u8
[i
];
1102 VECTOR_FOR_INORDER_I(i
, u32
) {
1103 r
->u32
[i
] = c
->u32
[i
] + prod
[4 * i
] + prod
[4 * i
+ 1] +
1104 prod
[4 * i
+ 2] + prod
[4 * i
+ 3];
1108 void helper_vmsumuhm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1109 ppc_avr_t
*b
, ppc_avr_t
*c
)
1114 for (i
= 0; i
< ARRAY_SIZE(r
->u16
); i
++) {
1115 prod
[i
] = a
->u16
[i
] * b
->u16
[i
];
1118 VECTOR_FOR_INORDER_I(i
, u32
) {
1119 r
->u32
[i
] = c
->u32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
1123 void helper_vmsumuhs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
1124 ppc_avr_t
*b
, ppc_avr_t
*c
)
1130 for (i
= 0; i
< ARRAY_SIZE(r
->u16
); i
++) {
1131 prod
[i
] = a
->u16
[i
] * b
->u16
[i
];
1134 VECTOR_FOR_INORDER_I(i
, s32
) {
1135 uint64_t t
= (uint64_t)c
->u32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
1137 r
->u32
[i
] = cvtuduw(t
, &sat
);
1141 env
->vscr
|= (1 << VSCR_SAT
);
1145 #define VMUL_DO(name, mul_element, prod_element, cast, evenp) \
1146 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1150 VECTOR_FOR_INORDER_I(i, prod_element) { \
1152 r->prod_element[i] = \
1153 (cast)a->mul_element[i * 2 + HI_IDX] * \
1154 (cast)b->mul_element[i * 2 + HI_IDX]; \
1156 r->prod_element[i] = \
1157 (cast)a->mul_element[i * 2 + LO_IDX] * \
1158 (cast)b->mul_element[i * 2 + LO_IDX]; \
1162 #define VMUL(suffix, mul_element, prod_element, cast) \
1163 VMUL_DO(mule##suffix, mul_element, prod_element, cast, 1) \
1164 VMUL_DO(mulo##suffix, mul_element, prod_element, cast, 0)
1165 VMUL(sb
, s8
, s16
, int16_t)
1166 VMUL(sh
, s16
, s32
, int32_t)
1167 VMUL(sw
, s32
, s64
, int64_t)
1168 VMUL(ub
, u8
, u16
, uint16_t)
1169 VMUL(uh
, u16
, u32
, uint32_t)
1170 VMUL(uw
, u32
, u64
, uint64_t)
1174 void helper_vperm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
,
1180 VECTOR_FOR_INORDER_I(i
, u8
) {
1181 int s
= c
->u8
[i
] & 0x1f;
1182 #if defined(HOST_WORDS_BIGENDIAN)
1183 int index
= s
& 0xf;
1185 int index
= 15 - (s
& 0xf);
1189 result
.u8
[i
] = b
->u8
[index
];
1191 result
.u8
[i
] = a
->u8
[index
];
1197 void helper_vpermr(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
,
1203 VECTOR_FOR_INORDER_I(i
, u8
) {
1204 int s
= c
->u8
[i
] & 0x1f;
1205 #if defined(HOST_WORDS_BIGENDIAN)
1206 int index
= 15 - (s
& 0xf);
1208 int index
= s
& 0xf;
1212 result
.u8
[i
] = a
->u8
[index
];
1214 result
.u8
[i
] = b
->u8
[index
];
1220 #if defined(HOST_WORDS_BIGENDIAN)
1221 #define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
1222 #define VBPERMD_INDEX(i) (i)
1223 #define VBPERMQ_DW(index) (((index) & 0x40) != 0)
1224 #define EXTRACT_BIT(avr, i, index) (extract64((avr)->u64[i], index, 1))
1226 #define VBPERMQ_INDEX(avr, i) ((avr)->u8[15-(i)])
1227 #define VBPERMD_INDEX(i) (1 - i)
1228 #define VBPERMQ_DW(index) (((index) & 0x40) == 0)
1229 #define EXTRACT_BIT(avr, i, index) \
1230 (extract64((avr)->u64[1 - i], 63 - index, 1))
1233 void helper_vbpermd(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1236 ppc_avr_t result
= { .u64
= { 0, 0 } };
1237 VECTOR_FOR_INORDER_I(i
, u64
) {
1238 for (j
= 0; j
< 8; j
++) {
1239 int index
= VBPERMQ_INDEX(b
, (i
* 8) + j
);
1240 if (index
< 64 && EXTRACT_BIT(a
, i
, index
)) {
1241 result
.u64
[VBPERMD_INDEX(i
)] |= (0x80 >> j
);
1248 void helper_vbpermq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1253 VECTOR_FOR_INORDER_I(i
, u8
) {
1254 int index
= VBPERMQ_INDEX(b
, i
);
1257 uint64_t mask
= (1ull << (63-(index
& 0x3F)));
1258 if (a
->u64
[VBPERMQ_DW(index
)] & mask
) {
1259 perm
|= (0x8000 >> i
);
1264 r
->u64
[HI_IDX
] = perm
;
1268 #undef VBPERMQ_INDEX
1271 static const uint64_t VGBBD_MASKS
[256] = {
1272 0x0000000000000000ull
, /* 00 */
1273 0x0000000000000080ull
, /* 01 */
1274 0x0000000000008000ull
, /* 02 */
1275 0x0000000000008080ull
, /* 03 */
1276 0x0000000000800000ull
, /* 04 */
1277 0x0000000000800080ull
, /* 05 */
1278 0x0000000000808000ull
, /* 06 */
1279 0x0000000000808080ull
, /* 07 */
1280 0x0000000080000000ull
, /* 08 */
1281 0x0000000080000080ull
, /* 09 */
1282 0x0000000080008000ull
, /* 0A */
1283 0x0000000080008080ull
, /* 0B */
1284 0x0000000080800000ull
, /* 0C */
1285 0x0000000080800080ull
, /* 0D */
1286 0x0000000080808000ull
, /* 0E */
1287 0x0000000080808080ull
, /* 0F */
1288 0x0000008000000000ull
, /* 10 */
1289 0x0000008000000080ull
, /* 11 */
1290 0x0000008000008000ull
, /* 12 */
1291 0x0000008000008080ull
, /* 13 */
1292 0x0000008000800000ull
, /* 14 */
1293 0x0000008000800080ull
, /* 15 */
1294 0x0000008000808000ull
, /* 16 */
1295 0x0000008000808080ull
, /* 17 */
1296 0x0000008080000000ull
, /* 18 */
1297 0x0000008080000080ull
, /* 19 */
1298 0x0000008080008000ull
, /* 1A */
1299 0x0000008080008080ull
, /* 1B */
1300 0x0000008080800000ull
, /* 1C */
1301 0x0000008080800080ull
, /* 1D */
1302 0x0000008080808000ull
, /* 1E */
1303 0x0000008080808080ull
, /* 1F */
1304 0x0000800000000000ull
, /* 20 */
1305 0x0000800000000080ull
, /* 21 */
1306 0x0000800000008000ull
, /* 22 */
1307 0x0000800000008080ull
, /* 23 */
1308 0x0000800000800000ull
, /* 24 */
1309 0x0000800000800080ull
, /* 25 */
1310 0x0000800000808000ull
, /* 26 */
1311 0x0000800000808080ull
, /* 27 */
1312 0x0000800080000000ull
, /* 28 */
1313 0x0000800080000080ull
, /* 29 */
1314 0x0000800080008000ull
, /* 2A */
1315 0x0000800080008080ull
, /* 2B */
1316 0x0000800080800000ull
, /* 2C */
1317 0x0000800080800080ull
, /* 2D */
1318 0x0000800080808000ull
, /* 2E */
1319 0x0000800080808080ull
, /* 2F */
1320 0x0000808000000000ull
, /* 30 */
1321 0x0000808000000080ull
, /* 31 */
1322 0x0000808000008000ull
, /* 32 */
1323 0x0000808000008080ull
, /* 33 */
1324 0x0000808000800000ull
, /* 34 */
1325 0x0000808000800080ull
, /* 35 */
1326 0x0000808000808000ull
, /* 36 */
1327 0x0000808000808080ull
, /* 37 */
1328 0x0000808080000000ull
, /* 38 */
1329 0x0000808080000080ull
, /* 39 */
1330 0x0000808080008000ull
, /* 3A */
1331 0x0000808080008080ull
, /* 3B */
1332 0x0000808080800000ull
, /* 3C */
1333 0x0000808080800080ull
, /* 3D */
1334 0x0000808080808000ull
, /* 3E */
1335 0x0000808080808080ull
, /* 3F */
1336 0x0080000000000000ull
, /* 40 */
1337 0x0080000000000080ull
, /* 41 */
1338 0x0080000000008000ull
, /* 42 */
1339 0x0080000000008080ull
, /* 43 */
1340 0x0080000000800000ull
, /* 44 */
1341 0x0080000000800080ull
, /* 45 */
1342 0x0080000000808000ull
, /* 46 */
1343 0x0080000000808080ull
, /* 47 */
1344 0x0080000080000000ull
, /* 48 */
1345 0x0080000080000080ull
, /* 49 */
1346 0x0080000080008000ull
, /* 4A */
1347 0x0080000080008080ull
, /* 4B */
1348 0x0080000080800000ull
, /* 4C */
1349 0x0080000080800080ull
, /* 4D */
1350 0x0080000080808000ull
, /* 4E */
1351 0x0080000080808080ull
, /* 4F */
1352 0x0080008000000000ull
, /* 50 */
1353 0x0080008000000080ull
, /* 51 */
1354 0x0080008000008000ull
, /* 52 */
1355 0x0080008000008080ull
, /* 53 */
1356 0x0080008000800000ull
, /* 54 */
1357 0x0080008000800080ull
, /* 55 */
1358 0x0080008000808000ull
, /* 56 */
1359 0x0080008000808080ull
, /* 57 */
1360 0x0080008080000000ull
, /* 58 */
1361 0x0080008080000080ull
, /* 59 */
1362 0x0080008080008000ull
, /* 5A */
1363 0x0080008080008080ull
, /* 5B */
1364 0x0080008080800000ull
, /* 5C */
1365 0x0080008080800080ull
, /* 5D */
1366 0x0080008080808000ull
, /* 5E */
1367 0x0080008080808080ull
, /* 5F */
1368 0x0080800000000000ull
, /* 60 */
1369 0x0080800000000080ull
, /* 61 */
1370 0x0080800000008000ull
, /* 62 */
1371 0x0080800000008080ull
, /* 63 */
1372 0x0080800000800000ull
, /* 64 */
1373 0x0080800000800080ull
, /* 65 */
1374 0x0080800000808000ull
, /* 66 */
1375 0x0080800000808080ull
, /* 67 */
1376 0x0080800080000000ull
, /* 68 */
1377 0x0080800080000080ull
, /* 69 */
1378 0x0080800080008000ull
, /* 6A */
1379 0x0080800080008080ull
, /* 6B */
1380 0x0080800080800000ull
, /* 6C */
1381 0x0080800080800080ull
, /* 6D */
1382 0x0080800080808000ull
, /* 6E */
1383 0x0080800080808080ull
, /* 6F */
1384 0x0080808000000000ull
, /* 70 */
1385 0x0080808000000080ull
, /* 71 */
1386 0x0080808000008000ull
, /* 72 */
1387 0x0080808000008080ull
, /* 73 */
1388 0x0080808000800000ull
, /* 74 */
1389 0x0080808000800080ull
, /* 75 */
1390 0x0080808000808000ull
, /* 76 */
1391 0x0080808000808080ull
, /* 77 */
1392 0x0080808080000000ull
, /* 78 */
1393 0x0080808080000080ull
, /* 79 */
1394 0x0080808080008000ull
, /* 7A */
1395 0x0080808080008080ull
, /* 7B */
1396 0x0080808080800000ull
, /* 7C */
1397 0x0080808080800080ull
, /* 7D */
1398 0x0080808080808000ull
, /* 7E */
1399 0x0080808080808080ull
, /* 7F */
1400 0x8000000000000000ull
, /* 80 */
1401 0x8000000000000080ull
, /* 81 */
1402 0x8000000000008000ull
, /* 82 */
1403 0x8000000000008080ull
, /* 83 */
1404 0x8000000000800000ull
, /* 84 */
1405 0x8000000000800080ull
, /* 85 */
1406 0x8000000000808000ull
, /* 86 */
1407 0x8000000000808080ull
, /* 87 */
1408 0x8000000080000000ull
, /* 88 */
1409 0x8000000080000080ull
, /* 89 */
1410 0x8000000080008000ull
, /* 8A */
1411 0x8000000080008080ull
, /* 8B */
1412 0x8000000080800000ull
, /* 8C */
1413 0x8000000080800080ull
, /* 8D */
1414 0x8000000080808000ull
, /* 8E */
1415 0x8000000080808080ull
, /* 8F */
1416 0x8000008000000000ull
, /* 90 */
1417 0x8000008000000080ull
, /* 91 */
1418 0x8000008000008000ull
, /* 92 */
1419 0x8000008000008080ull
, /* 93 */
1420 0x8000008000800000ull
, /* 94 */
1421 0x8000008000800080ull
, /* 95 */
1422 0x8000008000808000ull
, /* 96 */
1423 0x8000008000808080ull
, /* 97 */
1424 0x8000008080000000ull
, /* 98 */
1425 0x8000008080000080ull
, /* 99 */
1426 0x8000008080008000ull
, /* 9A */
1427 0x8000008080008080ull
, /* 9B */
1428 0x8000008080800000ull
, /* 9C */
1429 0x8000008080800080ull
, /* 9D */
1430 0x8000008080808000ull
, /* 9E */
1431 0x8000008080808080ull
, /* 9F */
1432 0x8000800000000000ull
, /* A0 */
1433 0x8000800000000080ull
, /* A1 */
1434 0x8000800000008000ull
, /* A2 */
1435 0x8000800000008080ull
, /* A3 */
1436 0x8000800000800000ull
, /* A4 */
1437 0x8000800000800080ull
, /* A5 */
1438 0x8000800000808000ull
, /* A6 */
1439 0x8000800000808080ull
, /* A7 */
1440 0x8000800080000000ull
, /* A8 */
1441 0x8000800080000080ull
, /* A9 */
1442 0x8000800080008000ull
, /* AA */
1443 0x8000800080008080ull
, /* AB */
1444 0x8000800080800000ull
, /* AC */
1445 0x8000800080800080ull
, /* AD */
1446 0x8000800080808000ull
, /* AE */
1447 0x8000800080808080ull
, /* AF */
1448 0x8000808000000000ull
, /* B0 */
1449 0x8000808000000080ull
, /* B1 */
1450 0x8000808000008000ull
, /* B2 */
1451 0x8000808000008080ull
, /* B3 */
1452 0x8000808000800000ull
, /* B4 */
1453 0x8000808000800080ull
, /* B5 */
1454 0x8000808000808000ull
, /* B6 */
1455 0x8000808000808080ull
, /* B7 */
1456 0x8000808080000000ull
, /* B8 */
1457 0x8000808080000080ull
, /* B9 */
1458 0x8000808080008000ull
, /* BA */
1459 0x8000808080008080ull
, /* BB */
1460 0x8000808080800000ull
, /* BC */
1461 0x8000808080800080ull
, /* BD */
1462 0x8000808080808000ull
, /* BE */
1463 0x8000808080808080ull
, /* BF */
1464 0x8080000000000000ull
, /* C0 */
1465 0x8080000000000080ull
, /* C1 */
1466 0x8080000000008000ull
, /* C2 */
1467 0x8080000000008080ull
, /* C3 */
1468 0x8080000000800000ull
, /* C4 */
1469 0x8080000000800080ull
, /* C5 */
1470 0x8080000000808000ull
, /* C6 */
1471 0x8080000000808080ull
, /* C7 */
1472 0x8080000080000000ull
, /* C8 */
1473 0x8080000080000080ull
, /* C9 */
1474 0x8080000080008000ull
, /* CA */
1475 0x8080000080008080ull
, /* CB */
1476 0x8080000080800000ull
, /* CC */
1477 0x8080000080800080ull
, /* CD */
1478 0x8080000080808000ull
, /* CE */
1479 0x8080000080808080ull
, /* CF */
1480 0x8080008000000000ull
, /* D0 */
1481 0x8080008000000080ull
, /* D1 */
1482 0x8080008000008000ull
, /* D2 */
1483 0x8080008000008080ull
, /* D3 */
1484 0x8080008000800000ull
, /* D4 */
1485 0x8080008000800080ull
, /* D5 */
1486 0x8080008000808000ull
, /* D6 */
1487 0x8080008000808080ull
, /* D7 */
1488 0x8080008080000000ull
, /* D8 */
1489 0x8080008080000080ull
, /* D9 */
1490 0x8080008080008000ull
, /* DA */
1491 0x8080008080008080ull
, /* DB */
1492 0x8080008080800000ull
, /* DC */
1493 0x8080008080800080ull
, /* DD */
1494 0x8080008080808000ull
, /* DE */
1495 0x8080008080808080ull
, /* DF */
1496 0x8080800000000000ull
, /* E0 */
1497 0x8080800000000080ull
, /* E1 */
1498 0x8080800000008000ull
, /* E2 */
1499 0x8080800000008080ull
, /* E3 */
1500 0x8080800000800000ull
, /* E4 */
1501 0x8080800000800080ull
, /* E5 */
1502 0x8080800000808000ull
, /* E6 */
1503 0x8080800000808080ull
, /* E7 */
1504 0x8080800080000000ull
, /* E8 */
1505 0x8080800080000080ull
, /* E9 */
1506 0x8080800080008000ull
, /* EA */
1507 0x8080800080008080ull
, /* EB */
1508 0x8080800080800000ull
, /* EC */
1509 0x8080800080800080ull
, /* ED */
1510 0x8080800080808000ull
, /* EE */
1511 0x8080800080808080ull
, /* EF */
1512 0x8080808000000000ull
, /* F0 */
1513 0x8080808000000080ull
, /* F1 */
1514 0x8080808000008000ull
, /* F2 */
1515 0x8080808000008080ull
, /* F3 */
1516 0x8080808000800000ull
, /* F4 */
1517 0x8080808000800080ull
, /* F5 */
1518 0x8080808000808000ull
, /* F6 */
1519 0x8080808000808080ull
, /* F7 */
1520 0x8080808080000000ull
, /* F8 */
1521 0x8080808080000080ull
, /* F9 */
1522 0x8080808080008000ull
, /* FA */
1523 0x8080808080008080ull
, /* FB */
1524 0x8080808080800000ull
, /* FC */
1525 0x8080808080800080ull
, /* FD */
1526 0x8080808080808000ull
, /* FE */
1527 0x8080808080808080ull
, /* FF */
1530 void helper_vgbbd(ppc_avr_t
*r
, ppc_avr_t
*b
)
1533 uint64_t t
[2] = { 0, 0 };
1535 VECTOR_FOR_INORDER_I(i
, u8
) {
1536 #if defined(HOST_WORDS_BIGENDIAN)
1537 t
[i
>>3] |= VGBBD_MASKS
[b
->u8
[i
]] >> (i
& 7);
1539 t
[i
>>3] |= VGBBD_MASKS
[b
->u8
[i
]] >> (7-(i
& 7));
1547 #define PMSUM(name, srcfld, trgfld, trgtyp) \
1548 void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1551 trgtyp prod[sizeof(ppc_avr_t)/sizeof(a->srcfld[0])]; \
1553 VECTOR_FOR_INORDER_I(i, srcfld) { \
1555 for (j = 0; j < sizeof(a->srcfld[0]) * 8; j++) { \
1556 if (a->srcfld[i] & (1ull<<j)) { \
1557 prod[i] ^= ((trgtyp)b->srcfld[i] << j); \
1562 VECTOR_FOR_INORDER_I(i, trgfld) { \
1563 r->trgfld[i] = prod[2*i] ^ prod[2*i+1]; \
1567 PMSUM(vpmsumb
, u8
, u16
, uint16_t)
1568 PMSUM(vpmsumh
, u16
, u32
, uint32_t)
1569 PMSUM(vpmsumw
, u32
, u64
, uint64_t)
1571 void helper_vpmsumd(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1574 #ifdef CONFIG_INT128
1576 __uint128_t prod
[2];
1578 VECTOR_FOR_INORDER_I(i
, u64
) {
1580 for (j
= 0; j
< 64; j
++) {
1581 if (a
->u64
[i
] & (1ull<<j
)) {
1582 prod
[i
] ^= (((__uint128_t
)b
->u64
[i
]) << j
);
1587 r
->u128
= prod
[0] ^ prod
[1];
1593 VECTOR_FOR_INORDER_I(i
, u64
) {
1594 prod
[i
].u64
[LO_IDX
] = prod
[i
].u64
[HI_IDX
] = 0;
1595 for (j
= 0; j
< 64; j
++) {
1596 if (a
->u64
[i
] & (1ull<<j
)) {
1599 bshift
.u64
[HI_IDX
] = 0;
1600 bshift
.u64
[LO_IDX
] = b
->u64
[i
];
1602 bshift
.u64
[HI_IDX
] = b
->u64
[i
] >> (64-j
);
1603 bshift
.u64
[LO_IDX
] = b
->u64
[i
] << j
;
1605 prod
[i
].u64
[LO_IDX
] ^= bshift
.u64
[LO_IDX
];
1606 prod
[i
].u64
[HI_IDX
] ^= bshift
.u64
[HI_IDX
];
1611 r
->u64
[LO_IDX
] = prod
[0].u64
[LO_IDX
] ^ prod
[1].u64
[LO_IDX
];
1612 r
->u64
[HI_IDX
] = prod
[0].u64
[HI_IDX
] ^ prod
[1].u64
[HI_IDX
];
1617 #if defined(HOST_WORDS_BIGENDIAN)
1622 void helper_vpkpx(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1626 #if defined(HOST_WORDS_BIGENDIAN)
1627 const ppc_avr_t
*x
[2] = { a
, b
};
1629 const ppc_avr_t
*x
[2] = { b
, a
};
1632 VECTOR_FOR_INORDER_I(i
, u64
) {
1633 VECTOR_FOR_INORDER_I(j
, u32
) {
1634 uint32_t e
= x
[i
]->u32
[j
];
1636 result
.u16
[4*i
+j
] = (((e
>> 9) & 0xfc00) |
1637 ((e
>> 6) & 0x3e0) |
1644 #define VPK(suffix, from, to, cvt, dosat) \
1645 void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
1646 ppc_avr_t *a, ppc_avr_t *b) \
1651 ppc_avr_t *a0 = PKBIG ? a : b; \
1652 ppc_avr_t *a1 = PKBIG ? b : a; \
1654 VECTOR_FOR_INORDER_I(i, from) { \
1655 result.to[i] = cvt(a0->from[i], &sat); \
1656 result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \
1659 if (dosat && sat) { \
1660 env->vscr |= (1 << VSCR_SAT); \
1664 VPK(shss
, s16
, s8
, cvtshsb
, 1)
1665 VPK(shus
, s16
, u8
, cvtshub
, 1)
1666 VPK(swss
, s32
, s16
, cvtswsh
, 1)
1667 VPK(swus
, s32
, u16
, cvtswuh
, 1)
1668 VPK(sdss
, s64
, s32
, cvtsdsw
, 1)
1669 VPK(sdus
, s64
, u32
, cvtsduw
, 1)
1670 VPK(uhus
, u16
, u8
, cvtuhub
, 1)
1671 VPK(uwus
, u32
, u16
, cvtuwuh
, 1)
1672 VPK(udus
, u64
, u32
, cvtuduw
, 1)
1673 VPK(uhum
, u16
, u8
, I
, 0)
1674 VPK(uwum
, u32
, u16
, I
, 0)
1675 VPK(udum
, u64
, u32
, I
, 0)
1680 void helper_vrefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1684 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1685 r
->f
[i
] = float32_div(float32_one
, b
->f
[i
], &env
->vec_status
);
1689 #define VRFI(suffix, rounding) \
1690 void helper_vrfi##suffix(CPUPPCState *env, ppc_avr_t *r, \
1694 float_status s = env->vec_status; \
1696 set_float_rounding_mode(rounding, &s); \
1697 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
1698 r->f[i] = float32_round_to_int (b->f[i], &s); \
1701 VRFI(n
, float_round_nearest_even
)
1702 VRFI(m
, float_round_down
)
1703 VRFI(p
, float_round_up
)
1704 VRFI(z
, float_round_to_zero
)
1707 #define VROTATE(suffix, element, mask) \
1708 void helper_vrl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1712 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1713 unsigned int shift = b->element[i] & mask; \
1714 r->element[i] = (a->element[i] << shift) | \
1715 (a->element[i] >> (sizeof(a->element[0]) * 8 - shift)); \
1719 VROTATE(h
, u16
, 0xF)
1720 VROTATE(w
, u32
, 0x1F)
1721 VROTATE(d
, u64
, 0x3F)
1724 void helper_vrsqrtefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1728 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1729 float32 t
= float32_sqrt(b
->f
[i
], &env
->vec_status
);
1731 r
->f
[i
] = float32_div(float32_one
, t
, &env
->vec_status
);
1735 #define VRLMI(name, size, element, insert) \
1736 void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1739 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1740 uint##size##_t src1 = a->element[i]; \
1741 uint##size##_t src2 = b->element[i]; \
1742 uint##size##_t src3 = r->element[i]; \
1743 uint##size##_t begin, end, shift, mask, rot_val; \
1745 shift = extract##size(src2, 0, 6); \
1746 end = extract##size(src2, 8, 6); \
1747 begin = extract##size(src2, 16, 6); \
1748 rot_val = rol##size(src1, shift); \
1749 mask = mask_u##size(begin, end); \
1751 r->element[i] = (rot_val & mask) | (src3 & ~mask); \
1753 r->element[i] = (rot_val & mask); \
1758 VRLMI(vrldmi
, 64, u64
, 1);
1759 VRLMI(vrlwmi
, 32, u32
, 1);
1760 VRLMI(vrldnm
, 64, u64
, 0);
1761 VRLMI(vrlwnm
, 32, u32
, 0);
1763 void helper_vsel(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
,
1766 r
->u64
[0] = (a
->u64
[0] & ~c
->u64
[0]) | (b
->u64
[0] & c
->u64
[0]);
1767 r
->u64
[1] = (a
->u64
[1] & ~c
->u64
[1]) | (b
->u64
[1] & c
->u64
[1]);
1770 void helper_vexptefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1774 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1775 r
->f
[i
] = float32_exp2(b
->f
[i
], &env
->vec_status
);
1779 void helper_vlogefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1783 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1784 r
->f
[i
] = float32_log2(b
->f
[i
], &env
->vec_status
);
1788 /* The specification says that the results are undefined if all of the
1789 * shift counts are not identical. We check to make sure that they are
1790 * to conform to what real hardware appears to do. */
1791 #define VSHIFT(suffix, leftp) \
1792 void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1794 int shift = b->u8[LO_IDX*15] & 0x7; \
1798 for (i = 0; i < ARRAY_SIZE(r->u8); i++) { \
1799 doit = doit && ((b->u8[i] & 0x7) == shift); \
1804 } else if (leftp) { \
1805 uint64_t carry = a->u64[LO_IDX] >> (64 - shift); \
1807 r->u64[HI_IDX] = (a->u64[HI_IDX] << shift) | carry; \
1808 r->u64[LO_IDX] = a->u64[LO_IDX] << shift; \
1810 uint64_t carry = a->u64[HI_IDX] << (64 - shift); \
1812 r->u64[LO_IDX] = (a->u64[LO_IDX] >> shift) | carry; \
1813 r->u64[HI_IDX] = a->u64[HI_IDX] >> shift; \
1821 #define VSL(suffix, element, mask) \
1822 void helper_vsl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1826 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1827 unsigned int shift = b->element[i] & mask; \
1829 r->element[i] = a->element[i] << shift; \
1838 void helper_vslv(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1841 unsigned int shift
, bytes
, size
;
1843 size
= ARRAY_SIZE(r
->u8
);
1844 for (i
= 0; i
< size
; i
++) {
1845 shift
= b
->u8
[i
] & 0x7; /* extract shift value */
1846 bytes
= (a
->u8
[i
] << 8) + /* extract adjacent bytes */
1847 (((i
+ 1) < size
) ? a
->u8
[i
+ 1] : 0);
1848 r
->u8
[i
] = (bytes
<< shift
) >> 8; /* shift and store result */
1852 void helper_vsrv(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1855 unsigned int shift
, bytes
;
1857 /* Use reverse order, as destination and source register can be same. Its
1858 * being modified in place saving temporary, reverse order will guarantee
1859 * that computed result is not fed back.
1861 for (i
= ARRAY_SIZE(r
->u8
) - 1; i
>= 0; i
--) {
1862 shift
= b
->u8
[i
] & 0x7; /* extract shift value */
1863 bytes
= ((i
? a
->u8
[i
- 1] : 0) << 8) + a
->u8
[i
];
1864 /* extract adjacent bytes */
1865 r
->u8
[i
] = (bytes
>> shift
) & 0xFF; /* shift and store result */
1869 void helper_vsldoi(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t shift
)
1871 int sh
= shift
& 0xf;
1875 #if defined(HOST_WORDS_BIGENDIAN)
1876 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
1879 result
.u8
[i
] = b
->u8
[index
- 0x10];
1881 result
.u8
[i
] = a
->u8
[index
];
1885 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
1886 int index
= (16 - sh
) + i
;
1888 result
.u8
[i
] = a
->u8
[index
- 0x10];
1890 result
.u8
[i
] = b
->u8
[index
];
1897 void helper_vslo(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1899 int sh
= (b
->u8
[LO_IDX
*0xf] >> 3) & 0xf;
1901 #if defined(HOST_WORDS_BIGENDIAN)
1902 memmove(&r
->u8
[0], &a
->u8
[sh
], 16 - sh
);
1903 memset(&r
->u8
[16-sh
], 0, sh
);
1905 memmove(&r
->u8
[sh
], &a
->u8
[0], 16 - sh
);
1906 memset(&r
->u8
[0], 0, sh
);
1910 /* Experimental testing shows that hardware masks the immediate. */
1911 #define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1))
1912 #if defined(HOST_WORDS_BIGENDIAN)
1913 #define SPLAT_ELEMENT(element) _SPLAT_MASKED(element)
1915 #define SPLAT_ELEMENT(element) \
1916 (ARRAY_SIZE(r->element) - 1 - _SPLAT_MASKED(element))
1918 #define VSPLT(suffix, element) \
1919 void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \
1921 uint32_t s = b->element[SPLAT_ELEMENT(element)]; \
1924 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1925 r->element[i] = s; \
1932 #undef SPLAT_ELEMENT
1933 #undef _SPLAT_MASKED
1934 #if defined(HOST_WORDS_BIGENDIAN)
1935 #define VINSERT(suffix, element) \
1936 void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1938 memmove(&r->u8[index], &b->u8[8 - sizeof(r->element)], \
1939 sizeof(r->element[0])); \
1942 #define VINSERT(suffix, element) \
1943 void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1945 uint32_t d = (16 - index) - sizeof(r->element[0]); \
1946 memmove(&r->u8[d], &b->u8[8], sizeof(r->element[0])); \
1954 #if defined(HOST_WORDS_BIGENDIAN)
1955 #define VEXTRACT(suffix, element) \
1956 void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1958 uint32_t es = sizeof(r->element[0]); \
1959 memmove(&r->u8[8 - es], &b->u8[index], es); \
1960 memset(&r->u8[8], 0, 8); \
1961 memset(&r->u8[0], 0, 8 - es); \
1964 #define VEXTRACT(suffix, element) \
1965 void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1967 uint32_t es = sizeof(r->element[0]); \
1968 uint32_t s = (16 - index) - es; \
1969 memmove(&r->u8[8], &b->u8[s], es); \
1970 memset(&r->u8[0], 0, 8); \
1971 memset(&r->u8[8 + es], 0, 8 - es); \
1980 #define VEXT_SIGNED(name, element, mask, cast, recast) \
1981 void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
1984 VECTOR_FOR_INORDER_I(i, element) { \
1985 r->element[i] = (recast)((cast)(b->element[i] & mask)); \
1988 VEXT_SIGNED(vextsb2w
, s32
, UINT8_MAX
, int8_t, int32_t)
1989 VEXT_SIGNED(vextsb2d
, s64
, UINT8_MAX
, int8_t, int64_t)
1990 VEXT_SIGNED(vextsh2w
, s32
, UINT16_MAX
, int16_t, int32_t)
1991 VEXT_SIGNED(vextsh2d
, s64
, UINT16_MAX
, int16_t, int64_t)
1992 VEXT_SIGNED(vextsw2d
, s64
, UINT32_MAX
, int32_t, int64_t)
1995 #define VNEG(name, element) \
1996 void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
1999 VECTOR_FOR_INORDER_I(i, element) { \
2000 r->element[i] = -b->element[i]; \
2007 #define VSPLTI(suffix, element, splat_type) \
2008 void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \
2010 splat_type x = (int8_t)(splat << 3) >> 3; \
2013 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
2014 r->element[i] = x; \
2017 VSPLTI(b
, s8
, int8_t)
2018 VSPLTI(h
, s16
, int16_t)
2019 VSPLTI(w
, s32
, int32_t)
2022 #define VSR(suffix, element, mask) \
2023 void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
2027 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
2028 unsigned int shift = b->element[i] & mask; \
2029 r->element[i] = a->element[i] >> shift; \
2042 void helper_vsro(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2044 int sh
= (b
->u8
[LO_IDX
* 0xf] >> 3) & 0xf;
2046 #if defined(HOST_WORDS_BIGENDIAN)
2047 memmove(&r
->u8
[sh
], &a
->u8
[0], 16 - sh
);
2048 memset(&r
->u8
[0], 0, sh
);
2050 memmove(&r
->u8
[0], &a
->u8
[sh
], 16 - sh
);
2051 memset(&r
->u8
[16 - sh
], 0, sh
);
2055 void helper_vsubcuw(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2059 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
2060 r
->u32
[i
] = a
->u32
[i
] >= b
->u32
[i
];
2064 void helper_vsumsws(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2071 #if defined(HOST_WORDS_BIGENDIAN)
2072 upper
= ARRAY_SIZE(r
->s32
)-1;
2076 t
= (int64_t)b
->s32
[upper
];
2077 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
2081 result
.s32
[upper
] = cvtsdsw(t
, &sat
);
2085 env
->vscr
|= (1 << VSCR_SAT
);
2089 void helper_vsum2sws(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2095 #if defined(HOST_WORDS_BIGENDIAN)
2100 for (i
= 0; i
< ARRAY_SIZE(r
->u64
); i
++) {
2101 int64_t t
= (int64_t)b
->s32
[upper
+ i
* 2];
2104 for (j
= 0; j
< ARRAY_SIZE(r
->u64
); j
++) {
2105 t
+= a
->s32
[2 * i
+ j
];
2107 result
.s32
[upper
+ i
* 2] = cvtsdsw(t
, &sat
);
2112 env
->vscr
|= (1 << VSCR_SAT
);
2116 void helper_vsum4sbs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2121 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
2122 int64_t t
= (int64_t)b
->s32
[i
];
2124 for (j
= 0; j
< ARRAY_SIZE(r
->s32
); j
++) {
2125 t
+= a
->s8
[4 * i
+ j
];
2127 r
->s32
[i
] = cvtsdsw(t
, &sat
);
2131 env
->vscr
|= (1 << VSCR_SAT
);
2135 void helper_vsum4shs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2140 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
2141 int64_t t
= (int64_t)b
->s32
[i
];
2143 t
+= a
->s16
[2 * i
] + a
->s16
[2 * i
+ 1];
2144 r
->s32
[i
] = cvtsdsw(t
, &sat
);
2148 env
->vscr
|= (1 << VSCR_SAT
);
2152 void helper_vsum4ubs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2157 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
2158 uint64_t t
= (uint64_t)b
->u32
[i
];
2160 for (j
= 0; j
< ARRAY_SIZE(r
->u32
); j
++) {
2161 t
+= a
->u8
[4 * i
+ j
];
2163 r
->u32
[i
] = cvtuduw(t
, &sat
);
2167 env
->vscr
|= (1 << VSCR_SAT
);
2171 #if defined(HOST_WORDS_BIGENDIAN)
2178 #define VUPKPX(suffix, hi) \
2179 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
2184 for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \
2185 uint16_t e = b->u16[hi ? i : i+4]; \
2186 uint8_t a = (e >> 15) ? 0xff : 0; \
2187 uint8_t r = (e >> 10) & 0x1f; \
2188 uint8_t g = (e >> 5) & 0x1f; \
2189 uint8_t b = e & 0x1f; \
2191 result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \
2199 #define VUPK(suffix, unpacked, packee, hi) \
2200 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
2206 for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \
2207 result.unpacked[i] = b->packee[i]; \
2210 for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); \
2212 result.unpacked[i - ARRAY_SIZE(r->unpacked)] = b->packee[i]; \
2217 VUPK(hsb
, s16
, s8
, UPKHI
)
2218 VUPK(hsh
, s32
, s16
, UPKHI
)
2219 VUPK(hsw
, s64
, s32
, UPKHI
)
2220 VUPK(lsb
, s16
, s8
, UPKLO
)
2221 VUPK(lsh
, s32
, s16
, UPKLO
)
2222 VUPK(lsw
, s64
, s32
, UPKLO
)
2227 #define VGENERIC_DO(name, element) \
2228 void helper_v##name(ppc_avr_t *r, ppc_avr_t *b) \
2232 VECTOR_FOR_INORDER_I(i, element) { \
2233 r->element[i] = name(b->element[i]); \
2237 #define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
2238 #define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
2239 #define clzw(v) clz32((v))
2240 #define clzd(v) clz64((v))
2242 VGENERIC_DO(clzb
, u8
)
2243 VGENERIC_DO(clzh
, u16
)
2244 VGENERIC_DO(clzw
, u32
)
2245 VGENERIC_DO(clzd
, u64
)
2252 #define ctzb(v) ((v) ? ctz32(v) : 8)
2253 #define ctzh(v) ((v) ? ctz32(v) : 16)
2254 #define ctzw(v) ctz32((v))
2255 #define ctzd(v) ctz64((v))
2257 VGENERIC_DO(ctzb
, u8
)
2258 VGENERIC_DO(ctzh
, u16
)
2259 VGENERIC_DO(ctzw
, u32
)
2260 VGENERIC_DO(ctzd
, u64
)
2267 #define popcntb(v) ctpop8(v)
2268 #define popcnth(v) ctpop16(v)
2269 #define popcntw(v) ctpop32(v)
2270 #define popcntd(v) ctpop64(v)
2272 VGENERIC_DO(popcntb
, u8
)
2273 VGENERIC_DO(popcnth
, u16
)
2274 VGENERIC_DO(popcntw
, u32
)
2275 VGENERIC_DO(popcntd
, u64
)
2284 #if defined(HOST_WORDS_BIGENDIAN)
2285 #define QW_ONE { .u64 = { 0, 1 } }
2287 #define QW_ONE { .u64 = { 1, 0 } }
2290 #ifndef CONFIG_INT128
2292 static inline void avr_qw_not(ppc_avr_t
*t
, ppc_avr_t a
)
2294 t
->u64
[0] = ~a
.u64
[0];
2295 t
->u64
[1] = ~a
.u64
[1];
2298 static int avr_qw_cmpu(ppc_avr_t a
, ppc_avr_t b
)
2300 if (a
.u64
[HI_IDX
] < b
.u64
[HI_IDX
]) {
2302 } else if (a
.u64
[HI_IDX
] > b
.u64
[HI_IDX
]) {
2304 } else if (a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]) {
2306 } else if (a
.u64
[LO_IDX
] > b
.u64
[LO_IDX
]) {
2313 static void avr_qw_add(ppc_avr_t
*t
, ppc_avr_t a
, ppc_avr_t b
)
2315 t
->u64
[LO_IDX
] = a
.u64
[LO_IDX
] + b
.u64
[LO_IDX
];
2316 t
->u64
[HI_IDX
] = a
.u64
[HI_IDX
] + b
.u64
[HI_IDX
] +
2317 (~a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]);
2320 static int avr_qw_addc(ppc_avr_t
*t
, ppc_avr_t a
, ppc_avr_t b
)
2323 t
->u64
[LO_IDX
] = a
.u64
[LO_IDX
] + b
.u64
[LO_IDX
];
2324 t
->u64
[HI_IDX
] = a
.u64
[HI_IDX
] + b
.u64
[HI_IDX
] +
2325 (~a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]);
2326 avr_qw_not(¬_a
, a
);
2327 return avr_qw_cmpu(not_a
, b
) < 0;
2332 void helper_vadduqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2334 #ifdef CONFIG_INT128
2335 r
->u128
= a
->u128
+ b
->u128
;
2337 avr_qw_add(r
, *a
, *b
);
2341 void helper_vaddeuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2343 #ifdef CONFIG_INT128
2344 r
->u128
= a
->u128
+ b
->u128
+ (c
->u128
& 1);
2347 if (c
->u64
[LO_IDX
] & 1) {
2350 tmp
.u64
[HI_IDX
] = 0;
2351 tmp
.u64
[LO_IDX
] = c
->u64
[LO_IDX
] & 1;
2352 avr_qw_add(&tmp
, *a
, tmp
);
2353 avr_qw_add(r
, tmp
, *b
);
2355 avr_qw_add(r
, *a
, *b
);
2360 void helper_vaddcuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2362 #ifdef CONFIG_INT128
2363 r
->u128
= (~a
->u128
< b
->u128
);
2367 avr_qw_not(¬_a
, *a
);
2370 r
->u64
[LO_IDX
] = (avr_qw_cmpu(not_a
, *b
) < 0);
2374 void helper_vaddecuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2376 #ifdef CONFIG_INT128
2377 int carry_out
= (~a
->u128
< b
->u128
);
2378 if (!carry_out
&& (c
->u128
& 1)) {
2379 carry_out
= ((a
->u128
+ b
->u128
+ 1) == 0) &&
2380 ((a
->u128
!= 0) || (b
->u128
!= 0));
2382 r
->u128
= carry_out
;
2385 int carry_in
= c
->u64
[LO_IDX
] & 1;
2389 carry_out
= avr_qw_addc(&tmp
, *a
, *b
);
2391 if (!carry_out
&& carry_in
) {
2392 ppc_avr_t one
= QW_ONE
;
2393 carry_out
= avr_qw_addc(&tmp
, tmp
, one
);
2396 r
->u64
[LO_IDX
] = carry_out
;
2400 void helper_vsubuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2402 #ifdef CONFIG_INT128
2403 r
->u128
= a
->u128
- b
->u128
;
2406 ppc_avr_t one
= QW_ONE
;
2408 avr_qw_not(&tmp
, *b
);
2409 avr_qw_add(&tmp
, *a
, tmp
);
2410 avr_qw_add(r
, tmp
, one
);
2414 void helper_vsubeuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2416 #ifdef CONFIG_INT128
2417 r
->u128
= a
->u128
+ ~b
->u128
+ (c
->u128
& 1);
2421 avr_qw_not(&tmp
, *b
);
2422 avr_qw_add(&sum
, *a
, tmp
);
2424 tmp
.u64
[HI_IDX
] = 0;
2425 tmp
.u64
[LO_IDX
] = c
->u64
[LO_IDX
] & 1;
2426 avr_qw_add(r
, sum
, tmp
);
2430 void helper_vsubcuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2432 #ifdef CONFIG_INT128
2433 r
->u128
= (~a
->u128
< ~b
->u128
) ||
2434 (a
->u128
+ ~b
->u128
== (__uint128_t
)-1);
2436 int carry
= (avr_qw_cmpu(*a
, *b
) > 0);
2439 avr_qw_not(&tmp
, *b
);
2440 avr_qw_add(&tmp
, *a
, tmp
);
2441 carry
= ((tmp
.s64
[HI_IDX
] == -1ull) && (tmp
.s64
[LO_IDX
] == -1ull));
2444 r
->u64
[LO_IDX
] = carry
;
2448 void helper_vsubecuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2450 #ifdef CONFIG_INT128
2452 (~a
->u128
< ~b
->u128
) ||
2453 ((c
->u128
& 1) && (a
->u128
+ ~b
->u128
== (__uint128_t
)-1));
2455 int carry_in
= c
->u64
[LO_IDX
] & 1;
2456 int carry_out
= (avr_qw_cmpu(*a
, *b
) > 0);
2457 if (!carry_out
&& carry_in
) {
2459 avr_qw_not(&tmp
, *b
);
2460 avr_qw_add(&tmp
, *a
, tmp
);
2461 carry_out
= ((tmp
.u64
[HI_IDX
] == -1ull) && (tmp
.u64
[LO_IDX
] == -1ull));
2465 r
->u64
[LO_IDX
] = carry_out
;
2469 #define BCD_PLUS_PREF_1 0xC
2470 #define BCD_PLUS_PREF_2 0xF
2471 #define BCD_PLUS_ALT_1 0xA
2472 #define BCD_NEG_PREF 0xD
2473 #define BCD_NEG_ALT 0xB
2474 #define BCD_PLUS_ALT_2 0xE
2475 #define NATIONAL_PLUS 0x2B
2476 #define NATIONAL_NEG 0x2D
2478 #if defined(HOST_WORDS_BIGENDIAN)
2479 #define BCD_DIG_BYTE(n) (15 - (n/2))
2481 #define BCD_DIG_BYTE(n) (n/2)
2484 static int bcd_get_sgn(ppc_avr_t
*bcd
)
2486 switch (bcd
->u8
[BCD_DIG_BYTE(0)] & 0xF) {
2487 case BCD_PLUS_PREF_1
:
2488 case BCD_PLUS_PREF_2
:
2489 case BCD_PLUS_ALT_1
:
2490 case BCD_PLUS_ALT_2
:
2508 static int bcd_preferred_sgn(int sgn
, int ps
)
2511 return (ps
== 0) ? BCD_PLUS_PREF_1
: BCD_PLUS_PREF_2
;
2513 return BCD_NEG_PREF
;
2517 static uint8_t bcd_get_digit(ppc_avr_t
*bcd
, int n
, int *invalid
)
2521 result
= bcd
->u8
[BCD_DIG_BYTE(n
)] >> 4;
2523 result
= bcd
->u8
[BCD_DIG_BYTE(n
)] & 0xF;
2526 if (unlikely(result
> 9)) {
2532 static void bcd_put_digit(ppc_avr_t
*bcd
, uint8_t digit
, int n
)
2535 bcd
->u8
[BCD_DIG_BYTE(n
)] &= 0x0F;
2536 bcd
->u8
[BCD_DIG_BYTE(n
)] |= (digit
<<4);
2538 bcd
->u8
[BCD_DIG_BYTE(n
)] &= 0xF0;
2539 bcd
->u8
[BCD_DIG_BYTE(n
)] |= digit
;
2543 static int bcd_cmp_zero(ppc_avr_t
*bcd
)
2545 if (bcd
->u64
[HI_IDX
] == 0 && (bcd
->u64
[LO_IDX
] >> 4) == 0) {
2548 return (bcd_get_sgn(bcd
) == 1) ? 1 << CRF_GT
: 1 << CRF_LT
;
2552 static uint16_t get_national_digit(ppc_avr_t
*reg
, int n
)
2554 #if defined(HOST_WORDS_BIGENDIAN)
2555 return reg
->u16
[7 - n
];
2561 static void set_national_digit(ppc_avr_t
*reg
, uint8_t val
, int n
)
2563 #if defined(HOST_WORDS_BIGENDIAN)
2564 reg
->u16
[7 - n
] = val
;
2570 static int bcd_cmp_mag(ppc_avr_t
*a
, ppc_avr_t
*b
)
2574 for (i
= 31; i
> 0; i
--) {
2575 uint8_t dig_a
= bcd_get_digit(a
, i
, &invalid
);
2576 uint8_t dig_b
= bcd_get_digit(b
, i
, &invalid
);
2577 if (unlikely(invalid
)) {
2578 return 0; /* doesn't matter */
2579 } else if (dig_a
> dig_b
) {
2581 } else if (dig_a
< dig_b
) {
2589 static int bcd_add_mag(ppc_avr_t
*t
, ppc_avr_t
*a
, ppc_avr_t
*b
, int *invalid
,
2595 for (i
= 1; i
<= 31; i
++) {
2596 uint8_t digit
= bcd_get_digit(a
, i
, invalid
) +
2597 bcd_get_digit(b
, i
, invalid
) + carry
;
2598 is_zero
&= (digit
== 0);
2606 bcd_put_digit(t
, digit
, i
);
2608 if (unlikely(*invalid
)) {
2617 static int bcd_sub_mag(ppc_avr_t
*t
, ppc_avr_t
*a
, ppc_avr_t
*b
, int *invalid
,
2623 for (i
= 1; i
<= 31; i
++) {
2624 uint8_t digit
= bcd_get_digit(a
, i
, invalid
) -
2625 bcd_get_digit(b
, i
, invalid
) + carry
;
2626 is_zero
&= (digit
== 0);
2634 bcd_put_digit(t
, digit
, i
);
2636 if (unlikely(*invalid
)) {
2645 uint32_t helper_bcdadd(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t ps
)
2648 int sgna
= bcd_get_sgn(a
);
2649 int sgnb
= bcd_get_sgn(b
);
2650 int invalid
= (sgna
== 0) || (sgnb
== 0);
2654 ppc_avr_t result
= { .u64
= { 0, 0 } };
2658 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna
, ps
);
2659 zero
= bcd_add_mag(&result
, a
, b
, &invalid
, &overflow
);
2660 cr
= (sgna
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2661 } else if (bcd_cmp_mag(a
, b
) > 0) {
2662 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna
, ps
);
2663 zero
= bcd_sub_mag(&result
, a
, b
, &invalid
, &overflow
);
2664 cr
= (sgna
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2666 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgnb
, ps
);
2667 zero
= bcd_sub_mag(&result
, b
, a
, &invalid
, &overflow
);
2668 cr
= (sgnb
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2672 if (unlikely(invalid
)) {
2673 result
.u64
[HI_IDX
] = result
.u64
[LO_IDX
] = -1;
2675 } else if (overflow
) {
2686 uint32_t helper_bcdsub(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t ps
)
2688 ppc_avr_t bcopy
= *b
;
2689 int sgnb
= bcd_get_sgn(b
);
2691 bcd_put_digit(&bcopy
, BCD_PLUS_PREF_1
, 0);
2692 } else if (sgnb
> 0) {
2693 bcd_put_digit(&bcopy
, BCD_NEG_PREF
, 0);
2695 /* else invalid ... defer to bcdadd code for proper handling */
2697 return helper_bcdadd(r
, a
, &bcopy
, ps
);
2700 uint32_t helper_bcdcfn(ppc_avr_t
*r
, ppc_avr_t
*b
, uint32_t ps
)
2704 uint16_t national
= 0;
2705 uint16_t sgnb
= get_national_digit(b
, 0);
2706 ppc_avr_t ret
= { .u64
= { 0, 0 } };
2707 int invalid
= (sgnb
!= NATIONAL_PLUS
&& sgnb
!= NATIONAL_NEG
);
2709 for (i
= 1; i
< 8; i
++) {
2710 national
= get_national_digit(b
, i
);
2711 if (unlikely(national
< 0x30 || national
> 0x39)) {
2716 bcd_put_digit(&ret
, national
& 0xf, i
);
2719 if (sgnb
== NATIONAL_PLUS
) {
2720 bcd_put_digit(&ret
, (ps
== 0) ? BCD_PLUS_PREF_1
: BCD_PLUS_PREF_2
, 0);
2722 bcd_put_digit(&ret
, BCD_NEG_PREF
, 0);
2725 cr
= bcd_cmp_zero(&ret
);
2727 if (unlikely(invalid
)) {
2736 uint32_t helper_bcdctn(ppc_avr_t
*r
, ppc_avr_t
*b
, uint32_t ps
)
2740 int sgnb
= bcd_get_sgn(b
);
2741 int invalid
= (sgnb
== 0);
2742 ppc_avr_t ret
= { .u64
= { 0, 0 } };
2744 int ox_flag
= (b
->u64
[HI_IDX
] != 0) || ((b
->u64
[LO_IDX
] >> 32) != 0);
2746 for (i
= 1; i
< 8; i
++) {
2747 set_national_digit(&ret
, 0x30 + bcd_get_digit(b
, i
, &invalid
), i
);
2749 if (unlikely(invalid
)) {
2753 set_national_digit(&ret
, (sgnb
== -1) ? NATIONAL_NEG
: NATIONAL_PLUS
, 0);
2755 cr
= bcd_cmp_zero(b
);
2761 if (unlikely(invalid
)) {
2770 uint32_t helper_bcdcfz(ppc_avr_t
*r
, ppc_avr_t
*b
, uint32_t ps
)
2776 int zone_lead
= ps
? 0xF : 0x3;
2778 ppc_avr_t ret
= { .u64
= { 0, 0 } };
2779 int sgnb
= b
->u8
[BCD_DIG_BYTE(0)] >> 4;
2781 if (unlikely((sgnb
< 0xA) && ps
)) {
2785 for (i
= 0; i
< 16; i
++) {
2786 zone_digit
= (i
* 2) ? b
->u8
[BCD_DIG_BYTE(i
* 2)] >> 4 : zone_lead
;
2787 digit
= b
->u8
[BCD_DIG_BYTE(i
* 2)] & 0xF;
2788 if (unlikely(zone_digit
!= zone_lead
|| digit
> 0x9)) {
2793 bcd_put_digit(&ret
, digit
, i
+ 1);
2796 if ((ps
&& (sgnb
== 0xB || sgnb
== 0xD)) ||
2797 (!ps
&& (sgnb
& 0x4))) {
2798 bcd_put_digit(&ret
, BCD_NEG_PREF
, 0);
2800 bcd_put_digit(&ret
, BCD_PLUS_PREF_1
, 0);
2803 cr
= bcd_cmp_zero(&ret
);
2805 if (unlikely(invalid
)) {
2814 uint32_t helper_bcdctz(ppc_avr_t
*r
, ppc_avr_t
*b
, uint32_t ps
)
2819 int sgnb
= bcd_get_sgn(b
);
2820 int zone_lead
= (ps
) ? 0xF0 : 0x30;
2821 int invalid
= (sgnb
== 0);
2822 ppc_avr_t ret
= { .u64
= { 0, 0 } };
2824 int ox_flag
= ((b
->u64
[HI_IDX
] >> 4) != 0);
2826 for (i
= 0; i
< 16; i
++) {
2827 digit
= bcd_get_digit(b
, i
+ 1, &invalid
);
2829 if (unlikely(invalid
)) {
2833 ret
.u8
[BCD_DIG_BYTE(i
* 2)] = zone_lead
+ digit
;
2837 bcd_put_digit(&ret
, (sgnb
== 1) ? 0xC : 0xD, 1);
2839 bcd_put_digit(&ret
, (sgnb
== 1) ? 0x3 : 0x7, 1);
2842 cr
= bcd_cmp_zero(b
);
2848 if (unlikely(invalid
)) {
2857 void helper_vsbox(ppc_avr_t
*r
, ppc_avr_t
*a
)
2860 VECTOR_FOR_INORDER_I(i
, u8
) {
2861 r
->u8
[i
] = AES_sbox
[a
->u8
[i
]];
2865 void helper_vcipher(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2870 VECTOR_FOR_INORDER_I(i
, u32
) {
2871 result
.AVRW(i
) = b
->AVRW(i
) ^
2872 (AES_Te0
[a
->AVRB(AES_shifts
[4*i
+ 0])] ^
2873 AES_Te1
[a
->AVRB(AES_shifts
[4*i
+ 1])] ^
2874 AES_Te2
[a
->AVRB(AES_shifts
[4*i
+ 2])] ^
2875 AES_Te3
[a
->AVRB(AES_shifts
[4*i
+ 3])]);
2880 void helper_vcipherlast(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2885 VECTOR_FOR_INORDER_I(i
, u8
) {
2886 result
.AVRB(i
) = b
->AVRB(i
) ^ (AES_sbox
[a
->AVRB(AES_shifts
[i
])]);
2891 void helper_vncipher(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2893 /* This differs from what is written in ISA V2.07. The RTL is */
2894 /* incorrect and will be fixed in V2.07B. */
2898 VECTOR_FOR_INORDER_I(i
, u8
) {
2899 tmp
.AVRB(i
) = b
->AVRB(i
) ^ AES_isbox
[a
->AVRB(AES_ishifts
[i
])];
2902 VECTOR_FOR_INORDER_I(i
, u32
) {
2904 AES_imc
[tmp
.AVRB(4*i
+ 0)][0] ^
2905 AES_imc
[tmp
.AVRB(4*i
+ 1)][1] ^
2906 AES_imc
[tmp
.AVRB(4*i
+ 2)][2] ^
2907 AES_imc
[tmp
.AVRB(4*i
+ 3)][3];
2911 void helper_vncipherlast(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2916 VECTOR_FOR_INORDER_I(i
, u8
) {
2917 result
.AVRB(i
) = b
->AVRB(i
) ^ (AES_isbox
[a
->AVRB(AES_ishifts
[i
])]);
2922 #define ROTRu32(v, n) (((v) >> (n)) | ((v) << (32-n)))
2923 #if defined(HOST_WORDS_BIGENDIAN)
2924 #define EL_IDX(i) (i)
2926 #define EL_IDX(i) (3 - (i))
2929 void helper_vshasigmaw(ppc_avr_t
*r
, ppc_avr_t
*a
, uint32_t st_six
)
2931 int st
= (st_six
& 0x10) != 0;
2932 int six
= st_six
& 0xF;
2935 VECTOR_FOR_INORDER_I(i
, u32
) {
2937 if ((six
& (0x8 >> i
)) == 0) {
2938 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 7) ^
2939 ROTRu32(a
->u32
[EL_IDX(i
)], 18) ^
2940 (a
->u32
[EL_IDX(i
)] >> 3);
2941 } else { /* six.bit[i] == 1 */
2942 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 17) ^
2943 ROTRu32(a
->u32
[EL_IDX(i
)], 19) ^
2944 (a
->u32
[EL_IDX(i
)] >> 10);
2946 } else { /* st == 1 */
2947 if ((six
& (0x8 >> i
)) == 0) {
2948 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 2) ^
2949 ROTRu32(a
->u32
[EL_IDX(i
)], 13) ^
2950 ROTRu32(a
->u32
[EL_IDX(i
)], 22);
2951 } else { /* six.bit[i] == 1 */
2952 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 6) ^
2953 ROTRu32(a
->u32
[EL_IDX(i
)], 11) ^
2954 ROTRu32(a
->u32
[EL_IDX(i
)], 25);
2963 #define ROTRu64(v, n) (((v) >> (n)) | ((v) << (64-n)))
2964 #if defined(HOST_WORDS_BIGENDIAN)
2965 #define EL_IDX(i) (i)
2967 #define EL_IDX(i) (1 - (i))
2970 void helper_vshasigmad(ppc_avr_t
*r
, ppc_avr_t
*a
, uint32_t st_six
)
2972 int st
= (st_six
& 0x10) != 0;
2973 int six
= st_six
& 0xF;
2976 VECTOR_FOR_INORDER_I(i
, u64
) {
2978 if ((six
& (0x8 >> (2*i
))) == 0) {
2979 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 1) ^
2980 ROTRu64(a
->u64
[EL_IDX(i
)], 8) ^
2981 (a
->u64
[EL_IDX(i
)] >> 7);
2982 } else { /* six.bit[2*i] == 1 */
2983 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 19) ^
2984 ROTRu64(a
->u64
[EL_IDX(i
)], 61) ^
2985 (a
->u64
[EL_IDX(i
)] >> 6);
2987 } else { /* st == 1 */
2988 if ((six
& (0x8 >> (2*i
))) == 0) {
2989 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 28) ^
2990 ROTRu64(a
->u64
[EL_IDX(i
)], 34) ^
2991 ROTRu64(a
->u64
[EL_IDX(i
)], 39);
2992 } else { /* six.bit[2*i] == 1 */
2993 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 14) ^
2994 ROTRu64(a
->u64
[EL_IDX(i
)], 18) ^
2995 ROTRu64(a
->u64
[EL_IDX(i
)], 41);
3004 void helper_vpermxor(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
3009 VECTOR_FOR_INORDER_I(i
, u8
) {
3010 int indexA
= c
->u8
[i
] >> 4;
3011 int indexB
= c
->u8
[i
] & 0xF;
3012 #if defined(HOST_WORDS_BIGENDIAN)
3013 result
.u8
[i
] = a
->u8
[indexA
] ^ b
->u8
[indexB
];
3015 result
.u8
[i
] = a
->u8
[15-indexA
] ^ b
->u8
[15-indexB
];
3021 #undef VECTOR_FOR_INORDER_I
3025 /*****************************************************************************/
3026 /* SPE extension helpers */
3027 /* Use a table to make this quicker */
3028 static const uint8_t hbrev
[16] = {
3029 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
3030 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF,
3033 static inline uint8_t byte_reverse(uint8_t val
)
3035 return hbrev
[val
>> 4] | (hbrev
[val
& 0xF] << 4);
3038 static inline uint32_t word_reverse(uint32_t val
)
3040 return byte_reverse(val
>> 24) | (byte_reverse(val
>> 16) << 8) |
3041 (byte_reverse(val
>> 8) << 16) | (byte_reverse(val
) << 24);
3044 #define MASKBITS 16 /* Random value - to be fixed (implementation dependent) */
3045 target_ulong
helper_brinc(target_ulong arg1
, target_ulong arg2
)
3047 uint32_t a
, b
, d
, mask
;
3049 mask
= UINT32_MAX
>> (32 - MASKBITS
);
3052 d
= word_reverse(1 + word_reverse(a
| ~b
));
3053 return (arg1
& ~mask
) | (d
& b
);
3056 uint32_t helper_cntlsw32(uint32_t val
)
3058 if (val
& 0x80000000) {
3065 uint32_t helper_cntlzw32(uint32_t val
)
3071 target_ulong
helper_dlmzb(CPUPPCState
*env
, target_ulong high
,
3072 target_ulong low
, uint32_t update_Rc
)
3078 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
3079 if ((high
& mask
) == 0) {
3087 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
3088 if ((low
& mask
) == 0) {
3101 env
->xer
= (env
->xer
& ~0x7F) | i
;
3103 env
->crf
[0] |= xer_so
;