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1 /*
2 * Copyright 2008 IBM Corporation.
3 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
4 *
5 * This work is licensed under the GNU GPL license version 2 or later.
6 *
7 */
8
9 #ifndef KVM_PPC_H
10 #define KVM_PPC_H
11
12 #define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
13
14 #ifdef CONFIG_KVM
15
16 uint32_t kvmppc_get_tbfreq(void);
17 uint64_t kvmppc_get_clockfreq(void);
18 uint32_t kvmppc_get_vmx(void);
19 uint32_t kvmppc_get_dfp(void);
20 bool kvmppc_get_host_model(char **buf);
21 bool kvmppc_get_host_serial(char **buf);
22 int kvmppc_get_hasidle(CPUPPCState *env);
23 int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
24 int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
25 void kvmppc_enable_logical_ci_hcalls(void);
26 void kvmppc_enable_set_mode_hcall(void);
27 void kvmppc_enable_clear_ref_mod_hcalls(void);
28 void kvmppc_set_papr(PowerPCCPU *cpu);
29 int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr);
30 void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
31 int kvmppc_smt_threads(void);
32 int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
33 int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
34 int kvmppc_set_tcr(PowerPCCPU *cpu);
35 int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
36 #ifndef CONFIG_USER_ONLY
37 off_t kvmppc_alloc_rma(void **rma);
38 bool kvmppc_spapr_use_multitce(void);
39 void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
40 bool need_vfio);
41 int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
42 int kvmppc_reset_htab(int shift_hint);
43 uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
44 #endif /* !CONFIG_USER_ONLY */
45 bool kvmppc_has_cap_epr(void);
46 int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
47 bool kvmppc_has_cap_htab_fd(void);
48 int kvmppc_get_htab_fd(bool write);
49 int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
50 int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
51 uint16_t n_valid, uint16_t n_invalid);
52 void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n);
53 void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1);
54 bool kvmppc_has_cap_fixup_hcalls(void);
55 bool kvmppc_has_cap_htm(void);
56 int kvmppc_enable_hwrng(void);
57 int kvmppc_put_books_sregs(PowerPCCPU *cpu);
58 PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
59
60 bool kvmppc_is_mem_backend_page_size_ok(char *obj_path);
61
62 #else
63
64 static inline uint32_t kvmppc_get_tbfreq(void)
65 {
66 return 0;
67 }
68
69 static inline bool kvmppc_get_host_model(char **buf)
70 {
71 return false;
72 }
73
74 static inline bool kvmppc_get_host_serial(char **buf)
75 {
76 return false;
77 }
78
79 static inline uint64_t kvmppc_get_clockfreq(void)
80 {
81 return 0;
82 }
83
84 static inline uint32_t kvmppc_get_vmx(void)
85 {
86 return 0;
87 }
88
89 static inline uint32_t kvmppc_get_dfp(void)
90 {
91 return 0;
92 }
93
94 static inline int kvmppc_get_hasidle(CPUPPCState *env)
95 {
96 return 0;
97 }
98
99 static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
100 {
101 return -1;
102 }
103
104 static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
105 {
106 return -1;
107 }
108
109 static inline void kvmppc_enable_logical_ci_hcalls(void)
110 {
111 }
112
113 static inline void kvmppc_enable_set_mode_hcall(void)
114 {
115 }
116
117 static inline void kvmppc_enable_clear_ref_mod_hcalls(void)
118 {
119 }
120
121 static inline void kvmppc_set_papr(PowerPCCPU *cpu)
122 {
123 }
124
125 static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr)
126 {
127 return 0;
128 }
129
130 static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
131 {
132 }
133
134 static inline int kvmppc_smt_threads(void)
135 {
136 return 1;
137 }
138
139 static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
140 {
141 return 0;
142 }
143
144 static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
145 {
146 return 0;
147 }
148
149 static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
150 {
151 return 0;
152 }
153
154 static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
155 {
156 return -1;
157 }
158
159 #ifndef CONFIG_USER_ONLY
160 static inline off_t kvmppc_alloc_rma(void **rma)
161 {
162 return 0;
163 }
164
165 static inline bool kvmppc_spapr_use_multitce(void)
166 {
167 return false;
168 }
169
170 static inline void *kvmppc_create_spapr_tce(uint32_t liobn,
171 uint32_t window_size, int *fd,
172 bool need_vfio)
173 {
174 return NULL;
175 }
176
177 static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
178 uint32_t nb_table)
179 {
180 return -1;
181 }
182
183 static inline int kvmppc_reset_htab(int shift_hint)
184 {
185 return 0;
186 }
187
188 static inline uint64_t kvmppc_rma_size(uint64_t current_size,
189 unsigned int hash_shift)
190 {
191 return ram_size;
192 }
193
194 static inline bool kvmppc_is_mem_backend_page_size_ok(char *obj_path)
195 {
196 return true;
197 }
198
199 #endif /* !CONFIG_USER_ONLY */
200
201 static inline bool kvmppc_has_cap_epr(void)
202 {
203 return false;
204 }
205
206 static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
207 const char *function)
208 {
209 return -1;
210 }
211
212 static inline bool kvmppc_has_cap_htab_fd(void)
213 {
214 return false;
215 }
216
217 static inline int kvmppc_get_htab_fd(bool write)
218 {
219 return -1;
220 }
221
222 static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
223 int64_t max_ns)
224 {
225 abort();
226 }
227
228 static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
229 uint16_t n_valid, uint16_t n_invalid)
230 {
231 abort();
232 }
233
234 static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes,
235 hwaddr ptex, int n)
236 {
237 abort();
238 }
239
240 static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1)
241 {
242 abort();
243 }
244
245 static inline bool kvmppc_has_cap_fixup_hcalls(void)
246 {
247 abort();
248 }
249
250 static inline bool kvmppc_has_cap_htm(void)
251 {
252 return false;
253 }
254
255 static inline int kvmppc_enable_hwrng(void)
256 {
257 return -1;
258 }
259
260 static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
261 {
262 abort();
263 }
264
265 static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
266 {
267 return NULL;
268 }
269
270 #endif
271
272 #ifndef CONFIG_KVM
273
274 #define kvmppc_eieio() do { } while (0)
275
276 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
277 {
278 }
279
280 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
281 {
282 }
283
284 #else /* CONFIG_KVM */
285
286 #define kvmppc_eieio() \
287 do { \
288 if (kvm_enabled()) { \
289 asm volatile("eieio" : : : "memory"); \
290 } \
291 } while (0)
292
293 /* Store data cache blocks back to memory */
294 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
295 {
296 uint8_t *p;
297
298 for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
299 asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
300 }
301 }
302
303 /* Invalidate instruction cache blocks */
304 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
305 {
306 uint8_t *p;
307
308 for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
309 asm volatile("icbi 0,%0" : : "r"(p));
310 }
311 }
312
313 #endif /* CONFIG_KVM */
314
315 #endif /* KVM_PPC_H */