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1 /*
2 * Copyright 2008 IBM Corporation.
3 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
4 *
5 * This work is licensed under the GNU GPL license version 2 or later.
6 *
7 */
8
9 #ifndef KVM_PPC_H
10 #define KVM_PPC_H
11
12 #define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
13
14 #ifdef CONFIG_KVM
15
16 uint32_t kvmppc_get_tbfreq(void);
17 uint64_t kvmppc_get_clockfreq(void);
18 uint32_t kvmppc_get_vmx(void);
19 uint32_t kvmppc_get_dfp(void);
20 bool kvmppc_get_host_model(char **buf);
21 bool kvmppc_get_host_serial(char **buf);
22 int kvmppc_get_hasidle(CPUPPCState *env);
23 int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
24 int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
25 void kvmppc_enable_logical_ci_hcalls(void);
26 void kvmppc_enable_set_mode_hcall(void);
27 void kvmppc_enable_clear_ref_mod_hcalls(void);
28 void kvmppc_set_papr(PowerPCCPU *cpu);
29 int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version);
30 void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
31 int kvmppc_smt_threads(void);
32 int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
33 int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
34 int kvmppc_set_tcr(PowerPCCPU *cpu);
35 int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
36 #ifndef CONFIG_USER_ONLY
37 off_t kvmppc_alloc_rma(void **rma);
38 bool kvmppc_spapr_use_multitce(void);
39 void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
40 bool need_vfio);
41 int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
42 int kvmppc_reset_htab(int shift_hint);
43 uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
44 #endif /* !CONFIG_USER_ONLY */
45 bool kvmppc_has_cap_epr(void);
46 int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
47 bool kvmppc_has_cap_htab_fd(void);
48 int kvmppc_get_htab_fd(bool write);
49 int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
50 int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
51 uint16_t n_valid, uint16_t n_invalid);
52 uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu, target_ulong pte_index);
53 void kvmppc_hash64_free_pteg(uint64_t token);
54
55 void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,
56 target_ulong pte0, target_ulong pte1);
57 bool kvmppc_has_cap_fixup_hcalls(void);
58 bool kvmppc_has_cap_htm(void);
59 int kvmppc_enable_hwrng(void);
60 int kvmppc_put_books_sregs(PowerPCCPU *cpu);
61 PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
62
63 #else
64
65 static inline uint32_t kvmppc_get_tbfreq(void)
66 {
67 return 0;
68 }
69
70 static inline bool kvmppc_get_host_model(char **buf)
71 {
72 return false;
73 }
74
75 static inline bool kvmppc_get_host_serial(char **buf)
76 {
77 return false;
78 }
79
80 static inline uint64_t kvmppc_get_clockfreq(void)
81 {
82 return 0;
83 }
84
85 static inline uint32_t kvmppc_get_vmx(void)
86 {
87 return 0;
88 }
89
90 static inline uint32_t kvmppc_get_dfp(void)
91 {
92 return 0;
93 }
94
95 static inline int kvmppc_get_hasidle(CPUPPCState *env)
96 {
97 return 0;
98 }
99
100 static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
101 {
102 return -1;
103 }
104
105 static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
106 {
107 return -1;
108 }
109
110 static inline void kvmppc_enable_logical_ci_hcalls(void)
111 {
112 }
113
114 static inline void kvmppc_enable_set_mode_hcall(void)
115 {
116 }
117
118 static inline void kvmppc_enable_clear_ref_mod_hcalls(void)
119 {
120 }
121
122 static inline void kvmppc_set_papr(PowerPCCPU *cpu)
123 {
124 }
125
126 static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)
127 {
128 return 0;
129 }
130
131 static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
132 {
133 }
134
135 static inline int kvmppc_smt_threads(void)
136 {
137 return 1;
138 }
139
140 static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
141 {
142 return 0;
143 }
144
145 static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
146 {
147 return 0;
148 }
149
150 static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
151 {
152 return 0;
153 }
154
155 static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
156 {
157 return -1;
158 }
159
160 #ifndef CONFIG_USER_ONLY
161 static inline off_t kvmppc_alloc_rma(void **rma)
162 {
163 return 0;
164 }
165
166 static inline bool kvmppc_spapr_use_multitce(void)
167 {
168 return false;
169 }
170
171 static inline void *kvmppc_create_spapr_tce(uint32_t liobn,
172 uint32_t window_size, int *fd,
173 bool need_vfio)
174 {
175 return NULL;
176 }
177
178 static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
179 uint32_t nb_table)
180 {
181 return -1;
182 }
183
184 static inline int kvmppc_reset_htab(int shift_hint)
185 {
186 return 0;
187 }
188
189 static inline uint64_t kvmppc_rma_size(uint64_t current_size,
190 unsigned int hash_shift)
191 {
192 return ram_size;
193 }
194
195 #endif /* !CONFIG_USER_ONLY */
196
197 static inline bool kvmppc_has_cap_epr(void)
198 {
199 return false;
200 }
201
202 static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
203 const char *function)
204 {
205 return -1;
206 }
207
208 static inline bool kvmppc_has_cap_htab_fd(void)
209 {
210 return false;
211 }
212
213 static inline int kvmppc_get_htab_fd(bool write)
214 {
215 return -1;
216 }
217
218 static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
219 int64_t max_ns)
220 {
221 abort();
222 }
223
224 static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
225 uint16_t n_valid, uint16_t n_invalid)
226 {
227 abort();
228 }
229
230 static inline uint64_t kvmppc_hash64_read_pteg(PowerPCCPU *cpu,
231 target_ulong pte_index)
232 {
233 abort();
234 }
235
236 static inline void kvmppc_hash64_free_pteg(uint64_t token)
237 {
238 abort();
239 }
240
241 static inline void kvmppc_hash64_write_pte(CPUPPCState *env,
242 target_ulong pte_index,
243 target_ulong pte0, target_ulong pte1)
244 {
245 abort();
246 }
247
248 static inline bool kvmppc_has_cap_fixup_hcalls(void)
249 {
250 abort();
251 }
252
253 static inline bool kvmppc_has_cap_htm(void)
254 {
255 return false;
256 }
257
258 static inline int kvmppc_enable_hwrng(void)
259 {
260 return -1;
261 }
262
263 static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
264 {
265 abort();
266 }
267
268 static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
269 {
270 return NULL;
271 }
272
273 #endif
274
275 #ifndef CONFIG_KVM
276
277 #define kvmppc_eieio() do { } while (0)
278
279 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
280 {
281 }
282
283 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
284 {
285 }
286
287 #else /* CONFIG_KVM */
288
289 #define kvmppc_eieio() \
290 do { \
291 if (kvm_enabled()) { \
292 asm volatile("eieio" : : : "memory"); \
293 } \
294 } while (0)
295
296 /* Store data cache blocks back to memory */
297 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
298 {
299 uint8_t *p;
300
301 for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
302 asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
303 }
304 }
305
306 /* Invalidate instruction cache blocks */
307 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
308 {
309 uint8_t *p;
310
311 for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
312 asm volatile("icbi 0,%0" : : "r"(p));
313 }
314 }
315
316 #endif /* CONFIG_KVM */
317
318 #ifndef KVM_INTERRUPT_SET
319 #define KVM_INTERRUPT_SET -1
320 #endif
321
322 #ifndef KVM_INTERRUPT_UNSET
323 #define KVM_INTERRUPT_UNSET -2
324 #endif
325
326 #ifndef KVM_INTERRUPT_SET_LEVEL
327 #define KVM_INTERRUPT_SET_LEVEL -3
328 #endif
329
330 #endif /* KVM_PPC_H */