target/riscv/insn32.decode

   1 #
   2 # RISC-V translation routines for the RVXI Base Integer Instruction Set.
   3 #
   4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
   5 #                    Bastian Koppelmann, kbastian@mail.uni-paderborn.de
   6 #
   7 # This program is free software; you can redistribute it and/or modify it
   8 # under the terms and conditions of the GNU General Public License,
   9 # version 2 or later, as published by the Free Software Foundation.
  10 #
  11 # This program is distributed in the hope it will be useful, but WITHOUT
  12 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 # FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 # more details.
  15 #
  16 # You should have received a copy of the GNU General Public License along with
  17 # this program.  If not, see <http://www.gnu.org/licenses/>.
  18
  19 # Fields:
  20 %rs3       27:5
  21 %rs2       20:5
  22 %rs1       15:5
  23 %rd        7:5
  24
  25 %sh10    20:10
  26 %csr    20:12
  27 %rm     12:3
  28 %nf     29:3                     !function=ex_plus_1
  29
  30 # immediates:
  31 %imm_i    20:s12
  32 %imm_s    25:s7 7:5
  33 %imm_b    31:s1 7:1 25:6 8:4     !function=ex_shift_1
  34 %imm_j    31:s1 12:8 20:1 21:10  !function=ex_shift_1
  35 %imm_u    12:s20                 !function=ex_shift_12
  36
  37 # Argument sets:
  38 &empty
  39 &b    imm rs2 rs1
  40 &i    imm rs1 rd
  41 &j    imm rd
  42 &r    rd rs1 rs2
  43 &s    imm rs1 rs2
  44 &u    imm rd
  45 &shift     shamt rs1 rd
  46 &atomic    aq rl rs2 rs1 rd
  47 &rmrr      vm rd rs1 rs2
  48 &rmr       vm rd rs2
  49 &rwdvm     vm wd rd rs1 rs2
  50 &r2nfvm    vm rd rs1 nf
  51 &rnfvm     vm rd rs1 rs2 nf
  52
  53 # Formats 32:
  54 @r       .......   ..... ..... ... ..... ....... &r                %rs2 %rs1 %rd
  55 @i       ............    ..... ... ..... ....... &i      imm=%imm_i     %rs1 %rd
  56 @b       .......   ..... ..... ... ..... ....... &b      imm=%imm_b %rs2 %rs1
  57 @s       .......   ..... ..... ... ..... ....... &s      imm=%imm_s %rs2 %rs1
  58 @u       ....................      ..... ....... &u      imm=%imm_u          %rd
  59 @j       ....................      ..... ....... &j      imm=%imm_j          %rd
  60
  61 @sh      ......  ...... .....  ... ..... ....... &shift  shamt=%sh10      %rs1 %rd
  62 @csr     ............   .....  ... ..... .......               %csr     %rs1 %rd
  63
  64 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0     %rs1 %rd
  65 @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2      %rs1 %rd
  66
  67 @r4_rm   ..... ..  ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
  68 @r_rm    .......   ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
  69 @r2_rm   .......   ..... ..... ... ..... ....... %rs1 %rm %rd
  70 @r2      .......   ..... ..... ... ..... ....... %rs1 %rd
  71 @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
  72 @r2_vm   ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
  73 @r_nfvm  ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
  74 @r_vm    ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
  75 @r_vm_1  ...... . ..... ..... ... ..... .......    &rmrr vm=1 %rs2 %rs1 %rd
  76 @r_vm_0  ...... . ..... ..... ... ..... .......    &rmrr vm=0 %rs2 %rs1 %rd
  77 @r_wdvm  ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
  78 @r2_zimm . zimm:11  ..... ... ..... ....... %rs1 %rd
  79
  80 @hfence_gvma ....... ..... .....   ... ..... ....... %rs2 %rs1
  81 @hfence_vvma ....... ..... .....   ... ..... ....... %rs2 %rs1
  82
  83 @sfence_vma ....... ..... .....   ... ..... ....... %rs2 %rs1
  84 @sfence_vm  ....... ..... .....   ... ..... ....... %rs1
  85
  86
  87 # *** Privileged Instructions ***
  88 ecall       000000000000     00000 000 00000 1110011
  89 ebreak      000000000001     00000 000 00000 1110011
  90 uret        0000000    00010 00000 000 00000 1110011
  91 sret        0001000    00010 00000 000 00000 1110011
  92 mret        0011000    00010 00000 000 00000 1110011
  93 wfi         0001000    00101 00000 000 00000 1110011
  94 sfence_vma  0001001    ..... ..... 000 00000 1110011 @sfence_vma
  95 sfence_vm   0001000    00100 ..... 000 00000 1110011 @sfence_vm
  96
  97 # *** RV32I Base Instruction Set ***
  98 lui      ....................       ..... 0110111 @u
  99 auipc    ....................       ..... 0010111 @u
 100 jal      ....................       ..... 1101111 @j
 101 jalr     ............     ..... 000 ..... 1100111 @i
 102 beq      ....... .....    ..... 000 ..... 1100011 @b
 103 bne      ....... .....    ..... 001 ..... 1100011 @b
 104 blt      ....... .....    ..... 100 ..... 1100011 @b
 105 bge      ....... .....    ..... 101 ..... 1100011 @b
 106 bltu     ....... .....    ..... 110 ..... 1100011 @b
 107 bgeu     ....... .....    ..... 111 ..... 1100011 @b
 108 lb       ............     ..... 000 ..... 0000011 @i
 109 lh       ............     ..... 001 ..... 0000011 @i
 110 lw       ............     ..... 010 ..... 0000011 @i
 111 lbu      ............     ..... 100 ..... 0000011 @i
 112 lhu      ............     ..... 101 ..... 0000011 @i
 113 sb       .......  .....   ..... 000 ..... 0100011 @s
 114 sh       .......  .....   ..... 001 ..... 0100011 @s
 115 sw       .......  .....   ..... 010 ..... 0100011 @s
 116 addi     ............     ..... 000 ..... 0010011 @i
 117 slti     ............     ..... 010 ..... 0010011 @i
 118 sltiu    ............     ..... 011 ..... 0010011 @i
 119 xori     ............     ..... 100 ..... 0010011 @i
 120 ori      ............     ..... 110 ..... 0010011 @i
 121 andi     ............     ..... 111 ..... 0010011 @i
 122 slli     00.... ......    ..... 001 ..... 0010011 @sh
 123 srli     00.... ......    ..... 101 ..... 0010011 @sh
 124 srai     01.... ......    ..... 101 ..... 0010011 @sh
 125 add      0000000 .....    ..... 000 ..... 0110011 @r
 126 sub      0100000 .....    ..... 000 ..... 0110011 @r
 127 sll      0000000 .....    ..... 001 ..... 0110011 @r
 128 slt      0000000 .....    ..... 010 ..... 0110011 @r
 129 sltu     0000000 .....    ..... 011 ..... 0110011 @r
 130 xor      0000000 .....    ..... 100 ..... 0110011 @r
 131 srl      0000000 .....    ..... 101 ..... 0110011 @r
 132 sra      0100000 .....    ..... 101 ..... 0110011 @r
 133 or       0000000 .....    ..... 110 ..... 0110011 @r
 134 and      0000000 .....    ..... 111 ..... 0110011 @r
 135 fence    ---- pred:4 succ:4 ----- 000 ----- 0001111
 136 fence_i  ---- ----   ----   ----- 001 ----- 0001111
 137 csrrw    ............     ..... 001 ..... 1110011 @csr
 138 csrrs    ............     ..... 010 ..... 1110011 @csr
 139 csrrc    ............     ..... 011 ..... 1110011 @csr
 140 csrrwi   ............     ..... 101 ..... 1110011 @csr
 141 csrrsi   ............     ..... 110 ..... 1110011 @csr
 142 csrrci   ............     ..... 111 ..... 1110011 @csr
 143
 144 # *** RV32M Standard Extension ***
 145 mul      0000001 .....  ..... 000 ..... 0110011 @r
 146 mulh     0000001 .....  ..... 001 ..... 0110011 @r
 147 mulhsu   0000001 .....  ..... 010 ..... 0110011 @r
 148 mulhu    0000001 .....  ..... 011 ..... 0110011 @r
 149 div      0000001 .....  ..... 100 ..... 0110011 @r
 150 divu     0000001 .....  ..... 101 ..... 0110011 @r
 151 rem      0000001 .....  ..... 110 ..... 0110011 @r
 152 remu     0000001 .....  ..... 111 ..... 0110011 @r
 153
 154 # *** RV32A Standard Extension ***
 155 lr_w       00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
 156 sc_w       00011 . . ..... ..... 010 ..... 0101111 @atom_st
 157 amoswap_w  00001 . . ..... ..... 010 ..... 0101111 @atom_st
 158 amoadd_w   00000 . . ..... ..... 010 ..... 0101111 @atom_st
 159 amoxor_w   00100 . . ..... ..... 010 ..... 0101111 @atom_st
 160 amoand_w   01100 . . ..... ..... 010 ..... 0101111 @atom_st
 161 amoor_w    01000 . . ..... ..... 010 ..... 0101111 @atom_st
 162 amomin_w   10000 . . ..... ..... 010 ..... 0101111 @atom_st
 163 amomax_w   10100 . . ..... ..... 010 ..... 0101111 @atom_st
 164 amominu_w  11000 . . ..... ..... 010 ..... 0101111 @atom_st
 165 amomaxu_w  11100 . . ..... ..... 010 ..... 0101111 @atom_st
 166
 167 # *** RV32F Standard Extension ***
 168 flw        ............   ..... 010 ..... 0000111 @i
 169 fsw        .......  ..... ..... 010 ..... 0100111 @s
 170 fmadd_s    ..... 00 ..... ..... ... ..... 1000011 @r4_rm
 171 fmsub_s    ..... 00 ..... ..... ... ..... 1000111 @r4_rm
 172 fnmsub_s   ..... 00 ..... ..... ... ..... 1001011 @r4_rm
 173 fnmadd_s   ..... 00 ..... ..... ... ..... 1001111 @r4_rm
 174 fadd_s     0000000  ..... ..... ... ..... 1010011 @r_rm
 175 fsub_s     0000100  ..... ..... ... ..... 1010011 @r_rm
 176 fmul_s     0001000  ..... ..... ... ..... 1010011 @r_rm
 177 fdiv_s     0001100  ..... ..... ... ..... 1010011 @r_rm
 178 fsqrt_s    0101100  00000 ..... ... ..... 1010011 @r2_rm
 179 fsgnj_s    0010000  ..... ..... 000 ..... 1010011 @r
 180 fsgnjn_s   0010000  ..... ..... 001 ..... 1010011 @r
 181 fsgnjx_s   0010000  ..... ..... 010 ..... 1010011 @r
 182 fmin_s     0010100  ..... ..... 000 ..... 1010011 @r
 183 fmax_s     0010100  ..... ..... 001 ..... 1010011 @r
 184 fcvt_w_s   1100000  00000 ..... ... ..... 1010011 @r2_rm
 185 fcvt_wu_s  1100000  00001 ..... ... ..... 1010011 @r2_rm
 186 fmv_x_w    1110000  00000 ..... 000 ..... 1010011 @r2
 187 feq_s      1010000  ..... ..... 010 ..... 1010011 @r
 188 flt_s      1010000  ..... ..... 001 ..... 1010011 @r
 189 fle_s      1010000  ..... ..... 000 ..... 1010011 @r
 190 fclass_s   1110000  00000 ..... 001 ..... 1010011 @r2
 191 fcvt_s_w   1101000  00000 ..... ... ..... 1010011 @r2_rm
 192 fcvt_s_wu  1101000  00001 ..... ... ..... 1010011 @r2_rm
 193 fmv_w_x    1111000  00000 ..... 000 ..... 1010011 @r2
 194
 195 # *** RV32D Standard Extension ***
 196 fld        ............   ..... 011 ..... 0000111 @i
 197 fsd        ....... .....  ..... 011 ..... 0100111 @s
 198 fmadd_d    ..... 01 ..... ..... ... ..... 1000011 @r4_rm
 199 fmsub_d    ..... 01 ..... ..... ... ..... 1000111 @r4_rm
 200 fnmsub_d   ..... 01 ..... ..... ... ..... 1001011 @r4_rm
 201 fnmadd_d   ..... 01 ..... ..... ... ..... 1001111 @r4_rm
 202 fadd_d     0000001  ..... ..... ... ..... 1010011 @r_rm
 203 fsub_d     0000101  ..... ..... ... ..... 1010011 @r_rm
 204 fmul_d     0001001  ..... ..... ... ..... 1010011 @r_rm
 205 fdiv_d     0001101  ..... ..... ... ..... 1010011 @r_rm
 206 fsqrt_d    0101101  00000 ..... ... ..... 1010011 @r2_rm
 207 fsgnj_d    0010001  ..... ..... 000 ..... 1010011 @r
 208 fsgnjn_d   0010001  ..... ..... 001 ..... 1010011 @r
 209 fsgnjx_d   0010001  ..... ..... 010 ..... 1010011 @r
 210 fmin_d     0010101  ..... ..... 000 ..... 1010011 @r
 211 fmax_d     0010101  ..... ..... 001 ..... 1010011 @r
 212 fcvt_s_d   0100000  00001 ..... ... ..... 1010011 @r2_rm
 213 fcvt_d_s   0100001  00000 ..... ... ..... 1010011 @r2_rm
 214 feq_d      1010001  ..... ..... 010 ..... 1010011 @r
 215 flt_d      1010001  ..... ..... 001 ..... 1010011 @r
 216 fle_d      1010001  ..... ..... 000 ..... 1010011 @r
 217 fclass_d   1110001  00000 ..... 001 ..... 1010011 @r2
 218 fcvt_w_d   1100001  00000 ..... ... ..... 1010011 @r2_rm
 219 fcvt_wu_d  1100001  00001 ..... ... ..... 1010011 @r2_rm
 220 fcvt_d_w   1101001  00000 ..... ... ..... 1010011 @r2_rm
 221 fcvt_d_wu  1101001  00001 ..... ... ..... 1010011 @r2_rm
 222
 223 # *** RV32H Base Instruction Set ***
 224 hfence_gvma 0110001  .....  ..... 000 00000 1110011 @hfence_gvma
 225 hfence_vvma 0010001  .....  ..... 000 00000 1110011 @hfence_vvma
 226
 227 # *** RV32V Extension ***
 228
 229 # *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
 230 vlb_v      ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
 231 vlh_v      ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
 232 vlw_v      ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
 233 vle_v      ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
 234 vlbu_v     ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
 235 vlhu_v     ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
 236 vlwu_v     ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
 237 vlbff_v    ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
 238 vlhff_v    ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
 239 vlwff_v    ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
 240 vleff_v    ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
 241 vlbuff_v   ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
 242 vlhuff_v   ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
 243 vlwuff_v   ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
 244 vsb_v      ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
 245 vsh_v      ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
 246 vsw_v      ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
 247 vse_v      ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
 248
 249 vlsb_v     ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
 250 vlsh_v     ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
 251 vlsw_v     ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
 252 vlse_v     ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
 253 vlsbu_v    ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
 254 vlshu_v    ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
 255 vlswu_v    ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
 256 vssb_v     ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
 257 vssh_v     ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
 258 vssw_v     ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
 259 vsse_v     ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
 260
 261 vlxb_v     ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
 262 vlxh_v     ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
 263 vlxw_v     ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
 264 vlxe_v     ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
 265 vlxbu_v    ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
 266 vlxhu_v    ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
 267 vlxwu_v    ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
 268 # Vector ordered-indexed and unordered-indexed store insns.
 269 vsxb_v     ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
 270 vsxh_v     ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
 271 vsxw_v     ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
 272 vsxe_v     ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
 273
 274 #*** Vector AMO operations are encoded under the standard AMO major opcode ***
 275 vamoswapw_v     00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
 276 vamoaddw_v      00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
 277 vamoxorw_v      00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
 278 vamoandw_v      01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
 279 vamoorw_v       01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
 280 vamominw_v      10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
 281 vamomaxw_v      10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
 282 vamominuw_v     11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
 283 vamomaxuw_v     11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
 284
 285 # *** new major opcode OP-V ***
 286 vadd_vv         000000 . ..... ..... 000 ..... 1010111 @r_vm
 287 vadd_vx         000000 . ..... ..... 100 ..... 1010111 @r_vm
 288 vadd_vi         000000 . ..... ..... 011 ..... 1010111 @r_vm
 289 vsub_vv         000010 . ..... ..... 000 ..... 1010111 @r_vm
 290 vsub_vx         000010 . ..... ..... 100 ..... 1010111 @r_vm
 291 vrsub_vx        000011 . ..... ..... 100 ..... 1010111 @r_vm
 292 vrsub_vi        000011 . ..... ..... 011 ..... 1010111 @r_vm
 293 vwaddu_vv       110000 . ..... ..... 010 ..... 1010111 @r_vm
 294 vwaddu_vx       110000 . ..... ..... 110 ..... 1010111 @r_vm
 295 vwadd_vv        110001 . ..... ..... 010 ..... 1010111 @r_vm
 296 vwadd_vx        110001 . ..... ..... 110 ..... 1010111 @r_vm
 297 vwsubu_vv       110010 . ..... ..... 010 ..... 1010111 @r_vm
 298 vwsubu_vx       110010 . ..... ..... 110 ..... 1010111 @r_vm
 299 vwsub_vv        110011 . ..... ..... 010 ..... 1010111 @r_vm
 300 vwsub_vx        110011 . ..... ..... 110 ..... 1010111 @r_vm
 301 vwaddu_wv       110100 . ..... ..... 010 ..... 1010111 @r_vm
 302 vwaddu_wx       110100 . ..... ..... 110 ..... 1010111 @r_vm
 303 vwadd_wv        110101 . ..... ..... 010 ..... 1010111 @r_vm
 304 vwadd_wx        110101 . ..... ..... 110 ..... 1010111 @r_vm
 305 vwsubu_wv       110110 . ..... ..... 010 ..... 1010111 @r_vm
 306 vwsubu_wx       110110 . ..... ..... 110 ..... 1010111 @r_vm
 307 vwsub_wv        110111 . ..... ..... 010 ..... 1010111 @r_vm
 308 vwsub_wx        110111 . ..... ..... 110 ..... 1010111 @r_vm
 309 vadc_vvm        010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
 310 vadc_vxm        010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
 311 vadc_vim        010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
 312 vmadc_vvm       010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
 313 vmadc_vxm       010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
 314 vmadc_vim       010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
 315 vsbc_vvm        010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
 316 vsbc_vxm        010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
 317 vmsbc_vvm       010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
 318 vmsbc_vxm       010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
 319 vand_vv         001001 . ..... ..... 000 ..... 1010111 @r_vm
 320 vand_vx         001001 . ..... ..... 100 ..... 1010111 @r_vm
 321 vand_vi         001001 . ..... ..... 011 ..... 1010111 @r_vm
 322 vor_vv          001010 . ..... ..... 000 ..... 1010111 @r_vm
 323 vor_vx          001010 . ..... ..... 100 ..... 1010111 @r_vm
 324 vor_vi          001010 . ..... ..... 011 ..... 1010111 @r_vm
 325 vxor_vv         001011 . ..... ..... 000 ..... 1010111 @r_vm
 326 vxor_vx         001011 . ..... ..... 100 ..... 1010111 @r_vm
 327 vxor_vi         001011 . ..... ..... 011 ..... 1010111 @r_vm
 328 vsll_vv         100101 . ..... ..... 000 ..... 1010111 @r_vm
 329 vsll_vx         100101 . ..... ..... 100 ..... 1010111 @r_vm
 330 vsll_vi         100101 . ..... ..... 011 ..... 1010111 @r_vm
 331 vsrl_vv         101000 . ..... ..... 000 ..... 1010111 @r_vm
 332 vsrl_vx         101000 . ..... ..... 100 ..... 1010111 @r_vm
 333 vsrl_vi         101000 . ..... ..... 011 ..... 1010111 @r_vm
 334 vsra_vv         101001 . ..... ..... 000 ..... 1010111 @r_vm
 335 vsra_vx         101001 . ..... ..... 100 ..... 1010111 @r_vm
 336 vsra_vi         101001 . ..... ..... 011 ..... 1010111 @r_vm
 337 vnsrl_vv        101100 . ..... ..... 000 ..... 1010111 @r_vm
 338 vnsrl_vx        101100 . ..... ..... 100 ..... 1010111 @r_vm
 339 vnsrl_vi        101100 . ..... ..... 011 ..... 1010111 @r_vm
 340 vnsra_vv        101101 . ..... ..... 000 ..... 1010111 @r_vm
 341 vnsra_vx        101101 . ..... ..... 100 ..... 1010111 @r_vm
 342 vnsra_vi        101101 . ..... ..... 011 ..... 1010111 @r_vm
 343 vmseq_vv        011000 . ..... ..... 000 ..... 1010111 @r_vm
 344 vmseq_vx        011000 . ..... ..... 100 ..... 1010111 @r_vm
 345 vmseq_vi        011000 . ..... ..... 011 ..... 1010111 @r_vm
 346 vmsne_vv        011001 . ..... ..... 000 ..... 1010111 @r_vm
 347 vmsne_vx        011001 . ..... ..... 100 ..... 1010111 @r_vm
 348 vmsne_vi        011001 . ..... ..... 011 ..... 1010111 @r_vm
 349 vmsltu_vv       011010 . ..... ..... 000 ..... 1010111 @r_vm
 350 vmsltu_vx       011010 . ..... ..... 100 ..... 1010111 @r_vm
 351 vmslt_vv        011011 . ..... ..... 000 ..... 1010111 @r_vm
 352 vmslt_vx        011011 . ..... ..... 100 ..... 1010111 @r_vm
 353 vmsleu_vv       011100 . ..... ..... 000 ..... 1010111 @r_vm
 354 vmsleu_vx       011100 . ..... ..... 100 ..... 1010111 @r_vm
 355 vmsleu_vi       011100 . ..... ..... 011 ..... 1010111 @r_vm
 356 vmsle_vv        011101 . ..... ..... 000 ..... 1010111 @r_vm
 357 vmsle_vx        011101 . ..... ..... 100 ..... 1010111 @r_vm
 358 vmsle_vi        011101 . ..... ..... 011 ..... 1010111 @r_vm
 359 vmsgtu_vx       011110 . ..... ..... 100 ..... 1010111 @r_vm
 360 vmsgtu_vi       011110 . ..... ..... 011 ..... 1010111 @r_vm
 361 vmsgt_vx        011111 . ..... ..... 100 ..... 1010111 @r_vm
 362 vmsgt_vi        011111 . ..... ..... 011 ..... 1010111 @r_vm
 363 vminu_vv        000100 . ..... ..... 000 ..... 1010111 @r_vm
 364 vminu_vx        000100 . ..... ..... 100 ..... 1010111 @r_vm
 365 vmin_vv         000101 . ..... ..... 000 ..... 1010111 @r_vm
 366 vmin_vx         000101 . ..... ..... 100 ..... 1010111 @r_vm
 367 vmaxu_vv        000110 . ..... ..... 000 ..... 1010111 @r_vm
 368 vmaxu_vx        000110 . ..... ..... 100 ..... 1010111 @r_vm
 369 vmax_vv         000111 . ..... ..... 000 ..... 1010111 @r_vm
 370 vmax_vx         000111 . ..... ..... 100 ..... 1010111 @r_vm
 371 vmul_vv         100101 . ..... ..... 010 ..... 1010111 @r_vm
 372 vmul_vx         100101 . ..... ..... 110 ..... 1010111 @r_vm
 373 vmulh_vv        100111 . ..... ..... 010 ..... 1010111 @r_vm
 374 vmulh_vx        100111 . ..... ..... 110 ..... 1010111 @r_vm
 375 vmulhu_vv       100100 . ..... ..... 010 ..... 1010111 @r_vm
 376 vmulhu_vx       100100 . ..... ..... 110 ..... 1010111 @r_vm
 377 vmulhsu_vv      100110 . ..... ..... 010 ..... 1010111 @r_vm
 378 vmulhsu_vx      100110 . ..... ..... 110 ..... 1010111 @r_vm
 379 vdivu_vv        100000 . ..... ..... 010 ..... 1010111 @r_vm
 380 vdivu_vx        100000 . ..... ..... 110 ..... 1010111 @r_vm
 381 vdiv_vv         100001 . ..... ..... 010 ..... 1010111 @r_vm
 382 vdiv_vx         100001 . ..... ..... 110 ..... 1010111 @r_vm
 383 vremu_vv        100010 . ..... ..... 010 ..... 1010111 @r_vm
 384 vremu_vx        100010 . ..... ..... 110 ..... 1010111 @r_vm
 385 vrem_vv         100011 . ..... ..... 010 ..... 1010111 @r_vm
 386 vrem_vx         100011 . ..... ..... 110 ..... 1010111 @r_vm
 387 vwmulu_vv       111000 . ..... ..... 010 ..... 1010111 @r_vm
 388 vwmulu_vx       111000 . ..... ..... 110 ..... 1010111 @r_vm
 389 vwmulsu_vv      111010 . ..... ..... 010 ..... 1010111 @r_vm
 390 vwmulsu_vx      111010 . ..... ..... 110 ..... 1010111 @r_vm
 391 vwmul_vv        111011 . ..... ..... 010 ..... 1010111 @r_vm
 392 vwmul_vx        111011 . ..... ..... 110 ..... 1010111 @r_vm
 393 vmacc_vv        101101 . ..... ..... 010 ..... 1010111 @r_vm
 394 vmacc_vx        101101 . ..... ..... 110 ..... 1010111 @r_vm
 395 vnmsac_vv       101111 . ..... ..... 010 ..... 1010111 @r_vm
 396 vnmsac_vx       101111 . ..... ..... 110 ..... 1010111 @r_vm
 397 vmadd_vv        101001 . ..... ..... 010 ..... 1010111 @r_vm
 398 vmadd_vx        101001 . ..... ..... 110 ..... 1010111 @r_vm
 399 vnmsub_vv       101011 . ..... ..... 010 ..... 1010111 @r_vm
 400 vnmsub_vx       101011 . ..... ..... 110 ..... 1010111 @r_vm
 401 vwmaccu_vv      111100 . ..... ..... 010 ..... 1010111 @r_vm
 402 vwmaccu_vx      111100 . ..... ..... 110 ..... 1010111 @r_vm
 403 vwmacc_vv       111101 . ..... ..... 010 ..... 1010111 @r_vm
 404 vwmacc_vx       111101 . ..... ..... 110 ..... 1010111 @r_vm
 405 vwmaccsu_vv     111110 . ..... ..... 010 ..... 1010111 @r_vm
 406 vwmaccsu_vx     111110 . ..... ..... 110 ..... 1010111 @r_vm
 407 vwmaccus_vx     111111 . ..... ..... 110 ..... 1010111 @r_vm
 408 vmv_v_v         010111 1 00000 ..... 000 ..... 1010111 @r2
 409 vmv_v_x         010111 1 00000 ..... 100 ..... 1010111 @r2
 410 vmv_v_i         010111 1 00000 ..... 011 ..... 1010111 @r2
 411 vmerge_vvm      010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
 412 vmerge_vxm      010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
 413 vmerge_vim      010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
 414 vsaddu_vv       100000 . ..... ..... 000 ..... 1010111 @r_vm
 415 vsaddu_vx       100000 . ..... ..... 100 ..... 1010111 @r_vm
 416 vsaddu_vi       100000 . ..... ..... 011 ..... 1010111 @r_vm
 417 vsadd_vv        100001 . ..... ..... 000 ..... 1010111 @r_vm
 418 vsadd_vx        100001 . ..... ..... 100 ..... 1010111 @r_vm
 419 vsadd_vi        100001 . ..... ..... 011 ..... 1010111 @r_vm
 420 vssubu_vv       100010 . ..... ..... 000 ..... 1010111 @r_vm
 421 vssubu_vx       100010 . ..... ..... 100 ..... 1010111 @r_vm
 422 vssub_vv        100011 . ..... ..... 000 ..... 1010111 @r_vm
 423 vssub_vx        100011 . ..... ..... 100 ..... 1010111 @r_vm
 424 vaadd_vv        100100 . ..... ..... 000 ..... 1010111 @r_vm
 425 vaadd_vx        100100 . ..... ..... 100 ..... 1010111 @r_vm
 426 vaadd_vi        100100 . ..... ..... 011 ..... 1010111 @r_vm
 427 vasub_vv        100110 . ..... ..... 000 ..... 1010111 @r_vm
 428 vasub_vx        100110 . ..... ..... 100 ..... 1010111 @r_vm
 429 vsmul_vv        100111 . ..... ..... 000 ..... 1010111 @r_vm
 430 vsmul_vx        100111 . ..... ..... 100 ..... 1010111 @r_vm
 431 vwsmaccu_vv     111100 . ..... ..... 000 ..... 1010111 @r_vm
 432 vwsmaccu_vx     111100 . ..... ..... 100 ..... 1010111 @r_vm
 433 vwsmacc_vv      111101 . ..... ..... 000 ..... 1010111 @r_vm
 434 vwsmacc_vx      111101 . ..... ..... 100 ..... 1010111 @r_vm
 435 vwsmaccsu_vv    111110 . ..... ..... 000 ..... 1010111 @r_vm
 436 vwsmaccsu_vx    111110 . ..... ..... 100 ..... 1010111 @r_vm
 437 vwsmaccus_vx    111111 . ..... ..... 100 ..... 1010111 @r_vm
 438 vssrl_vv        101010 . ..... ..... 000 ..... 1010111 @r_vm
 439 vssrl_vx        101010 . ..... ..... 100 ..... 1010111 @r_vm
 440 vssrl_vi        101010 . ..... ..... 011 ..... 1010111 @r_vm
 441 vssra_vv        101011 . ..... ..... 000 ..... 1010111 @r_vm
 442 vssra_vx        101011 . ..... ..... 100 ..... 1010111 @r_vm
 443 vssra_vi        101011 . ..... ..... 011 ..... 1010111 @r_vm
 444 vnclipu_vv      101110 . ..... ..... 000 ..... 1010111 @r_vm
 445 vnclipu_vx      101110 . ..... ..... 100 ..... 1010111 @r_vm
 446 vnclipu_vi      101110 . ..... ..... 011 ..... 1010111 @r_vm
 447 vnclip_vv       101111 . ..... ..... 000 ..... 1010111 @r_vm
 448 vnclip_vx       101111 . ..... ..... 100 ..... 1010111 @r_vm
 449 vnclip_vi       101111 . ..... ..... 011 ..... 1010111 @r_vm
 450 vfadd_vv        000000 . ..... ..... 001 ..... 1010111 @r_vm
 451 vfadd_vf        000000 . ..... ..... 101 ..... 1010111 @r_vm
 452 vfsub_vv        000010 . ..... ..... 001 ..... 1010111 @r_vm
 453 vfsub_vf        000010 . ..... ..... 101 ..... 1010111 @r_vm
 454 vfrsub_vf       100111 . ..... ..... 101 ..... 1010111 @r_vm
 455 vfwadd_vv       110000 . ..... ..... 001 ..... 1010111 @r_vm
 456 vfwadd_vf       110000 . ..... ..... 101 ..... 1010111 @r_vm
 457 vfwadd_wv       110100 . ..... ..... 001 ..... 1010111 @r_vm
 458 vfwadd_wf       110100 . ..... ..... 101 ..... 1010111 @r_vm
 459 vfwsub_vv       110010 . ..... ..... 001 ..... 1010111 @r_vm
 460 vfwsub_vf       110010 . ..... ..... 101 ..... 1010111 @r_vm
 461 vfwsub_wv       110110 . ..... ..... 001 ..... 1010111 @r_vm
 462 vfwsub_wf       110110 . ..... ..... 101 ..... 1010111 @r_vm
 463 vfmul_vv        100100 . ..... ..... 001 ..... 1010111 @r_vm
 464 vfmul_vf        100100 . ..... ..... 101 ..... 1010111 @r_vm
 465 vfdiv_vv        100000 . ..... ..... 001 ..... 1010111 @r_vm
 466 vfdiv_vf        100000 . ..... ..... 101 ..... 1010111 @r_vm
 467 vfrdiv_vf       100001 . ..... ..... 101 ..... 1010111 @r_vm
 468 vfwmul_vv       111000 . ..... ..... 001 ..... 1010111 @r_vm
 469 vfwmul_vf       111000 . ..... ..... 101 ..... 1010111 @r_vm
 470 vfmacc_vv       101100 . ..... ..... 001 ..... 1010111 @r_vm
 471 vfnmacc_vv      101101 . ..... ..... 001 ..... 1010111 @r_vm
 472 vfnmacc_vf      101101 . ..... ..... 101 ..... 1010111 @r_vm
 473 vfmacc_vf       101100 . ..... ..... 101 ..... 1010111 @r_vm
 474 vfmsac_vv       101110 . ..... ..... 001 ..... 1010111 @r_vm
 475 vfmsac_vf       101110 . ..... ..... 101 ..... 1010111 @r_vm
 476 vfnmsac_vv      101111 . ..... ..... 001 ..... 1010111 @r_vm
 477 vfnmsac_vf      101111 . ..... ..... 101 ..... 1010111 @r_vm
 478 vfmadd_vv       101000 . ..... ..... 001 ..... 1010111 @r_vm
 479 vfmadd_vf       101000 . ..... ..... 101 ..... 1010111 @r_vm
 480 vfnmadd_vv      101001 . ..... ..... 001 ..... 1010111 @r_vm
 481 vfnmadd_vf      101001 . ..... ..... 101 ..... 1010111 @r_vm
 482 vfmsub_vv       101010 . ..... ..... 001 ..... 1010111 @r_vm
 483 vfmsub_vf       101010 . ..... ..... 101 ..... 1010111 @r_vm
 484 vfnmsub_vv      101011 . ..... ..... 001 ..... 1010111 @r_vm
 485 vfnmsub_vf      101011 . ..... ..... 101 ..... 1010111 @r_vm
 486 vfwmacc_vv      111100 . ..... ..... 001 ..... 1010111 @r_vm
 487 vfwmacc_vf      111100 . ..... ..... 101 ..... 1010111 @r_vm
 488 vfwnmacc_vv     111101 . ..... ..... 001 ..... 1010111 @r_vm
 489 vfwnmacc_vf     111101 . ..... ..... 101 ..... 1010111 @r_vm
 490 vfwmsac_vv      111110 . ..... ..... 001 ..... 1010111 @r_vm
 491 vfwmsac_vf      111110 . ..... ..... 101 ..... 1010111 @r_vm
 492 vfwnmsac_vv     111111 . ..... ..... 001 ..... 1010111 @r_vm
 493 vfwnmsac_vf     111111 . ..... ..... 101 ..... 1010111 @r_vm
 494 vfsqrt_v        100011 . ..... 00000 001 ..... 1010111 @r2_vm
 495 vfmin_vv        000100 . ..... ..... 001 ..... 1010111 @r_vm
 496 vfmin_vf        000100 . ..... ..... 101 ..... 1010111 @r_vm
 497 vfmax_vv        000110 . ..... ..... 001 ..... 1010111 @r_vm
 498 vfmax_vf        000110 . ..... ..... 101 ..... 1010111 @r_vm
 499 vfsgnj_vv       001000 . ..... ..... 001 ..... 1010111 @r_vm
 500 vfsgnj_vf       001000 . ..... ..... 101 ..... 1010111 @r_vm
 501 vfsgnjn_vv      001001 . ..... ..... 001 ..... 1010111 @r_vm
 502 vfsgnjn_vf      001001 . ..... ..... 101 ..... 1010111 @r_vm
 503 vfsgnjx_vv      001010 . ..... ..... 001 ..... 1010111 @r_vm
 504 vfsgnjx_vf      001010 . ..... ..... 101 ..... 1010111 @r_vm
 505 vmfeq_vv        011000 . ..... ..... 001 ..... 1010111 @r_vm
 506 vmfeq_vf        011000 . ..... ..... 101 ..... 1010111 @r_vm
 507 vmfne_vv        011100 . ..... ..... 001 ..... 1010111 @r_vm
 508 vmfne_vf        011100 . ..... ..... 101 ..... 1010111 @r_vm
 509 vmflt_vv        011011 . ..... ..... 001 ..... 1010111 @r_vm
 510 vmflt_vf        011011 . ..... ..... 101 ..... 1010111 @r_vm
 511 vmfle_vv        011001 . ..... ..... 001 ..... 1010111 @r_vm
 512 vmfle_vf        011001 . ..... ..... 101 ..... 1010111 @r_vm
 513 vmfgt_vf        011101 . ..... ..... 101 ..... 1010111 @r_vm
 514 vmfge_vf        011111 . ..... ..... 101 ..... 1010111 @r_vm
 515 vmford_vv       011010 . ..... ..... 001 ..... 1010111 @r_vm
 516 vmford_vf       011010 . ..... ..... 101 ..... 1010111 @r_vm
 517 vfclass_v       100011 . ..... 10000 001 ..... 1010111 @r2_vm
 518 vfmerge_vfm     010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
 519 vfmv_v_f        010111 1 00000 ..... 101 ..... 1010111 @r2
 520 vfcvt_xu_f_v    100010 . ..... 00000 001 ..... 1010111 @r2_vm
 521 vfcvt_x_f_v     100010 . ..... 00001 001 ..... 1010111 @r2_vm
 522 vfcvt_f_xu_v    100010 . ..... 00010 001 ..... 1010111 @r2_vm
 523 vfcvt_f_x_v     100010 . ..... 00011 001 ..... 1010111 @r2_vm
 524 vfwcvt_xu_f_v   100010 . ..... 01000 001 ..... 1010111 @r2_vm
 525 vfwcvt_x_f_v    100010 . ..... 01001 001 ..... 1010111 @r2_vm
 526 vfwcvt_f_xu_v   100010 . ..... 01010 001 ..... 1010111 @r2_vm
 527 vfwcvt_f_x_v    100010 . ..... 01011 001 ..... 1010111 @r2_vm
 528 vfwcvt_f_f_v    100010 . ..... 01100 001 ..... 1010111 @r2_vm
 529 vfncvt_xu_f_v   100010 . ..... 10000 001 ..... 1010111 @r2_vm
 530 vfncvt_x_f_v    100010 . ..... 10001 001 ..... 1010111 @r2_vm
 531 vfncvt_f_xu_v   100010 . ..... 10010 001 ..... 1010111 @r2_vm
 532 vfncvt_f_x_v    100010 . ..... 10011 001 ..... 1010111 @r2_vm
 533 vfncvt_f_f_v    100010 . ..... 10100 001 ..... 1010111 @r2_vm
 534 vredsum_vs      000000 . ..... ..... 010 ..... 1010111 @r_vm
 535 vredand_vs      000001 . ..... ..... 010 ..... 1010111 @r_vm
 536 vredor_vs       000010 . ..... ..... 010 ..... 1010111 @r_vm
 537 vredxor_vs      000011 . ..... ..... 010 ..... 1010111 @r_vm
 538 vredminu_vs     000100 . ..... ..... 010 ..... 1010111 @r_vm
 539 vredmin_vs      000101 . ..... ..... 010 ..... 1010111 @r_vm
 540 vredmaxu_vs     000110 . ..... ..... 010 ..... 1010111 @r_vm
 541 vredmax_vs      000111 . ..... ..... 010 ..... 1010111 @r_vm
 542 vwredsumu_vs    110000 . ..... ..... 000 ..... 1010111 @r_vm
 543 vwredsum_vs     110001 . ..... ..... 000 ..... 1010111 @r_vm
 544 # Vector ordered and unordered reduction sum
 545 vfredsum_vs     0000-1 . ..... ..... 001 ..... 1010111 @r_vm
 546 vfredmin_vs     000101 . ..... ..... 001 ..... 1010111 @r_vm
 547 vfredmax_vs     000111 . ..... ..... 001 ..... 1010111 @r_vm
 548 # Vector widening ordered and unordered float reduction sum
 549 vfwredsum_vs    1100-1 . ..... ..... 001 ..... 1010111 @r_vm
 550 vmand_mm        011001 - ..... ..... 010 ..... 1010111 @r
 551 vmnand_mm       011101 - ..... ..... 010 ..... 1010111 @r
 552 vmandnot_mm     011000 - ..... ..... 010 ..... 1010111 @r
 553 vmxor_mm        011011 - ..... ..... 010 ..... 1010111 @r
 554 vmor_mm         011010 - ..... ..... 010 ..... 1010111 @r
 555 vmnor_mm        011110 - ..... ..... 010 ..... 1010111 @r
 556 vmornot_mm      011100 - ..... ..... 010 ..... 1010111 @r
 557 vmxnor_mm       011111 - ..... ..... 010 ..... 1010111 @r
 558 vmpopc_m        010100 . ..... ----- 010 ..... 1010111 @r2_vm
 559 vmfirst_m       010101 . ..... ----- 010 ..... 1010111 @r2_vm
 560 vmsbf_m         010110 . ..... 00001 010 ..... 1010111 @r2_vm
 561 vmsif_m         010110 . ..... 00011 010 ..... 1010111 @r2_vm
 562 vmsof_m         010110 . ..... 00010 010 ..... 1010111 @r2_vm
 563 viota_m         010110 . ..... 10000 010 ..... 1010111 @r2_vm
 564
 565 vsetvli         0 ........... ..... 111 ..... 1010111  @r2_zimm
 566 vsetvl          1000000 ..... ..... 111 ..... 1010111  @r