target/riscv/meson.build

   1 # FIXME extra_args should accept files()
   2 gen = [
   3   decodetree.process('insn16.decode', extra_args: ['--static-decode=decode_insn16', '--insnwidth=16']),
   4   decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
   5   decodetree.process('xthead.decode', extra_args: '--static-decode=decode_xthead'),
   6   decodetree.process('XVentanaCondOps.decode', extra_args: '--static-decode=decode_XVentanaCodeOps'),
   7 ]
   8
   9 riscv_ss = ss.source_set()
  10 riscv_ss.add(gen)
  11 riscv_ss.add(files(
  12   'cpu.c',
  13   'cpu_helper.c',
  14   'csr.c',
  15   'fpu_helper.c',
  16   'gdbstub.c',
  17   'op_helper.c',
  18   'vector_helper.c',
  19   'vector_internals.c',
  20   'bitmanip_helper.c',
  21   'translate.c',
  22   'm128_helper.c',
  23   'crypto_helper.c',
  24   'zce_helper.c',
  25   'vcrypto_helper.c'
  26 ))
  27
  28 riscv_system_ss = ss.source_set()
  29 riscv_system_ss.add(files(
  30   'arch_dump.c',
  31   'pmp.c',
  32   'debug.c',
  33   'monitor.c',
  34   'machine.c',
  35   'pmu.c',
  36   'time_helper.c',
  37   'riscv-qmp-cmds.c',
  38 ))
  39
  40 subdir('tcg')
  41 subdir('kvm')
  42
  43 target_arch += {'riscv': riscv_ss}
  44 target_system_arch += {'riscv': riscv_system_ss}