target/sparc/cpu-qom.h

   1 /*
   2  * QEMU SPARC CPU QOM header (target agnostic)
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see
  18  * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19  */
  20 #ifndef QEMU_SPARC_CPU_QOM_H
  21 #define QEMU_SPARC_CPU_QOM_H
  22
  23 #include "hw/core/cpu.h"
  24 #include "qom/object.h"
  25
  26 #ifdef TARGET_SPARC64
  27 #define TYPE_SPARC_CPU "sparc64-cpu"
  28 #else
  29 #define TYPE_SPARC_CPU "sparc-cpu"
  30 #endif
  31
  32 OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU)
  33
  34 #define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
  35 #define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
  36
  37 typedef struct sparc_def_t sparc_def_t;
  38 /**
  39  * SPARCCPUClass:
  40  * @parent_realize: The parent class' realize handler.
  41  * @parent_phases: The parent class' reset phase handlers.
  42  *
  43  * A SPARC CPU model.
  44  */
  45 struct SPARCCPUClass {
  46     CPUClass parent_class;
  47
  48     DeviceRealize parent_realize;
  49     ResettablePhases parent_phases;
  50     sparc_def_t *cpu_def;
  51 };
  52
  53
  54 #endif