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1 /*
2 * Alpha emulation cpu micro-operations helpers for qemu.
3 *
4 * Copyright (c) 2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "cpu.h"
21 #include "dyngen-exec.h"
22 #include "host-utils.h"
23 #include "softfloat.h"
24 #include "helper.h"
25 #include "sysemu.h"
26 #include "qemu-timer.h"
27
28 /*****************************************************************************/
29 /* Exceptions processing helpers */
30
31 uint64_t helper_load_pcc (void)
32 {
33 #ifndef CONFIG_USER_ONLY
34 /* In system mode we have access to a decent high-resolution clock.
35 In order to make OS-level time accounting work with the RPCC,
36 present it with a well-timed clock fixed at 250MHz. */
37 return (((uint64_t)env->pcc_ofs << 32)
38 | (uint32_t)(qemu_get_clock_ns(vm_clock) >> 2));
39 #else
40 /* In user-mode, vm_clock doesn't exist. Just pass through the host cpu
41 clock ticks. Also, don't bother taking PCC_OFS into account. */
42 return (uint32_t)cpu_get_real_ticks();
43 #endif
44 }
45
46 uint64_t helper_load_fpcr (void)
47 {
48 return cpu_alpha_load_fpcr (env);
49 }
50
51 void helper_store_fpcr (uint64_t val)
52 {
53 cpu_alpha_store_fpcr (env, val);
54 }
55
56 uint64_t helper_addqv (uint64_t op1, uint64_t op2)
57 {
58 uint64_t tmp = op1;
59 op1 += op2;
60 if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) {
61 arith_excp(env, GETPC(), EXC_M_IOV, 0);
62 }
63 return op1;
64 }
65
66 uint64_t helper_addlv (uint64_t op1, uint64_t op2)
67 {
68 uint64_t tmp = op1;
69 op1 = (uint32_t)(op1 + op2);
70 if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) {
71 arith_excp(env, GETPC(), EXC_M_IOV, 0);
72 }
73 return op1;
74 }
75
76 uint64_t helper_subqv (uint64_t op1, uint64_t op2)
77 {
78 uint64_t res;
79 res = op1 - op2;
80 if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) {
81 arith_excp(env, GETPC(), EXC_M_IOV, 0);
82 }
83 return res;
84 }
85
86 uint64_t helper_sublv (uint64_t op1, uint64_t op2)
87 {
88 uint32_t res;
89 res = op1 - op2;
90 if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) {
91 arith_excp(env, GETPC(), EXC_M_IOV, 0);
92 }
93 return res;
94 }
95
96 uint64_t helper_mullv (uint64_t op1, uint64_t op2)
97 {
98 int64_t res = (int64_t)op1 * (int64_t)op2;
99
100 if (unlikely((int32_t)res != res)) {
101 arith_excp(env, GETPC(), EXC_M_IOV, 0);
102 }
103 return (int64_t)((int32_t)res);
104 }
105
106 uint64_t helper_mulqv (uint64_t op1, uint64_t op2)
107 {
108 uint64_t tl, th;
109
110 muls64(&tl, &th, op1, op2);
111 /* If th != 0 && th != -1, then we had an overflow */
112 if (unlikely((th + 1) > 1)) {
113 arith_excp(env, GETPC(), EXC_M_IOV, 0);
114 }
115 return tl;
116 }
117
118 /* PALcode support special instructions */
119 #if !defined (CONFIG_USER_ONLY)
120 void helper_hw_ret (uint64_t a)
121 {
122 env->pc = a & ~3;
123 env->intr_flag = 0;
124 env->lock_addr = -1;
125 if ((a & 1) == 0) {
126 env->pal_mode = 0;
127 swap_shadow_regs(env);
128 }
129 }
130
131 void helper_tbia(void)
132 {
133 tlb_flush(env, 1);
134 }
135
136 void helper_tbis(uint64_t p)
137 {
138 tlb_flush_page(env, p);
139 }
140
141 void helper_halt(uint64_t restart)
142 {
143 if (restart) {
144 qemu_system_reset_request();
145 } else {
146 qemu_system_shutdown_request();
147 }
148 }
149
150 uint64_t helper_get_time(void)
151 {
152 return qemu_get_clock_ns(rtc_clock);
153 }
154
155 void helper_set_alarm(uint64_t expire)
156 {
157 if (expire) {
158 env->alarm_expire = expire;
159 qemu_mod_timer(env->alarm_timer, expire);
160 } else {
161 qemu_del_timer(env->alarm_timer);
162 }
163 }
164 #endif
165
166 /*****************************************************************************/
167 /* Softmmu support */
168 #if !defined (CONFIG_USER_ONLY)
169 uint64_t helper_ldl_phys(uint64_t p)
170 {
171 return (int32_t)ldl_phys(p);
172 }
173
174 uint64_t helper_ldq_phys(uint64_t p)
175 {
176 return ldq_phys(p);
177 }
178
179 uint64_t helper_ldl_l_phys(uint64_t p)
180 {
181 env->lock_addr = p;
182 return env->lock_value = (int32_t)ldl_phys(p);
183 }
184
185 uint64_t helper_ldq_l_phys(uint64_t p)
186 {
187 env->lock_addr = p;
188 return env->lock_value = ldl_phys(p);
189 }
190
191 void helper_stl_phys(uint64_t p, uint64_t v)
192 {
193 stl_phys(p, v);
194 }
195
196 void helper_stq_phys(uint64_t p, uint64_t v)
197 {
198 stq_phys(p, v);
199 }
200
201 uint64_t helper_stl_c_phys(uint64_t p, uint64_t v)
202 {
203 uint64_t ret = 0;
204
205 if (p == env->lock_addr) {
206 int32_t old = ldl_phys(p);
207 if (old == (int32_t)env->lock_value) {
208 stl_phys(p, v);
209 ret = 1;
210 }
211 }
212 env->lock_addr = -1;
213
214 return ret;
215 }
216
217 uint64_t helper_stq_c_phys(uint64_t p, uint64_t v)
218 {
219 uint64_t ret = 0;
220
221 if (p == env->lock_addr) {
222 uint64_t old = ldq_phys(p);
223 if (old == env->lock_value) {
224 stq_phys(p, v);
225 ret = 1;
226 }
227 }
228 env->lock_addr = -1;
229
230 return ret;
231 }
232
233 static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write,
234 int is_user, void *retaddr)
235 {
236 uint64_t pc;
237 uint32_t insn;
238
239 do_restore_state(env, retaddr);
240
241 pc = env->pc;
242 insn = ldl_code(pc);
243
244 env->trap_arg0 = addr;
245 env->trap_arg1 = insn >> 26; /* opcode */
246 env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
247 env->exception_index = EXCP_UNALIGN;
248 env->error_code = 0;
249 cpu_loop_exit(env);
250 }
251
252 void QEMU_NORETURN cpu_unassigned_access(CPUAlphaState *env1,
253 target_phys_addr_t addr, int is_write,
254 int is_exec, int unused, int size)
255 {
256 env = env1;
257 env->trap_arg0 = addr;
258 env->trap_arg1 = is_write;
259 dynamic_excp(env1, GETPC(), EXCP_MCHK, 0);
260 }
261
262 #include "softmmu_exec.h"
263
264 #define MMUSUFFIX _mmu
265 #define ALIGNED_ONLY
266
267 #define SHIFT 0
268 #include "softmmu_template.h"
269
270 #define SHIFT 1
271 #include "softmmu_template.h"
272
273 #define SHIFT 2
274 #include "softmmu_template.h"
275
276 #define SHIFT 3
277 #include "softmmu_template.h"
278
279 /* try to fill the TLB and return an exception if error. If retaddr is
280 NULL, it means that the function was called in C code (i.e. not
281 from generated code or from helper.c) */
282 /* XXX: fix it to restore all registers */
283 void tlb_fill(CPUAlphaState *env1, target_ulong addr, int is_write, int mmu_idx,
284 void *retaddr)
285 {
286 CPUAlphaState *saved_env;
287 int ret;
288
289 saved_env = env;
290 env = env1;
291 ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx);
292 if (unlikely(ret != 0)) {
293 do_restore_state(env, retaddr);
294 /* Exception index and error code are already set */
295 cpu_loop_exit(env);
296 }
297 env = saved_env;
298 }
299 #endif