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kvm: introduce kvm_arch_msi_data_to_gsi
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1 /*
2 * ARM implementation of KVM hooks
3 *
4 * Copyright Christoffer Dall 2009-2010
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 */
10
11 #include <stdio.h>
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
14 #include <sys/mman.h>
15
16 #include <linux/kvm.h>
17
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "kvm_arm.h"
23 #include "cpu.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
26 #include "exec/memattrs.h"
27
28 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
29 KVM_CAP_LAST_INFO
30 };
31
32 static bool cap_has_mp_state;
33
34 int kvm_arm_vcpu_init(CPUState *cs)
35 {
36 ARMCPU *cpu = ARM_CPU(cs);
37 struct kvm_vcpu_init init;
38
39 init.target = cpu->kvm_target;
40 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
41
42 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
43 }
44
45 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
46 int *fdarray,
47 struct kvm_vcpu_init *init)
48 {
49 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
50
51 kvmfd = qemu_open("/dev/kvm", O_RDWR);
52 if (kvmfd < 0) {
53 goto err;
54 }
55 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
56 if (vmfd < 0) {
57 goto err;
58 }
59 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
60 if (cpufd < 0) {
61 goto err;
62 }
63
64 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
65 if (ret >= 0) {
66 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
67 if (ret < 0) {
68 goto err;
69 }
70 } else {
71 /* Old kernel which doesn't know about the
72 * PREFERRED_TARGET ioctl: we know it will only support
73 * creating one kind of guest CPU which is its preferred
74 * CPU type.
75 */
76 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
77 init->target = *cpus_to_try++;
78 memset(init->features, 0, sizeof(init->features));
79 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
80 if (ret >= 0) {
81 break;
82 }
83 }
84 if (ret < 0) {
85 goto err;
86 }
87 }
88
89 fdarray[0] = kvmfd;
90 fdarray[1] = vmfd;
91 fdarray[2] = cpufd;
92
93 return true;
94
95 err:
96 if (cpufd >= 0) {
97 close(cpufd);
98 }
99 if (vmfd >= 0) {
100 close(vmfd);
101 }
102 if (kvmfd >= 0) {
103 close(kvmfd);
104 }
105
106 return false;
107 }
108
109 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
110 {
111 int i;
112
113 for (i = 2; i >= 0; i--) {
114 close(fdarray[i]);
115 }
116 }
117
118 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
119 {
120 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
121
122 /* All we really need to set up for the 'host' CPU
123 * is the feature bits -- we rely on the fact that the
124 * various ID register values in ARMCPU are only used for
125 * TCG CPUs.
126 */
127 if (!kvm_arm_get_host_cpu_features(ahcc)) {
128 fprintf(stderr, "Failed to retrieve host CPU features!\n");
129 abort();
130 }
131 }
132
133 static void kvm_arm_host_cpu_initfn(Object *obj)
134 {
135 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
136 ARMCPU *cpu = ARM_CPU(obj);
137 CPUARMState *env = &cpu->env;
138
139 cpu->kvm_target = ahcc->target;
140 cpu->dtb_compatible = ahcc->dtb_compatible;
141 env->features = ahcc->features;
142 }
143
144 static const TypeInfo host_arm_cpu_type_info = {
145 .name = TYPE_ARM_HOST_CPU,
146 #ifdef TARGET_AARCH64
147 .parent = TYPE_AARCH64_CPU,
148 #else
149 .parent = TYPE_ARM_CPU,
150 #endif
151 .instance_init = kvm_arm_host_cpu_initfn,
152 .class_init = kvm_arm_host_cpu_class_init,
153 .class_size = sizeof(ARMHostCPUClass),
154 };
155
156 int kvm_arch_init(MachineState *ms, KVMState *s)
157 {
158 /* For ARM interrupt delivery is always asynchronous,
159 * whether we are using an in-kernel VGIC or not.
160 */
161 kvm_async_interrupts_allowed = true;
162
163 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
164
165 type_register_static(&host_arm_cpu_type_info);
166
167 return 0;
168 }
169
170 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
171 {
172 return cpu->cpu_index;
173 }
174
175 /* We track all the KVM devices which need their memory addresses
176 * passing to the kernel in a list of these structures.
177 * When board init is complete we run through the list and
178 * tell the kernel the base addresses of the memory regions.
179 * We use a MemoryListener to track mapping and unmapping of
180 * the regions during board creation, so the board models don't
181 * need to do anything special for the KVM case.
182 */
183 typedef struct KVMDevice {
184 struct kvm_arm_device_addr kda;
185 struct kvm_device_attr kdattr;
186 MemoryRegion *mr;
187 QSLIST_ENTRY(KVMDevice) entries;
188 int dev_fd;
189 } KVMDevice;
190
191 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
192
193 static void kvm_arm_devlistener_add(MemoryListener *listener,
194 MemoryRegionSection *section)
195 {
196 KVMDevice *kd;
197
198 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
199 if (section->mr == kd->mr) {
200 kd->kda.addr = section->offset_within_address_space;
201 }
202 }
203 }
204
205 static void kvm_arm_devlistener_del(MemoryListener *listener,
206 MemoryRegionSection *section)
207 {
208 KVMDevice *kd;
209
210 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
211 if (section->mr == kd->mr) {
212 kd->kda.addr = -1;
213 }
214 }
215 }
216
217 static MemoryListener devlistener = {
218 .region_add = kvm_arm_devlistener_add,
219 .region_del = kvm_arm_devlistener_del,
220 };
221
222 static void kvm_arm_set_device_addr(KVMDevice *kd)
223 {
224 struct kvm_device_attr *attr = &kd->kdattr;
225 int ret;
226
227 /* If the device control API is available and we have a device fd on the
228 * KVMDevice struct, let's use the newer API
229 */
230 if (kd->dev_fd >= 0) {
231 uint64_t addr = kd->kda.addr;
232 attr->addr = (uintptr_t)&addr;
233 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
234 } else {
235 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
236 }
237
238 if (ret < 0) {
239 fprintf(stderr, "Failed to set device address: %s\n",
240 strerror(-ret));
241 abort();
242 }
243 }
244
245 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
246 {
247 KVMDevice *kd, *tkd;
248
249 memory_listener_unregister(&devlistener);
250 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
251 if (kd->kda.addr != -1) {
252 kvm_arm_set_device_addr(kd);
253 }
254 memory_region_unref(kd->mr);
255 g_free(kd);
256 }
257 }
258
259 static Notifier notify = {
260 .notify = kvm_arm_machine_init_done,
261 };
262
263 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
264 uint64_t attr, int dev_fd)
265 {
266 KVMDevice *kd;
267
268 if (!kvm_irqchip_in_kernel()) {
269 return;
270 }
271
272 if (QSLIST_EMPTY(&kvm_devices_head)) {
273 memory_listener_register(&devlistener, NULL);
274 qemu_add_machine_init_done_notifier(&notify);
275 }
276 kd = g_new0(KVMDevice, 1);
277 kd->mr = mr;
278 kd->kda.id = devid;
279 kd->kda.addr = -1;
280 kd->kdattr.flags = 0;
281 kd->kdattr.group = group;
282 kd->kdattr.attr = attr;
283 kd->dev_fd = dev_fd;
284 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
285 memory_region_ref(kd->mr);
286 }
287
288 static int compare_u64(const void *a, const void *b)
289 {
290 if (*(uint64_t *)a > *(uint64_t *)b) {
291 return 1;
292 }
293 if (*(uint64_t *)a < *(uint64_t *)b) {
294 return -1;
295 }
296 return 0;
297 }
298
299 /* Initialize the CPUState's cpreg list according to the kernel's
300 * definition of what CPU registers it knows about (and throw away
301 * the previous TCG-created cpreg list).
302 */
303 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
304 {
305 struct kvm_reg_list rl;
306 struct kvm_reg_list *rlp;
307 int i, ret, arraylen;
308 CPUState *cs = CPU(cpu);
309
310 rl.n = 0;
311 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
312 if (ret != -E2BIG) {
313 return ret;
314 }
315 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
316 rlp->n = rl.n;
317 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
318 if (ret) {
319 goto out;
320 }
321 /* Sort the list we get back from the kernel, since cpreg_tuples
322 * must be in strictly ascending order.
323 */
324 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
325
326 for (i = 0, arraylen = 0; i < rlp->n; i++) {
327 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
328 continue;
329 }
330 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
331 case KVM_REG_SIZE_U32:
332 case KVM_REG_SIZE_U64:
333 break;
334 default:
335 fprintf(stderr, "Can't handle size of register in kernel list\n");
336 ret = -EINVAL;
337 goto out;
338 }
339
340 arraylen++;
341 }
342
343 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
344 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
345 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
346 arraylen);
347 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
348 arraylen);
349 cpu->cpreg_array_len = arraylen;
350 cpu->cpreg_vmstate_array_len = arraylen;
351
352 for (i = 0, arraylen = 0; i < rlp->n; i++) {
353 uint64_t regidx = rlp->reg[i];
354 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
355 continue;
356 }
357 cpu->cpreg_indexes[arraylen] = regidx;
358 arraylen++;
359 }
360 assert(cpu->cpreg_array_len == arraylen);
361
362 if (!write_kvmstate_to_list(cpu)) {
363 /* Shouldn't happen unless kernel is inconsistent about
364 * what registers exist.
365 */
366 fprintf(stderr, "Initial read of kernel register state failed\n");
367 ret = -EINVAL;
368 goto out;
369 }
370
371 out:
372 g_free(rlp);
373 return ret;
374 }
375
376 bool write_kvmstate_to_list(ARMCPU *cpu)
377 {
378 CPUState *cs = CPU(cpu);
379 int i;
380 bool ok = true;
381
382 for (i = 0; i < cpu->cpreg_array_len; i++) {
383 struct kvm_one_reg r;
384 uint64_t regidx = cpu->cpreg_indexes[i];
385 uint32_t v32;
386 int ret;
387
388 r.id = regidx;
389
390 switch (regidx & KVM_REG_SIZE_MASK) {
391 case KVM_REG_SIZE_U32:
392 r.addr = (uintptr_t)&v32;
393 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
394 if (!ret) {
395 cpu->cpreg_values[i] = v32;
396 }
397 break;
398 case KVM_REG_SIZE_U64:
399 r.addr = (uintptr_t)(cpu->cpreg_values + i);
400 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
401 break;
402 default:
403 abort();
404 }
405 if (ret) {
406 ok = false;
407 }
408 }
409 return ok;
410 }
411
412 bool write_list_to_kvmstate(ARMCPU *cpu)
413 {
414 CPUState *cs = CPU(cpu);
415 int i;
416 bool ok = true;
417
418 for (i = 0; i < cpu->cpreg_array_len; i++) {
419 struct kvm_one_reg r;
420 uint64_t regidx = cpu->cpreg_indexes[i];
421 uint32_t v32;
422 int ret;
423
424 r.id = regidx;
425 switch (regidx & KVM_REG_SIZE_MASK) {
426 case KVM_REG_SIZE_U32:
427 v32 = cpu->cpreg_values[i];
428 r.addr = (uintptr_t)&v32;
429 break;
430 case KVM_REG_SIZE_U64:
431 r.addr = (uintptr_t)(cpu->cpreg_values + i);
432 break;
433 default:
434 abort();
435 }
436 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
437 if (ret) {
438 /* We might fail for "unknown register" and also for
439 * "you tried to set a register which is constant with
440 * a different value from what it actually contains".
441 */
442 ok = false;
443 }
444 }
445 return ok;
446 }
447
448 void kvm_arm_reset_vcpu(ARMCPU *cpu)
449 {
450 int ret;
451
452 /* Re-init VCPU so that all registers are set to
453 * their respective reset values.
454 */
455 ret = kvm_arm_vcpu_init(CPU(cpu));
456 if (ret < 0) {
457 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
458 abort();
459 }
460 if (!write_kvmstate_to_list(cpu)) {
461 fprintf(stderr, "write_kvmstate_to_list failed\n");
462 abort();
463 }
464 }
465
466 /*
467 * Update KVM's MP_STATE based on what QEMU thinks it is
468 */
469 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
470 {
471 if (cap_has_mp_state) {
472 struct kvm_mp_state mp_state = {
473 .mp_state =
474 cpu->powered_off ? KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
475 };
476 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
477 if (ret) {
478 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
479 __func__, ret, strerror(-ret));
480 return -1;
481 }
482 }
483
484 return 0;
485 }
486
487 /*
488 * Sync the KVM MP_STATE into QEMU
489 */
490 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
491 {
492 if (cap_has_mp_state) {
493 struct kvm_mp_state mp_state;
494 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
495 if (ret) {
496 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
497 __func__, ret, strerror(-ret));
498 abort();
499 }
500 cpu->powered_off = (mp_state.mp_state == KVM_MP_STATE_STOPPED);
501 }
502
503 return 0;
504 }
505
506 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
507 {
508 }
509
510 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
511 {
512 return MEMTXATTRS_UNSPECIFIED;
513 }
514
515 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
516 {
517 return 0;
518 }
519
520 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
521 {
522 return true;
523 }
524
525 int kvm_arch_process_async_events(CPUState *cs)
526 {
527 return 0;
528 }
529
530 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
531 {
532 return 1;
533 }
534
535 int kvm_arch_on_sigbus(int code, void *addr)
536 {
537 return 1;
538 }
539
540 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
541 {
542 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
543 }
544
545 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
546 struct kvm_sw_breakpoint *bp)
547 {
548 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
549 return -EINVAL;
550 }
551
552 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
553 target_ulong len, int type)
554 {
555 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
556 return -EINVAL;
557 }
558
559 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
560 target_ulong len, int type)
561 {
562 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
563 return -EINVAL;
564 }
565
566 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
567 struct kvm_sw_breakpoint *bp)
568 {
569 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
570 return -EINVAL;
571 }
572
573 void kvm_arch_remove_all_hw_breakpoints(void)
574 {
575 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
576 }
577
578 void kvm_arch_init_irq_routing(KVMState *s)
579 {
580 }
581
582 int kvm_arch_irqchip_create(KVMState *s)
583 {
584 int ret;
585
586 /* If we can create the VGIC using the newer device control API, we
587 * let the device do this when it initializes itself, otherwise we
588 * fall back to the old API */
589
590 ret = kvm_create_device(s, KVM_DEV_TYPE_ARM_VGIC_V2, true);
591 if (ret == 0) {
592 return 1;
593 }
594
595 return 0;
596 }
597
598 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
599 uint64_t address, uint32_t data)
600 {
601 return 0;
602 }
603
604 int kvm_arch_msi_data_to_gsi(uint32_t data)
605 {
606 return (data - 32) & 0xffff;
607 }