2 * CRIS virtual CPU header
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #include "qemu-common.h"
26 #define TARGET_LONG_BITS 32
28 #define CPUArchState struct CPUCRISState
32 #define TARGET_HAS_ICE 1
34 #define ELF_MACHINE EM_CRIS
38 #define EXCP_BUSFAULT 3
42 /* CRIS-specific interrupt pending bits. */
43 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
45 /* Register aliases. R0 - R15 */
50 /* Support regs, P0 - P15 */
58 #define PR_PREFIX 6 /* On CRISv10 P6 is reserved, we use it as prefix. */
71 #define Q_FLAG 0x80000000
72 #define M_FLAG 0x40000000
73 #define PFIX_FLAG 0x800 /* CRISv10 Only. */
74 #define F_FLAG_V10 0x400
75 #define P_FLAG_V10 0x200
86 #define ALU_FLAGS 0x1F
88 /* Condition codes. */
106 #define NB_MMU_MODES 2
108 typedef struct CPUCRISState
{
110 /* P0 - P15 are referred to as special registers in the docs. */
113 /* Pseudo register for the PC. Not directly accessible on CRIS. */
116 /* Pseudo register for the kernel stack. */
124 /* Condition flag tracking. */
130 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
132 /* X flag at the time of cc snapshot. */
135 /* CRIS has certain insns that lockout interrupts. */
137 int interrupt_vector
;
141 /* FIXME: add a check in the translator to avoid writing to support
142 register sets beyond the 4th. The ISA allows up to 256! but in
143 practice there is no core that implements more than 4.
145 Support function registers are used to control units close to the
146 core. Accesses do not pass down the normal hierarchy.
148 uint32_t sregs
[4][16];
150 /* Linear feedback shift reg in the mmu. Used to provide pseudo
151 randomness for the 'hint' the mmu gives to sw for chosing valid
152 sets on TLB refills. */
153 uint32_t mmu_rand_lfsr
;
156 * We just store the stores to the tlbset here for later evaluation
157 * when the hw needs access to them.
159 * One for I and another for D.
169 /* Members after CPU_COMMON are preserved across resets. */
175 CRISCPU
*cpu_cris_init(const char *cpu_model
);
176 int cpu_cris_exec(CPUCRISState
*s
);
177 void cpu_cris_close(CPUCRISState
*s
);
178 void do_interrupt(CPUCRISState
*env
);
179 /* you can call this signal handler from your SIGBUS and SIGSEGV
180 signal handlers to inform the virtual CPU of exceptions. non zero
181 is returned if the signal was handled by the virtual CPU. */
182 int cpu_cris_signal_handler(int host_signum
, void *pinfo
,
186 CC_OP_DYNAMIC
, /* Use env->cc_op */
213 /* CRIS uses 8k pages. */
214 #define TARGET_PAGE_BITS 13
215 #define MMAP_SHIFT TARGET_PAGE_BITS
217 #define TARGET_PHYS_ADDR_SPACE_BITS 32
218 #define TARGET_VIRT_ADDR_SPACE_BITS 32
220 static inline CPUCRISState
*cpu_init(const char *cpu_model
)
222 CRISCPU
*cpu
= cpu_cris_init(cpu_model
);
229 #define cpu_exec cpu_cris_exec
230 #define cpu_gen_code cpu_cris_gen_code
231 #define cpu_signal_handler cpu_cris_signal_handler
233 #define CPU_SAVE_VERSION 1
235 /* MMU modes definitions */
236 #define MMU_MODE0_SUFFIX _kernel
237 #define MMU_MODE1_SUFFIX _user
238 #define MMU_USER_IDX 1
239 static inline int cpu_mmu_index (CPUCRISState
*env
)
241 return !!(env
->pregs
[PR_CCS
] & U_FLAG
);
244 int cpu_cris_handle_mmu_fault(CPUCRISState
*env
, target_ulong address
, int rw
,
246 #define cpu_handle_mmu_fault cpu_cris_handle_mmu_fault
248 #if defined(CONFIG_USER_ONLY)
249 static inline void cpu_clone_regs(CPUCRISState
*env
, target_ulong newsp
)
252 env
->regs
[14] = newsp
;
257 static inline void cpu_set_tls(CPUCRISState
*env
, target_ulong newtls
)
259 env
->pregs
[PR_PID
] = (env
->pregs
[PR_PID
] & 0xff) | newtls
;
262 /* Support function regs. */
263 #define SFR_RW_GC_CFG 0][0
264 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
265 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1
266 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2
267 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3
268 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4
269 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
270 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
274 static inline void cpu_get_tb_cpu_state(CPUCRISState
*env
, target_ulong
*pc
,
275 target_ulong
*cs_base
, int *flags
)
279 *flags
= env
->dslot
|
280 (env
->pregs
[PR_CCS
] & (S_FLAG
| P_FLAG
| U_FLAG
281 | X_FLAG
| PFIX_FLAG
));
284 #define cpu_list cris_cpu_list
285 void cris_cpu_list(FILE *f
, fprintf_function cpu_fprintf
);
287 static inline bool cpu_has_work(CPUCRISState
*env
)
289 return env
->interrupt_request
& (CPU_INTERRUPT_HARD
| CPU_INTERRUPT_NMI
);
292 #include "exec-all.h"
294 static inline void cpu_pc_from_tb(CPUCRISState
*env
, TranslationBlock
*tb
)