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2 * CRIS virtual CPU header
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #define TARGET_LONG_BITS 32
28 #include "softfloat.h"
30 #define TARGET_HAS_ICE 1
32 #define ELF_MACHINE EM_CRIS
34 #define EXCP_MMU_EXEC 0
35 #define EXCP_MMU_READ 1
36 #define EXCP_MMU_WRITE 2
37 #define EXCP_MMU_FLUSH 3
38 #define EXCP_MMU_FAULT 4
39 #define EXCP_BREAK 16 /* trap. */
41 /* Register aliases. R0 - R15 */
46 /* Support regs, P0 - P15 */
76 #define ALU_FLAGS 0x1F
78 /* Condition codes. */
96 /* Internal flags for the implementation. */
99 #define NB_MMU_MODES 2
101 typedef struct CPUCRISState
{
103 /* P0 - P15 are referred to as special registers in the docs. */
106 /* Pseudo register for the PC. Not directly accessable on CRIS. */
109 /* Pseudo register for the kernel stack. */
112 /* These are setup up by the guest code just before transfering the
113 control back to the host. */
118 /* Condition flag tracking. */
125 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
128 /* Extended arithmetics. */
133 int interrupt_request
;
134 int interrupt_vector
;
149 /* FIXME: add a check in the translator to avoid writing to support
150 register sets beyond the 4th. The ISA allows up to 256! but in
151 practice there is no core that implements more than 4.
153 Support function registers are used to control units close to the
154 core. Accesses do not pass down the normal hierarchy.
156 uint32_t sregs
[4][16];
159 * We just store the stores to the tlbset here for later evaluation
160 * when the hw needs access to them.
162 * One for I and another for D.
178 CPUCRISState
*cpu_cris_init(const char *cpu_model
);
179 int cpu_cris_exec(CPUCRISState
*s
);
180 void cpu_cris_close(CPUCRISState
*s
);
181 void do_interrupt(CPUCRISState
*env
);
182 /* you can call this signal handler from your SIGBUS and SIGSEGV
183 signal handlers to inform the virtual CPU of exceptions. non zero
184 is returned if the signal was handled by the virtual CPU. */
185 int cpu_cris_signal_handler(int host_signum
, void *pinfo
,
187 void cpu_cris_flush_flags(CPUCRISState
*, int);
190 void do_unassigned_access(target_phys_addr_t addr
, int is_write
, int is_exec
,
194 CC_OP_DYNAMIC
, /* Use env->cc_op */
232 void cris_set_irq_level(CPUCRISState
*env
, int level
, uint8_t vector
);
233 void cris_set_macsr(CPUCRISState
*env
, uint32_t val
);
234 void cris_switch_sp(CPUCRISState
*env
);
236 void do_cris_semihosting(CPUCRISState
*env
, int nr
);
239 CRIS_FEATURE_CF_ISA_MUL
,
242 static inline int cris_feature(CPUCRISState
*env
, int feature
)
244 return (env
->features
& (1u << feature
)) != 0;
247 void register_cris_insns (CPUCRISState
*env
);
249 /* CRIS uses 8k pages. */
250 #define TARGET_PAGE_BITS 13
251 #define MMAP_SHIFT TARGET_PAGE_BITS
253 #define CPUState CPUCRISState
254 #define cpu_init cpu_cris_init
255 #define cpu_exec cpu_cris_exec
256 #define cpu_gen_code cpu_cris_gen_code
257 #define cpu_signal_handler cpu_cris_signal_handler
259 /* MMU modes definitions */
260 #define MMU_MODE0_SUFFIX _kernel
261 #define MMU_MODE1_SUFFIX _user
262 #define MMU_USER_IDX 1
263 static inline int cpu_mmu_index (CPUState
*env
)
265 return !!(env
->pregs
[PR_CCS
] & U_FLAG
);
268 /* Support function regs. */
269 #define SFR_RW_GC_CFG 0][0
270 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
271 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1
272 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2
273 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3
274 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4
275 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
276 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6