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1 /*
2 * CRIS helper routines.
3 *
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <stdio.h>
23 #include <string.h>
24
25 #include "config.h"
26 #include "cpu.h"
27 #include "mmu.h"
28 #include "exec-all.h"
29 #include "host-utils.h"
30
31 #if defined(CONFIG_USER_ONLY)
32
33 void do_interrupt (CPUState *env)
34 {
35 env->exception_index = -1;
36 }
37
38 int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
39 int mmu_idx, int is_softmmu)
40 {
41 env->exception_index = 0xaa;
42 env->debug1 = address;
43 cpu_dump_state(env, stderr, fprintf, 0);
44 printf("%s addr=%x env->pc=%x\n", __func__, address, env->pc);
45 return 1;
46 }
47
48 target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
49 {
50 return addr;
51 }
52
53 #else /* !CONFIG_USER_ONLY */
54
55 int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
56 int mmu_idx, int is_softmmu)
57 {
58 struct cris_mmu_result_t res;
59 int prot, miss;
60 target_ulong phy;
61
62 address &= TARGET_PAGE_MASK;
63 prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
64 // printf ("%s pc=%x %x w=%d smmu=%d\n", __func__, env->pc, address, rw, is_softmmu);
65 miss = cris_mmu_translate(&res, env, address, rw, mmu_idx);
66 if (miss)
67 {
68 /* handle the miss. */
69 phy = 0;
70 env->exception_index = EXCP_MMU_MISS;
71 }
72 else
73 {
74 phy = res.phy;
75 }
76 // printf ("a=%x phy=%x\n", address, phy);
77 return tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu);
78 }
79
80
81 static void cris_shift_ccs(CPUState *env)
82 {
83 uint32_t ccs;
84 /* Apply the ccs shift. */
85 ccs = env->pregs[PR_CCS];
86 ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
87 env->pregs[PR_CCS] = ccs;
88 }
89
90 void do_interrupt(CPUState *env)
91 {
92 uint32_t ebp, isr;
93 int irqnum;
94
95 fflush(NULL);
96
97 #if 0
98 printf ("exception index=%d interrupt_req=%d\n",
99 env->exception_index,
100 env->interrupt_request);
101 #endif
102
103 switch (env->exception_index)
104 {
105 case EXCP_BREAK:
106 irqnum = env->trapnr;
107 ebp = env->pregs[PR_EBP];
108 isr = ldl_code(ebp + irqnum * 4);
109 env->pregs[PR_ERP] = env->pc + 2;
110 env->pc = isr;
111
112 cris_shift_ccs(env);
113
114 break;
115 case EXCP_MMU_MISS:
116 // printf ("MMU miss\n");
117 irqnum = 4;
118 ebp = env->pregs[PR_EBP];
119 isr = ldl_code(ebp + irqnum * 4);
120 env->pregs[PR_ERP] = env->pc;
121 env->pc = isr;
122 cris_shift_ccs(env);
123 break;
124
125 default:
126 {
127 /* Maybe the irq was acked by sw before we got a
128 change to take it. */
129 if (env->interrupt_request & CPU_INTERRUPT_HARD) {
130 if (!env->pending_interrupts)
131 return;
132 if (!(env->pregs[PR_CCS] & I_FLAG)) {
133 return;
134 }
135
136 irqnum = 31 - clz32(env->pending_interrupts);
137 irqnum += 0x30;
138 ebp = env->pregs[PR_EBP];
139 isr = ldl_code(ebp + irqnum * 4);
140 env->pregs[PR_ERP] = env->pc;
141 env->pc = isr;
142
143 cris_shift_ccs(env);
144 #if 0
145 printf ("%s ebp=%x %x isr=%x %d"
146 " ir=%x pending=%x\n",
147 __func__,
148 ebp, ebp + irqnum * 4,
149 isr, env->exception_index,
150 env->interrupt_request,
151 env->pending_interrupts);
152 #endif
153 }
154
155 }
156 break;
157 }
158 }
159
160 target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
161 {
162 uint32_t phy = addr;
163 struct cris_mmu_result_t res;
164 int miss;
165 miss = cris_mmu_translate(&res, env, addr, 0, 0);
166 if (!miss)
167 phy = res.phy;
168 return phy;
169 }
170 #endif