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git.proxmox.com Git - mirror_qemu.git/blob - target-cris/op_helper.c
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "dyngen-exec.h"
25 #include "host-utils.h"
27 //#define CRIS_OP_HELPER_DEBUG
30 #ifdef CRIS_OP_HELPER_DEBUG
32 #define D_LOG(...) qemu_log(__VA__ARGS__)
35 #define D_LOG(...) do { } while (0)
38 #if !defined(CONFIG_USER_ONLY)
39 #include "softmmu_exec.h"
41 #define MMUSUFFIX _mmu
44 #include "softmmu_template.h"
47 #include "softmmu_template.h"
50 #include "softmmu_template.h"
53 #include "softmmu_template.h"
55 /* Try to fill the TLB and return an exception if error. If retaddr is
56 NULL, it means that the function was called in C code (i.e. not
57 from generated code or from helper.c) */
58 /* XXX: fix it to restore all registers */
59 void tlb_fill(CPUCRISState
*env1
, target_ulong addr
, int is_write
, int mmu_idx
,
63 CPUCRISState
*saved_env
;
70 D_LOG("%s pc=%x tpc=%x ra=%x\n", __func__
,
71 env
->pc
, env
->debug1
, retaddr
);
72 ret
= cpu_cris_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
);
75 /* now we have a real cpu fault */
76 pc
= (unsigned long)retaddr
;
79 /* the PC is inside the translated code. It means that we have
80 a virtual CPU fault */
81 cpu_restore_state(tb
, env
, pc
);
83 /* Evaluate flags after retranslation. */
84 helper_top_evaluate_flags();
94 void helper_raise_exception(uint32_t index
)
96 env
->exception_index
= index
;
100 void helper_tlb_flush_pid(uint32_t pid
)
102 #if !defined(CONFIG_USER_ONLY)
104 if (pid
!= (env
->pregs
[PR_PID
] & 0xff))
105 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
109 void helper_spc_write(uint32_t new_spc
)
111 #if !defined(CONFIG_USER_ONLY)
112 tlb_flush_page(env
, env
->pregs
[PR_SPC
]);
113 tlb_flush_page(env
, new_spc
);
117 void helper_dump(uint32_t a0
, uint32_t a1
, uint32_t a2
)
119 qemu_log("%s: a0=%x a1=%x\n", __func__
, a0
, a1
);
122 /* Used by the tlb decoder. */
123 #define EXTRACT_FIELD(src, start, end) \
124 (((src) >> start) & ((1 << (end - start + 1)) - 1))
126 void helper_movl_sreg_reg (uint32_t sreg
, uint32_t reg
)
129 srs
= env
->pregs
[PR_SRS
];
131 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
133 #if !defined(CONFIG_USER_ONLY)
134 if (srs
== 1 || srs
== 2) {
136 /* Writes to tlb-hi write to mm_cause as a side
138 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
139 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
141 else if (sreg
== 5) {
148 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
153 /* We've just made a write to tlb_lo. */
154 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
155 /* Writes are done via r_mm_cause. */
156 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
158 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].hi
,
160 vaddr
<<= TARGET_PAGE_BITS
;
161 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].lo
,
163 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
164 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
166 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
167 vaddr
, tlb_v
, env
->pc
);
169 tlb_flush_page(env
, vaddr
);
176 void helper_movl_reg_sreg (uint32_t reg
, uint32_t sreg
)
179 env
->pregs
[PR_SRS
] &= 3;
180 srs
= env
->pregs
[PR_SRS
];
182 #if !defined(CONFIG_USER_ONLY)
183 if (srs
== 1 || srs
== 2)
189 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
194 /* Update the mirror regs. */
195 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
196 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
197 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
198 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
201 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
204 static void cris_ccs_rshift(CPUCRISState
*env
)
208 /* Apply the ccs shift. */
209 ccs
= env
->pregs
[PR_CCS
];
210 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
213 /* Enter user mode. */
214 env
->ksp
= env
->regs
[R_SP
];
215 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
218 env
->pregs
[PR_CCS
] = ccs
;
221 void helper_rfe(void)
223 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
225 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
226 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
230 cris_ccs_rshift(env
);
232 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
234 env
->pregs
[PR_CCS
] |= P_FLAG
;
237 void helper_rfn(void)
239 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
241 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
242 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
246 cris_ccs_rshift(env
);
248 /* Set the P_FLAG only if the R_FLAG is not set. */
250 env
->pregs
[PR_CCS
] |= P_FLAG
;
252 /* Always set the M flag. */
253 env
->pregs
[PR_CCS
] |= M_FLAG
;
256 uint32_t helper_lz(uint32_t t0
)
261 uint32_t helper_btst(uint32_t t0
, uint32_t t1
, uint32_t ccs
)
263 /* FIXME: clean this up. */
266 The N flag is set according to the selected bit in the dest reg.
267 The Z flag is set if the selected bit and all bits to the right are
269 The X flag is cleared.
270 Other flags are left untouched.
271 The destination reg is not affected.*/
272 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
275 bset
= !!(t0
& (1 << sbit
));
276 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
277 masked_t0
= t0
& mask
;
278 fz
= !(masked_t0
| bset
);
280 /* Clear the X, N and Z flags. */
281 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
282 if (env
->pregs
[PR_VR
] < 32)
283 ccs
&= ~(V_FLAG
| C_FLAG
);
284 /* Set the N and Z flags accordingly. */
285 ccs
|= (bset
<< 3) | (fz
<< 2);
289 static inline uint32_t evaluate_flags_writeback(uint32_t flags
, uint32_t ccs
)
291 unsigned int x
, z
, mask
;
293 /* Extended arithmetics, leave the z flag alone. */
295 mask
= env
->cc_mask
| X_FLAG
;
302 /* all insn clear the x-flag except setf or clrf. */
308 uint32_t helper_evaluate_flags_muls(uint32_t ccs
, uint32_t res
, uint32_t mof
)
314 dneg
= ((int32_t)res
) < 0;
323 if ((dneg
&& mof
!= -1)
324 || (!dneg
&& mof
!= 0))
326 return evaluate_flags_writeback(flags
, ccs
);
329 uint32_t helper_evaluate_flags_mulu(uint32_t ccs
, uint32_t res
, uint32_t mof
)
344 return evaluate_flags_writeback(flags
, ccs
);
347 uint32_t helper_evaluate_flags_mcp(uint32_t ccs
,
348 uint32_t src
, uint32_t dst
, uint32_t res
)
352 src
= src
& 0x80000000;
353 dst
= dst
& 0x80000000;
355 if ((res
& 0x80000000L
) != 0L)
373 return evaluate_flags_writeback(flags
, ccs
);
376 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs
,
377 uint32_t src
, uint32_t dst
, uint32_t res
)
381 src
= src
& 0x80000000;
382 dst
= dst
& 0x80000000;
384 if ((res
& 0x80000000L
) != 0L)
402 return evaluate_flags_writeback(flags
, ccs
);
405 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs
,
406 uint32_t src
, uint32_t dst
, uint32_t res
)
410 src
= (~src
) & 0x80000000;
411 dst
= dst
& 0x80000000;
413 if ((res
& 0x80000000L
) != 0L)
432 return evaluate_flags_writeback(flags
, ccs
);
435 uint32_t helper_evaluate_flags_move_4(uint32_t ccs
, uint32_t res
)
439 if ((int32_t)res
< 0)
444 return evaluate_flags_writeback(flags
, ccs
);
446 uint32_t helper_evaluate_flags_move_2(uint32_t ccs
, uint32_t res
)
450 if ((int16_t)res
< 0L)
455 return evaluate_flags_writeback(flags
, ccs
);
458 /* TODO: This is expensive. We could split things up and only evaluate part of
459 CCR on a need to know basis. For now, we simply re-evaluate everything. */
460 void helper_evaluate_flags(void)
462 uint32_t src
, dst
, res
;
467 res
= env
->cc_result
;
469 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
472 /* Now, evaluate the flags. This stuff is based on
473 Per Zander's CRISv10 simulator. */
474 switch (env
->cc_size
)
477 if ((res
& 0x80L
) != 0L)
480 if (((src
& 0x80L
) == 0L)
481 && ((dst
& 0x80L
) == 0L))
485 else if (((src
& 0x80L
) != 0L)
486 && ((dst
& 0x80L
) != 0L))
493 if ((res
& 0xFFL
) == 0L)
497 if (((src
& 0x80L
) != 0L)
498 && ((dst
& 0x80L
) != 0L))
502 if ((dst
& 0x80L
) != 0L
503 || (src
& 0x80L
) != 0L)
510 if ((res
& 0x8000L
) != 0L)
513 if (((src
& 0x8000L
) == 0L)
514 && ((dst
& 0x8000L
) == 0L))
518 else if (((src
& 0x8000L
) != 0L)
519 && ((dst
& 0x8000L
) != 0L))
526 if ((res
& 0xFFFFL
) == 0L)
530 if (((src
& 0x8000L
) != 0L)
531 && ((dst
& 0x8000L
) != 0L))
535 if ((dst
& 0x8000L
) != 0L
536 || (src
& 0x8000L
) != 0L)
543 if ((res
& 0x80000000L
) != 0L)
546 if (((src
& 0x80000000L
) == 0L)
547 && ((dst
& 0x80000000L
) == 0L))
551 else if (((src
& 0x80000000L
) != 0L) &&
552 ((dst
& 0x80000000L
) != 0L))
561 if (((src
& 0x80000000L
) != 0L)
562 && ((dst
& 0x80000000L
) != 0L))
564 if ((dst
& 0x80000000L
) != 0L
565 || (src
& 0x80000000L
) != 0L)
573 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
576 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(flags
, env
->pregs
[PR_CCS
]);
579 void helper_top_evaluate_flags(void)
584 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mcp(
585 env
->pregs
[PR_CCS
], env
->cc_src
,
586 env
->cc_dest
, env
->cc_result
);
589 env
->pregs
[PR_CCS
] = helper_evaluate_flags_muls(
590 env
->pregs
[PR_CCS
], env
->cc_result
,
594 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mulu(
595 env
->pregs
[PR_CCS
], env
->cc_result
,
605 switch (env
->cc_size
)
609 helper_evaluate_flags_move_4(
615 helper_evaluate_flags_move_2(
620 helper_evaluate_flags();
629 if (env
->cc_size
== 4)
631 helper_evaluate_flags_sub_4(
633 env
->cc_src
, env
->cc_dest
,
636 helper_evaluate_flags();
640 switch (env
->cc_size
)
644 helper_evaluate_flags_alu_4(
646 env
->cc_src
, env
->cc_dest
,
650 helper_evaluate_flags();