4 * Copyright (C) 2006-2008 Qumranet Technologies
5 * Copyright IBM, Corp. 2008
8 * Anthony Liguori <aliguori@us.ibm.com>
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
15 #include <sys/types.h>
16 #include <sys/ioctl.h>
19 #include <linux/kvm.h>
21 #include "qemu-common.h"
29 #define dprintf(fmt, ...) \
30 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
32 #define dprintf(fmt, ...) \
36 int kvm_arch_init_vcpu(CPUState
*env
)
39 struct kvm_cpuid2 cpuid
;
40 struct kvm_cpuid_entry2 entries
[100];
41 } __attribute__((packed
)) cpuid_data
;
42 uint32_t limit
, i
, j
, cpuid_i
;
43 uint32_t eax
, ebx
, ecx
, edx
;
47 cpu_x86_cpuid(env
, 0, 0, &eax
, &ebx
, &ecx
, &edx
);
50 for (i
= 0; i
<= limit
; i
++) {
51 struct kvm_cpuid_entry2
*c
= &cpuid_data
.entries
[cpuid_i
++];
58 cpu_x86_cpuid(env
, i
, j
, &eax
, &ebx
, &ecx
, &edx
);
60 c
->flags
= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
66 c
= &cpuid_data
.entries
[++cpuid_i
];
68 if (i
== 4 && eax
== 0)
70 if (i
== 0xb && !(ecx
& 0xff00))
72 if (i
== 0xd && eax
== 0)
77 cpu_x86_cpuid(env
, i
, 0, &eax
, &ebx
, &ecx
, &edx
);
86 cpu_x86_cpuid(env
, 0x80000000, 0, &eax
, &ebx
, &ecx
, &edx
);
89 for (i
= 0x80000000; i
<= limit
; i
++) {
90 struct kvm_cpuid_entry2
*c
= &cpuid_data
.entries
[cpuid_i
++];
92 cpu_x86_cpuid(env
, i
, 0, &eax
, &ebx
, &ecx
, &edx
);
100 cpuid_data
.cpuid
.nent
= cpuid_i
;
102 return kvm_vcpu_ioctl(env
, KVM_SET_CPUID2
, &cpuid_data
);
105 static int kvm_has_msr_star(CPUState
*env
)
107 static int has_msr_star
;
111 if (has_msr_star
== 0) {
112 struct kvm_msr_list msr_list
, *kvm_msr_list
;
116 /* Obtain MSR list from KVM. These are the MSRs that we must
119 ret
= kvm_ioctl(env
->kvm_state
, KVM_GET_MSR_INDEX_LIST
, &msr_list
);
123 kvm_msr_list
= qemu_mallocz(sizeof(msr_list
) +
124 msr_list
.nmsrs
* sizeof(msr_list
.indices
[0]));
126 kvm_msr_list
->nmsrs
= msr_list
.nmsrs
;
127 ret
= kvm_ioctl(env
->kvm_state
, KVM_GET_MSR_INDEX_LIST
, kvm_msr_list
);
131 for (i
= 0; i
< kvm_msr_list
->nmsrs
; i
++) {
132 if (kvm_msr_list
->indices
[i
] == MSR_STAR
) {
142 if (has_msr_star
== 1)
147 int kvm_arch_init(KVMState
*s
, int smp_cpus
)
151 /* create vm86 tss. KVM uses vm86 mode to emulate 16-bit code
152 * directly. In order to use vm86 mode, a TSS is needed. Since this
153 * must be part of guest physical memory, we need to allocate it. Older
154 * versions of KVM just assumed that it would be at the end of physical
155 * memory but that doesn't work with more than 4GB of memory. We simply
156 * refuse to work with those older versions of KVM. */
157 ret
= kvm_ioctl(s
, KVM_CHECK_EXTENSION
, KVM_CAP_SET_TSS_ADDR
);
159 fprintf(stderr
, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
163 /* this address is 3 pages before the bios, and the bios should present
164 * as unavaible memory. FIXME, need to ensure the e820 map deals with
167 return kvm_vm_ioctl(s
, KVM_SET_TSS_ADDR
, 0xfffbd000);
170 static void set_v8086_seg(struct kvm_segment
*lhs
, const SegmentCache
*rhs
)
172 lhs
->selector
= rhs
->selector
;
173 lhs
->base
= rhs
->base
;
174 lhs
->limit
= rhs
->limit
;
186 static void set_seg(struct kvm_segment
*lhs
, const SegmentCache
*rhs
)
188 unsigned flags
= rhs
->flags
;
189 lhs
->selector
= rhs
->selector
;
190 lhs
->base
= rhs
->base
;
191 lhs
->limit
= rhs
->limit
;
192 lhs
->type
= (flags
>> DESC_TYPE_SHIFT
) & 15;
193 lhs
->present
= (flags
& DESC_P_MASK
) != 0;
194 lhs
->dpl
= rhs
->selector
& 3;
195 lhs
->db
= (flags
>> DESC_B_SHIFT
) & 1;
196 lhs
->s
= (flags
& DESC_S_MASK
) != 0;
197 lhs
->l
= (flags
>> DESC_L_SHIFT
) & 1;
198 lhs
->g
= (flags
& DESC_G_MASK
) != 0;
199 lhs
->avl
= (flags
& DESC_AVL_MASK
) != 0;
203 static void get_seg(SegmentCache
*lhs
, const struct kvm_segment
*rhs
)
205 lhs
->selector
= rhs
->selector
;
206 lhs
->base
= rhs
->base
;
207 lhs
->limit
= rhs
->limit
;
209 (rhs
->type
<< DESC_TYPE_SHIFT
)
210 | (rhs
->present
* DESC_P_MASK
)
211 | (rhs
->dpl
<< DESC_DPL_SHIFT
)
212 | (rhs
->db
<< DESC_B_SHIFT
)
213 | (rhs
->s
* DESC_S_MASK
)
214 | (rhs
->l
<< DESC_L_SHIFT
)
215 | (rhs
->g
* DESC_G_MASK
)
216 | (rhs
->avl
* DESC_AVL_MASK
);
219 static void kvm_getput_reg(__u64
*kvm_reg
, target_ulong
*qemu_reg
, int set
)
222 *kvm_reg
= *qemu_reg
;
224 *qemu_reg
= *kvm_reg
;
227 static int kvm_getput_regs(CPUState
*env
, int set
)
229 struct kvm_regs regs
;
233 ret
= kvm_vcpu_ioctl(env
, KVM_GET_REGS
, ®s
);
238 kvm_getput_reg(®s
.rax
, &env
->regs
[R_EAX
], set
);
239 kvm_getput_reg(®s
.rbx
, &env
->regs
[R_EBX
], set
);
240 kvm_getput_reg(®s
.rcx
, &env
->regs
[R_ECX
], set
);
241 kvm_getput_reg(®s
.rdx
, &env
->regs
[R_EDX
], set
);
242 kvm_getput_reg(®s
.rsi
, &env
->regs
[R_ESI
], set
);
243 kvm_getput_reg(®s
.rdi
, &env
->regs
[R_EDI
], set
);
244 kvm_getput_reg(®s
.rsp
, &env
->regs
[R_ESP
], set
);
245 kvm_getput_reg(®s
.rbp
, &env
->regs
[R_EBP
], set
);
247 kvm_getput_reg(®s
.r8
, &env
->regs
[8], set
);
248 kvm_getput_reg(®s
.r9
, &env
->regs
[9], set
);
249 kvm_getput_reg(®s
.r10
, &env
->regs
[10], set
);
250 kvm_getput_reg(®s
.r11
, &env
->regs
[11], set
);
251 kvm_getput_reg(®s
.r12
, &env
->regs
[12], set
);
252 kvm_getput_reg(®s
.r13
, &env
->regs
[13], set
);
253 kvm_getput_reg(®s
.r14
, &env
->regs
[14], set
);
254 kvm_getput_reg(®s
.r15
, &env
->regs
[15], set
);
257 kvm_getput_reg(®s
.rflags
, &env
->eflags
, set
);
258 kvm_getput_reg(®s
.rip
, &env
->eip
, set
);
261 ret
= kvm_vcpu_ioctl(env
, KVM_SET_REGS
, ®s
);
266 static int kvm_put_fpu(CPUState
*env
)
271 memset(&fpu
, 0, sizeof fpu
);
272 fpu
.fsw
= env
->fpus
& ~(7 << 11);
273 fpu
.fsw
|= (env
->fpstt
& 7) << 11;
275 for (i
= 0; i
< 8; ++i
)
276 fpu
.ftwx
|= (!env
->fptags
[i
]) << i
;
277 memcpy(fpu
.fpr
, env
->fpregs
, sizeof env
->fpregs
);
278 memcpy(fpu
.xmm
, env
->xmm_regs
, sizeof env
->xmm_regs
);
279 fpu
.mxcsr
= env
->mxcsr
;
281 return kvm_vcpu_ioctl(env
, KVM_SET_FPU
, &fpu
);
284 static int kvm_put_sregs(CPUState
*env
)
286 struct kvm_sregs sregs
;
288 memcpy(sregs
.interrupt_bitmap
,
289 env
->interrupt_bitmap
,
290 sizeof(sregs
.interrupt_bitmap
));
292 if ((env
->eflags
& VM_MASK
)) {
293 set_v8086_seg(&sregs
.cs
, &env
->segs
[R_CS
]);
294 set_v8086_seg(&sregs
.ds
, &env
->segs
[R_DS
]);
295 set_v8086_seg(&sregs
.es
, &env
->segs
[R_ES
]);
296 set_v8086_seg(&sregs
.fs
, &env
->segs
[R_FS
]);
297 set_v8086_seg(&sregs
.gs
, &env
->segs
[R_GS
]);
298 set_v8086_seg(&sregs
.ss
, &env
->segs
[R_SS
]);
300 set_seg(&sregs
.cs
, &env
->segs
[R_CS
]);
301 set_seg(&sregs
.ds
, &env
->segs
[R_DS
]);
302 set_seg(&sregs
.es
, &env
->segs
[R_ES
]);
303 set_seg(&sregs
.fs
, &env
->segs
[R_FS
]);
304 set_seg(&sregs
.gs
, &env
->segs
[R_GS
]);
305 set_seg(&sregs
.ss
, &env
->segs
[R_SS
]);
307 if (env
->cr
[0] & CR0_PE_MASK
) {
308 /* force ss cpl to cs cpl */
309 sregs
.ss
.selector
= (sregs
.ss
.selector
& ~3) |
310 (sregs
.cs
.selector
& 3);
311 sregs
.ss
.dpl
= sregs
.ss
.selector
& 3;
315 set_seg(&sregs
.tr
, &env
->tr
);
316 set_seg(&sregs
.ldt
, &env
->ldt
);
318 sregs
.idt
.limit
= env
->idt
.limit
;
319 sregs
.idt
.base
= env
->idt
.base
;
320 sregs
.gdt
.limit
= env
->gdt
.limit
;
321 sregs
.gdt
.base
= env
->gdt
.base
;
323 sregs
.cr0
= env
->cr
[0];
324 sregs
.cr2
= env
->cr
[2];
325 sregs
.cr3
= env
->cr
[3];
326 sregs
.cr4
= env
->cr
[4];
328 sregs
.cr8
= cpu_get_apic_tpr(env
);
329 sregs
.apic_base
= cpu_get_apic_base(env
);
331 sregs
.efer
= env
->efer
;
333 return kvm_vcpu_ioctl(env
, KVM_SET_SREGS
, &sregs
);
336 static void kvm_msr_entry_set(struct kvm_msr_entry
*entry
,
337 uint32_t index
, uint64_t value
)
339 entry
->index
= index
;
343 static int kvm_put_msrs(CPUState
*env
)
346 struct kvm_msrs info
;
347 struct kvm_msr_entry entries
[100];
349 struct kvm_msr_entry
*msrs
= msr_data
.entries
;
352 kvm_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_CS
, env
->sysenter_cs
);
353 kvm_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_ESP
, env
->sysenter_esp
);
354 kvm_msr_entry_set(&msrs
[n
++], MSR_IA32_SYSENTER_EIP
, env
->sysenter_eip
);
355 if (kvm_has_msr_star(env
))
356 kvm_msr_entry_set(&msrs
[n
++], MSR_STAR
, env
->star
);
357 kvm_msr_entry_set(&msrs
[n
++], MSR_IA32_TSC
, env
->tsc
);
359 /* FIXME if lm capable */
360 kvm_msr_entry_set(&msrs
[n
++], MSR_CSTAR
, env
->cstar
);
361 kvm_msr_entry_set(&msrs
[n
++], MSR_KERNELGSBASE
, env
->kernelgsbase
);
362 kvm_msr_entry_set(&msrs
[n
++], MSR_FMASK
, env
->fmask
);
363 kvm_msr_entry_set(&msrs
[n
++], MSR_LSTAR
, env
->lstar
);
365 msr_data
.info
.nmsrs
= n
;
367 return kvm_vcpu_ioctl(env
, KVM_SET_MSRS
, &msr_data
);
372 static int kvm_get_fpu(CPUState
*env
)
377 ret
= kvm_vcpu_ioctl(env
, KVM_GET_FPU
, &fpu
);
381 env
->fpstt
= (fpu
.fsw
>> 11) & 7;
384 for (i
= 0; i
< 8; ++i
)
385 env
->fptags
[i
] = !((fpu
.ftwx
>> i
) & 1);
386 memcpy(env
->fpregs
, fpu
.fpr
, sizeof env
->fpregs
);
387 memcpy(env
->xmm_regs
, fpu
.xmm
, sizeof env
->xmm_regs
);
388 env
->mxcsr
= fpu
.mxcsr
;
393 static int kvm_get_sregs(CPUState
*env
)
395 struct kvm_sregs sregs
;
399 ret
= kvm_vcpu_ioctl(env
, KVM_GET_SREGS
, &sregs
);
403 memcpy(env
->interrupt_bitmap
,
404 sregs
.interrupt_bitmap
,
405 sizeof(sregs
.interrupt_bitmap
));
407 get_seg(&env
->segs
[R_CS
], &sregs
.cs
);
408 get_seg(&env
->segs
[R_DS
], &sregs
.ds
);
409 get_seg(&env
->segs
[R_ES
], &sregs
.es
);
410 get_seg(&env
->segs
[R_FS
], &sregs
.fs
);
411 get_seg(&env
->segs
[R_GS
], &sregs
.gs
);
412 get_seg(&env
->segs
[R_SS
], &sregs
.ss
);
414 get_seg(&env
->tr
, &sregs
.tr
);
415 get_seg(&env
->ldt
, &sregs
.ldt
);
417 env
->idt
.limit
= sregs
.idt
.limit
;
418 env
->idt
.base
= sregs
.idt
.base
;
419 env
->gdt
.limit
= sregs
.gdt
.limit
;
420 env
->gdt
.base
= sregs
.gdt
.base
;
422 env
->cr
[0] = sregs
.cr0
;
423 env
->cr
[2] = sregs
.cr2
;
424 env
->cr
[3] = sregs
.cr3
;
425 env
->cr
[4] = sregs
.cr4
;
427 cpu_set_apic_base(env
, sregs
.apic_base
);
429 env
->efer
= sregs
.efer
;
430 //cpu_set_apic_tpr(env, sregs.cr8);
432 #define HFLAG_COPY_MASK ~( \
433 HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \
434 HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \
435 HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \
436 HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)
440 hflags
= (env
->segs
[R_CS
].flags
>> DESC_DPL_SHIFT
) & HF_CPL_MASK
;
441 hflags
|= (env
->cr
[0] & CR0_PE_MASK
) << (HF_PE_SHIFT
- CR0_PE_SHIFT
);
442 hflags
|= (env
->cr
[0] << (HF_MP_SHIFT
- CR0_MP_SHIFT
)) &
443 (HF_MP_MASK
| HF_EM_MASK
| HF_TS_MASK
);
444 hflags
|= (env
->eflags
& (HF_TF_MASK
| HF_VM_MASK
| HF_IOPL_MASK
));
445 hflags
|= (env
->cr
[4] & CR4_OSFXSR_MASK
) <<
446 (HF_OSFXSR_SHIFT
- CR4_OSFXSR_SHIFT
);
448 if (env
->efer
& MSR_EFER_LMA
) {
449 hflags
|= HF_LMA_MASK
;
452 if ((hflags
& HF_LMA_MASK
) && (env
->segs
[R_CS
].flags
& DESC_L_MASK
)) {
453 hflags
|= HF_CS32_MASK
| HF_SS32_MASK
| HF_CS64_MASK
;
455 hflags
|= (env
->segs
[R_CS
].flags
& DESC_B_MASK
) >>
456 (DESC_B_SHIFT
- HF_CS32_SHIFT
);
457 hflags
|= (env
->segs
[R_SS
].flags
& DESC_B_MASK
) >>
458 (DESC_B_SHIFT
- HF_SS32_SHIFT
);
459 if (!(env
->cr
[0] & CR0_PE_MASK
) ||
460 (env
->eflags
& VM_MASK
) ||
461 !(hflags
& HF_CS32_MASK
)) {
462 hflags
|= HF_ADDSEG_MASK
;
464 hflags
|= ((env
->segs
[R_DS
].base
|
465 env
->segs
[R_ES
].base
|
466 env
->segs
[R_SS
].base
) != 0) <<
470 env
->hflags
= (env
->hflags
& HFLAG_COPY_MASK
) | hflags
;
475 static int kvm_get_msrs(CPUState
*env
)
478 struct kvm_msrs info
;
479 struct kvm_msr_entry entries
[100];
481 struct kvm_msr_entry
*msrs
= msr_data
.entries
;
485 msrs
[n
++].index
= MSR_IA32_SYSENTER_CS
;
486 msrs
[n
++].index
= MSR_IA32_SYSENTER_ESP
;
487 msrs
[n
++].index
= MSR_IA32_SYSENTER_EIP
;
488 if (kvm_has_msr_star(env
))
489 msrs
[n
++].index
= MSR_STAR
;
490 msrs
[n
++].index
= MSR_IA32_TSC
;
492 /* FIXME lm_capable_kernel */
493 msrs
[n
++].index
= MSR_CSTAR
;
494 msrs
[n
++].index
= MSR_KERNELGSBASE
;
495 msrs
[n
++].index
= MSR_FMASK
;
496 msrs
[n
++].index
= MSR_LSTAR
;
498 msr_data
.info
.nmsrs
= n
;
499 ret
= kvm_vcpu_ioctl(env
, KVM_GET_MSRS
, &msr_data
);
503 for (i
= 0; i
< ret
; i
++) {
504 switch (msrs
[i
].index
) {
505 case MSR_IA32_SYSENTER_CS
:
506 env
->sysenter_cs
= msrs
[i
].data
;
508 case MSR_IA32_SYSENTER_ESP
:
509 env
->sysenter_esp
= msrs
[i
].data
;
511 case MSR_IA32_SYSENTER_EIP
:
512 env
->sysenter_eip
= msrs
[i
].data
;
515 env
->star
= msrs
[i
].data
;
519 env
->cstar
= msrs
[i
].data
;
521 case MSR_KERNELGSBASE
:
522 env
->kernelgsbase
= msrs
[i
].data
;
525 env
->fmask
= msrs
[i
].data
;
528 env
->lstar
= msrs
[i
].data
;
532 env
->tsc
= msrs
[i
].data
;
540 int kvm_arch_put_registers(CPUState
*env
)
544 ret
= kvm_getput_regs(env
, 1);
548 ret
= kvm_put_fpu(env
);
552 ret
= kvm_put_sregs(env
);
556 ret
= kvm_put_msrs(env
);
563 int kvm_arch_get_registers(CPUState
*env
)
567 ret
= kvm_getput_regs(env
, 0);
571 ret
= kvm_get_fpu(env
);
575 ret
= kvm_get_sregs(env
);
579 ret
= kvm_get_msrs(env
);
586 int kvm_arch_pre_run(CPUState
*env
, struct kvm_run
*run
)
588 /* Try to inject an interrupt if the guest can accept it */
589 if (run
->ready_for_interrupt_injection
&&
590 (env
->interrupt_request
& CPU_INTERRUPT_HARD
) &&
591 (env
->eflags
& IF_MASK
)) {
594 env
->interrupt_request
&= ~CPU_INTERRUPT_HARD
;
595 irq
= cpu_get_pic_interrupt(env
);
597 struct kvm_interrupt intr
;
600 dprintf("injected interrupt %d\n", irq
);
601 kvm_vcpu_ioctl(env
, KVM_INTERRUPT
, &intr
);
605 /* If we have an interrupt but the guest is not ready to receive an
606 * interrupt, request an interrupt window exit. This will
607 * cause a return to userspace as soon as the guest is ready to
608 * receive interrupts. */
609 if ((env
->interrupt_request
& CPU_INTERRUPT_HARD
))
610 run
->request_interrupt_window
= 1;
612 run
->request_interrupt_window
= 0;
614 dprintf("setting tpr\n");
615 run
->cr8
= cpu_get_apic_tpr(env
);
620 int kvm_arch_post_run(CPUState
*env
, struct kvm_run
*run
)
623 env
->eflags
|= IF_MASK
;
625 env
->eflags
&= ~IF_MASK
;
627 cpu_set_apic_tpr(env
, run
->cr8
);
628 cpu_set_apic_base(env
, run
->apic_base
);
633 static int kvm_handle_halt(CPUState
*env
)
635 if (!((env
->interrupt_request
& CPU_INTERRUPT_HARD
) &&
636 (env
->eflags
& IF_MASK
)) &&
637 !(env
->interrupt_request
& CPU_INTERRUPT_NMI
)) {
639 env
->exception_index
= EXCP_HLT
;
646 int kvm_arch_handle_exit(CPUState
*env
, struct kvm_run
*run
)
650 switch (run
->exit_reason
) {
652 dprintf("handle_hlt\n");
653 ret
= kvm_handle_halt(env
);