]>
git.proxmox.com Git - qemu.git/blob - target-i386/machine.c
c6fd5baf1d002c76875ee30dad9794caa8fcc859
5 #include "host-utils.h"
10 static void cpu_put_seg(QEMUFile
*f
, SegmentCache
*dt
)
12 qemu_put_be32(f
, dt
->selector
);
13 qemu_put_betl(f
, dt
->base
);
14 qemu_put_be32(f
, dt
->limit
);
15 qemu_put_be32(f
, dt
->flags
);
18 static void cpu_get_seg(QEMUFile
*f
, SegmentCache
*dt
)
20 dt
->selector
= qemu_get_be32(f
);
21 dt
->base
= qemu_get_betl(f
);
22 dt
->limit
= qemu_get_be32(f
);
23 dt
->flags
= qemu_get_be32(f
);
26 void cpu_save(QEMUFile
*f
, void *opaque
)
28 CPUState
*env
= opaque
;
29 uint16_t fpregs_format
;
32 cpu_synchronize_state(env
);
34 for(i
= 0; i
< CPU_NB_REGS
; i
++)
35 qemu_put_betls(f
, &env
->regs
[i
]);
36 qemu_put_betls(f
, &env
->eip
);
37 qemu_put_betls(f
, &env
->eflags
);
38 qemu_put_be32s(f
, &env
->hflags
);
41 env
->fpus_vmstate
= (env
->fpus
& ~0x3800) | (env
->fpstt
& 0x7) << 11;
42 env
->fptag_vmstate
= 0;
43 for(i
= 0; i
< 8; i
++) {
44 env
->fptag_vmstate
|= ((!env
->fptags
[i
]) << i
);
47 qemu_put_be16s(f
, &env
->fpuc
);
48 qemu_put_be16s(f
, &env
->fpus_vmstate
);
49 qemu_put_be16s(f
, &env
->fptag_vmstate
);
56 qemu_put_be16s(f
, &fpregs_format
);
58 for(i
= 0; i
< 8; i
++) {
63 /* we save the real CPU data (in case of MMX usage only 'mant'
64 contains the MMX register */
65 cpu_get_fp80(&mant
, &exp
, env
->fpregs
[i
].d
);
66 qemu_put_be64(f
, mant
);
67 qemu_put_be16(f
, exp
);
70 /* if we use doubles for float emulation, we save the doubles to
71 avoid losing information in case of MMX usage. It can give
72 problems if the image is restored on a CPU where long
73 doubles are used instead. */
74 qemu_put_be64(f
, env
->fpregs
[i
].mmx
.MMX_Q(0));
78 for(i
= 0; i
< 6; i
++)
79 cpu_put_seg(f
, &env
->segs
[i
]);
80 cpu_put_seg(f
, &env
->ldt
);
81 cpu_put_seg(f
, &env
->tr
);
82 cpu_put_seg(f
, &env
->gdt
);
83 cpu_put_seg(f
, &env
->idt
);
85 qemu_put_be32s(f
, &env
->sysenter_cs
);
86 qemu_put_betls(f
, &env
->sysenter_esp
);
87 qemu_put_betls(f
, &env
->sysenter_eip
);
89 qemu_put_betls(f
, &env
->cr
[0]);
90 qemu_put_betls(f
, &env
->cr
[2]);
91 qemu_put_betls(f
, &env
->cr
[3]);
92 qemu_put_betls(f
, &env
->cr
[4]);
94 for(i
= 0; i
< 8; i
++)
95 qemu_put_betls(f
, &env
->dr
[i
]);
98 qemu_put_sbe32s(f
, &env
->a20_mask
);
101 qemu_put_be32s(f
, &env
->mxcsr
);
102 for(i
= 0; i
< CPU_NB_REGS
; i
++) {
103 qemu_put_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(0));
104 qemu_put_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(1));
108 qemu_put_be64s(f
, &env
->efer
);
109 qemu_put_be64s(f
, &env
->star
);
110 qemu_put_be64s(f
, &env
->lstar
);
111 qemu_put_be64s(f
, &env
->cstar
);
112 qemu_put_be64s(f
, &env
->fmask
);
113 qemu_put_be64s(f
, &env
->kernelgsbase
);
115 qemu_put_be32s(f
, &env
->smbase
);
117 qemu_put_be64s(f
, &env
->pat
);
118 qemu_put_be32s(f
, &env
->hflags2
);
120 qemu_put_be64s(f
, &env
->vm_hsave
);
121 qemu_put_be64s(f
, &env
->vm_vmcb
);
122 qemu_put_be64s(f
, &env
->tsc_offset
);
123 qemu_put_be64s(f
, &env
->intercept
);
124 qemu_put_be16s(f
, &env
->intercept_cr_read
);
125 qemu_put_be16s(f
, &env
->intercept_cr_write
);
126 qemu_put_be16s(f
, &env
->intercept_dr_read
);
127 qemu_put_be16s(f
, &env
->intercept_dr_write
);
128 qemu_put_be32s(f
, &env
->intercept_exceptions
);
129 qemu_put_8s(f
, &env
->v_tpr
);
132 for(i
= 0; i
< 11; i
++)
133 qemu_put_be64s(f
, &env
->mtrr_fixed
[i
]);
134 qemu_put_be64s(f
, &env
->mtrr_deftype
);
135 for(i
= 0; i
< 8; i
++) {
136 qemu_put_be64s(f
, &env
->mtrr_var
[i
].base
);
137 qemu_put_be64s(f
, &env
->mtrr_var
[i
].mask
);
140 /* KVM-related states */
142 /* There can only be one pending IRQ set in the bitmap at a time, so try
143 to find it and save its number instead (-1 for none). */
144 env
->pending_irq_vmstate
= -1;
145 for (i
= 0; i
< ARRAY_SIZE(env
->interrupt_bitmap
); i
++) {
146 if (env
->interrupt_bitmap
[i
]) {
147 bit
= ctz64(env
->interrupt_bitmap
[i
]);
148 env
->pending_irq_vmstate
= i
* 64 + bit
;
152 qemu_put_sbe32s(f
, &env
->pending_irq_vmstate
);
153 qemu_put_be32s(f
, &env
->mp_state
);
154 qemu_put_be64s(f
, &env
->tsc
);
157 qemu_put_be64s(f
, &env
->mcg_cap
);
159 qemu_put_be64s(f
, &env
->mcg_status
);
160 qemu_put_be64s(f
, &env
->mcg_ctl
);
161 for (i
= 0; i
< (env
->mcg_cap
& 0xff); i
++) {
162 qemu_put_be64s(f
, &env
->mce_banks
[4*i
]);
163 qemu_put_be64s(f
, &env
->mce_banks
[4*i
+ 1]);
164 qemu_put_be64s(f
, &env
->mce_banks
[4*i
+ 2]);
165 qemu_put_be64s(f
, &env
->mce_banks
[4*i
+ 3]);
168 qemu_put_be64s(f
, &env
->tsc_aux
);
171 #ifdef USE_X86LDOUBLE
172 /* XXX: add that in a FPU generic layer */
173 union x86_longdouble
{
178 #define MANTD1(fp) (fp & ((1LL << 52) - 1))
179 #define EXPBIAS1 1023
180 #define EXPD1(fp) ((fp >> 52) & 0x7FF)
181 #define SIGND1(fp) ((fp >> 32) & 0x80000000)
183 static void fp64_to_fp80(union x86_longdouble
*p
, uint64_t temp
)
187 p
->mant
= (MANTD1(temp
) << 11) | (1LL << 63);
188 /* exponent + sign */
189 e
= EXPD1(temp
) - EXPBIAS1
+ 16383;
190 e
|= SIGND1(temp
) >> 16;
195 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
)
197 CPUState
*env
= opaque
;
199 uint16_t fpregs_format
;
201 cpu_synchronize_state(env
);
202 if (version_id
< 3 || version_id
> CPU_SAVE_VERSION
)
204 for(i
= 0; i
< CPU_NB_REGS
; i
++)
205 qemu_get_betls(f
, &env
->regs
[i
]);
206 qemu_get_betls(f
, &env
->eip
);
207 qemu_get_betls(f
, &env
->eflags
);
208 qemu_get_be32s(f
, &env
->hflags
);
210 qemu_get_be16s(f
, &env
->fpuc
);
211 qemu_get_be16s(f
, &env
->fpus_vmstate
);
212 qemu_get_be16s(f
, &env
->fptag_vmstate
);
213 qemu_get_be16s(f
, &fpregs_format
);
215 /* NOTE: we cannot always restore the FPU state if the image come
216 from a host with a different 'USE_X86LDOUBLE' define. We guess
217 if we are in an MMX state to restore correctly in that case. */
218 guess_mmx
= ((env
->fptag_vmstate
== 0xff) && (env
->fpus_vmstate
& 0x3800) == 0);
219 for(i
= 0; i
< 8; i
++) {
223 switch(fpregs_format
) {
225 mant
= qemu_get_be64(f
);
226 exp
= qemu_get_be16(f
);
227 #ifdef USE_X86LDOUBLE
228 env
->fpregs
[i
].d
= cpu_set_fp80(mant
, exp
);
232 env
->fpregs
[i
].mmx
.MMX_Q(0) = mant
;
234 env
->fpregs
[i
].d
= cpu_set_fp80(mant
, exp
);
238 mant
= qemu_get_be64(f
);
239 #ifdef USE_X86LDOUBLE
241 union x86_longdouble
*p
;
243 p
= (void *)&env
->fpregs
[i
];
248 fp64_to_fp80(p
, mant
);
252 env
->fpregs
[i
].mmx
.MMX_Q(0) = mant
;
260 /* XXX: restore FPU round state */
261 env
->fpstt
= (env
->fpus_vmstate
>> 11) & 7;
262 env
->fpus
= env
->fpus_vmstate
& ~0x3800;
263 env
->fptag_vmstate
^= 0xff;
264 for(i
= 0; i
< 8; i
++) {
265 env
->fptags
[i
] = (env
->fptag_vmstate
>> i
) & 1;
268 for(i
= 0; i
< 6; i
++)
269 cpu_get_seg(f
, &env
->segs
[i
]);
270 cpu_get_seg(f
, &env
->ldt
);
271 cpu_get_seg(f
, &env
->tr
);
272 cpu_get_seg(f
, &env
->gdt
);
273 cpu_get_seg(f
, &env
->idt
);
275 qemu_get_be32s(f
, &env
->sysenter_cs
);
276 if (version_id
>= 7) {
277 qemu_get_betls(f
, &env
->sysenter_esp
);
278 qemu_get_betls(f
, &env
->sysenter_eip
);
280 env
->sysenter_esp
= qemu_get_be32(f
);
281 env
->sysenter_eip
= qemu_get_be32(f
);
284 qemu_get_betls(f
, &env
->cr
[0]);
285 qemu_get_betls(f
, &env
->cr
[2]);
286 qemu_get_betls(f
, &env
->cr
[3]);
287 qemu_get_betls(f
, &env
->cr
[4]);
289 for(i
= 0; i
< 8; i
++)
290 qemu_get_betls(f
, &env
->dr
[i
]);
291 cpu_breakpoint_remove_all(env
, BP_CPU
);
292 cpu_watchpoint_remove_all(env
, BP_CPU
);
293 for (i
= 0; i
< 4; i
++)
294 hw_breakpoint_insert(env
, i
);
296 qemu_get_sbe32s(f
, &env
->a20_mask
);
298 qemu_get_be32s(f
, &env
->mxcsr
);
299 for(i
= 0; i
< CPU_NB_REGS
; i
++) {
300 qemu_get_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(0));
301 qemu_get_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(1));
305 qemu_get_be64s(f
, &env
->efer
);
306 qemu_get_be64s(f
, &env
->star
);
307 qemu_get_be64s(f
, &env
->lstar
);
308 qemu_get_be64s(f
, &env
->cstar
);
309 qemu_get_be64s(f
, &env
->fmask
);
310 qemu_get_be64s(f
, &env
->kernelgsbase
);
312 if (version_id
>= 4) {
313 qemu_get_be32s(f
, &env
->smbase
);
315 if (version_id
>= 5) {
316 qemu_get_be64s(f
, &env
->pat
);
317 qemu_get_be32s(f
, &env
->hflags2
);
319 qemu_get_be32s(f
, &env
->halted
);
321 qemu_get_be64s(f
, &env
->vm_hsave
);
322 qemu_get_be64s(f
, &env
->vm_vmcb
);
323 qemu_get_be64s(f
, &env
->tsc_offset
);
324 qemu_get_be64s(f
, &env
->intercept
);
325 qemu_get_be16s(f
, &env
->intercept_cr_read
);
326 qemu_get_be16s(f
, &env
->intercept_cr_write
);
327 qemu_get_be16s(f
, &env
->intercept_dr_read
);
328 qemu_get_be16s(f
, &env
->intercept_dr_write
);
329 qemu_get_be32s(f
, &env
->intercept_exceptions
);
330 qemu_get_8s(f
, &env
->v_tpr
);
333 if (version_id
>= 8) {
335 for(i
= 0; i
< 11; i
++)
336 qemu_get_be64s(f
, &env
->mtrr_fixed
[i
]);
337 qemu_get_be64s(f
, &env
->mtrr_deftype
);
338 for(i
= 0; i
< 8; i
++) {
339 qemu_get_be64s(f
, &env
->mtrr_var
[i
].base
);
340 qemu_get_be64s(f
, &env
->mtrr_var
[i
].mask
);
344 if (version_id
>= 9) {
345 qemu_get_sbe32s(f
, &env
->pending_irq_vmstate
);
346 memset(&env
->interrupt_bitmap
, 0, sizeof(env
->interrupt_bitmap
));
347 if (env
->pending_irq_vmstate
>= 0) {
348 env
->interrupt_bitmap
[env
->pending_irq_vmstate
/ 64] |=
349 (uint64_t)1 << (env
->pending_irq_vmstate
% 64);
351 qemu_get_be32s(f
, &env
->mp_state
);
352 qemu_get_be64s(f
, &env
->tsc
);
355 if (version_id
>= 10) {
356 qemu_get_be64s(f
, &env
->mcg_cap
);
358 qemu_get_be64s(f
, &env
->mcg_status
);
359 qemu_get_be64s(f
, &env
->mcg_ctl
);
360 for (i
= 0; i
< (env
->mcg_cap
& 0xff); i
++) {
361 qemu_get_be64s(f
, &env
->mce_banks
[4*i
]);
362 qemu_get_be64s(f
, &env
->mce_banks
[4*i
+ 1]);
363 qemu_get_be64s(f
, &env
->mce_banks
[4*i
+ 2]);
364 qemu_get_be64s(f
, &env
->mce_banks
[4*i
+ 3]);
369 if (version_id
>= 11) {
370 qemu_get_be64s(f
, &env
->tsc_aux
);